A packaging method for a power semiconductor packaging structure based on DBC interconnection

Abstract

The invention discloses a packaging method for a power semiconductor packaging structure based on DBC interconnection. The invention adopts a DBC interconnection method. Compared with traditional metal wire bonding, the upper and lower DBC plates are connected by large-size copper pillars. This method is conducive to reducing stray inductance, and the copper pillars can also enhance the heat dissipation effect. The phase change material provided by the invention generates nano silicon nitride on the surface of carbon fiber in situ. Through in-situ synthesis, the nano silicon nitride can form a uniform coating on the surface of the carbon fiber, avoiding the problem of particle aggregation in the blending process. At the same time, the in-situ generation method can form an effective heat conduction path on the microstructure, reduce the thermal resistance of the thermal interface, increase the heat conduction efficiency, and thus improve the thermal conductivity of the phase change material. Subsequently, the carbon fiber-loaded nano boron nitride material is treated with stearic acid to improve the dispersion performance of the carbon fiber-loaded nano boron nitride material in paraffin, further improving the efficiency of heat conduction.

Description

Technical Field

[0001] The invention relates to the technical field of electronic device packaging, and in particular to a packaging method of a power semiconductor packaging structure based on DBC interconnection. Background Art

[0002] Most of the commercial silicon nitride (SiC) devices currently available still use the traditional packaging method of silicon (Si) devices, which has been widely used in the electronic device industry and is relatively mature. The specific process usually includes several steps: first, the back of the SiC chip is soldered to the substrate through a soldering process. This substrate is often made of metal material and plays a role in heat dissipation and support; then the front electrode of the chip is led out using metal bonding wires to achieve electrical connection; in order to protect the chip and connection structure, and to improve the reliability of the device, plastic sealing or glue filling is usually performed. Traditional packaging technology has been widely accepted because of its maturity, low cost, and compatibility with and ability to replace existing Si-based devices.

[0003] However, SiC devices using traditional packaging structures also face some significant challenges, especially in high-frequency and fast switching applications. Due to the characteristics of these packaging methods, the stray inductance parameters of the devices are often large. Stray inductance is an important factor affecting switching performance, especially when SiC devices are switched quickly, which will cause severe voltage overshoot. This voltage overshoot will not only damage the device itself, but also pose a potential threat to the stability of the circuit; in addition, larger stray inductance will cause an increase in switching losses, making it more difficult to achieve high-efficiency operation, and will also increase the degree of electromagnetic interference (EMI), affecting surrounding circuits and equipment, and affecting the overall performance of the system.

[0004] The size of the stray inductance is closely related to the area of ​​the switch commutation loop. In traditional packaging, the design of the metal bonding connection method is often not optimized, resulting in a larger current path area. In addition, the layout of the component pins and the planar arrangement of multiple chips in the package are also key factors that cause a larger commutation loop area. For example, long pins and complex connection paths will increase the path of current circulation, further leading to an increase in stray inductance. Therefore, how to optimize the package structure, reduce the area of ​​the commutation loop, and reduce stray inductance has become the key to improving the performance of SiC devices.

[0005] Chinese patent document CN201710952767.8 discloses a double-sided interconnected silicon-based IGBT module using low-temperature sintered nanosilver and a preparation method, which consists of a power segment, an upper DBC substrate, a lower DBC substrate, nanosilver solder paste, a silicon-based diode chip, silicone gel and a molding resin; the lower surface of the silicon-based IGBT chip, the lower surface of the silicon-based diode chip and the lower surface of the buffer layer are respectively connected to the lower DBC substrate through nanosilver, and the same connection is also made on the upper DBC substrate. The connection strength between the chip and the buffer layer and the DBC substrate can reach more than 30MPa; the silicon-based IGBT chip and the silicon-based diode chip and the upper surface of the buffer layer of the lower DBC substrate are respectively connected to the buffer layer of the upper DBC substrate and the upper surfaces of the silicon-based IGBT chip and the silicon-based diode chip through SnAgCu solder sheets or SnAg solder sheets to obtain a double-sided interconnected silicon-based IGBT module; the connection path of this patent is still relatively complicated and needs to be further improved. Summary of the invention

[0006] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a packaging method for a power semiconductor packaging structure based on DBC interconnection, in which the upper and lower DBC boards are connected by copper pillars, replacing the traditional metal wire bonding. This method is conducive to reducing stray inductance, and the copper pillars can also enhance the heat dissipation effect.

[0007] In order to achieve the above object, the present invention adopts the following technical scheme:

[0008] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0009] S1. Prepare the lower DBC board, apply solder to the copper layer surface on the upper side of the lower DBC board, and mount the chip on the solder surface;

[0010] S2, filling with thermal conductive glue for potting and curing;

[0011] S3, etching holes and growing copper pillars in the holes;

[0012] S4, remove excess thermal conductive glue and copper pillars, and grind them to the same height as the chip;

[0013] S5, using the upper DBC board for mounting to form an interconnected structure of the upper and lower DBC boards;

[0014] S6. Connect external terminals to the copper layers of the upper and lower DBC boards respectively;

[0015] S7. Attach heat sinks on the copper layers of the upper and lower DBC boards respectively, wherein the heat sinks are filled with phase change materials.

[0016] Preferably, the preparation method of the phase change material is as follows:

[0017] S01, adding carbon fiber to a sulfuric acid solution, heating and stirring, and then filtering, washing, and drying to obtain pretreated carbon fiber;

[0018] S02, immersing the pretreated carbon fiber in a boron source solution, taking it out and drying it, and then placing it in an ammonia atmosphere for calcination to obtain a carbon fiber loaded with nano boron nitride material;

[0019] S03, adding the carbon fiber-loaded nano-boron nitride material and stearic acid to an ethanol solvent, heating and stirring evenly, and then filtering and drying to obtain a composite material;

[0020] S04, heating the paraffin wax until it is melted, then adding the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

[0021] Further preferably, in step S01, the temperature of the heating and stirring treatment is 60-80° C. and the time is 2-5 h.

[0022] Further preferably, in step S02, the usage ratio of the pretreated carbon fiber and the boron source solution is 1 g: 5-10 mL.

[0023] Further preferably, in step S02, the mass fraction of the boron source solution is 1-2%.

[0024] Further preferably, in step S02, the boron source is selected from boron oxide or borate.

[0025] Further preferably, in step S02, the process conditions for calcination are: the flow rate of ammonia is 50-200 mL / min, the calcination temperature is 400-600° C., and the calcination time is 30-60 min.

[0026] Further preferably, in step S03, the mass ratio of the carbon fiber-loaded nano-boron nitride material to stearic acid is 10-15:2-4.

[0027] Further preferably, in step S04, the mass ratio of paraffin wax to the composite material is 80-100:10-15.

[0028] Compared with the prior art, the present invention has the following beneficial effects:

[0029] (1) The present invention adopts large-size copper pillars to connect the upper and lower DBC plates, which not only effectively reduces the stray inductance of the device, but also optimizes the current path. This design reduces the inductance loss in the current cycle, thereby improving the switching performance. In particular, in high-frequency applications, it can significantly reduce the voltage overshoot phenomenon and ensure the reliability of the device. In addition, the copper pillars also have excellent thermal conductivity and can effectively enhance the heat dissipation effect during the operation of the device. This is particularly critical for improving the overall performance of SiC devices, because thermal management is directly related to the stability and long-term reliability of the device. By integrating electrical connection and heat dissipation functions, the DBC interconnection method not only meets the high efficiency requirements, but also provides a reliable solution for high power density applications.

[0030] (2) By removing the complex metal wire bonding in traditional packaging, the overall packaging volume is significantly reduced. This innovative packaging design reduces the overall design complexity of the system and makes the device integration more compact. In addition, the reduced packaging volume helps to shorten the signal transmission path, which further reduces signal delay and interference and improves the response speed and working efficiency of the device. Overall, this lightweight and miniaturized packaging design meets the current market's urgent demand for high-performance, high-reliability and miniaturized solutions.

[0031] (3) The phase change material provided by the present invention generates nano-boron nitride on the surface of carbon fiber in situ. Through in-situ synthesis, nano-boron nitride can form a uniform coating on the surface of carbon fiber, avoiding the problem of particle aggregation during the blending process. At the same time, the in-situ generation method can form an effective heat conduction path on the microstructure, reduce the thermal resistance of the thermal interface, and increase the heat conduction efficiency, thereby improving the thermal conductivity of the phase change material. Subsequently, the carbon fiber-loaded nano-boron nitride material is treated with stearic acid, which improves the dispersion performance of the carbon fiber-loaded nano-boron nitride material in paraffin, further improving the efficiency of heat conduction. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A packaging schematic diagram of step S1 in the packaging method provided by the present invention;

[0033] Figure 2 A packaging schematic diagram of step S2 in the packaging method provided by the present invention;

[0034] Figure 3 A packaging schematic diagram of step S3 in the packaging method provided by the present invention;

[0035] Figure 4 A packaging schematic diagram of step S4 in the packaging method provided by the present invention;

[0036] Figure 5A packaging schematic diagram of step S5 in the packaging method provided by the present invention;

[0037] Figure 6 A packaging schematic diagram of step S6 in the packaging method provided by the present invention;

[0038] Figure 7 A schematic diagram of a power semiconductor packaging structure provided by the present invention;

[0039] Figure 8 A partial top view of the heat dissipation plate provided by the present invention. DETAILED DESCRIPTION

[0040] The present invention is further described in detail below through specific preferred embodiments, but the present invention is not limited to the following embodiments.

[0041] It should be noted that, unless otherwise specified, the chemical reagents involved in the present invention were purchased through commercial channels.

[0042] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0043] S1, such as Figure 1 As shown, prepare the lower DBC board 1, coat the solder 3 on the surface of the copper layer 2 on the upper side of the lower DBC board 1, and mount the chip 4 on the surface of the solder 3, and then package and solidify.

[0044] S2, such as Figure 2 As shown, the thermal conductive adhesive 5 is filled and potting and curing is performed;

[0045] In this step, the thermal conductive adhesive may be silicone gel, which mainly plays the role of heat dissipation and protection.

[0046] S3, such as Figure 3 As shown, holes are etched and copper pillars 6 are grown in the holes;

[0047] In this step, the copper pillars are used to connect the upper and lower DBC boards to form a circuit connection.

[0048] S4, such as Figure 4 As shown, the excess thermal conductive adhesive 5 and copper pillars 6 are removed and ground to the same height as the chip 4.

[0049] S5, such as Figure 5 As shown, the upper DBC board 7 is mounted to form an interconnection structure of the upper and lower DBC boards.

[0050] S6, such as Figure 6 As shown, external terminals 8 are connected to the copper layers of the upper and lower DBC boards respectively.

[0051] S7, such as Figure 7As shown, heat sinks 9 are mounted on the copper layers of the upper and lower DBC boards, respectively. The heat sinks 9 are filled with phase change materials 10. A partial top view of the heat sink is shown in FIG. Figure 8 shown.

[0052] Specifically, the preparation method of the phase change material is as follows:

[0053] S01, adding carbon fiber to a sulfuric acid solution, heating and stirring, and then filtering, washing, and drying to obtain pretreated carbon fiber;

[0054] S02, immersing the pretreated carbon fiber in a boron source solution, taking it out and drying it, and then placing it in an ammonia atmosphere for calcination to obtain a carbon fiber loaded with nano boron nitride material;

[0055] S03, adding the carbon fiber-loaded nano-boron nitride material and stearic acid to an ethanol solvent, heating and stirring evenly, and then filtering and drying to obtain a composite material;

[0056] S04, heating the paraffin wax until it is melted, then adding the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

[0057] In some embodiments of the present invention, in step S01, the temperature of the heating and stirring treatment is 60-80°C, for example, 60°C, 65°C, 70°C, 75°C, and 80°C can be selected; the time of the heating and stirring treatment is 2-5h, for example, 2h, 3h, 4h, and 5h can be selected; but it is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0058] In some embodiments of the present invention, in step S02, the usage ratio of pretreated carbon fiber and boron source solution is 1g:5-10mL, for example, 1g:5mL, 1g:6mL, 1g:7mL, 1g:8mL, 1g:9mL, 1g:10mL can be selected, but it is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0059] The mass fraction of the boron source solution is 1-2%, for example, 1%, 1.2%, 1.5%, 1.8%, 2% can be selected, but it is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0060] The boron source is selected from boron oxide or borate.

[0061] In some embodiments of the present invention, in step S02, the process conditions for calcination are: the flow rate of ammonia is 50-200 mL / min, for example, 50 mL / min, 80 mL / min, 100 mL / min, 120 mL / min, 150 mL / min, 180 mL / min, 200 mL / min can be selected; the calcination temperature is 400-600°C, for example, 400°C, 450°C, 500°C, 550°C, 600°C can be selected; the calcination time is 30-60min, for example, 30min, 35min, 40min, 45min, 50min, 55min, 60min can be selected, but it is not limited to the listed values, and other values ​​not listed within the numerical range are also applicable.

[0062] In some embodiments of the present invention, in step S03, the mass ratio of carbon fiber loaded nano boron nitride material and stearic acid is 10-15:2-4, for example, 10:2, 10:3, 10:4, 12:2, 12:3, 12:4, 15:2, 15:3, 15:4 can be selected, but it is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0063] In some embodiments of the present invention, in step S04, the mass ratio of paraffin wax to composite material is 80-100:10-15, for example, 80:10, 80:15, 90:10, 90:15, 100:10, 100:15 can be selected, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0064] The present invention is further described below by means of specific examples. The fineness of the carbon fiber used in the present invention is 1200 mesh, purchased from Jiangxi Shuobang New Material Technology Co., Ltd.; paraffin wax was purchased from Shanghai Xinnuo Chemical Co., Ltd.

[0065] Example 1

[0066] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0067] S1. Prepare the lower DBC board, apply solder to the copper layer surface on the upper side of the lower DBC board, and mount the chip on the solder surface;

[0068] S2, filling with silicone gel for potting and curing;

[0069] S3, etching holes and growing copper pillars in the holes;

[0070] S4, remove excess silicone gel and copper pillars, and grind to the same height as the chip;

[0071] S5, using the upper DBC board for mounting to form an interconnected structure of the upper and lower DBC boards;

[0072] S6. Connect external terminals to the copper layers of the upper and lower DBC boards respectively;

[0073] S7. Attach heat sinks on the copper layers of the upper and lower DBC boards respectively, wherein the heat sinks are filled with phase change materials.

[0074] Wherein, the preparation method of the phase change material is as follows:

[0075] S01, adding 10 g of carbon fiber into 100 mL of 40 wt% sulfuric acid solution, heating and stirring at 60° C. for 5 h, then filtering, washing and drying to obtain pretreated carbon fiber;

[0076] S02, immersing 10g of pretreated carbon fiber in 50mL, 2wt% sodium borate solution, taking it out and drying it, the drying temperature is 65°C, and then placing it in an ammonia atmosphere for calcination, the ammonia flow rate is 100mL / min, the calcination temperature is 400°C, and the calcination time is 60min, to obtain a carbon fiber loaded nano boron nitride material;

[0077] S03, adding 10 g of carbon fiber loaded nano boron nitride material and 2 g of stearic acid into 100 mL of ethanol solvent, stirring evenly at 60° C., then filtering and drying to obtain a composite material;

[0078] S04, heating 80g of paraffin wax to 90°C to melt, then adding 10g of the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

[0079] The obtained phase change material was tested for thermal conductivity and melting enthalpy using a differential scanning calorimeter. 6 mg of phase change material was weighed and sealed in a standard aluminum crucible. Under nitrogen protection, the temperature was raised from -10°C to 110°C at a rate of 10°C / min, and then cooled to -10°C at the same rate. The test results showed that the thermal conductivity was 7.36W / (m*K) and the melting enthalpy was 184.3J / g.

[0080] Example 2

[0081] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0082] S1. Prepare the lower DBC board, apply solder to the copper layer surface on the upper side of the lower DBC board, and mount the chip on the solder surface;

[0083] S2, filling with silicone gel for potting and curing;

[0084] S3, etching holes and growing copper pillars in the holes;

[0085] S4, remove excess silicone gel and copper pillars, and grind to the same height as the chip;

[0086] S5, using the upper DBC board for mounting to form an interconnected structure of the upper and lower DBC boards;

[0087] S6. Connect external terminals to the copper layers of the upper and lower DBC boards respectively;

[0088] S7. Attach heat sinks on the copper layers of the upper and lower DBC boards respectively, wherein the heat sinks are filled with phase change materials.

[0089] Wherein, the preparation method of the phase change material is as follows:

[0090] S01, adding 10 g of carbon fiber into 100 mL of 40 wt% sulfuric acid solution, heating and stirring at 80° C. for 2 h, then filtering, washing and drying to obtain pretreated carbon fiber;

[0091] S02, immerse 10g of pretreated carbon fiber in 100mL, 2wt% sodium borate solution, take it out and dry it, the drying temperature is 65°C, and then place it in an ammonia atmosphere for calcination, the ammonia flow rate is 200mL / min, the calcination temperature is 600°C, and the calcination time is 30min to obtain a carbon fiber loaded with nano boron nitride material;

[0092] S03, adding 15 g of carbon fiber-loaded nano-boron nitride material and 4 g of stearic acid into 100 mL of ethanol solvent, stirring evenly at 60° C., then filtering and drying to obtain a composite material;

[0093] S04, heating 100g of paraffin wax to 90°C to melt, then adding 15g of the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

[0094] The obtained phase change material was tested for thermal conductivity and melting enthalpy using a differential scanning calorimeter. 6 mg of phase change material was weighed and sealed in a standard aluminum crucible. Under nitrogen protection, the temperature was raised from -10°C to 110°C at a rate of 10°C / min, and then cooled to -10°C at the same rate. The test results showed that the thermal conductivity was 7.68W / (m*K) and the melting enthalpy was 190.2J / g.

[0095] Example 3

[0096] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0097] S1. Prepare the lower DBC board, apply solder to the copper layer surface on the upper side of the lower DBC board, and mount the chip on the solder surface;

[0098] S2, filling with silicone gel for potting and curing;

[0099] S3, etching holes and growing copper pillars in the holes;

[0100] S4, remove excess silicone gel and copper pillars, and grind to the same height as the chip;

[0101] S5, using the upper DBC board for mounting to form an interconnected structure of the upper and lower DBC boards;

[0102] S6. Connect external terminals to the copper layers of the upper and lower DBC boards respectively;

[0103] S7. Attach heat sinks on the copper layers of the upper and lower DBC boards respectively, wherein the heat sinks are filled with phase change materials.

[0104] Wherein, the preparation method of the phase change material is as follows:

[0105] S01, adding 10 g of carbon fiber into 100 mL of 40 wt% sulfuric acid solution, heating and stirring at 70° C. for 3 h, then filtering, washing and drying to obtain pretreated carbon fiber;

[0106] S02, immerse 10g of pretreated carbon fiber in 100mL, 1wt% sodium borate solution, take it out and dry it, the drying temperature is 65°C, and then place it in an ammonia atmosphere for calcination, the ammonia flow rate is 50mL / min, the calcination temperature is 500°C, and the calcination time is 45min to obtain a carbon fiber loaded with nano boron nitride material;

[0107] S03, adding 12 g of carbon fiber loaded nano boron nitride material and 3 g of stearic acid into 100 mL of ethanol solvent, stirring evenly at 60° C., then filtering and drying to obtain a composite material;

[0108] S04, heating 90g of paraffin wax to 90°C to melt, then adding 12g of the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

[0109] The obtained phase change material was tested for thermal conductivity and melting enthalpy using a differential scanning calorimeter. 6 mg of phase change material was weighed and sealed in a standard aluminum crucible. Under nitrogen protection, the temperature was raised from -10°C to 110°C at a rate of 10°C / min, and then cooled to -10°C at the same rate. The test results showed that the thermal conductivity was 7.51 W / (m*K) and the melting enthalpy was 186.8 J / g.

[0110] Comparative Example 1

[0111] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0112] S1. Prepare the lower DBC board, apply solder to the copper layer surface on the upper side of the lower DBC board, and mount the chip on the solder surface;

[0113] S2, filling with silicone gel for potting and curing;

[0114] S3, etching holes and growing copper pillars in the holes;

[0115] S4, remove excess silicone gel and copper pillars, and grind to the same height as the chip;

[0116] S5, using the upper DBC board for mounting to form an interconnected structure of the upper and lower DBC boards;

[0117] S6. Connect external terminals to the copper layers of the upper and lower DBC boards respectively;

[0118] S7. Attach heat sinks on the copper layers of the upper and lower DBC boards respectively, wherein the heat sinks are filled with phase change materials.

[0119] Wherein, the preparation method of the phase change material is as follows:

[0120] S01, adding 10 g of carbon fiber into 100 mL of 40 wt% sulfuric acid solution, heating and stirring at 60° C. for 5 h, then filtering, washing and drying to obtain pretreated carbon fiber;

[0121] S02, adding 10 g of pretreated carbon fiber and 2 g of stearic acid into 100 mL of ethanol solvent, stirring evenly at 60° C., then filtering and drying to obtain a composite material;

[0122] S03, heating 80g of paraffin wax to 90°C to melt, then adding 10g of the composite material obtained in step S02, stirring evenly, cooling, and crushing to obtain the phase change material.

[0123] Compared with Example 1, in Comparative Example 1, the pretreated carbon fiber was not subjected to the nano-boron nitride loading treatment.

[0124] The obtained phase change material was tested for thermal conductivity and melting enthalpy using a differential scanning calorimeter. 6 mg of phase change material was weighed and sealed in a standard aluminum crucible. Under nitrogen protection, the temperature was raised from -10°C to 110°C at a rate of 10°C / min, and then cooled to -10°C at the same rate. The test results showed that the thermal conductivity was 5.29 W / (m*K) and the melting enthalpy was 131.5 J / g.

[0125] Comparative Example 2

[0126] A packaging method for a power semiconductor packaging structure based on DBC interconnection comprises the following steps:

[0127] S1. Prepare the lower DBC board, apply solder to the copper layer surface on the upper side of the lower DBC board, and mount the chip on the solder surface;

[0128] S2, filling with silicone gel for potting and curing;

[0129] S3, etching holes and growing copper pillars in the holes;

[0130] S4, remove excess silicone gel and copper pillars, and grind to the same height as the chip;

[0131] S5, using the upper DBC board for mounting to form an interconnected structure of the upper and lower DBC boards;

[0132] S6. Connect external terminals to the copper layers of the upper and lower DBC boards respectively;

[0133] S7. Attach heat sinks on the copper layers of the upper and lower DBC boards respectively, wherein the heat sinks are filled with phase change materials.

[0134] Wherein, the preparation method of the phase change material is as follows:

[0135] S01, adding 10 g of carbon fiber into 100 mL of 40 wt% sulfuric acid solution, heating and stirring at 60° C. for 5 h, then filtering, washing and drying to obtain pretreated carbon fiber;

[0136] S02, mixing 10 g of pretreated carbon fiber and 1 g of boron nitride powder (800 mesh) to obtain a blended material;

[0137] S03, adding 10 g of the blended material and 2 g of stearic acid into 100 mL of ethanol solvent, stirring evenly at 60° C., and then filtering and drying to obtain a composite material;

[0138] S04, heating 80g of paraffin wax to 90°C to melt, then adding 10g of the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

[0139] Compared with Example 1, in Comparative Example 2, the pretreated carbon fiber and the boron nitride powder are directly blended.

[0140] The obtained phase change material was tested for thermal conductivity and melting enthalpy using a differential scanning calorimeter. 6 mg of phase change material was weighed and sealed in a standard aluminum crucible. Under nitrogen protection, the temperature was raised from -10°C to 110°C at a rate of 10°C / min, and then cooled to -10°C at the same rate. The test results showed that the thermal conductivity was 6.74W / (m*K) and the melting enthalpy was 157.6J / g.

[0141] Finally, it should be noted that the above embodiments do not limit the present invention in any form. For those skilled in the art, some modifications and improvements can be made to the present invention. Therefore, any modification or improvement made without departing from the spirit of the present invention belongs to the scope of protection claimed in the present invention.

Claims

1. A packaging method for a power semiconductor packaging structure based on DBC interconnection, characterized in that: The steps include: S1, preparing a lower DBC board (1), coating the solder (3) on the surface of the copper layer (2) on the upper side of the lower DBC board (1), and mounting the chip (4) on the surface of the solder (3); S2, filling the thermal conductive adhesive (5) for potting and curing; S3, etching holes and growing copper pillars (6) in the holes; S4, removing excess thermal conductive glue (5) and copper pillars (6), and grinding them to the same height as the chip (4); S5, mounting the upper DBC board (7) to form an interconnected structure of the upper and lower DBC boards; S6, connecting external terminals (8) to the copper layers of the upper and lower DBC boards respectively; S7, mounting heat sinks (9) on the copper layers of the upper and lower DBC plates respectively, wherein the heat sinks (9) are filled with phase change material (10); The preparation method of the phase change material (10) is as follows: S01, adding carbon fiber to a sulfuric acid solution, heating and stirring, and then filtering, washing, and drying to obtain pretreated carbon fiber; S02, immersing the pretreated carbon fiber in a boron source solution, taking it out and drying it, and then placing it in an ammonia atmosphere for calcination to obtain a carbon fiber loaded with nano boron nitride material; S03, adding the carbon fiber-loaded nano-boron nitride material and stearic acid to an ethanol solvent, heating and stirring evenly, and then filtering and drying to obtain a composite material; S04, heating the paraffin wax until it is melted, then adding the composite material obtained in step S03, stirring evenly, cooling, and crushing to obtain the phase change material.

2. The packaging method according to claim 1, characterized in that: In step S01, the temperature of the heating and stirring treatment is 60-80°C and the time is 2-5h.

3. The packaging method according to claim 1, characterized in that: In step S02, the usage ratio of the pretreated carbon fiber and the boron source solution is 1 g: 5-10 mL.

4. The packaging method according to claim 1, characterized in that: In step S02, the mass fraction of the boron source solution is 1-2%.

5. The packaging method according to claim 1, characterized in that: In step S02, the boron source is selected from boron oxide or borate.

6. The packaging method according to claim 1, characterized in that: In step S02, the process conditions for calcination are: the flow rate of ammonia is 50-200 mL / min, the calcination temperature is 400-600° C., and the calcination time is 30-60 min.

7. The packaging method according to claim 1, characterized in that: In step S03, the mass ratio of the carbon fiber-loaded nano-boron nitride material to stearic acid is 10-15:2-4.

8. The packaging method according to claim 1, characterized in that: In step S04, the mass ratio of paraffin wax to composite material is 80-100:10-15.

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