Micro-led device preparation method, micro-led device and display device

Abstract

The present disclosure provides a micro-LED device preparation method, a micro-LED device and a display device. The method comprises: providing a micro-LED epitaxial wafer and a driving substrate, the micro-LED epitaxial wafer comprising, from bottom to top, a first semiconductor layer, a multi-quantum well structure and a second semiconductor layer in sequence, and the driving substrate comprising a first electrode array and a second electrode; bonding the micro-LED epitaxial wafer on the driving substrate; etching the micro-LED epitaxial wafer from the first semiconductor layer until the driving substrate is exposed, to obtain a mesa structure comprising a boss array, each boss in the boss array corresponding to a first electrode in the first electrode array; disposing a first passivation layer on the mesa structure, so that an isolation gap is formed in the first passivation layer between every two adjacent bosses; disposing a conductive connection layer on the first passivation layer, so that the conductive connection layer electrically connects the first semiconductor layer on each boss with the second electrode through the first passivation layer, to obtain a micro-LED device.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor LEDs, and in particular, to a micro-LED device preparation method, a micro-LED device, and a display device. BACKGROUND

[0002] With the continuous pursuit of display technology, display technology gradually develops in the direction of small size and high resolution, and Micro LED is a representative of micro display technology. Micro LED technology is a three-in-one technology of miniaturization, matrix, and thin film of LED chips, and the size of the pixel points is less than 50 μm. However, the preparation and structure of Micro LED still have some problems, which are difficult to meet the increasingly stringent requirements of light crosstalk prevention and other requirements brought by pixel miniaturization. SUMMARY

[0003] The scheme of the present disclosure provides a micro-LED device preparation method, a micro-LED device, and a display device.

[0004] According to an aspect of an embodiment of the present disclosure, a micro-LED device preparation method is provided. The method comprises: providing a micro-LED epitaxial wafer and a driving substrate, the micro-LED epitaxial wafer comprising, from bottom to top, a first semiconductor layer, a multi-quantum well structure, and a second semiconductor layer, the driving substrate comprising a first electrode array and a second electrode; bonding the micro-LED epitaxial wafer on the driving substrate and exposing the first semiconductor layer; etching the micro-LED epitaxial wafer from the first semiconductor layer until the driving substrate is exposed, to obtain a mesa structure comprising a bump array, wherein the bump array comprises a plurality of bumps, and each bump in the bump array corresponds to a first electrode in the first electrode array of the driving substrate; disposing a first passivation layer on the mesa structure, so that an isolation gap is formed in the first passivation layer between every two adjacent bumps; disposing a conductive connection layer on the first passivation layer, so that the conductive connection layer electrically connects the first semiconductor layer on each bump in the bump array and the second electrode of the driving substrate through the first passivation layer, to obtain the micro-LED device.

[0005] Further, the micro-LED epitaxial wafer further comprises a substrate and a third semiconductor layer, the substrate is located on a side of the first semiconductor layer opposite to the multi-quantum well structure, and the third semiconductor layer is located between the substrate and the first semiconductor layer. Bonding the micro-LED epitaxial wafer on the driving substrate and exposing the first semiconductor layer comprises: disposing a conductive bonding layer on the second semiconductor layer of the micro-LED epitaxial wafer; bonding the micro-LED epitaxial wafer on the driving substrate through the conductive bonding layer; and removing the substrate and the third semiconductor layer.

[0006] Further, the method further comprises: before the first passivation layer is arranged on the mesa structure, arranging a second passivation layer on the mesa structure; and arranging a reflective layer on the second passivation layer on the sidewall of each of the plurality of micro-LED units.

[0007] Further, the method further comprises: before the first passivation layer is arranged on the mesa structure, arranging a second passivation layer on the mesa structure; and arranging a reflective layer on the second passivation layer on the sidewall of each of the plurality of micro-LED units.

[0008] Further, the arranging the second passivation layer on the mesa structure comprises: arranging the second passivation layer on the mesa structure along the profile of the mesa structure with a predetermined thickness, wherein the predetermined thickness is equal to one fourth of the wavelength of the light emitted by the micro-LED unit corresponding to the mesa structure.

[0009] Further, the method further comprises: before the first passivation layer is arranged on the mesa structure, arranging a second passivation layer on the mesa structure; and arranging a reflective layer on the second passivation layer on the sidewall of each of the plurality of micro-LED units.

[0010] Further, the method further comprises: before the first passivation layer is arranged on the mesa structure, arranging a second passivation layer on the mesa structure; and arranging a reflective layer on the second passivation layer on the sidewall of each of the plurality of micro-LED units.

[0011] Further, the method further includes: forming a first contact hole array and a second contact hole corresponding to the array of protrusions in the first passivation layer, so that each first contact hole in the first contact hole array exposes a portion of the first semiconductor layer on a corresponding protrusion, and the second contact hole exposes the second electrode of the driving substrate; and forming a conductive connection layer on the first passivation layer, on the exposed portion of the first semiconductor layer, and on the exposed second electrode, so that the conductive connection layer electrically connects the first semiconductor layer on each protrusion in the array of protrusions to the second electrode of the driving substrate through the first passivation layer and the second passivation layer.

[0012] According to another aspect of the present disclosure, a micro-LED device is also provided. The micro-LED device includes a micro-LED chip, wherein the micro-LED device includes a mesa structure including a driving substrate and an array of protrusions disposed on the driving substrate, the driving substrate includes a first electrode array and a second electrode, the array of protrusions includes a plurality of protrusions, each protrusion in the array of protrusions corresponds to a first electrode in the first electrode array of the driving substrate, each protrusion in the array of protrusions includes, in order from bottom to top, a second semiconductor layer, a multiple quantum well structure, and a first semiconductor layer, and the micro-LED device further includes: a first passivation layer disposed on the mesa structure, and an isolation gap is formed in the first passivation layer between each two adjacent protrusions; and a conductive connection layer disposed on the first passivation layer, and the conductive connection layer electrically connects the first semiconductor layer on each protrusion in the array of protrusions to the second electrode of the driving substrate through the first passivation layer.

[0013] Further, each protrusion in the array of protrusions further includes a conductive bonding layer disposed on the first electrode of the driving substrate, and the second semiconductor layer of the protrusion is disposed on the conductive bonding layer.

[0014] Further, the micro-LED device further includes a second passivation layer disposed on the mesa structure, and a reflective layer disposed on the second passivation layer on a sidewall of each protrusion in the array of protrusions, and the reflective layer includes a first metal layer.

[0015] Further, the isolation gap is formed by controlling a deposition rate of the first passivation layer at a position of the top corner of the protrusion.

[0016] Further, the second passivation layer is arranged along the profile of the mesa structure and has a predetermined thickness, wherein the predetermined thickness is equal to one quarter of the wavelength of the light emitted by the micro LED unit corresponding to the boss.

[0017] Further, the first passivation layer is arranged on the mesa structure provided with the second passivation layer and the reflective layer, and the conductive connecting layer electrically connects the first semiconductor layer on each boss in the boss array with the second electrode of the driving substrate through the first passivation layer and the second passivation layer.

[0018] Further, the first passivation layer includes a first sub-contact hole array corresponding to the boss array and a second sub-contact hole, the second passivation layer includes a third sub-contact hole array aligned with the first sub-contact hole array and a fourth sub-contact hole aligned with the second sub-contact hole, the first sub-contact hole array and the third sub-contact hole array constitute a first contact hole array, the second sub-contact hole and the fourth sub-contact hole constitute a second contact hole, each first contact hole in the first contact hole array exposes a partial first semiconductor layer on a corresponding boss, the second contact hole exposes the second electrode of the driving substrate, and the conductive connecting layer is integrally arranged on the first passivation layer, the exposed partial first semiconductor layer and the exposed second electrode.

[0019] Further, the first semiconductor layer is an n-GaN layer, the second semiconductor layer is a p-GaN layer, the conductive bonding layer includes a second metal layer, and the conductive connecting layer includes an indium tin oxide layer.

[0020] According to another aspect of the embodiments of the present disclosure, a display device is also provided. The display device includes the micro LED device described above.

[0021] By applying the technical solution of the present disclosure, the micro LED epitaxial wafer can be bonded on the driving substrate, the micro LED epitaxial wafer is etched to form a mesa structure including a boss array, then a first passivation layer is arranged on the mesa structure, so that an isolation gap is formed in the first passivation layer between every two adjacent bosses in the boss array, and finally a conductive connecting layer is arranged to form a micro LED device. Since the refractive index difference between the first passivation layer and the isolation gap is large, a refractive index discontinuity can be formed between the first passivation layer and the isolation gap, so that the propagation of light between the two bosses can be destroyed, and the light crosstalk between the two micro LED light emitting units can be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0022] The above and other objects, features and advantages of the present disclosure exemplary embodiments will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0023] Figure 1 is a flow chart illustrating a micro-LED device preparation method according to one embodiment of the present disclosure;

[0024] Figures 2-12 is a preparation process flow diagram illustrating a micro-LED device preparation method according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0025] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0026] It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs.

[0027] For ease of description, spatial relative terms such as "over", "above", "upper surface", "upper", etc. can be used herein to describe the spatial positional relationship of one device or feature with respect to other devices or features as shown in the drawings. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the device as described in the drawings. For example, if the device in the drawings is inverted, the device described as "above" or "over" other devices or structures will be positioned "below" or "under" the other devices or structures. Thus, the exemplary term "above" can include both "above" and "below" orientations. The device can also be positioned 90 degrees or in other orientations in other different ways, and the spatial relative descriptions used herein are interpreted accordingly.

[0028] Now, exemplary embodiments according to the present disclosure will be described in greater detail by referring to the drawings. However, these exemplary embodiments can be implemented in various different forms, and should not be construed as being limited to only the embodiments set forth herein. It should be understood that the embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art, and in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and the same reference numerals are used throughout the drawings to designate the same elements, and thus a description thereof will be omitted.

[0029] The present disclosure provides a micro-LED device preparation method. Referring to Figures 1-12 , Figure 1 is a flowchart showing a micro-LED device preparation method according to one embodiment of the present disclosure; Figures 2-12 is a preparation process flowchart showing a micro-LED device preparation method according to one embodiment of the present disclosure.

[0030] As Figure 1 shown, the micro-LED device preparation method includes the following steps S101-S105.

[0031] Step S101: providing a micro-LED epitaxial wafer and a driving substrate, the micro-LED epitaxial wafer comprising, from bottom to top, a first semiconductor layer, a multi-quantum well structure, and a second semiconductor layer, and the driving substrate comprising a first electrode array and a second electrode.

[0032] Step S102: bonding the micro-LED epitaxial wafer on the driving substrate and exposing the first semiconductor layer.

[0033] Step S103: etching the micro-LED epitaxial wafer from the first semiconductor layer until the driving substrate is exposed, to obtain a mesa structure comprising a bump array, wherein the bump array comprises a plurality of bumps, and each bump in the bump array corresponds to a first electrode in the first electrode array of the driving substrate.

[0034] Step S104: disposing a first passivation layer on the mesa structure, so that an isolation gap is formed in the first passivation layer between every two adjacent bumps.

[0035] Step S105: disposing a conductive connection layer on the first passivation layer, so that the conductive connection layer electrically connects the first semiconductor layer on each bump in the bump array with the second electrode of the driving substrate through the first passivation layer, to obtain the micro-LED device.

[0036] According to the technical solution, the micro LED epitaxial wafer can be bonded on the driving substrate, the micro LED epitaxial wafer is etched to form a mesa structure including a boss array, then the first passivation layer is arranged on the mesa structure, so that the isolation gap is formed in the first passivation layer between every two adjacent bosses of the boss array, and finally the conductive connection layer is arranged to form the micro LED device. The isolation gap is formed in the first passivation layer between every two adjacent bosses, and because the refractive index difference between the first passivation layer and the isolation gap is large, the refractive index mutation can be formed between the first passivation layer and the isolation gap, so that the propagation of light between the two bosses can be destroyed, and then the optical crosstalk between the two micro LED light emitting units can be reduced.

[0037] In step S101, a micro LED epitaxial wafer and a driving substrate can be provided, the micro LED epitaxial wafer sequentially includes a first semiconductor layer, a multi-quantum well structure and a second semiconductor layer from bottom to top, and the driving substrate includes a first electrode array and a second electrode.

[0038] According to an embodiment of the present disclosure, in order to prepare a micro LED device, a micro LED epitaxial wafer and a driving substrate can be obtained first, which can be prepared in advance or prepared in the micro LED device preparation method of the present disclosure.

[0039] Referring to Figures 2-12 , wherein Figure 2 A side view of a micro LED epitaxial wafer 10 according to an embodiment of the present disclosure is shown. As shown in Figure 2 , the micro LED epitaxial wafer 10 sequentially includes a first semiconductor layer 103, a multi-quantum well structure 104 and a second semiconductor layer 105 from bottom to top.

[0040] According to an embodiment of the present disclosure, the first semiconductor layer 103 can be an n-GaN layer, and the second semiconductor layer 105 can be a p-GaN layer, of course, the above semiconductor layers can also be any other suitable semiconductor layer, which is not limited herein.

[0041] Referring to Figures 2-12 , wherein Figure 3 A side view of a driving substrate 2 according to an embodiment of the present disclosure is shown. As shown in Figure 3 , the driving substrate 2 includes a first electrode array composed of a plurality of first electrodes 201 and a second electrode 202, wherein the first electrode 201 can be an anode and the second electrode 202 can be a cathode, or the first electrode 201 can be a cathode and the second electrode 202 can be an anode. Figure 3 Only four first electrodes 201 are shown schematically, and the number of first electrodes 201 is not limited herein. In addition, Figure 3Two second electrodes 202 are schematically shown. The number of second electrodes 202 can be determined according to the actual situation, for example, at least one.

[0042] In step S102, the microLED epitaxial wafer can be bonded to the driving substrate, exposing the first semiconductor layer.

[0043] According to embodiments of this disclosure, after obtaining the micro-LED epitaxial wafer and the driving substrate, the micro-LED epitaxial wafer can be bonded to the driving substrate, thereby exposing the first semiconductor layer. The bonding method between the micro-LED epitaxial wafer and the driving substrate can be metal bonding, hybrid bonding, or other bonding methods.

[0044] Furthermore, the micro-LED epitaxial wafer may further include a substrate and a third semiconductor layer. The substrate is located on the side of the first semiconductor layer opposite to the multi-quantum-well structure, and the third semiconductor layer is located between the substrate and the first semiconductor layer. Bonding the micro-LED epitaxial wafer to the driving substrate and exposing the first semiconductor layer may include: depositing a conductive bonding layer on the second semiconductor layer of the micro-LED epitaxial wafer; bonding the micro-LED epitaxial wafer to the driving substrate through the conductive bonding layer; and removing the substrate and the third semiconductor layer. The conductive bonding layer includes a second metal layer.

[0045] like Figure 2 As shown, the micro-LED epitaxial wafer 10 may further include a substrate 101 and a third semiconductor layer 102. The substrate 101 is located on the side of the first semiconductor layer 103 opposite to the multi-quantum well structure 104, and the third semiconductor layer 102 is located between the substrate 101 and the first semiconductor layer 103. The substrate 101 may include a sapphire substrate or a gallium nitride substrate, etc., and the third semiconductor layer 102 may be a u-GaN layer. Of course, the substrate 101 and the third semiconductor layer 102 may also be any other suitable substrate and semiconductor layer, which is not limited here.

[0046] Reference Figures 2-12 ,in Figure 4 A side view is shown of a conductive bonding layer 106 disposed on a second semiconductor layer 105 of a microLED epitaxial wafer 10 according to an embodiment of the present disclosure. Figure 4As shown, the conductive bonding layer 106 may include a second metal layer, which may include any one of a gold layer, a silver layer, a copper layer, and a tin layer. The conductive bonding layer 106 may also include an alloy layer, such as a tin-lead alloy layer, a gold alloy layer, or any suitable alloy layer. Of course, the material of the conductive bonding layer 106 can also be any suitable material, and is not limited here. Therefore, the conductive bonding layer 106, for example, a copper layer, can be deposited on the second semiconductor layer 105 of the micro-LED epitaxial wafer 10 using an electron beam evaporation method to obtain... Figure 4 The structure shown.

[0047] Reference Figures 2-12 ,in Figure 5 A side view is shown of a microLED epitaxial wafer 10 bonded to a driving substrate 2 via a conductive bonding layer 106 according to an embodiment of the present disclosure. Figure 5 As shown, the second semiconductor layer 105 of the microLED epitaxial wafer 10 can be bonded to the driving substrate 2 via a conductive bonding layer 106, such as a copper layer, to obtain... Figure 5 The structure shown is such that the conductive bonding layer 106 is in contact with the first electrode 201 on the driving substrate 2.

[0048] Reference Figures 2-12 ,in Figure 6 A side view of a microLED epitaxial wafer after removing the substrate 101 and the third semiconductor layer 102 according to an embodiment of the present disclosure is shown. Figure 6 As shown, for structures such as sapphire substrates, the substrate 101 and the third semiconductor layer 102 can be removed by laser lift-off and chemical cleaning; for homoepitaxial structures such as gallium nitride substrates, the substrate 101 and the third semiconductor layer 102 can be removed by etching. This exposes the first semiconductor layer 103, resulting in... Figure 6 The structure shown.

[0049] In step S103, the micro-LED epitaxial wafer can be etched from the first semiconductor layer until the driving substrate is exposed, resulting in a mesa structure including a boss array, wherein the boss array includes a plurality of bosses, and each boss in the boss array corresponds to a first electrode in the first electrode array of the driving substrate.

[0050] According to an embodiment of the present disclosure, after the micro-LED epitaxial wafer is bonded on the driving substrate and the first semiconductor layer is exposed, the micro-LED epitaxial wafer can be etched from the first semiconductor layer until the driving substrate is exposed, so as to obtain a mesa structure comprising a bump array. Each bump in the bump array corresponds to and contacts a first electrode in the first electrode array of the driving substrate, and the bump array corresponds to the micro-LED light emitting unit array of the finally formed micro-LED device. It is worth noting that, according to requirements, the bump array may, for example, comprise tens to millions of bumps, for example, when the micro-LED device is used for a lighting device, the number of bumps may be tens, when the micro-LED device is used for a display device, the number of bumps may be hundreds of thousands or even millions.

[0051] With reference to Figures 2-12 , wherein Figure 7 A side view of the mesa structure 20 etched out of the micro-LED epitaxial wafer 10 bonded on the driving substrate 2 is shown. Specifically, first, a silicon oxide layer can be deposited on the first semiconductor layer 103 of the micro-LED epitaxial wafer as a hard mask by using a plasma enhanced chemical vapor deposition (PECVD) method in a plasma enhanced chemical vapor deposition device, in which a mixed gas of silane (SiH4), nitrous oxide (N2O) and nitrogen (N2) is introduced. Then, a pattern of the bump array is photoetched by photoresist. Subsequently, the photoetched pattern is etched and mapped to the silicon oxide layer by inductively coupled plasma etching (ICP), in which a mixed gas of sulfur hexafluoride (SF6) and trifluoromethane (CHF3) and oxygen (O2) is used to dry etch the silicon oxide layer in an ICP etching instrument. Then, after the photoresist is removed using acetone, the pattern of the silicon oxide layer is etched and mapped to the surface of the driving substrate 2 by using a mixed gas of chlorine (CL2), boron trichloride (BCl3) and argon (Ar) by an inductively coupled plasma etching device, so as to obtain a structure as shown in Figure 7 .

[0052] It is worth noting that Figure 7 The number of bumps 21 contained in the bump array in Figure 7 is only illustrative and is not limited herein, and the bumps 21 correspond one-to-one to the first electrodes 201 of the driving substrate 2. As shown in , the bumps 21 contact the first electrodes 201 of the driving substrate 2, and specifically, the bumps 21 comprise a conductive bonding layer 106 which contacts the first electrodes 201 of the driving substrate 2.

[0053] In step S104, a first passivation layer can be disposed on the mesa structure, such that an isolation gap is formed in the first passivation layer between every two adjacent bosses.

[0054] According to embodiments of the present disclosure, after obtaining the mesa structure, a first passivation layer can be disposed on the mesa structure.

[0055] According to embodiments of the present disclosure, disposing the first passivation layer on the mesa structure, such that an isolation gap is formed in the first passivation layer between every two adjacent bosses can include: depositing the first passivation layer on the mesa structure, by controlling a deposition rate of the first passivation layer at the boss top corner position, such that the isolation gap is formed in the first passivation layer between every two adjacent bosses.

[0056] According to embodiments of the present disclosure, before disposing the first passivation layer on the mesa structure, the method can further include: disposing a second passivation layer on the mesa structure; disposing a reflective layer on the second passivation layer on the sidewall of each boss in the boss array.

[0057] Further, disposing the second passivation layer on the mesa structure can include: disposing a second passivation layer of a predetermined thickness on the mesa structure along the profile of the mesa structure, wherein the predetermined thickness is equal to one quarter of a wavelength of light emitted by the micro-LED unit corresponding to the boss.

[0058] According to embodiments of the present disclosure, disposing the first passivation layer on the mesa structure, such that an isolation gap is formed in the first passivation layer between every two adjacent bosses can include: disposing the first passivation layer on the mesa structure provided with the second passivation layer and the reflective layer, such that the isolation gap is formed in the first passivation layer between every two adjacent bosses.

[0059] Referring to Figures 2-12 wherein Figure 8 A side view cross-sectional view of the second passivation layer 107 disposed on the mesa structure 20 is shown. As Figure 8 shown, the second passivation layer 107 can be deposited on the mesa structure 20 using an atomic layer deposition method (ALD), whereby the second passivation layer 107 is arranged along the profile of the mesa structure 20, the material of the second passivation layer 107 can be, for example, aluminum oxide or silicon dioxide, and the predetermined thickness of the second passivation layer 107 is equal to one quarter of a wavelength of light emitted by the micro-LED unit corresponding to the boss 21, thereby improving the reflectivity for light emitted by the micro-LED unit.

[0060] Referring to Figures 2-12 wherein Figure 9A reflective layer 108 is shown disposed on the second passivation layer 107 on each of the sidewalls of the posts 21 of the post array. The reflective layer 108 can include a first metal layer, such as an aluminum layer, or any other applicable material layer. In particular, as shown in Figure 9 , a pattern of the reflective layer, such as an aluminum layer, can be photoetched using a photoresist, and then the reflective layer 108, such as an aluminum layer, can be deposited using an electron beam evaporation method, and finally the photoresist and excess metal can be removed using a lift-off process with acetone or a stripping solution, to obtain a structure as shown in Figure 9 . In addition, the reflective layer on each of the sidewalls of the posts of the post array can reflect light emitted by the micro-LED light emitting units toward the sidewall direction back to the micro-LED light emitting units, thereby reducing the optical crosstalk between the micro-LED light emitting units.

[0061] Referring to Figures 2-12 , wherein Figure 10 a side view cross-sectional view of a first passivation layer 109 disposed on the structure as shown in Figure 9 is shown. As shown in Figure 10 , first, a first passivation layer 109, such as a silicon dioxide layer, can be deposited on the structure as shown in Figure 9 using a plasma enhanced chemical vapor deposition method in a plasma enhanced chemical vapor deposition device. During the deposition of the first passivation layer 109, different deposition angles can be used at different positions, so that the deposition rate is faster at positions corresponding to the upper two corners of the posts 21, so that during the formation of the first passivation layer 109, the silicon dioxide layer deposited at positions corresponding to the adjacent two corners of the adjacent two posts 21 will preferentially contact and close, so that in the first passivation layer 109 between the two adjacent posts 21, an isolation gap 1091 will be formed. Thus, an isolation gap 1091 is formed between each two posts 21 of the post array, and since the refractive index difference between the first passivation layer 109 and the isolation gap 1091 is large, a refractive index discontinuity can be formed between the first passivation layer 109 and the isolation gap 1091, thereby breaking the propagation of light between the two posts, and further reducing the optical crosstalk between the two micro-LED light emitting units.

[0062] In step S105, a conductive connection layer can be disposed on the first passivation layer, so that the conductive connection layer electrically connects the first semiconductor layer on each of the posts of the post array with the second electrode of the driving substrate through the first passivation layer, to obtain the micro-LED device.

[0063] According to embodiments of the present disclosure, after the first passivation layer is disposed, a conductive connection layer can be disposed on the first passivation layer such that the conductive connection layer electrically connects the first semiconductor layer on the bump to the second electrode of the driving substrate through the first passivation layer, and the preparation of the micro-LED device is completed. The conductive connection layer can include a transparent conductive material layer, such as an indium tin oxide layer or a transparent conductive oxide layer, and of course the material of the conductive connection layer can also include any applicable material.

[0064] According to embodiments of the present disclosure, disposing the conductive connection layer on the first passivation layer such that the conductive connection layer electrically connects the first semiconductor layer on each bump in the bump array to the second electrode of the driving substrate through the first passivation layer can include: disposing the conductive connection layer on the first passivation layer such that the conductive connection layer electrically connects the first semiconductor layer on each bump in the bump array to the second electrode of the driving substrate through the first passivation layer and the second passivation layer.

[0065] Further, disposing the conductive connection layer on the first passivation layer such that the conductive connection layer electrically connects the first semiconductor layer on each bump in the bump array to the second electrode of the driving substrate through the first passivation layer and the second passivation layer can include: from the first passivation layer, a first contact hole array corresponding to the bump array and a second contact hole are opened to expose part of the first semiconductor layer on the corresponding bump in each first contact hole in the first contact hole array, and the second contact hole exposes the second electrode of the driving substrate; on the first passivation layer, on the exposed part of the first semiconductor layer, and on the exposed second electrode, an integrated conductive connection layer is disposed such that the conductive connection layer electrically connects the first semiconductor layer on each bump in the bump array to the second electrode of the driving substrate through the first passivation layer and the second passivation layer.

[0066] Referring to Figures 2-12 , wherein Figure 11 A side view cross-sectional view of a first contact hole array composed of first contact holes 1092 and second contact holes 1093 opened on the first passivation layer 109 is shown. As Figure 11 shown, the pattern of the first contact holes 1092 and the second contact holes 1093 can be photoresist lithography on the first passivation layer 109, and then the first contact holes 1092 and the second contact holes 1093 are etched by a mixed gas of SF6, CHF3 and O2 by an inductively coupled plasma (ICP) etching method, and after removing the photoresist, a structure as Figure 11The first contact hole array 1092 exposes the first semiconductor layer 103 on the corresponding bump, and each second contact hole 1093 exposes the second electrode 202 on the driving substrate 2.

[0067] Referring to Figures 2-12 wherein Figure 12 A side view cross-sectional view of the integrated conductive connection layer 110 disposed on the first passivation layer 109, on the exposed part of the first semiconductor layer 103, and on the exposed second electrode 202 is shown. Specifically, as Figure 12 shown, a magnetron sputtering method can be used to deposit the integrated conductive connection layer 110 such as an indium tin oxide layer (ITO) on the first passivation layer 109, on the exposed part of the first semiconductor layer 103, and on the exposed second electrode 202. The conductive connection layer 110 electrically connects the first semiconductor layer 103 on each bump 21 in the bump array with the second electrode 202 of the driving substrate 2 through the first passivation layer 109 and the second passivation layer 107, resulting in a micro-LED device 1 as Figure 12 shown.

[0068] Thus, the micro-LED device preparation is completed, Figure 12 A micro-LED device 1 prepared is shown.

[0069] The present disclosure also provides a micro-LED device. The micro-LED device can be manufactured by the above micro-LED device preparation method.

[0070] As Figures 2-12 shown, the micro-LED device 1 includes a mesa structure 20, the mesa structure 20 includes a driving substrate 2 and a bump array disposed on the driving substrate 2, the driving substrate 2 includes a first electrode array and a second electrode 202, the bump array includes a plurality of bumps 21, each bump 21 in the bump array corresponds to a first electrode 201 in the first electrode array of the driving substrate 2, each bump 21 in the bump array includes a second semiconductor layer 105, a multi-quantum well structure 104, and a first semiconductor layer 103 from bottom to top in order, and the micro-LED device 1 further includes: a first passivation layer 109 disposed on the mesa structure 20, and an isolation gap 1091 is formed in the first passivation layer between every two adjacent bumps 21; a conductive connection layer 110 disposed on the first passivation layer 109, and the conductive connection layer 110 electrically connects the first semiconductor layer 103 on each bump 21 in the bump array with the second electrode 202 of the driving substrate 2 through the first passivation layer 109.

[0071] According to an embodiment of the present disclosure, each of the plurality of protrusions 21 further comprises a conductive bonding layer 106 disposed on the first electrode 201 of the driving substrate 2, and the second semiconductor layer 105 of the protrusion 21 is disposed on the conductive bonding layer 106.

[0072] According to an embodiment of the present disclosure, the micro-LED device 1 further comprises a second passivation layer 107 disposed on the mesa structure 20 and a reflective layer 108 disposed on the second passivation layer on the sidewall of each of the plurality of protrusions 21, and the reflective layer 108 comprises a first metal layer.

[0073] According to an embodiment of the present disclosure, the isolation gap 1091 is formed by controlling the deposition rate of the first passivation layer at the protrusion top corner position.

[0074] According to an embodiment of the present disclosure, the second passivation layer 107 is disposed along the profile of the mesa structure 20 and has a predetermined thickness, wherein the predetermined thickness is equal to one quarter of the wavelength of the light emitted by the micro-LED unit corresponding to the protrusion.

[0075] According to an embodiment of the present disclosure, the first passivation layer 109 is disposed on the mesa structure 20 provided with the second passivation layer 107 and the reflective layer 108, and the conductive connection layer 110 electrically connects the first semiconductor layer 103 on each of the plurality of protrusions 21 of the driving substrate 2 through the first passivation layer 109 and the second passivation layer 107.

[0076] According to an embodiment of the present disclosure, the first passivation layer 109 comprises a first sub-contact hole array corresponding to the plurality of protrusions and a second sub-contact hole, the second passivation layer 107 comprises a third sub-contact hole array aligned with the first sub-contact hole array and a fourth sub-contact hole aligned with the second sub-contact hole, the first sub-contact hole array and the third sub-contact hole array constitute a first contact hole array, the second sub-contact hole and the fourth sub-contact hole constitute a second contact hole 1093, each of the first contact holes 1092 in the first contact hole array exposes a part of the first semiconductor layer on the corresponding protrusion, the second contact hole 1093 exposes the second electrode 202 of the driving substrate 2, and the conductive connection layer 110 is integrally disposed on the first passivation layer 109, the exposed part of the first semiconductor layer 103 and the exposed second electrode 202.

[0077] According to embodiments of the present disclosure, the first semiconductor layer 103 is an n-GaN layer, the second semiconductor layer 105 is a p-GaN layer, the conductive bonding layer 106 includes a second metal layer, and the conductive connecting layer 110 includes an indium tin oxide layer.

[0078] It should be noted that any relevant description (including but not limited to technical features and their effects, explanations, etc.) about the micro-LED device structure in the above micro-LED device preparation method can be applied to the micro-LED device of the present disclosure.

[0079] The present disclosure also provides a display device. The display device includes the above micro-LED device. The display device can be applied to electronic equipment to implement technologies such as Augmented Reality (AR), Virtual Reality (VR), Extended Reality (XR), and Mixed Reality (MR). For example, the display device can be a projection part of electronic equipment, such as a projector, a Head Up Display (HUD), etc. For another example, the display device can also be a display part of electronic equipment, such as a smart phone, a smart watch, a notebook computer, a tablet computer, a driving recorder, a navigator, a head-mounted device, etc.

[0080] It should be noted that the terms used herein are only intended to describe specific embodiments and are not intended to limit the exemplary embodiments according to the present disclosure. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprise" and / or "include" when used in this specification, specify the presence of stated features, steps, operations, devices, components and / or combinations thereof.

[0081] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that the size of the sequence number of each step / process in various embodiments of the present disclosure does not mean the order of execution, and the execution order of each step / process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. Moreover, the sequence number of the above embodiments of the present disclosure is only for description, not representing the advantages or disadvantages of the embodiments.

[0082] It should be noted that the terms "first", "second", and the like, used in the description and the claims of the present application as well as above-mentioned figures are intended to distinguish similar objects and not to imply a specific order or chronology of events. It is to be understood that the data thus described can be interchanged, where appropriate, so that the embodiments of the present application described herein could be carried out in a different order than the one illustrated or described herein. Furthermore, the terms "comprising", "having", and any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product, or apparatus that comprises a list of steps or units can not necessarily be limited to those steps or units that are clearly listed, but can include other steps or units that are not expressly listed or inherent to such process, method, product, or apparatus.

[0083] The preferred embodiments of the present application are described above in detail, but the present application is not limited to the above examples. Various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application. Any modifications, equivalent replacements, improvements, and the like made within the spirit and principle of the present application should be included in the scope of the present application.

Claims

1. A method for fabricating a micro LED device, wherein, The method includes: A micro LED epitaxial wafer and a driving substrate are provided. The micro LED epitaxial wafer includes, from bottom to top, a first semiconductor layer, a multiple quantum well structure, and a second semiconductor layer. The driving substrate includes a first electrode array and a second electrode. The micro-LED epitaxial wafer is bonded to the driving substrate, exposing the first semiconductor layer; The micro-LED epitaxial wafer is etched starting from the first semiconductor layer until the driving substrate is exposed, resulting in a mesa structure including a boss array, wherein the boss array includes a plurality of bosses, and each boss in the boss array corresponds to a first electrode in the first electrode array of the driving substrate. A first passivation layer is provided on the platform structure, such that an isolation gap is formed in the first passivation layer between every two adjacent bosses; A conductive connection layer is disposed on the first passivation layer, such that the conductive connection layer passes through the first passivation layer and electrically connects the first semiconductor layer on each protrusion in the protrusion array to the second electrode of the driving substrate, thereby obtaining the micro LED device.

2. The method for fabricating a micro LED device according to claim 1, wherein, The micro-LED epitaxial wafer further includes a substrate and a third semiconductor layer. The substrate is located on the side of the first semiconductor layer opposite to the multi-quantum-well structure. The third semiconductor layer is located between the substrate and the first semiconductor layer. The micro-LED epitaxial wafer is bonded to the driving substrate, exposing the first semiconductor layer. A conductive bonding layer is disposed on the second semiconductor layer of the micro-LED epitaxial wafer; The micro-LED epitaxial wafer is bonded to the driving substrate through the conductive bonding layer; Remove the substrate and the third semiconductor layer.

3. The method for fabricating a micro LED device according to claim 1, wherein, The first passivation layer is provided on the platform structure, such that an isolation gap is formed in the first passivation layer between every two adjacent bosses, including: A first passivation layer is deposited on the platform structure. By controlling the deposition rate of the first passivation layer at the top corner of the boss, an isolation gap is formed in the first passivation layer between every two adjacent bosses.

4. The method for fabricating a micro LED device according to claim 1, wherein, Before applying the first passivation layer to the platform structure, the method further includes: A second passivation layer is provided on the platform structure; A reflective layer is disposed on the second passivation layer on the sidewall of each boss in the boss array.

5. The method for fabricating a micro LED device according to claim 4, wherein, The second passivation layer is provided on the platform structure, including: A second passivation layer of predetermined thickness is provided on the platform structure along the contour of the platform structure, wherein the predetermined thickness is equal to one-quarter of the wavelength of the light emitted by the micro LED unit corresponding to the protrusion.

6. The method for fabricating a micro LED device according to claim 4, wherein, A conductive connection layer is disposed on the first passivation layer, such that the conductive connection layer passes through the first passivation layer to electrically connect the first semiconductor layer on each protrusion in the protrusion array to the second electrode of the driving substrate, including: A conductive connection layer is disposed on the first passivation layer, such that the conductive connection layer passes through the first passivation layer and the second passivation layer to electrically connect the first semiconductor layer on each protrusion in the protrusion array to the second electrode of the driving substrate.

7. The method for fabricating a micro LED device according to claim 6, wherein, A conductive connection layer is disposed on the first passivation layer, such that the conductive connection layer passes through the first passivation layer and the second passivation layer to electrically connect the first semiconductor layer on each protrusion in the protrusion array to the second electrode of the driving substrate, including: Starting from the first passivation layer, a first contact hole array and a second contact hole corresponding to the boss array are formed, so that each first contact hole in the first contact hole array exposes a portion of the first semiconductor layer on the corresponding boss, and the second contact hole exposes the second electrode of the driving substrate. A conductive connection layer is formed on the first passivation layer, on the exposed portion of the first semiconductor layer, and on the exposed second electrode, such that the conductive connection layer passes through the first passivation layer and the second passivation layer to electrically connect the first semiconductor layer on each protrusion in the protrusion array to the second electrode of the driving substrate.

8. A miniature LED device, wherein, The micro-LED device includes a mesa structure, which comprises a driving substrate and an array of protrusions disposed on the driving substrate. The driving substrate includes a first electrode array and a second electrode. The protrusion array includes multiple protrusions, each protrusion corresponding to a first electrode in the first electrode array of the driving substrate. Each protrusion in the protrusion array, from bottom to top, includes a second semiconductor layer, a multiple quantum well structure, and a first semiconductor layer. Furthermore, the micro LED device also includes: A first passivation layer is disposed on the platform structure, and an isolation gap is formed in the first passivation layer between every two adjacent protrusions; A conductive connection layer is disposed on the first passivation layer, and the conductive connection layer passes through the first passivation layer to electrically connect the first semiconductor layer on each of the protrusions in the protrusion array to the second electrode of the driving substrate.

9. The micro LED device according to claim 8, wherein, Each boss in the boss array further includes a conductive bonding layer, which is disposed on the first electrode of the driving substrate, and the second semiconductor layer of the boss is disposed on the conductive bonding layer.

10. The micro LED device according to claim 8, wherein, The micro LED device further includes a second passivation layer and a reflective layer. The second passivation layer is disposed on the mesa structure, and the reflective layer is disposed on the second passivation layer on the sidewall of each boss in the boss array. The reflective layer includes a first metal layer.

11. The micro LED device according to claim 8, wherein, The isolation gap is formed by controlling the deposition rate of the first passivation layer at the top corner of the boss.

12. The micro LED device according to claim 10, wherein, The second passivation layer is disposed along the contour of the mesa structure and has a predetermined thickness, wherein the predetermined thickness is equal to one-quarter of the wavelength of the light emitted by the micro-LED unit corresponding to the protrusion.

13. The micro LED device according to claim 10, wherein, The first passivation layer is disposed on the mesa structure having the second passivation layer and the reflective layer, and the conductive connection layer passes through the first passivation layer and the second passivation layer to electrically connect the first semiconductor layer on each protrusion in the protrusion array to the second electrode of the driving substrate.

14. The micro LED device according to claim 13, wherein, The first passivation layer includes a first sub-contact hole array and a second sub-contact hole corresponding to the boss array. The second passivation layer includes a third sub-contact hole array aligned with the first sub-contact hole array and a fourth sub-contact hole aligned with the second sub-contact hole. The first sub-contact hole array and the third sub-contact hole array constitute a first contact hole array. The second sub-contact hole and the fourth sub-contact hole constitute a second contact hole. Each first contact hole in the first contact hole array exposes a portion of the first semiconductor layer on the corresponding boss. The second contact hole exposes the second electrode of the driving substrate. The conductive connection layer is integrally disposed on the first passivation layer, the exposed portion of the first semiconductor layer, and the exposed second electrode.

15. The micro LED device according to claim 9, wherein, The first semiconductor layer is an n-GaN layer, the second semiconductor layer is a p-GaN layer, the conductive bonding layer includes a second metal layer, and the conductive connection layer includes an indium tin oxide layer.

16. A display device, wherein, The display device includes the micro LED device according to any one of claims 8 to 15.

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