A triple-redundancy control system based on state management

Abstract

The present invention discloses a triple-redundancy control system based on state management, including: The states of the system include: When the system is in an unsteady synchronization state: the online processors among the local processor, the previous processor, and the subsequent processor synchronize the real-time data and status data to the processors during the online process in sequence; after the real-time data and status data are synchronized, the system state is switched to a steady state; When the system is in a steady synchronization state: the user's execution of program downloading will trigger the synchronization of the engineering data of the local processor, the previous processor, and the subsequent processor of the system, so that the local processor, the previous processor, and the subsequent processor perform the same task. The technical content disclosed by the present invention simplifies the complex system states, synchronizes the required data according to the agreed principles, and finally keeps the system in a steady state. The data receiver does not need to screen the data after receiving the synchronized data, improving the system availability.

Description

Technical Field

[0001] The present invention relates to the technical field of industrial control, and more particularly, to a triple redundant control system based on state management. Background Art

[0002] Currently, data synchronization in a multiple redundant control system is generally carried out through data communication. By synchronizing the key variable data in each controller, the reliability, security, and availability of the multiple redundant control system are improved. The specific implementation method is as follows: First, determine the master controller of the system, and at the same time obtain the local data and the local data of other controllers. Determine the local data in the master controller from the obtained local data, and then the local data of the master controller can be used to update its own local data. Thus, the local data of each controller is synchronized.

[0003] Most of the existing data synchronization technical solutions for multiple redundant control systems are for data synchronization between the primary and standby systems, lacking the technology for data synchronization between the three processors in a triple redundant control system. The entire synchronization process also highly depends on the selection and judgment of the data of the primary system.

[0004] Therefore, how to provide a triple redundant control system based on state management has become a technical problem urgently to be solved in this field. Summary of the Invention

[0005] The object of the present invention is to provide a triple redundant control system based on state management.

[0006] According to the present invention, there is provided a triple redundant control system based on state management, including a local processor, a previous processor, and a subsequent processor;

[0007] The states of the system include: power-on preparation, non-steady-state synchronization, and steady-state synchronization;

[0008] When the system is in the power-on preparation state: the local processor exchanges state data with the previous processor and the subsequent processor;

[0009] When the system is in the non-steady-state synchronization state: the online processors among the local processor, the previous processor, and the subsequent processor synchronize to the processors in the online process in sequence according to the real-time data and state data; after the real-time data and state data synchronization is completed, the system state is switched to the steady state;

[0010] When the system is in the steady-state synchronization state: when the user performs program download, it will trigger the engineering data synchronization of the local processor, the previous processor, and the subsequent processor of the system, so that the local processor, the previous processor, and the subsequent processor perform the same task.

[0011] Optionally, when the system is in the power-on ready state: define the state of the single-core processor in the system and the corresponding state code:

[0012] The states of the single-core processor include: offline, standby, and working;

[0013] The state code corresponding to offline is 0;

[0014] The state code corresponding to standby is 1;

[0015] The state code corresponding to working is 2;

[0016] Offline means that the single-core processor is not powered on, standby means that the single-core processor is powered on but there is no available project data, and working means that the single-core processor is normally executing user tasks.

[0017] Optionally, when the system is in the non-steady-state synchronization state: when the project data of the processor during the online process is inconsistent with that of the online processor, synchronize the project data of the online processor to the processor during the online process.

[0018] Optionally, the non-steady-state synchronization state includes:

[0019] The processor of this series is in standby, the previous series processor is offline, and the next series processor is working, and the system is in the first non-steady-state synchronization;

[0020] The processor of this series is in standby, the previous series processor is working, and the next series processor is offline, and the system is in the second non-steady-state synchronization;

[0021] The processor of this series is in standby, the previous series processor is working, and the next series processor is working, and the system is in the third non-steady-state synchronization;

[0022] The processor of this series is in standby, the previous series processor is working, and the next series processor is in standby, and the system is in the fourth non-steady-state synchronization;

[0023] The processor of this series is working, the previous series processor is offline, and the next series processor is in standby, and the system is in the fifth non-steady-state synchronization;

[0024] The processor of this series is working, the previous series processor is working, and the next series processor is in standby, and the system is in the sixth non-steady-state synchronization;

[0025] The processor of this series is working, the previous series processor is in standby, and the next series processor is in standby, and the system is in the seventh non-steady-state synchronization;

[0026] The processor of this series is working, the previous series processor is in standby, and the next series processor is offline, and the system is in the eighth non-steady-state synchronization.

[0027] Optionally, the steady-state synchronization state includes:

[0028] The processor of this system is in standby, the previous system's processor is offline, the next system's processor is in standby, and the system is in the first steady-state synchronization;

[0029] The processor of this system is in standby, the previous system's processor is in standby, the next system's processor is offline, and the system is in the second steady-state synchronization;

[0030] The processor of this system is in standby, the previous system's processor is in standby, the next system's processor is in standby, and the system is in the third steady-state synchronization;

[0031] The processor of this system is working, the previous system's processor is offline, the next system's processor is working, and the system is in the fourth steady-state synchronization;

[0032] The processor of this system is working, the previous system's processor is working, the next system's processor is offline, and the system is in the fifth steady-state synchronization;

[0033] The processor of this system is working, the previous system's processor is working, the next system's processor is working, and the system is in the sixth steady-state synchronization.

[0034] Optionally, when the system is in the steady-state synchronization state: if the user modifies some variables or the program running state in the program, it will trigger the synchronization of the service data of the processor of this system, the previous system's processor, and the next system's processor, so that the processor of this system, the previous system's processor, and the next system's processor can obtain the same execution result after executing the same task.

[0035] Optionally, the engineering data includes: logic configuration data and system configuration data.

[0036] Optionally, the real-time data includes: user-defined data, input channel data, and output channel data.

[0037] Optionally, the status data includes: working status, synchronization status, downloading status, task status, and engineering version information.

[0038] Optionally, the service data includes: changes in task running status, forced changes in variables, confirmation of engineering, and switching of engineering.

[0039] According to the technical content disclosed in the present invention, it has the following beneficial effects: The system state is divided into a steady state and a non-steady state, simplifying the complex system state. According to the simplified state, the required data is synchronized according to the agreed principles, so that the system finally remains in the steady state. After receiving the synchronized data, the data recipient does not need to screen the data anymore and can directly update it locally, improving the system availability.

[0040] Other features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0042] Figure 1 FIG. is a schematic diagram of a triple redundant control system based on state management provided according to an embodiment;

[0043] Figure 2 FIG. is a schematic diagram of system state transition provided according to an embodiment. DETAILED DESCRIPTION

[0044] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions and values set forth in these embodiments do not limit the scope of the present invention.

[0045] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0046] Techniques, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered as part of the specification.

[0047] In all examples shown and discussed herein, any specific values should be construed as merely exemplary, and not as limitations. Thus, other examples of exemplary embodiments may have different values.

[0048] It should be noted that: like reference numerals and letters denote like items in the following drawings; thus, once an item is defined in one drawing, further discussion thereof is not required in subsequent drawings.

[0049] According to the present invention, as Figure 1 shown, a triple redundant control system based on state management is provided, including a local processor, a previous processor, and a subsequent processor;

[0050] Figure 1 "previous" in refers to the previous processor;

[0051] The states of the system include: power-on preparation, non-steady state synchronization, and steady state synchronization;

[0052] When the system is in the power-on preparation state: the local processor exchanges state data with the previous processor and the subsequent processor;

[0053] When the system is in an unsteady synchronization state: the upper-line processors in the system processor, the previous-line processor, and the next-line processor are sequentially synchronized to the processors in the upper-line process according to the order of real-time data and status data; after the synchronization of the real-time data and status data is completed, the system status is switched to a steady state;

[0054] As Figure 2 shown, when the system is in an unsteady state, it needs to be directed to a steady state, that is, to trigger the synchronization operation of the system; when the system is in a steady state, the failure or online of a certain line processor will cause the system to turn into an unsteady state;

[0055] When the system is in a steady synchronization state: the user's execution of program download will trigger the synchronization of engineering data of the system processor, the previous-line processor, and the next-line processor, so that the system processor, the previous-line processor, and the next-line processor perform the same task.

[0056] Both unsteady synchronization and steady synchronization follow the following principles: (a) When all three line processors are online, according to needs, the system processor can only synchronize engineering data, real-time data, and status data to the next-line processor; (b) When two line processors are online, according to needs, the two line processors can synchronize engineering data, real-time data, and status data with each other; (c) When in a steady state, the synchronization of service data and status data is carried out by means of broadcasting.

[0057] In some embodiments, when the system is in a power-on preparation state: define the state of a single-line processor in the system and the corresponding state code:

[0058] The states of a single-line processor include: offline, standby, and working;

[0059] The state code corresponding to offline is 0;

[0060] The state code corresponding to standby is 1;

[0061] The state code corresponding to working is 2;

[0062] Offline means that the single-line processor is not powered on, standby means that the single-line processor is powered on but there is no available engineering data, and working means that the single-line processor is normally executing user tasks.

[0063] In some embodiments, when the system is in an unsteady synchronization state: when the engineering data of the processor in the upper-line process is inconsistent with that of the online processor, synchronize the engineering data of the online processor to the processor in the upper-line process.

[0064] In some embodiments, the unsteady synchronization state includes:

[0065] The processor of this series is in standby, the previous series of processors is offline, the subsequent series of processors is working, and the system is in the first non-steady-state synchronization;

[0066] Figure 1 "Non-steady state 1" in

[0067] The processor of this series is in standby, the previous series of processors is working, the subsequent series of processors is offline, and the system is in the second non-steady-state synchronization;

[0068] The processor of this series is in standby, the previous series of processors is working, the subsequent series of processors is working, and the system is in the third non-steady-state synchronization;

[0069] The processor of this series is in standby, the previous series of processors is working, the subsequent series of processors is in standby, and the system is in the fourth non-steady-state synchronization;

[0070] The processor of this series is working, the previous series of processors is offline, the subsequent series of processors is in standby, and the system is in the fifth non-steady-state synchronization;

[0071] The processor of this series is working, the previous series of processors is working, the subsequent series of processors is in standby, and the system is in the sixth non-steady-state synchronization;

[0072] The processor of this series is working, the previous series of processors is in standby, the subsequent series of processors is in standby, and the system is in the seventh non-steady-state synchronization;

[0073] The processor of this series is working, the previous series of processors is in standby, the subsequent series of processors is offline, and the system is in the eighth non-steady-state synchronization.

[0074] In some embodiments, the steady-state synchronization states include:

[0075] The processor of this series is in standby, the previous series of processors is offline, the subsequent series of processors is in standby, and the system is in the first steady-state synchronization;

[0076] The processor of this series is in standby, the previous series of processors is in standby, the subsequent series of processors is offline, and the system is in the second steady-state synchronization;

[0077] The processor of this series is in standby, the previous series of processors is in standby, the subsequent series of processors is in standby, and the system is in the third steady-state synchronization;

[0078] The processor of this series is working, the previous series of processors is offline, the subsequent series of processors is working, and the system is in the fourth steady-state synchronization;

[0079] The processor of this series is working, the previous series of processors is working, the subsequent series of processors is offline, and the system is in the fifth steady-state synchronization;

[0080] The processor of this system is working, the previous processor is working, and the subsequent processor is working. The system is in the sixth steady-state synchronization.

[0081] In some embodiments, when the system is in the steady-state synchronization state: If the user modifies some variables or the program running state in the program, it will trigger the synchronization of the service data of the processor of this system, the previous processor, and the subsequent processor, so that the processor of this system, the previous processor, and the subsequent processor can obtain the same execution result after executing the same task.

[0082] In some embodiments, the engineering data includes: logic configuration data and system configuration data.

[0083] The real-time data includes: user-defined data, input channel data, and output channel data.

[0084] The status data includes: working status, synchronization status, downloading status, task status, and engineering version information.

[0085] The service data includes: changes in task running status, forced changes in variables, confirmation of engineering, and switching of engineering.

[0086] In summary, the technical content disclosed in the present invention divides the system state into a steady state and a non-steady state, simplifying the complex system state. According to the simplified state, the required data is synchronized according to the agreed principles, so that the system finally remains in the steady state. After receiving the synchronized data, the data recipient does not need to screen the data anymore and can directly update it locally, improving the system availability.

[0087] Although some specific embodiments of the present invention have been described in detail by way of examples, those skilled in the art should understand that the above examples are only for illustration and not for limiting the scope of the present invention. Those skilled in the art should understand that the above embodiments can be modified without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A triple redundant control system based on state management, characterized in that: include: Processors of this series, processors of the previous series, and processors of the next series; The states of the system include: power-on preparation, non-steady-state synchronization and steady-state synchronization; When the system is in a power-on ready state: the processor of the current series exchanges state data with the processor of the previous series and the processor of the next series; When the system is in a non-steady-state synchronization state: the online processors of the current series processor, the previous series processor and the next series processor are synchronized to the processors in the online process in sequence according to the order of real-time data and status data; after the synchronization of the real-time data and status data is completed, the system state is switched to a steady state; When the system is in a steady-state synchronization state: the user executes program downloading to trigger the synchronization of engineering data of the system's own processor, the previous series processor and the next series processor, so that the system's own processor, the previous series processor and the next series processor execute the same task; When the system is in a non-steady-state synchronization state: when the engineering data of the processor in the on-line process is inconsistent with that of the processor on-line, synchronizing the engineering data of the processor on-line to the processor in the on-line process; The non-steady-state synchronization state includes: The processor of this series is in standby mode, the processor of the previous series is offline, and the processor of the next series is working, and the system is in the first non-steady-state synchronization; The processor of this series is in standby mode, the processor of the previous series is in operation, the processor of the next series is offline, and the system is in the second non-steady-state synchronization; The processor of this series is in standby mode, the processor of the previous series is in operation, the processor of the next series is in operation, and the system is in the third non-steady-state synchronization; The processor of this series is in standby mode, the processor of the previous series is in working mode, the processor of the next series is in standby mode, and the system is in the fourth non-steady-state synchronization; The processor of this series is working, the processor of the previous series is offline, the processor of the next series is standby, and the system is in the fifth non-steady-state synchronization; The processor of this series is working, the processor of the previous series is working, and the processor of the next series is in standby mode, and the system is in the sixth non-steady-state synchronization; The processor of this series is working, the processor of the previous series is in standby, the processor of the next series is in standby, and the system is in the seventh non-steady-state synchronization; The processor of this series is working, the processor of the previous series is in standby, the processor of the next series is offline, and the system is in the eighth non-steady-state synchronization; The steady-state synchronization state includes: The processor of this series is in standby mode, the processor of the previous series is offline, the processor of the next series is in standby mode, and the system is in the first steady-state synchronization; The processor of this series is in standby mode, the processor of the previous series is in standby mode, the processor of the next series is offline, and the system is in the second stable state synchronization; The processor of this series is in standby mode, the processor of the previous series is in standby mode, the processor of the next series is in standby mode, and the system is in the third stable state synchronization; The processor of this series is working, the processor of the previous series is offline, the processor of the next series is working, and the system is in the fourth stable state synchronization; The processor of this series is working, the processor of the previous series is working, the processor of the next series is offline, and the system is in the fifth stable state synchronization; The processor of this series is working, the processor of the previous series is working, the processor of the next series is working, and the system is in the sixth stable state synchronization; When the system is in a steady-state synchronization state: if the user rewrites certain variables in the program or the program running status, it will trigger the service data synchronization of the system's current processor, previous processor and next processor, so that the current processor, previous processor and next processor can obtain the same execution result after executing the same task.

2. The triple redundant control system based on state management according to claim 1, characterized in that: When the system is in a power-on ready state: define the state of the single-system processor in the system and the corresponding state code: The states of a single-system processor include: offline, standby, and working; The status code for offline use is 0; The status code for standby pair is 1; The status code for the work pair is 2; Offline means that the single-series processor is not powered on, standby means that the single-series processor is powered on but no engineering data is available, and working means that the single-series processor is executing user tasks normally.

3. The triple redundant control system based on state management according to claim 1, characterized in that: The engineering data includes: logical configuration data and system configuration data.

4. The triple redundant control system based on state management according to claim 1, characterized in that: The real-time data includes: user-defined data, input channel data and output channel data.

5. The triple redundant control system based on state management according to claim 1, characterized in that: The status data includes: working status, synchronization status, downloading status, task status and project version information.

6. The triple redundant control system based on state management according to claim 1, characterized in that: The service data includes: changes in task running status, forced changes in variables, project confirmation, and project switching.

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