A PCB Defect Recognition Method Based on the YOLOv8 Model

Abstract

The present invention discloses a PCB defect recognition method based on the YOLOv8 model. The method includes: S1: Obtain the image set to be recognized; S2: Improve the YOLOv8 model, where the YOLOv8 model includes a Backbone network, a Neck network, and a Head network connected in sequence; the improvement method is based on the BiFPN bidirectional feature pyramid network, integrates the P2 feature layer on this basis to improve the detection accuracy of small targets, and modifies the network connection using a convolution suitable for YOLOv8; introduce the TA layer (Convolutional Triplet Attention Module) to improve the recognition accuracy of the model; design a new CSC module to replace part of the C2f module to reduce the redundancy of model parameters, so as to locate the target more quickly and accurately. S3: Use the image set to be recognized to train the improved YOLOv8 model; S4: Input the image to be measured into the trained improved YOLOv8 model to obtain the PCB defect recognition result. The present invention uses the YOLOv8 model as the basic recognition network and improves its network model structure, thereby improving the detection accuracy of the YOLOv8 model.

Description

Technical Field

[0001] The present invention relates to the field of image technology, and particularly to a method for identifying PCB defects based on the YOLOv8 model. Background Art

[0002] Object recognition, as one of the most rapidly developing branches in the current field of image processing, has been successfully applied to recognition tasks in various scenarios. However, the manufacturing process of printed circuit boards is complex and prone to small but important defects. Therefore, it is particularly necessary to effectively detect PCB defects. However, the YOLO model performs poorly in detecting small PCB defects, and the defect recognition accuracy is relatively low. Summary of the Invention

[0003] In view of the above-mentioned disadvantages of the prior art, the present invention provides a method for identifying PCB defects based on the YOLOv8 model, using the YOLOv8 network as the basic recognition network and improving its network model structure to improve the detection accuracy of the YOLOv8 model.

[0004] To achieve the above effects, the technical solution of the present invention is as follows:

[0005] In the first aspect, the present invention provides a method for identifying PCB defects based on the YOLOv8 model, including the following steps:

[0006] S1: Obtain the image set to be recognized;

[0007] S2: Improve the YOLOv8 model. The improved YOLOv8 model includes a Backbone network, a Neck network, and a Head network connected in sequence;

[0008] In the Backbone network, the CSC module is used to replace the C2f module. In the Neck and Head networks of the YOLOv8 model, a P2 layer output is newly added as the small object detection layer; during the feature enhancement stage of the Neck, the small object detection layer performs multi-scale feature fusion with the feature maps output by the P3-P5 layers to obtain an enhanced feature map with a size of 160×160×64, which is then input to the Head detection head.

[0009] The CSC module replaces the original Bottleneck module of the YOLOv8 model with the S-Bottlencek module. Specifically, the CSC module divides the feature map of the Backbone network along the channel dimension into a feature map X1 and a feature map X2 of size 1 / 2C through a split layer. The kernel sizes of the feature map X1 are 3×3 and 5×5 respectively. After passing through the S-Bottleneck module and the BN batch normalization layer respectively, the feature map X1 is fused through a Concat module and then passed through a ReLU activation function to obtain the first output feature. The feature map X2 passes through two sequentially connected S-Bottleneck modules to obtain the second output feature. After fusing the first output feature and the second output feature, a 1×1 convolution is performed to obtain the output feature of the CSC module.

[0010] Add a TA layer between the CSC module and the Neck network in the Backbone network.

[0011] S3: Use the image set to be recognized to train the improved YOLOv8 model.

[0012] S4: Input the image to be tested into the trained improved YOLOv8 model to obtain the PCB defect recognition result.

[0013] Furthermore, preprocess the printed circuit board defect dataset PKU-Market-PCB to obtain the processed printed circuit board defect dataset PKU-Market-PCB, and divide the printed circuit board defect dataset PKU-Market-PCB into a training set, a test set, and a validation set according to the ratio of 8:1:1.

[0014] Furthermore, the image preprocessing of the printed circuit board defect dataset PKU-Market-PCB is specifically as follows:

[0015] Eliminate duplicate images in the printed circuit board defect dataset PKU-Market-PCB, and adjust the brightness, rotation, cropping, translation, and mirroring of the remaining printed circuit board defect images. Obtain the processed printed circuit board defect dataset PKU-Market-PCB.

[0016] Furthermore, the S-Bottleneck module includes a first convolution SCConv and a second convolution SCConv connected in sequence.

[0017] The output feature of the first convolution SCConv, the output feature of the second convolution SCConv, and the input feature of the S-Bottleneck module are added element-wise to form the output feature of the S-Bottleneck module.

[0018] Further, the TA layer is specifically:

[0019] Add a TA layer between C2f and the Neck network in the Backbone network;

[0020] The expression of the TA layer is:

[0021] Z-Pool = [AvgPool 0d (x), MaxPool(x)]

[0022] Ms(X 1 ) = σ{f 7×7 [AvgPool(X 1 );MaxPool(X 1 )]}

[0023] Ms(X 2 ) = σ{f 7×7 [AvgPool(X 2 );MaxPool(X 2 )]}

[0024] Ms(X 3 ) = σ{f 7×7 [AvgPool(X 3 );MaxPool(X 3 )]}

[0025]

[0026] X 1 、X 2 、X 3 are the input feature maps of the three branches, and Y is the average operation aggregation of the output results.

[0027] Further, step S2 also includes:

[0028] Use the BiFPN module. In the BiFPN module, additional skip connection edges and Concat modules are added to the original PAN structure, adding links from P3 to P3, P4 to P4, and P5 to P5, and additional information transmission between different levels.

[0029] Compared with the prior art, the beneficial effects of the technical solution of the present invention are:

[0030] The present invention improves the YOLOv8 model. Based on BiFPN, it integrates the P2 feature layer to improve the detection accuracy of small targets, adds convolutional layers and modifies the network connections; and adds a TA layer to improve the model recognition accuracy. Secondly, a CSC module is designed to replace some of the C2f modules, reducing the redundancy of model parameters, enabling the YOLOv8 model to locate PCB defect targets faster and more accurately. Description of the Drawings

[0031] Figure 1 It is a flowchart of the object recognition method based on the YOLOv8 model of the present invention;

[0032] Figure 2 It is a structural block diagram of the improved YOLOv8 model provided by an embodiment of the present invention;

[0033] Figure 3 It is an S-Bottlenck structure diagram provided by an embodiment of the present invention;

[0034] Figure 4 It is an SCConv layer provided by an example of the present invention;

[0035] Figure 5 It is a TA layer provided by an embodiment of the present invention;

[0036] Figure 6 It is a BiFPN module provided by an embodiment of the present invention;

[0037] Figure 7 It is a CSC structure provided by an embodiment of the present invention;

[0038] Figure 8 It is an mAP_50 curve graph of the improved YOLOv8 model and the unimproved YOLOv8 model provided by an embodiment of the present invention;

[0039] Figure 9 It is a curve graph of the improved YOLOv8 model and the unimproved YOLOv8 model provided by an embodiment of the present invention; Detailed Embodiments

[0040] The following will describe the embodiments of the present invention with reference to the drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for explaining the present invention, rather than for limiting the protection scope of the present invention.

[0041] It should be noted that the illustrations provided in the following embodiments only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the drawings, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and proportion of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0042] Embodiment

[0043] This embodiment proposes a. Please refer to Figure 1 , a PCB defect recognition method based on the YOLOv8 model, comprising the following steps:

[0044] S1: Obtain the image set to be recognized;

[0045] S2: Improve the YOLOv8 model. The improved YOLOv8 model includes a Backbone network, a Neck network, and a Head network connected in sequence;

[0046] In the Backbone network, the CSC module is used to replace the C2f module to reduce model parameter redundancy, so as to locate the target more quickly and accurately; a Conv layer is added before the Backbone network enters the Neck network, and a P2 layer output is newly added in the Neck and Head networks of the YOLOv8 model as a small target detection layer; in the feature enhancement stage of the Neck of the small target detection layer, multi-scale feature fusion is performed with the feature maps output by the P3-P5 layers to obtain an enhanced feature map with a size of 160×160×64, which is input to the Head detection head;

[0047] As Figure 7 , the CSC module uses the S-Bottlencek module to replace the original Bottleneck module of the YOLOv8 model, and one S-Bottlenneck module is moved to the branch where the split layer is connected to the Concat. The CSC module is specifically: the feature map of the Backbone network is divided along the channel dimension into a feature map X1 and a feature map X2 with a size of 1 / 2C through the split layer. The kernel sizes of the feature map X1 are 3×3 and 5×5 respectively. The feature map X1 passes through the S-Bottleneck module and the BN batch normalization layer respectively, and then is fused through the Concat module, and then passes through the ReLU activation function to obtain the first output feature; the feature map X2 passes through two sequentially connected S-Bottleneck modules to obtain the second output feature; the first output feature and the second output feature are fused and then pass through a 1×1 convolution to obtain the output feature of the CSC module;

[0048] Add a TA layer (Convolutional Triplet Attention Modul, Triplet attention module) between the CSC module in the Backbone network and the Neck network;

[0049] S3: Use the image set to be recognized to train the improved YOLOv8 model;

[0050] S4: Input the image to be tested into the trained improved YOLOv8 model to obtain the PCB defect recognition result.

[0051] The improved YOLOv8 model is based on the BiFPN bidirectional feature pyramid network, integrates the P2 feature layer to improve the detection accuracy of small targets, and uses a convolutional modification network connection suitable for YOLOv8.

[0052] As a preferred technical solution, in this embodiment, the image set to be recognized is the printed circuit board defect dataset PKU-Market-PCB. The printed circuit board defect dataset PKU-Market-PCB is preprocessed to obtain the processed printed circuit board defect dataset PKU-Market-PCB, and the printed circuit board defect dataset PKU-Market-PCB is divided into a training set, a test set, and a validation set according to the ratio of 8:1:1.

[0053] As a preferred technical solution, in this example, the image preprocessing of the printed circuit board defect dataset PKU-Market-PCB is specifically as follows:

[0054] Eliminate duplicate images in the printed circuit board defect dataset PKU-Market-PCB, and adjust the brightness, rotation, cropping, translation, and mirroring of the remaining printed circuit board defect images. Obtain the processed printed circuit board defect dataset PKU-Market-PCB.

[0055] It should be noted that in this embodiment, the defect categories are: missing hole, mousebite, open circuit, short circuit, spur, and spurious copper; the improved YOLOv5 model network is trained in the PyTorch environment, the learning rate is 0.001, the number of training rounds is 300 rounds, and the batch_size value is 8; the final training mAP can reach 0.987, realizing the improvement of the performance of the improved YOLOv8 model.

[0056] As a preferred technical solution, in this embodiment, the S-Bottleneck module includes a first convolutional SCConv (i.e., spatial and channel reconstruction convolution) and a second convolutional SCConv connected in sequence;

[0057] The output feature of the first convolutional SCConv, the output feature of the second convolutional SCConv, and the input feature of the S-Bottleneck module are element-wise added to form the output feature of the S-Bottleneck module.

[0058] It can be understood that the S-Bottleneck module can promote the model's learning of complex features. On the basis of retaining the original structure, an additional path is added. This new path further promotes the information interaction and fusion between features, enabling the model to more accurately capture features at different scales and levels, thereby significantly enhancing the feature expression ability.

[0059] As a preferred technical solution, in this embodiment, the TA layer is calculated through the following steps:

[0060] Initialize a feature map X with a scale of H*W*C, and transpose the feature map X respectively from the three dimensions of H, W, and C to obtain the feature map X 1 、feature map X 2 and feature map X 3 , and the scales of the three feature maps are H*W*C, W*H*C, and C*H*W respectively;

[0061] Input the three feature maps into the processing module to output different feature maps;

[0062] Transpose the output different feature maps, and the scales of the three feature maps after transposition are all H*W*C;

[0063] The transposed feature maps are all multiplied by the coefficient 1 / 3, and this operation process is expressed as:

[0064]

[0065] In the formula, X 1 、X 2 、X 3 are the input feature maps of the three branches of the TA layer respectively, Y is the output result of the TA layer (average operation aggregation of the output result), σ represents the sigmoid activation layer, represents the input feature map X 1 、X 2 、X 3 corresponding processing module.

[0066] Specifically, the TA layer has three branches in total, which respectively calculate the relationships between H and W, H and C, and W and C. Taking one branch as an example, the size of the input X is C×H×W, and the size of the feature map X1 obtained after transposition is W×H×C. The tensor obtained after X1 passes through the function is then multiplied element-wise with the feature map X1. It includes three sub-functions, namely Z-Pool and the convolutional-normalization-Sigmod activation layer. The Z-Pool function operates on the 0th dimension of the input feature map, and the expression is:

[0067] The processing module includes the Z-Pool function, and the expression of Z-Pool is:

[0068] Z-Pool = [AvgPool 0d (x), MaxPool(x)]

[0069] In the formula, Z-Pool represents the concatenation of the Z-Pool function on the 1st dimension of the input feature map, AvgPool 0d and MaxPool 0d respectively represent the average pooling layer and the maximum pooling layer. The maximum pooling layer MaxPool and the average pooling layer AvgPool calculate on the 0th

[0070] dimension respectively, and then the two obtained tensors are concatenated as the output result of Z-Pool. Through two pooling operations, the TA layer can obtain rich feature information, significantly reduce the depth of the feature map (C×H×W → 2×H×W), and have a negligible increase in the number of parameters.

[0071] In the expression of the TA layer:

[0072] Ms(X 1 ) = σ{f 7×7 [AvgPool(X 1 );MaxPool(X 1 )]}

[0073] Ms(X 2 ) = σ{f 7×7 [AvgPool(X 2 );MaxPool(X 2 )]}

[0074] Ms(X 3 ) = σ{f 7×7 [AvgPool(X 3 );MaxPool(X 3 )]}.

[0075] As a preferred technical solution, in this embodiment, step S2 further includes:

[0076] The BiFPN module is used. In the BiFPN module, additional skip connection edges and Concat modules are added to the original PAN structure, adding links from P3 to P3, P4 to P4, and P5 to P5, and additional information transmission between different levels.

[0077] Furthermore, before inputting the images of the image set to be recognized into the improved YOLOv8 model for object detection, the method further includes: converting the label files in.xml format in the image set to be recognized into label files in.txt format.

[0078] It can be understood that the Triplet mechanism innovatively introduces the concept of cross-dimensional interaction. By capturing the interaction between the input tensor in the spatial dimension and the channel dimension, this deficiency is significantly improved. Different branches can obtain feature representations at different levels and dimensions. Shallow features have more detailed information, while deep features contain more semantic information. In object detection, simple concatenation or summation of feature fusion will lose some detailed information. By comprehensively using the different feature information extracted by the three branches, the model has more parameter sharing and constraints, improving the robustness of the model.

[0079] Specifically, the size of the image set to be recognized is 640×640×3; the Backbone network includes two consecutive Conv layers, a first CSC module, a third Conv layer, a second CSC module, a fourth Conv layer, a third CSC module, a fifth Conv layer, a fourth CSC module, and a first Spatial Pyramid Pooling Fast (SPPF) module connected in sequence. The output end of the SPPF module is connected to the input end of the fourth convolutional CSC module;

[0080] Among them, the CSC module is used to extract features from the printed circuit board image set to be recognized to obtain feature maps; the convolutional Conv layer performs convolutional operations on the feature images to learn local feature information; the SPPF module (i.e., the receptive field expansion module) is used to expand the receptive field range of the feature maps.

[0081] The Neck network includes a first TA module, a sixth Conv layer, a first upsampling module upsample, a second TA module, a seventh Conv layer, a first fusion module concat, a first C2f module, a second upsampling module upsample, a third TA module, an eighth Conv layer, a second fusion module concat, a second C2f module, a third upsampling module upsample, a fourth TA module, a ninth Conv layer, a third fusion module concat, a third C2f module, a tenth Conv layer, a fourth fusion module concat, a fourth C2f module, an eleventh Conv layer, a fifth fusion module concat, a fifth C2f module, a twelfth Conv layer, a sixth fusion module concat, and a sixth C2f module, which are connected in sequence; the third C2f module is connected to the input end of the first Detect module, the output end of the fourth C2f module is connected to the input end of the second Detect module, the output end of the fifth C2f module is connected to the input end of the third Detect module, and the output end of the sixth C2f module is connected to the input end of the fourth Detect module;

[0082] Among them, the first upsampling module upsample is used to increase the resolution of the input data. It enlarges the low-resolution feature map or data to a higher resolution for more refined information extraction or to generate a higher-resolution output. The first fusion module concat is used to fuse the feature map output by the seventh Conv layer and the upsampled feature map output by the first upsampling module upsample; the second fusion module concat is used to fuse the feature map output by the eighth Conv layer and the upsampled feature map output by the second upsampling module upsample; the third fusion module concat is used to fuse the feature map output by the ninth Conv layer, the upsampled feature map output by the third upsampling module upsample, and the feature map output by the fourth attention mechanism TA; the fourth fusion module concat is used to fuse the feature map output by the tenth Conv layer and the feature map output by the eighth Conv layer; the fifth fusion module concat is used to fuse the feature map output by the eleventh Conv layer and the feature map output by the seventh Conv layer; the fourth fusion module concat is used to fuse the feature map output by the twelfth Conv layer and the feature map output by the sixth Conv layer; the SPPF module can aggregate deep semantic information in a larger receptive field and can adaptively design a reconstruction kernel according to the content information on the specific feature map to achieve the upsampling process of the feature map. The sizes of the feature maps output by the seventh Conv layer, the first upsampling module upsample, the eighth Conv layer, the second upsampling module upsample, the ninth Conv layer, the third upsampling module upsample, the fourth attention mechanism TA, the tenth Conv layer, the eighth Conv layer, the eleventh Conv layer, the seventh Conv layer, the twelfth Conv layer, and the sixth Conv layer are 40×40×256, 40×40×256, 80×80×128, 80×80×128, 160×160×64, 160×160×64, 160×160×64, 160×160×64, 160×160×64, 80×80×128, 80×80×128, 40×40×256, 40×40×256, 20×20×512, 20×20×512 respectively.

[0083] The multi-branch CSC module is used for deep feature extraction of the feature map; the attention mechanism TA is used for extracting the target position information of the feature map.

[0084] Such as Figure 6, an upsampling process is added to the Neck network of YOLOv8, and the original FPN and PAN structures in the Neck network of YOLOv8 are replaced with the BiFPN structure. The improved feature fusion network adds an upsampling process and introduces the weighted bidirectional feature pyramid network (BiFPN) into the Neck network part of the YOLOv8 model, replacing the original Concat module with the BiFPN module; BiFPN is a weighted feature fusion mechanism that assigns a learnable weight to each path and continuously updates the weight through learning the data features, so as to obtain more important information and further enhance the network feature fusion ability through the learnable weight.

[0085] It should be noted that existing feature fusion methods usually use the same weight to weight feature maps with different scales. When the resolutions of the input feature maps are different, using the same weight for weighting may lead to the non-uniformity of the output feature map. By considering the importance of different input features, BiFPN uses different weights for feature fusion and enhances feature fusion by repeatedly applying this structure, so as to more effectively process input feature maps with different resolutions. BiFPN is a bidirectional feature pyramid network, and this neural network architecture is widely used in object detection and segmentation tasks in computer vision, and reference can be made to Figure 6 , Figure 6 is the structural schematic diagram of the BiFPN network structure of the present invention. The weighted fusion method in the BiFPN structure adopts fast normalized fusion, which is proposed for the slow training speed. The weight is scaled to the range of 0 to 1. Since the Softmax method is not used, the training speed is very fast. The cross-scale connection is realized by adding a skip connection and a bidirectional path, and thus the weighted fusion and the bidirectional cross-scale connection are realized.

[0086] The Head network includes a branch composed of a first CBS module and a first Conv2d module and a branch composed of a second CBS module and a second Conv2d module;

[0087] In order to better represent the performance of the improved YOLOv7 model, the evaluation indexes consist of precision (Precision, P), recall (Recall, R), average precision (Average Precision, AP), mean average precision (mean AveragePrecision, mAP) and the P-R curve graph;

[0088]

[0089]

[0090] Among them, TP represents the number of target boxes that correctly identify PCB defects, FP represents the number of target boxes that misidentify other categories as PCB defects, FN represents the number of target boxes that misidentify PCB defects as other categories, P represents the proportion of target boxes correctly identified as PCB defects among all target boxes identified as PCB defects, and R represents the proportion of target boxes correctly identified as PCB defects among all target boxes of PCB defects; AP represents the average accuracy of each category, which is calculated from the area enclosed by the curve and the horizontal and vertical coordinates in the P-R curve; mAP is obtained by averaging the APs of n categories, where n represents the number of categories; mAP represents the average precision of all categories and can be used to judge the degree of improvement in the performance of the improved model.

[0091] Appendix Figure 8 This is the map-50 curve of the improved YOLOv8 model and the original YOLOv8 in this embodiment. It can be seen that compared with the original YOLOv8, the value of map-50 of the improved YOLOv8 has increased by 2.9%; Appendix Figure 9 This is the precision curve of the improved YOLOv8 model and the original YOLOv8 in this embodiment. It can be seen that compared with the original YOLOv8, the value of precision of the improved YOLOv8 has increased by 2.2%.

[0092] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention and are not intended to limit the implementation manners of the present invention. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all implementation manners here. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims

1. A PCB defect recognition method based on the YOLOv8 model, characterized in that: The following steps are involved: S1: Obtain the image set to be identified; S2: improving the YOLOv8 model, wherein the improved YOLOv8 model includes a Backbone network, a Neck network, and a Head network connected in sequence; In the Backbone network, the CSC module is used to replace the C2f module, and the P2 layer output is added to the Neck and Head networks of the YOLOv8 model as a small target detection layer; in the feature enhancement stage of the Neck, the small target detection layer performs multi-scale feature fusion with the feature map output by the P3-P5 layers, and the enhanced feature map of 160×160×64 size is input to the Head detection head; The CSC module uses the S-Bottlencek module to replace the original Bottleneck module of the YOLOv8 model. The CSC module is specifically as follows: the feature map of the Backbone network is divided into a feature map X1 and a feature map X2 of size 1 / 2C along the channel dimension through the split layer. The kernel sizes of the feature map X1 are 3×3 and 5×5 respectively. The feature map X1 is fused through the Concat module after passing through the S-Bottleneck module and the BN batch normalization layer, and then through the ReLU activation function to obtain the first output feature; The feature map X2 passes through two S-Bottleneck modules connected in sequence to obtain the second output feature; The first output feature is fused with the second output feature and then goes through a 1×1 convolution to obtain the output feature of the CSC module; The S-Bottleneck module includes a first convolution SCConv and a second convolution SCConv connected in sequence; the output features of the first convolution SCConv, the output features of the second convolution SCConv and the input features of the S-Bottleneck module are element-wise added to form the output features of the S-Bottleneck module; Add a TA layer between the CSC module in the Backbone network and the Neck network; The TA layer is calculated by the following steps: Initialize a feature map X with a scale of H*W*C, and transpose the feature map X in three dimensions of H, W, and C to obtain feature maps X1, X2, and X3. The scales of the three feature maps are H*W*C, W*H*C, and C*H*W respectively; Input the three feature maps into the processing module and output different feature maps; The feature maps are multiplied by a coefficient of 1 / 3. The operation process is expressed as: In the formula, X1, X2, and X3 are the input feature maps of the three branches of the TA layer respectively, Y is the output result of the TA layer, and σ represents the sigmoid activation layer. Indicates the processing modules corresponding to the input feature maps X1, X2, and X3; S3: Use the image set to be identified to train the improved YOLOv8 model; S4: Input the image to be tested into the trained improved YOLOv8 model to obtain the PCB defect recognition result.

2. According to the PCB defect recognition method based on the YOLOv8 model of claim 1, it is characterized in that: The image set to be identified is a printed circuit board defect data set PKU-Market-PCB. The printed circuit board defect data set PKU-Market-PCB is preprocessed to obtain a processed printed circuit board defect data set PKU-Market-PCB. The printed circuit board defect data set PKU-Market-PCB is divided into a training set, a test set and a validation set in a ratio of 8:1:

1.

3. According to the PCB defect recognition method based on the YOLOv8 model of claim 2, it is characterized in that: The printed circuit board defect dataset PKU-Market-PCB is subjected to image preprocessing, specifically: The duplicate images in the printed circuit board defect dataset PKU-Market-PCB are removed, and the remaining printed circuit board defect images are adjusted in brightness, rotated, cropped, translated and mirrored to obtain the processed printed circuit board defect dataset PKU-Market-PCB.

4. According to the PCB defect recognition method based on the YOLOv8 model of claim 1, it is characterized in that: The processing module includes a Z-Pool function, and the expression of Z-Pool is: Z-Pool=[AvgPool 0d (x),MaxPool(x)] Where Z-Pool represents the concatenation of the Z-Pool function in the first dimension of the input feature map, and AvgPool 0d and MaxPool 0d They represent the average pooling layer and the maximum pooling layer respectively.

5. According to the PCB defect recognition method based on the YOLOv8 model of claim 1, it is characterized in that: Step S2 also includes: Using the BiFPN module, additional skip connection edges and Concat modules are added to the original PAN structure, links from P3 to P3, P4 to P4, and P5 to P5 are added, and additional information transmission is added between different layers.

Images