Method for performing clock compensation in communication equipment and related communication equipment

Abstract

The invention provides a method for performing clock compensation in communication equipment and related communication equipment. The method comprises the following steps: determining a clock difference between a source operation clock and a target operation clock; and carrying out clock compensation according to the clock difference so as to obtain compensated time, and carrying out clock synchronization processing based on a precise time protocol according to the compensated time.

Description

Technical Field

[0001] The present invention relates to the field of communications, and in particular to a method for clock compensation for precision time protocol processing in a communication device and related communication devices. Background Art

[0002] Precision Time Protocol (PTP) is a protocol used to synchronize the clocks between different nodes in a communication system to meet application scenarios that require high-precision clock synchronization. Under the PTP protocol, nodes interact with each other via PTP messages containing timestamps, such as Sync, Follow_Up, Delay_Req, and Delay_Resp. By exchanging these messages between nodes, the receiving end can calibrate its clock to offset the impact of transmission delays and match the clock of the transmitting end.

[0003] Generally speaking, the circuit that processes the PTP protocol will perform operations such as adding a timestamp to a packet (transmitting end) or correcting the time from the packet based on the timestamp (receiving end) between the Medium Access Control (MAC) layer and the Physical (PHY) layer. In hardware implementation, the MAC layer and the PHY layer will have their own operating clocks (i.e., reference frequency signals). Since the operating clocks used by the two are inconsistent, when the processing circuit of the PTP protocol adds a timestamp to the packet, additional uncertain errors will be introduced, thereby reducing the accuracy of the PTP protocol. However, if the MAC layer and the PHY layer are to use the same operating clock, the entire circuit architecture needs to be significantly modified, which is quite complex and difficult to implement. Therefore, there is a need in the art for a method that can improve the accuracy of PTP. Summary of the invention

[0004] In view of this, the present invention provides a mechanism for clock compensation for the processing of the precision time protocol. Further, the present invention can solve the error caused when the processing circuit of the precision time protocol involves different operating clocks. In an embodiment of the present invention, the present invention obtains an adjusted operating clock by compensating the operating clock of the physical layer circuit, and thereby obtains the compensated time based on the operating clock of the media access control layer circuit. Alternatively, by performing time comparison and calibration at a specific time point, the compensated time based on the operating clock of the media access control layer circuit is obtained. In this way, the processing circuit of the precision time protocol can perform clock synchronization processing based on the compensated time, thereby obtaining more accurate time information to improve the accuracy of clock synchronization.

[0005] An embodiment of the present invention provides a method for performing clock compensation in a communication device, the method comprising: determining a clock difference between a source operating clock and a target operating clock; performing clock compensation according to the clock difference to obtain a compensated time; and performing a clock synchronization process based on a precision time protocol according to the compensated time.

[0006] An embodiment of the present invention provides a communication device. The communication device includes: a clock compensation circuit and a precision time protocol processing circuit. The clock compensation circuit is used to determine a clock difference between a source operation clock and a target operation clock, and perform clock compensation according to the clock difference to obtain a compensated time. The precision time protocol processing circuit is coupled to the clock compensation circuit and is used to perform a clock synchronization process based on the precision time protocol (PTP) according to the compensated time. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 A structural diagram of a communication device according to an embodiment of the present invention is shown. Figure 2 It shows how to generate the compensated time according to an embodiment of the present invention. Figure 3 A method for clock compensation for a clock synchronization process based on a precision time protocol in an embodiment of the present invention is illustrated. DETAILED DESCRIPTION

[0008] In the following text, many specific details are described to provide readers with a thorough understanding of the embodiments of the present invention. However, those skilled in the art will understand how to implement the present invention without one or more specific details, or using other methods or components or materials, etc. In other cases, well-known structures, materials or operations will not be shown or described in detail to avoid obscuring the core concepts of the present invention.

[0009] The reference to "an embodiment" in the specification means that the specific features, structures or characteristics described in the embodiment may be included in at least one embodiment of the present invention. Therefore, the "in an embodiment" that appears in various places in this specification does not necessarily mean the same embodiment. In addition, the aforementioned specific features, structures or characteristics may be combined in one or more embodiments in any suitable form.

[0010] Please refer to Figure 1, which illustrates a communication device architecture diagram of an embodiment of the present invention. As shown in the figure, the communication device 100 exchanges information with the communication device 200 via a transmission channel, and the communication device 100 can be an information receiving end or an information transmitting end. In one embodiment, the communication device 100 can be a communication device compatible with the IEEE 802.3 protocol. Among them, the communication device 100 includes: a physical (PHY) layer circuit 110, a precision time protocol (Precision Time Protocol, PTP) processing circuit 120, a medium access control (Medium Access Control) layer circuit 130 and a clock compensation circuit 140. The physical layer circuit 110 is used to perform processing related to the physical layer. The precision time protocol 120 can add a timestamp and / or other PTP messages to the data unit (such as: packet) transmitted between the medium access control layer circuit 130 and the physical layer circuit 110, or obtain a timestamp and / or other PTP messages from the data unit, and correct the local clock accordingly. The medium access control layer circuit 130 is used to perform processing related to the medium access control layer.

[0011] When performing physical layer related processing, the physical layer circuit 110 refers to an operation clock CK PHY to operate (i.e., the operating clock CK PHY is a reference frequency signal of the physical layer circuit 110). In one embodiment, the operation clock CK PHY The frequency of the MAC layer circuit 130 is 200 MHz. When performing MAC layer related processing, the MAC layer circuit 130 refers to an operation clock CK MAC to operate (i.e., the operating clock CK MAC is a reference clock signal of the MAC layer circuit 130). In one embodiment, the operation clock CK MAC The frequency of the clock compensation circuit 140 is 156.25 MHz. PHY The local time is calculated based on CK, and the clock synchronization is performed based on CK. MAC The clock synchronization accuracy will be reduced due to the inconsistency of the operating clock CK. PHY With the operation clock CK MAC There is a clock difference between the two, and the clock compensation circuit 140 processes the operation clock CK according to the clock difference. PHY , so as to provide a compensated time to the PTPC processing circuit 120, so that the PTPC processing circuit 120 can perform clock synchronization processing with more accurate time information.

[0012] Please refer to further Figure 2, which illustrates the operating principle of the clock compensation circuit 140. As shown in the figure, the physical layer circuit 110 in the communication device 100 uses the operating clock CK PHY As the clock reference, the operating clock CK PHY The (13) rising edges of the physical layer circuit 110 can calculate 13 T PHY The clock compensation circuit 140 will be based on the operation clock CK PHY With the operation clock CK MAC Calculate the clock difference and use it to mask the operating clock CK PHY The specific rising edge of the clock is used to obtain the adjusted operating clock CK. COMP As shown in the figure, the adjusted operating clock CK COMP In the original 13 T PHY There are only 10 rising edges in the time unit, so the clock compensation circuit 140 uses the adjusted operating clock CK COMP To further explain, T COMP is the time after compensation, that is, after every CK COMP The rising edge, the time accumulation is actually increasing T MAC Therefore, the adjusted operating clock CK COMP The time after compensation calculated based on the operation clock CK MAC 10 T calculated based on MAC That is, the time after compensation generated by the clock compensation circuit 140 is actually the time based on the operation clock CK. MAC In addition, in addition to Figure 2 In the embodiment shown, in other embodiments of the present invention, compensation can also be performed by determining the regularity of different operation clocks. PHY Time cycle, operation clock CK PHY With CK MAC The rising edge of the clock compensation circuit 140 will be aligned. Then the clock compensation circuit 140 can operate at the clock CK PHY With CK MAC Clock correction is performed during alignment, and in N T PHY During the time period, the internal timer (Timer) of the clock compensation circuit 140 uses the operating clock CK PHY Timing, wait N T PHY Once the time period expires, the clock is corrected (the local time is compared with the absolute time) to obtain the compensated time.

[0013] Through the compensated time provided by the clock compensation circuit 140, the precision time protocol processing circuit 120 can add a timestamp based on the compensated time to the packet transmitted between the physical layer circuit 110 and the media access control layer circuit 130, thereby achieving clock synchronization with the communication device 200.

[0014] Figure 3 A method for clock compensation for clock synchronization processing based on a precision time protocol is illustrated. As shown in the figure, the method of the present invention includes the following simplified process:

[0015] Step 310: Determine a clock difference between a source operating clock and a target operating clock;

[0016] Step 320: Perform clock compensation according to the clock difference to obtain compensated time; and

[0017] Step 330: Perform clock synchronization processing based on the precision time protocol according to the compensated time.

[0018] Since the principles and details of the above steps have been described in detail in the above embodiments, they will not be repeated here. It is worth noting that the above process can be improved by adding other additional steps or making appropriate modifications and adjustments to better improve the efficiency and accuracy of clock synchronization processing.

[0019] The embodiments of the present invention may be specifically implemented as an apparatus, a method or a computer program product. Accordingly, the embodiments of the present invention may take the form of an entity implemented entirely by hardware, an entity implemented entirely by software (including firmware, resident software, microcode, etc.), or an entity combining software and hardware aspects, which may be generally referred to as a "module" or "system". In addition, the embodiments of the present invention may take the form of a computer program product embodied in any tangible expression medium, and the medium has a computer-usable program code embodied in the medium. In terms of hardware, the present invention may be implemented by applying any of the following technologies or related combinations: separate operating logic of a logic gate capable of executing a logic function according to a data signal, and an application specific integrated circuit (ASIC), a programmable gate array (PGA) or a field programmable gate array (FPGA) with appropriate combinational logic.

[0020] The flow chart and block diagram illustrate the architecture, function and operation of the system, method and computer program product of different possible implementation methods of the embodiment of the present invention. In this regard, each block in the flow chart or block diagram may represent a module, segment or part of the program code, including one or more executable instructions to implement a specific logic function. It should also be noted that each block in the block diagram and / or flow chart, and the combination of blocks in the block diagram and / or flow chart can be implemented by a special-purpose hardware base system, or a combination of special hardware and computer program instructions. These computer program instructions can be stored in a readable computer medium to command a computer or other programmable data processing device to operate in a specific manner so that the instructions stored in the readable computer medium generate functions / operations specified in the blocks or block combinations that implement the flow chart and / or block diagram. The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Explanation of symbols

[0021] 100, 200 communication equipment 110 Physical layer circuit 120 PTP processing circuit 130 Media Access Control Layer Circuit 140 Clock compensation circuit Steps 310, 320, 330

Claims

1. A method for clock compensation in a communication device, characterized in that: Include: determining a clock difference between a source operating clock and a target operating clock; Performing clock compensation according to the clock difference, thereby obtaining a compensated time; as well as A clock synchronization process based on the Precision Time Protocol (PTP) is performed according to the compensated time.

2. The method according to claim 1, characterized in that The source operation clock is an operation clock of a physical layer circuit of the communication device, and the target operation clock is an operation clock of a medium access control layer circuit.

3. The method according to claim 1, characterized in that The step of performing clock compensation according to the clock difference to obtain the compensated time includes: According to the clock difference, masking a specific rising edge of the source operation clock to obtain an adjusted operation clock; and The compensated time is obtained according to the adjusted operating clock.

4. The method according to claim 1, characterized in that The step of performing clock compensation according to the clock difference to obtain the compensated time includes: Determining a time period for aligning the source operation clock with the target operation clock according to the clock difference; as well as When the time period expires, calibration is performed based on a local time and an absolute time to obtain the compensated time.

5. The method according to claim 1, characterized in that The steps of performing a clock synchronization process based on the precision time protocol according to the compensated clock include: A timestamp based on the compensated time is added to a packet between a physical layer circuit and a media access control layer circuit in the communication device to perform the clock synchronization process.

6. A communication device, characterized in that: Include: A clock compensation circuit is used to determine a clock difference between a source operation clock and a target operation clock, and perform clock compensation according to the clock difference to obtain a compensated time; as well as A precision time protocol processing circuit is coupled to the clock compensation circuit and is used for performing a clock synchronization process based on a precision time protocol (PTP) according to the compensated time.

7. The communication device according to claim 6, characterized in that The source operation clock is an operation clock of a physical layer circuit of the communication device, and the target operation clock is an operation clock of a medium access control layer circuit.

8. The communication device according to claim 6, characterized in that The clock compensation circuit masks a specific rising edge of the source operation clock according to the clock difference to obtain an adjusted operation clock, and obtains the compensated time according to the adjusted operation clock.

9. The communication device according to claim 6, characterized in that The clock compensation circuit determines a time period for aligning the source operation clock with the target operation clock according to the clock difference; and when the time period expires, calibrates according to a local time and an absolute time to obtain the compensated time.

10. The communication device according to claim 6, characterized in that The precision time protocol processing circuit adds a timestamp based on the compensated time to a packet between a physical layer circuit and a media access control layer circuit in the communication device to perform the clock synchronization process.

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