Method and apparatus for short message communication based on block sparse vector code

Abstract

The application relates to the field of coding communication technology, and discloses a method and device for short message communication based on block sparse vector code, wherein a data sending end obtains a mapped block sparse vector according to information bits to be transmitted and a preset mapping strategy; the block sparse vector is pseudo-randomly extended and mapped to time-frequency resources to obtain time-frequency information to be transmitted, so that the dimension of the transmitted block sparse signal is reduced, the spectral efficiency of a communication system is improved, and the decoding process at a data receiving end is more accurate, so that the decoding reliability is improved. The data receiving end determines a block sparse vector and channel gain according to the received time-frequency information; based on a cyclic block orthogonal matching pursuit algorithm, the block sparse vector and the channel gain are used to obtain the index of a non-zero block and the value of the non-zero block, inverse operation is performed, and the information bits to be transmitted are obtained; the improved algorithm can significantly improve the non-zero block support detection precision and further improve the decoding accuracy and reliability.

Description

Technical Field

[0001] This invention relates to the field of encoded communication technology, and specifically to a method and apparatus for short message communication based on block sparse vector codes. Background Technology

[0002] Ultra-Reliable Low-Latency Communication (URLLC) is a key service category in 5G and 6G mobile communication systems, designed to support latency-sensitive applications such as autonomous driving, drones, and the Industrial Internet of Things (IIoT). These applications typically require the transmission of relatively small amounts of control or monitoring information and have extremely high requirements for transmission latency and reliability.

[0003] Current wireless transmission methods primarily maximize data throughput by transmitting long data packets, which is ill-suited to the short data packet transmission requirements of URLLC. Traditional coding techniques such as LDPC codes and polar codes perform poorly in short data packet transmission because they cannot ensure sufficient reliability and spectral efficiency under finite block length conditions.

[0004] Sparse coding techniques are a solution to enhance the reliability of short message transmission. For example, sparse regressive codes construct codewords using sparse linear combinations of Gaussian random dictionary matrices and achieve low error rates through maximum likelihood decoders. However, such coding methods are still limited in short packet transmission. Another approach is sparse vector codes, which improve reliability by transmitting randomly propagating sparse vectors in the time-frequency domain. Similarly, sparse vector codes remain ineffective in improving transmission rates and spectral efficiency; increasing the sparse vector length or the number of non-zero elements may lead to increased decoding complexity or transmission delays.

[0005] The biggest drawback of the related technologies is that sparse regression codes and sparse vector codes only use random sparse mapping patterns during the encoding process, and do not make full use of the structured information between non-zero elements, resulting in low decoding reliability and spectral efficiency. Summary of the Invention

[0006] In view of this, the present invention provides a method and apparatus for short message communication based on block sparse vector codes, in order to solve the problem of how to improve decoding reliability and spectral efficiency.

[0007] In a first aspect, the present invention provides a method for short message communication based on block sparse vector code, applied at a data sending end, the method comprising:

[0008] Based on the information bits to be transmitted, the mapped block sparse vector is obtained according to a preset mapping strategy;

[0009] The block sparse vector is expanded pseudo-randomly;

[0010] The extended block sparse vector is mapped to time-frequency resources to obtain the time-frequency information to be transmitted, and the time-frequency information is transmitted to the receiving end.

[0011] This invention transforms the information bits to be transmitted into block sparse vectors through a predefined mapping strategy. Compared to random sparse mapping in related technologies, this embodiment utilizes the positional structure information between non-zero elements to reduce the dimensionality of the transmitted block sparse signal, thereby improving the spectral efficiency of the communication system. By expanding the block sparse vectors with pseudo-random sequences, compared to the situation where multiple coding parameters need to be adjusted simultaneously when using sparse regression codes, the non-zero elements in this invention are expanded pseudo-randomly in the form of blocks, rather than being randomly expanded one by one. This provides additional block structure information, making the decoding process at the data receiving end more accurate, thereby improving decoding reliability.

[0012] In one optional implementation, obtaining the mapped block sparse vector based on the information bits to be transmitted according to a preset mapping strategy specifically includes:

[0013] Based on the length of the information to be transmitted, the information bits to be transmitted are divided into first information bits and second information bits;

[0014] The first information bits are processed by block sparse mapping to obtain a non-zero block index used to indicate the specific location of a non-zero block.

[0015] The second information bits are modulated and mapped using a preset method to obtain the value of a non-zero block.

[0016] The values ​​of the non-zero blocks and the non-zero block indices together constitute the block sparse vector.

[0017] In this embodiment of the invention, the information bits to be transmitted are divided into first information bits and second information bits. The first information bits are used to obtain the index of non-zero blocks through block sparse mapping, and the second information bits are used to become the value of non-zero blocks through a preset modulation method. This utilizes the characteristics of block sparse vectors to facilitate more accurate decoding at the subsequent decoding end.

[0018] In one optional implementation, the pseudo-random expansion of the block sparse vector specifically includes:

[0019] Obtain the number of non-zero blocks, the support set of non-zero blocks, the subcodebook matrix corresponding to the non-zero blocks, and the values ​​of non-zero blocks in the block sparse vector;

[0020] Based on the pseudo-random expansion algorithm, the block sparse vector is pseudo-randomly expanded using the value of the non-zero block, the number of non-zero blocks, the support set of the non-zero blocks, and the subcodebook matrix corresponding to the non-zero blocks.

[0021] The pseudo-random expansion algorithm is expressed by the following formula:

[0022]

[0023] in, B is the k-th non-zero block element of the block sparse vector s. k Let k be the support set of the non-zero block. Let x be the subcodebook matrix corresponding to the k-th non-zero block, x be the block sparse vector after pseudo-random expansion, and K be the number of non-zero blocks.

[0024] This invention ensures that all necessary information is available before pseudo-random expansion by obtaining the number of non-zero blocks, the support set of non-zero blocks, the sub-codebook matrix corresponding to the non-zero blocks, and the values ​​of the non-zero blocks. Using a pseudo-random expansion algorithm, the block sparse vector is expanded using the values, number, support set, and sub-codebook matrix of the non-zero blocks. Compared to random expansion of each non-zero element individually, this provides additional block structure information, ensuring higher accuracy in the block sparse vector code decoding algorithm. Furthermore, it reduces computational complexity by an order of magnitude, thereby reducing transmission latency and further ensuring efficient short packet transmission.

[0025] Secondly, this invention provides a method for short message communication based on block sparse vector codes, applied at the data sending end, the method comprising:

[0026] Obtain the time and frequency information sent by the data sender;

[0027] The block sparse vector and channel gain are determined based on the received time-frequency information;

[0028] Based on the cyclic block orthogonal matching pursuit algorithm, the index of the non-zero block and the value of the non-zero block are obtained by using the block sparse vector and the channel gain;

[0029] The information bits of the data sending end are obtained by performing an inverse information bit operation on the index and value of the non-zero block.

[0030] This invention derives block sparse vectors and channel gain information from received time-frequency information, providing a data foundation for subsequent acquisition of non-zero block indices and values. The core idea of ​​the cyclic block orthogonal matching pursuit algorithm is to cyclically shift the columns of the algorithm so that the non-zero blocks in the block sparse vector are located precisely on a uniformly distributed non-zero block. Then, the non-zero block support set is updated using block orthogonal matching pursuit to accurately identify the indices and corresponding values ​​of the non-zero blocks. Compared to the decoding process of the block orthogonal matching pursuit algorithm in related technologies, the improved algorithm in this embodiment significantly improves the non-zero block support detection accuracy, further enhancing the accuracy and reliability of decoding.

[0031] In one optional implementation, the step of obtaining the index of non-zero blocks and the value of non-zero blocks using the cyclic block orthogonal matching pursuit algorithm and the channel gain specifically includes:

[0032] The residual of the initial block sparse vector is the received signal, the non-zero block candidate set is initialized to an empty set, the combination index set is initialized to an empty set, and the combination number is initialized to zero; wherein, the received signal represents the signal determined by the block sparse vector and the channel gain;

[0033] The codebook matrix of the block sparse vector is cyclically shifted l times, and a new measurement matrix is ​​obtained after each shift; wherein, after each shift, the correlation value between the l-th block of the measurement matrix and the received signal is calculated.

[0034] Obtain the first target correlation value of the correlation value set after the l-th column cyclic shift; where the first target correlation value represents the maximum value in the correlation value set;

[0035] The first target index corresponding to the block is determined based on the first target relevance value;

[0036] The first target index determined after the l-th column cyclic shift is added to the non-zero block candidate set, and the duplicate indexes in the non-zero block candidate set corresponding to the (l-1)-th column cyclic shift are removed.

[0037] Based on the indexes in the non-zero block candidate set after the current iteration update, and all candidate combinations between the indices in the non-zero block candidate set during all iterations before the current iteration update;

[0038] The candidate combinations are added to the combination index set, and the number of candidate combinations is calculated to identify each candidate combination;

[0039] The residual is updated using the updated set of non-zero block candidates to serve as a new received signal during the (l+1)th column cyclic shift.

[0040] For each candidate combination, calculate the relevance value corresponding to the candidate combination;

[0041] Obtain the set of relevance values ​​corresponding to the candidate combinations, and determine the second target relevance value from the set; wherein, the second target relevance value represents the maximum value in the set of relevance values ​​corresponding to the candidate combinations;

[0042] The second target index is determined based on the second target relevance value; wherein the second target index represents the index of a non-zero block;

[0043] The non-zero support set is determined based on the second target index, and the value of the non-zero block is determined through the non-zero support set.

[0044] In this embodiment of the invention, by utilizing the prior information of the non-zero block structured distribution provided by the encoding part sent by the transmitting end, and by cyclically shifting the columns of the measurement matrix, the non-zero blocks in the received signal are located exactly on a uniformly distributed non-zero block. This enables a high-precision cyclic block orthogonal matching tracking algorithm to accurately identify the non-zero block index, effectively improving the reliability of the data receiver's decoding.

[0045] In one alternative implementation, the received signal is determined by the following formula:

[0046] y=φΠ l Π -l s+w;

[0047]

[0048] Where y represents the received signal, φ represents the measurement matrix corresponding to the channel gain, s represents the block sparse vector, and σ represents the mean of 0 and the covariance matrix is ​​σ. 2 I M The additive white Gaussian noise vector, σ 2 I represents the noise variance. M Represents an M×M dimensional identity matrix; Π -l s represents a downward cyclic shift of the sparse vector s by l times, φΠ l Π represents a rightward cyclic shift of the columns of the measurement matrix φ by l times, and Π represents the permutation matrix.

[0049] In this embodiment of the invention, by modifying the equivalent formula of the optimization problem of non-zero block search, the sparse vector is cyclically shifted downwards by l times, and at the same time, the columns of the measurement matrix are cyclically shifted to the right by l times, resulting in the final modified formula of the received signal. This allows at least one non-zero block in the sparse vector to be precisely aligned with a uniformly distributed non-zero block in the measurement matrix, thereby facilitating the efficient finding of non-zero elements in the sparse vector by the cyclic block orthogonal matching pursuit algorithm.

[0050] Thirdly, the present invention provides an apparatus for short message communication based on block sparse vector code, applied at a data sending end, the apparatus comprising:

[0051] The encoding module is used to obtain the mapped block sparse vector according to the information bits to be transmitted and a preset mapping strategy.

[0052] A pseudo-random expansion module is used to perform pseudo-random expansion on the block sparse vector;

[0053] The time-frequency resource mapping module is used to map the extended block sparse vector to time-frequency resources to obtain the time-frequency information to be transmitted, so as to transmit the time-frequency information to the receiving end.

[0054] Fourthly, the present invention provides an apparatus for short message communication based on block sparse vector code, applied at a data receiving end, the apparatus comprising:

[0055] The time and frequency information acquisition module is used to acquire the time and frequency information sent by the data sending end;

[0056] The time-frequency information analysis module is used to determine the block sparse vector and channel gain based on the received time-frequency information;

[0057] The matching pursuit algorithm calculation module is used to obtain the index of non-zero blocks and the value of non-zero blocks based on the cyclic block orthogonal matching pursuit algorithm, using the block sparse vector and channel gain;

[0058] The decoding module is used to perform information bit inverse operation on the index and value of the non-zero block to obtain the information bits of the data sending end.

[0059] Fifthly, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the short message communication method based on block sparse vector code described in the first aspect or any corresponding embodiment thereof.

[0060] In a sixth aspect, the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to execute the method for short message communication based on block sparse vector code according to the first aspect or any corresponding embodiment described above.

[0061] In a seventh aspect, the present invention provides a computer program product, including computer instructions for causing a computer to execute the method for short message communication based on block sparse vector code according to the first aspect or any corresponding embodiment described above. Attached Figure Description

[0062] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0063] Figure 1 This is a flowchart illustrating a method for short message communication based on block sparse vector code according to an embodiment of the present invention.

[0064] Figure 2 This is a flowchart illustrating another method for short message communication based on block sparse vector code according to an embodiment of the present invention.

[0065] Figure 3 This is a schematic diagram of the sparse mapping process of block sparse vector codes in the short message communication method based on block sparse vector codes according to an embodiment of the present invention.

[0066] Figure 4 This is a schematic diagram of the block sparse vector code encoding method for short message communication based on block sparse vector code according to an embodiment of the present invention;

[0067] Figure 5 This is a flowchart illustrating another method for short message communication based on block sparse vector code according to an embodiment of the present invention.

[0068] Figure 6 This is a flowchart illustrating another method for short message communication based on block sparse vector code according to an embodiment of the present invention.

[0069] Figure 7 This is a schematic diagram illustrating the block error rate performance analysis of a short message communication method based on block sparse vector code according to an embodiment of the present invention.

[0070] Figure 8 This is a structural block diagram of a short message communication device based on block sparse vector code according to an embodiment of the present invention;

[0071] Figure 9 This is a structural block diagram of a short message communication device based on block sparse vector code according to an embodiment of the present invention;

[0072] Figure 10 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. Detailed Implementation

[0073] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0074] Ultra-Reliable Low-Latency Communication (URLLC) is an important service category in fifth-generation (5G) and sixth-generation (6G) mobile communication systems, designed to support latency-sensitive applications such as autonomous driving, drones, industrial IoT, and remote sensing control. Applications typically transmit relatively small amounts of data, such as sensor information (temperature, humidity, gas density) or control information (start / stop, acceleration / deceleration, on / off).

[0075] However, these application scenarios have stringent requirements for latency and reliability, such as end-to-end latency as low as 25 milliseconds and a block error rate (BLER) of 10⁻⁵-10⁻⁷ milliseconds. Since this control or monitoring information plays a crucial role in the safety of life and property, it is essential to ensure that the data packets carrying it are transmitted to the terminal or base station in a timely and accurate manner.

[0076] Existing wireless transmission modes mainly maximize data throughput by transmitting long data packets, but they are difficult to adapt to the short data packet transmission scenario of URLLC.

[0077] On the one hand, to ensure reliability, a large amount of resources need to be allocated to signaling, retransmission, and error checking, which leads to high transmission delay and low spectral efficiency. On the other hand, under the constraint of finite block length, the sparsity of low-density parity-check (LDPC) codes will be affected, and polar codes cannot fully polarize the channel, resulting in a significant loss of coding gain.

[0078] In related technical fields, researchers have explored the potential of sparse coding to enhance the reliability of short message transmission and proposed some joint sparse coding and modulation techniques for low-rate short data packet transmission, namely sparse regression codes and sparse vector codes.

[0079] (1) Sparse regressive codes: This is a joint coding and modulation technique that has been widely studied in recent years. Unlike traditional coding and modulation techniques, sparse regressive codes construct codewords by using sparse linear combinations of columns of a Gaussian random dictionary matrix. During the encoding process, sparse regressive codes map the transmitted information bits onto a high-dimensional sparse vector, while decoding recovers the indices of a small number of non-zero elements from low-dimensional measurements. Since the transmission power is concentrated on non-zero elements, the decoding algorithm can accurately detect non-zero data even with low signal-to-noise ratio (SNR). When using a maximum likelihood (ML) decoder, sparse regressive codes can achieve arbitrarily low error rates at rates below the channel capacity even when the code length approaches infinity. Nevertheless, the approximate message passing algorithm of sparse regressive codes performs poorly on small-sized codebook matrices, limiting its performance in short packet transmission.

[0080] (2) Sparse Vector Code: This method encodes information bits into the non-zero indices of a sparse vector and transmits the randomly propagating sparse vector in the time-frequency domain. The receiver identifies the non-zero indices of the received signal using a multipath matching pursuit algorithm to achieve decoding. Compared with traditional channel coding techniques, sparse vector code has higher reliability in short packet transmission.

[0081] Although researchers have made some progress in leveraging the properties of sparse coding to enhance the reliability of short message transmission, sparse regression codes and sparse vector codes still have the following drawbacks:

[0082] First, sparse regression codes have a drawback: due to the block-based nature of their codebook matrix, multiple encoding parameters need to be adjusted simultaneously to achieve a smooth code rate, which is more difficult in actual hardware operation.

[0083] Secondly, sparse vector codes have drawbacks. Most sparse vector code schemes focus on improving reliability and reducing transmission delay, making them suitable for low-speed communication scenarios. While increasing the length of the sparse vector or the number of non-zero elements can improve transmission rate and spectral efficiency, the former increases decoding complexity, and the latter increases transmission delay. The code length of sparse vector codes grows exponentially with the number of transmitted bits, resulting in an excessively large codebook matrix when many bits are transmitted, leading to huge decoding computational overhead and increased transmission delay.

[0084] Third, both have shortcomings. Sparse regression codes and sparse vector codes only use a random sparse mapping mode to map the transmitted bits into sparse vectors, which does not make full use of the structured information between non-zero elements. Decoding reliability and spectral efficiency still need to be improved.

[0085] According to an embodiment of the present invention, a method embodiment for short message communication based on block sparse vector code is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0086] This embodiment provides a method for short message communication based on block sparse vector code, applied to the data sending end. Figure 1 This is a flowchart of a short message communication method based on block sparse vector code according to an embodiment of the present invention, as shown below. Figure 1 As shown, the process includes the following steps:

[0087] Step S101: Obtain the mapped block sparse vector according to the information bits to be transmitted and a preset mapping strategy.

[0088] The method provided in this embodiment of the invention is applied to a data sending end, such as a vehicle-to-everything (V2X) terminal. The information bits to be transmitted are the data to be transmitted, such as voice data, image data, etc.

[0089] Step S102: Perform pseudo-random expansion on the block sparse vector.

[0090] In this embodiment of the invention, the number of non-zero blocks, the support set of non-zero blocks, the subcodebook matrix corresponding to the non-zero blocks, and the values ​​of the non-zero blocks in the block sparse vector are first obtained. Then, based on the pseudo-random expansion algorithm, the block sparse vector is pseudo-randomly expanded using the values ​​of the non-zero blocks, the number of non-zero blocks, the support set of the non-zero blocks, and the subcodebook matrix corresponding to the non-zero blocks.

[0091] It should be noted that the pseudo-random expansion algorithm expands a smaller vector into a larger one. In this process, the algorithm performs several transformations on the original vector, and the final result is the desired expanded vector.

[0092] In related technologies, sparse regression codes and sparse vector codes only use a random sparse mapping pattern to map transmitted bits to sparse vectors, failing to fully utilize the structured information between non-zero elements. Therefore, their decoding reliability and spectral efficiency remain relatively low. In this embodiment, although the pseudo-random expansion algorithm appears to be randomly generated in name, it is actually derived in a block-based, systematic manner. When a block vector sequence is input into the pseudo-random expansion algorithm, the output will be a completely new block sequence of numbers, and its distribution characteristics will have a specific similarity to the original sequence, indicating that it is not entirely random. Therefore, this block-based pseudo-random expansion provides additional block structure information to ensure higher accuracy in the block sparse vector code decoding algorithm.

[0093] Step S103: Map the expanded block sparse vector to time-frequency resources to obtain the time-frequency information to be transmitted, so as to transmit the time-frequency information to the receiving end.

[0094] It should be noted that time-frequency resources are the basic resource units used to transmit information in wireless communication, consisting of two dimensions: time and frequency. The time dimension represents the time period occupied by data transmission, and the frequency dimension represents the frequency bandwidth occupied by data transmission. Depending on the actual communication requirements, channel conditions, and transmission goals, different mapping methods can be used to achieve optimal transmission performance. For example, packet mapping and frequency hopping mapping can be performed when pseudo-random spread vectors are applied. This embodiment is only used as an example for illustration and is not intended to limit the scope of the application.

[0095] This invention, through a predefined mapping strategy, transforms the information bits to be transmitted into block sparse vectors. Compared to random sparse mapping in related technologies, this embodiment utilizes the positional structure information between non-zero elements to reduce the dimensionality of the transmitted block sparse signal, thereby improving the spectral efficiency of the communication system. By expanding the block sparse vectors with pseudo-random sequences, compared to the situation where multiple coding parameters need to be adjusted simultaneously when using sparse regression codes, the non-zero elements in this invention are expanded pseudo-randomly in the form of blocks, rather than being randomly expanded one by one. This provides additional block structure information, making the decoding process at the data receiving end more accurate, thereby improving the decoding reliability at the data receiving end.

[0096] In one alternative implementation, such as Figure 2 As shown, step S101 specifically includes:

[0097] Step S1011: Divide the information bits to be transmitted into first information bits and second information bits based on the length of the information to be transmitted;

[0098] Step S1012: After the first information bits are subjected to block sparse mapping, a non-zero block index is obtained to indicate the specific location of the non-zero block.

[0099] Step S1013: The second information bits are processed by a preset modulation mapping to obtain the value of the non-zero block;

[0100] The values ​​of the non-zero blocks and the non-zero block indices together constitute the block sparse vector.

[0101] Understandably, in most real-world communication scenarios, the number of information bits to be transmitted is large. Therefore, this embodiment can divide the information bits to be transmitted into first information bits and second information bits according to the length of the information to be transmitted. The first information bit is an index indicating the location of a non-zero block, and the second information bit is the value of the non-zero block.

[0102] In practical applications, when the number of information bits to be transmitted is small, they can be directly encoded without dividing them into two parts. In this embodiment, the information bits to be transmitted can also be divided into multiple parts, and each part can be regarded as an independent message and encoded separately, which makes the encoding process more flexible and allows different encoding methods to be selected according to the actual situation.

[0103] Specifically, after the first information bits are divided, they can be processed through block sparse mapping to obtain non-zero block indices that indicate the specific locations of non-zero blocks. That is, the first information bits can be mapped into a set of digital sequences using pre-defined mapping rules; these digital sequences represent the locations of the non-zero blocks. The second information bits can be processed through a preset modulation mapping to obtain the values ​​of the non-zero blocks. In this embodiment, the preset modulation mapping refers to a pre-set modulation scheme, such as BPSK or 16QAM modulation. By modulating the second information bits, they can be transformed into a series of discrete symbols, which constitute the values ​​of the non-zero blocks. Finally, the values ​​of the non-zero blocks and the non-zero block indices together form a block sparse vector.

[0104] It is important to note that the term "common" here means that these two parts constitute the entire block sparse vector, and neither can be omitted.

[0105] For example, refer to Figure 3 , Figure 3This diagram illustrates the sparse mapping process of block sparse vector code. If the number of bits to be transmitted is 3 bits (e.g., "101"), the 3 bits of information are mapped into a block sparse vector of length N. The block sparse vector is divided into (B) blocks, where each block has a length of L. k (k = 1, 2, ..., K). In a block sparse vector, the total number of non-zero elements depends on the length of each block and the number of blocks. The total number of non-zero elements D is expressed by the following formula:

[0106]

[0107] In this embodiment of the invention, for ease of subsequent analysis, if the block length of each non-zero block is equal, and the block length of each non-zero block is L, where L is greater than 1, then the total number of non-zero elements Dl in this embodiment is represented by the following formula:

[0108] Dl=KL (2)

[0109] The sparse mapping process of the block sparse vector code is equivalent to placing K non-zero blocks of length L in N positions.

[0110] exist Figure 3 In the case where K=2 and L=2, the number of ways to place non-zero elements is expressed by the following formula:

[0111]

[0112] The result of this formula is 10, from Figure 3 This can be fully illustrated in the example. If the 3-bit information is 101, the first 8 methods already cover the mapping required for 3-bit information. Therefore, the 9th and 10th methods are redundant mapping methods. In practice, as the number of bits increases, the number of methods will also increase sequentially. Finally, the sixth method maps 101 to non-zero elements.

[0113] For example, refer to Figure 4 , Figure 4 This is a schematic diagram of block sparse vector code encoding. The transmitted b-bit information is divided into two parts. The bI-bit information is encoded onto a non-zero block index after block sparse mapping, and the remaining bS-bit information is mapped onto KL non-zero values ​​after QAM modulation. The block sparse vector is then mapped to time-frequency resources for transmission after pseudo-random expansion. For example, if a bit information is "1011001", then according to the length, the first 3 bits "101" are used as the first information bit, and so on... Figure 3 The index indicating the position of the non-zero block is obtained in the manner shown, namely the 2nd, 3rd, 5th and 6th blocks of the block sparse vector code. Then, the value of the "1001" bit can be filled into the above four index positions by QAM modulation to obtain the complete block sparse vector code.

[0114] In this embodiment of the invention, the information bits to be transmitted are divided into first information bits and second information bits. The first information bits are used to obtain the index of non-zero blocks through block sparse mapping, and the second information bits are used to become the value of non-zero blocks through a preset modulation method. This utilizes the characteristics of block sparse vectors to facilitate more accurate decoding at the subsequent decoding end.

[0115] In one alternative implementation, such as Figure 5 As shown, step S102 specifically includes:

[0116] Step S1021: Obtain the number of non-zero blocks, the support set of non-zero blocks, the subcodebook matrix corresponding to the non-zero blocks, and the values ​​of non-zero blocks in the block sparse vector;

[0117] Step S1022: Based on the pseudo-random expansion algorithm, the block sparse vector is pseudo-randomly expanded using the value of the non-zero block, the number of non-zero blocks, the support set of the non-zero blocks, and the subcodebook matrix corresponding to the non-zero blocks.

[0118] It should be noted that the block sparse vector code scheme can be directly extended to multi-user large-scale multiple transmit and receive systems. This embodiment takes a single transmit and receive system as an example to illustrate the pseudo-random extension process.

[0119] The pseudo-random expansion algorithm is expressed by the following formula:

[0120]

[0121] in, B is the k-th non-zero block element of the block sparse vector s. k Let k be the support set of the non-zero block. Let be the subcodebook matrix corresponding to the k-th non-zero block, x be the block sparse vector after pseudo-random expansion, and K be the number of non-zero blocks.

[0122] Furthermore, it is worth noting that if a sparse vector code scheme is used, the number of information bits that can be encoded at non-zero indices is expressed by the following formula:

[0123]

[0124] According to compressed sensing theory, the number of measurements required for a block sparse vector code scheme to accurately recover a block K sparse signal of block length L from low-dimensional measurements is expressed by the following formula:

[0125]

[0126] Where M represents the number of measurements required for the block sparse vector code, N represents the length of the block sparse vector in the block sparse vector code scheme, and CBCS This represents a constant related to the correlation of the measurement matrix in a sparse vector code scheme.

[0127] Unlike the embodiments of the present invention, in related technologies, when the sparse vector length and the total number of non-zero elements are the same, the number of measurements required for a sparse vector code scheme is expressed by the following formula:

[0128]

[0129] Among them, M SVC N represents the number of measurements required for Sparse Vector Coding (SVC). SVC C represents the length of the sparse vector in the sparse vector code scheme. CS This represents a constant related to the correlation of the measurement matrix in a sparse vector code scheme.

[0130] It is evident that the non-zero elements in the block sparse vector code scheme are randomly expanded in blocks. This random expansion provides additional block structure information, which is helpful in designing high-precision block sparse vector code decoding algorithms. Furthermore, comparing the number of measurements calculated according to equations (6) and (7), the number of measurements required for accurate recovery by the block sparse vector code scheme is reduced by a factor of L compared to the sparse vector code scheme. In short packet data transmission, the number of measurements is equal to the frequency resources used for transmission (i.e., the number of subcarriers). The fewer the number of subcarriers, the shorter the transmission delay, and vice versa. Therefore, the number of information bits that can be encoded by the block sparse vector code is less than that of the sparse vector code, and its transmission delay is much lower.

[0131] This invention ensures that all necessary information is available before pseudo-random expansion by obtaining the number of non-zero blocks, the support set of non-zero blocks, the sub-codebook matrix corresponding to the non-zero blocks, and the values ​​of the non-zero blocks. Using a pseudo-random expansion algorithm, the block sparse vector is expanded using the values, number, support set, and sub-codebook matrix of the non-zero blocks. Compared to random expansion of each non-zero element individually, this provides additional block structure information, ensuring higher accuracy in the block sparse vector code decoding algorithm. Furthermore, it reduces computational complexity by an order of magnitude, thereby reducing transmission latency and further ensuring efficient short packet transmission.

[0132] This embodiment provides a method for short message communication based on block sparse vector code, applied at the data receiving end. Figure 6 This is a flowchart of a short message communication method based on block sparse vector code according to an embodiment of the present invention, as shown below. Figure 6 As shown, the process includes the following steps:

[0133] Step S601: Obtain the time and frequency information sent by the data sending end.

[0134] It should be noted that in a communication system, the receiving end needs to obtain the time and frequency information (time and frequency information) sent by the sending end, including the time domain and frequency domain characteristics of the signal. These two are the basis for decoding and determine how the receiving end processes the received signal.

[0135] Step S602: Determine the block sparse vector and channel gain based on the received time-frequency information.

[0136] Understandably, based on the time-frequency information obtained in step S601, the receiving end can determine the block sparse vector (i.e., the data vector with block sparse characteristics, including the index of non-zero blocks and the value of non-zero elements) and the channel gain (i.e., the signal attenuation or amplification information during channel transmission), which can be used for subsequent signal processing algorithms for decoding.

[0137] Step S603: Based on the cyclic block orthogonal matching pursuit algorithm, the index of the non-zero block and the value of the non-zero block are obtained using the block sparse vector and the channel gain.

[0138] Understandably, the receiver employs the Cyclic Block Orthogonal Matching Pursuit (COPPS) algorithm to handle block sparse vectors and channel gain. The core principle of COPPS is to determine the position (index) of non-zero blocks and their specific values ​​using the columns of a cyclic shift measurement matrix. The goal is to accurately detect which blocks contain valid information (non-zero blocks) and determine their values ​​in subsequent inverse operations.

[0139] Step S604: Perform information bit inverse operation on the index and value of the non-zero block to obtain the information bits of the data sending end.

[0140] Understandably, the original data information is recovered by processing the indices and values ​​of non-zero blocks through inverse operations. In other words, by reversing the operation, the indices and values ​​of non-zero blocks are demodulated in the same way (e.g., BPSK, 16QAM modulation) to convert them into the final bit stream information, thereby obtaining the complete information to be transmitted.

[0141] This invention derives block sparse vectors and channel gain information from received time-frequency information, providing a data foundation for subsequent acquisition of non-zero block indices and values. The core idea of ​​the cyclic block orthogonal matching pursuit algorithm is to cyclically shift the columns of the algorithm so that the non-zero blocks in the block sparse vector are located precisely on a uniformly distributed non-zero block. Then, the non-zero block support set is updated using block orthogonal matching pursuit to accurately identify the indices and corresponding values ​​of the non-zero blocks. Compared to the decoding process of the block orthogonal matching pursuit algorithm in related technologies, the improved algorithm in this embodiment significantly improves the non-zero block support detection accuracy, further enhancing the accuracy and reliability of decoding.

[0142] In one optional implementation, step S603 specifically includes:

[0143] S6031, the residual of the block sparse vector is initialized to the received signal, the non-zero block candidate set is initialized to an empty set, the combination index set is initialized to an empty set, and the combination number is initialized to zero; wherein, the received signal represents the signal determined by the block sparse vector and the channel gain;

[0144] Specifically, the received signal is determined by the following formula:

[0145] y=φΠ l Π -l s+w; (8)

[0146]

[0147] Where y represents the received signal, φ represents the measurement matrix corresponding to the channel gain, s represents the block sparse vector, and σ represents the mean of 0 and the covariance matrix is ​​σ. 2 I M The additive white Gaussian noise vector, σ 2 I represents the noise variance. M Represents an M×M dimensional identity matrix; Π -l s represents a downward cyclic shift of the sparse vector s by l times, φΠ l Π represents a rightward cyclic shift of the columns of the measurement matrix φ by l times, and Π represents the permutation matrix.

[0148] It is understandable that, at the data receiving end, the signal input-output relationship of the block sparse vector code scheme is represented by the following formula:

[0149] y=diag(h)Gs+w=Φs+w(10)

[0150] Where y represents the received signal, and h = [h1, h2, ..., h M ] H Let represent the channel gain, and s represent the sparse vector after block sparse mapping, which contains K non-zero blocks, each of length L. This indicates that the mean is 0 and the covariance matrix is ​​σ. 2 I M The additive white Gaussian noise vector, σ 2 Let I be the noise variance. M This represents the M×M dimensional identity matrix.

[0151] If B = N / L is an integer (i.e., a sparse vector of length N can be divided into B blocks, each of length L), then the decoding problem of the block sparse vector code can be described as recovering the correct non-zero block support of the sparse vector s and its corresponding value from the received signal y. The above equation (10) is equivalent to the non-zero block search optimization problem expressed by the following formula:

[0152] min||y-Φs s || st.|S|=KL| (11)

[0153] in, This indicates that s has non-zero support, and It is the support for the k-th non-zero block of s.

[0154] Therefore, based on the cyclic shift property of matrix-vector operations, equations (8) and (9) provided in this embodiment are derived from equation (10), and are also equivalent to the non-zero block search optimization problem of equation (11).

[0155] In this embodiment of the invention, by modifying the equivalent formula of the optimization problem of non-zero block search, the sparse vector is cyclically shifted downwards by l times, and at the same time, the columns of the measurement matrix are cyclically shifted to the right by l times, resulting in the final modified formula of the received signal. This allows at least one non-zero block in the sparse vector to be precisely aligned with a uniformly distributed non-zero block in the measurement matrix, thereby facilitating the efficient finding of non-zero elements in the sparse vector by the cyclic block orthogonal matching pursuit algorithm.

[0156] S6032, the codebook matrix of the block sparse vector is cyclically shifted l times, and a new measurement matrix is ​​obtained each time; wherein, after each shift, the correlation value between the l-th block of the measurement matrix and the received signal is calculated.

[0157] S6033, obtain the first target correlation value of the correlation value set after the l-th column cyclic shift; wherein, the first target correlation value represents the maximum value in the correlation value set;

[0158] S6034, determine the first target index corresponding to the block based on the first target correlation value;

[0159] S6035, add the first target index determined after the l-th column cyclic shift to the non-zero block candidate set, and remove the duplicate indexes in the non-zero block candidate set corresponding to the (l-1)-th column cyclic shift;

[0160] S6036, based on the index of the non-zero block candidate set after the current iteration update, and all candidate combinations between the indices of the non-zero block candidate set in all iterations before the current iteration update;

[0161] S6037, add the candidate combination to the combination index set, and calculate the number of candidate combinations to identify each candidate combination;

[0162] S6038, update the residual using the updated set of non-zero block candidates to serve as a new received signal during the (l+1)th column cyclic shift;

[0163] S6039, For each candidate combination, calculate the correlation value corresponding to the candidate combination;

[0164] S60310, Obtain the set of relevance values ​​corresponding to the candidate combinations, and determine the second target relevance value from the set; wherein, the second target relevance value represents the maximum value in the set of relevance values ​​corresponding to the candidate combinations;

[0165] S60311, determine the second target index based on the second target correlation value; wherein, the second target index represents the index of a non-zero block;

[0166] S60312, and determine the non-zero support set according to the second target index, and determine the value of the non-zero block through the non-zero support set.

[0167] It should be noted that the block orthogonal matching pursuit algorithm in related technologies requires knowledge of both the size and distribution information of non-zero blocks. Directly using this algorithm to recover the block sparse vector in the block sparse vector code will significantly reduce the accuracy of non-zero block support detection. To address this issue, this embodiment presents a specific implementation of the cyclic block orthogonal matching pursuit algorithm to ensure accurate detection of non-zero block supports in the block sparse vector code scheme.

[0168] The cyclic block orthogonal matching pursuit algorithm provided in this embodiment is an optimized and improved version of the block orthogonal matching pursuit algorithm framework. Therefore, some of its operations are similar to those of the block orthogonal matching pursuit algorithm. The difference lies in that the cyclic block orthogonal matching pursuit algorithm needs to cyclically shift the columns of the measurement matrix in each iteration. Then, it calculates the block correlation between the shifted measurement matrix and the residual, and saves the index corresponding to the maximum block correlation value calculated in each cyclic shift to the candidate block support set. After K iterations, the K best blocks are selected from all candidate block support sets as the final recovered non-zero blocks.

[0169] In other words, the core idea of ​​the cyclic block orthogonal matching pursuit algorithm is to cyclically shift the columns of the measurement matrix so that the non-zero blocks in the received signal are located exactly on a uniformly distributed non-zero block. By utilizing the prior information of the structured distribution of non-zero blocks provided by the coding part, a high-precision cyclic block orthogonal matching pursuit algorithm is performed to accurately identify the non-zero block index, so as to recover the information bits carried on the non-zero block index.

[0170] For example, the orthogonal matching pursuit algorithm for cyclic blocks can be used to obtain the index of non-zero blocks and the estimated value of non-zero elements. Based on the estimated non-zero block index, b can be recovered. I The first information bit (b) can be recovered by demodulating the non-zero estimate. S The first bit (i.e., the second information bit). The entire cyclic block orthogonal matching pursuit algorithm from steps S6031 to S60312 above can be implemented by computer program code, and the implementation logic of the code is as follows:

[0171] Inputs: Received signal y; Measurement matrix Φ; Number of non-zero blocks K; Length of non-zero blocks L.

[0172] When the iteration count k is less than the number of non-zero blocks K, the following loop steps are executed:

[0173] Step A1: Initialization: Residual r (0) =y; Non-zero block candidate set Composite Index Set Combinations

[0174] Step A2: Perform column cyclic shift l times on the codebook matrix to obtain... For the l-th cyclic shift, calculate the correlation between the l-th block of the measurement matrix and the received signal:

[0175] Where Φ represents the measurement matrix, Π l Let represent the permutation matrix obtained by performing l cyclic shifts on the columns of the identity matrix. This represents the matrix obtained by cyclically shifting the columns of the measurement matrix Φ to the right by l times;

[0176] and This represents a submatrix consisting of the (q-1)L+1 to qLth columns of matrix Φ. This represents the conjugate transpose of this submatrix.

[0177] Step A3: Find the index corresponding to the maximum value:

[0178] in, Indicates from Find the maximum value; the index corresponding to the maximum value is... For example, The largest value is but

[0179] Step A4: Update the candidate support set: here Let represent the candidate support set for the k-th iteration, and ∪ represent the union operation, such as {1, 2}U{3, 5}={1, 2, 3, 5}.

[0180] Step A5: Remove The same elements in:

[0181] Here, uniq(a) means to remove duplicate elements from a. For example, if a = {1, 2, 2, 2, 3}, then uniq(a) = {1, 2, 3}.

[0182] Step A6: Calculation Number of block indices in:

[0183] in, This indicates the number of index blocks used to identify the candidate support set.

[0184] Step A7: Calculate all combinations of the candidate support set indices in the current iteration and the candidate support set indices in the previous k-1 iterations, and store them in set J. (k) : Comb(·) represents taking the index combination.

[0185] For example, in the first iteration In the second iteration but and The combination between them is Total Such combinations, then

[0186] Step A8: Calculate the total number of combinations:

[0187] Step A9: Update residuals: in

[0188] Step A10: For each Calculate the relevant values: in

[0189] Step A11: Find The index corresponding to the maximum value in the middle:

[0190]

[0191] When k is equal to or greater than K, the above iterative loop process ends after executing step A11. The non-zero support set is determined based on the index. The non-zero support set here is used for the values ​​of non-zero elements.

[0192] In this embodiment of the invention, by utilizing the prior information of the non-zero block structured distribution provided by the encoding part sent by the transmitting end, and by cyclically shifting the columns of the measurement matrix, the non-zero blocks in the received signal are located exactly on a uniformly distributed non-zero block. This enables a high-precision cyclic block orthogonal matching tracking algorithm to accurately identify the non-zero block index, effectively improving the reliability of the data receiver's decoding.

[0193] This invention provides a short message communication method based on block sparse vector codes, which offers advantages in transmission reliability and latency compared to classic polar code schemes and sparse vector coding schemes. (See also...) Figure 7 The block error rate performance of different schemes is compared under different modulation orders.

[0194] The specific settings are as follows: the length of the non-zero block is (L=3), and the number of non-zero blocks is (K=2). Therefore, the total number of non-zero elements in the sparse vector code and constellation-rotated sparse vector code schemes is (KL=6). Under BPSK modulation, the number of transmitted bits is (b=47), while under 16QAM modulation, the number of transmitted bits is (b=59).

[0195] pass Figure 7 The comparison of experimental data clearly demonstrates that the block error rate performance of the block sparse vector code scheme is superior to that of the constellation rotation sparse vector code scheme and the sparse vector code scheme across all modulation orders. For example, when the target block error rate is 1×10⁻⁶... -4At that time, the signal-to-noise ratio required by the block sparse vector code scheme using BPSK modulation is about 2dB lower than that of the sparse vector code scheme and about 1.5dB lower than that of the constellation rotating sparse vector code scheme; the signal-to-noise ratio required by the block sparse vector code scheme using 16QAM modulation is about 1.7dB lower than that of the constellation rotating sparse vector code scheme.

[0196] Therefore, based on this experimental data, it can be shown that, under the same spectral efficiency and transmission delay, the block sparse vector code scheme has higher reliability than the sparse vector code scheme and the constellation rotation sparse vector code scheme.

[0197] This embodiment also provides a device for short message communication based on block sparse vector code, which is used to implement the above embodiments and preferred embodiments, and will not be repeated as already described. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0198] This embodiment provides a device for short message communication based on block sparse vector code, such as... Figure 8 As shown, it includes:

[0199] Encoding module 801 is used to obtain the mapped block sparse vector according to the information bits to be transmitted and a preset mapping strategy.

[0200] The pseudo-random expansion module 802 is used to perform pseudo-random expansion on the block sparse vector;

[0201] The time-frequency resource mapping module 803 is used to map the extended block sparse vector to time-frequency resources to obtain the time-frequency information to be transmitted, so as to transmit the time-frequency information to the receiving end.

[0202] In one optional implementation, the encoding module 801 is specifically configured to: divide the information bits to be transmitted into a first information bit and a second information bit based on the length of the information to be transmitted; obtain a non-zero block index for indicating the specific location of a non-zero block after performing a block sparse mapping on the first information bit; obtain the value of a non-zero block after performing a preset modulation mapping on the second information bit; wherein the value of the non-zero block and the non-zero block index together constitute the block sparse vector.

[0203] In one optional implementation, the pseudo-random expansion module 802 is specifically used to: obtain the number of non-zero blocks, the support set of non-zero blocks, the subcodebook matrix corresponding to the non-zero blocks, and the values ​​of the non-zero blocks in the block sparse vector; and based on the pseudo-random expansion algorithm, use the values ​​of the non-zero blocks, the number of non-zero blocks, the support set of non-zero blocks, and the subcodebook matrix corresponding to the non-zero blocks to perform pseudo-random expansion on the block sparse vector.

[0204] The pseudo-random expansion algorithm is expressed by the following formula:

[0205]

[0206] in, B is the k-th non-zero block element of the block sparse vector s. k Let k be the support set of the non-zero block. Let x be the subcodebook matrix corresponding to the k-th non-zero block, x be the block sparse vector after pseudo-random expansion, and K be the number of non-zero blocks.

[0207] This embodiment provides a device for short message communication based on block sparse vector code, such as... Figure 9 As shown, it includes:

[0208] The time and frequency information acquisition module 901 is used to acquire the time and frequency information sent by the data sending end;

[0209] The time-frequency information analysis module 902 is used to determine the block sparse vector and channel gain based on the received time-frequency information;

[0210] The matching pursuit algorithm calculation module 903 is used to obtain the index of the non-zero block and the value of the non-zero block based on the cyclic block orthogonal matching pursuit algorithm, using the block sparse vector and the channel gain;

[0211] The decoding module 904 is used to perform information bit inverse operation on the index and value of the non-zero block to obtain the information bits of the data sending end.

[0212] In an optional implementation, the matching pursuit algorithm calculation module 903 is specifically configured to: initialize the residual of the block sparse vector as the received signal, initialize the non-zero block candidate set as an empty set, initialize the combination index set as an empty set, and initialize the combination number to zero; wherein, the received signal represents the signal determined by the block sparse vector and the channel gain; perform column cyclic shift l times on the codebook matrix of the block sparse vector, each shift yielding a new measurement matrix; wherein, after each shift, the correlation value between the l-th block of the measurement matrix and the received signal is calculated; obtain the first target correlation value of the correlation value set after the l-th column cyclic shift; wherein, the first target correlation value represents the maximum value in the correlation value set; determine the first target index corresponding to the block based on the first target correlation value; add the first target index determined after the l-th column cyclic shift to the non-zero block candidate set, and remove the non-zero block candidate corresponding to the previous (l-1)-th column cyclic shift. The process involves: 1. Concentrating on repeated indices; 2. Updating the non-zero block candidate set based on the indices of the non-zero block candidate set after the current iteration update, and considering all candidate combinations between the indices of the non-zero block candidate set across all iterations before the current iteration update; 3. Adding the candidate combinations to the combined index set and calculating the number of candidate combinations to identify each candidate combination; 4. Updating the residual using the updated non-zero block candidate set to serve as a new received signal during the (l+1)th column cyclic shift; 5. For each candidate combination, calculating the correlation value corresponding to the candidate combination; 6. Obtaining the set of correlation values ​​corresponding to the candidate combination and determining a second target correlation value from the set; 7. Wherein, the second target correlation value represents the maximum value in the set of correlation values ​​corresponding to the candidate combination; 8. Determining a second target index based on the second target correlation value; 9. Wherein, the second target index represents the index of the non-zero block; 10. Determining a non-zero support set based on the second target index and determining the value of the non-zero block through the non-zero support set.

[0213] In one alternative implementation, the received signal is determined by the following formula:

[0214] y=φΠ l Π -l s+w;

[0215]

[0216] Where y represents the received signal, φ represents the measurement matrix corresponding to the channel gain, s represents the block sparse vector, and σ represents the mean of 0 and the covariance matrix is ​​σ. 2 I M The additive white Gaussian noise vector, σ 2 I represents the noise variance. M Represents an M×M dimensional identity matrix; Π -l s represents a downward cyclic shift of the sparse vector s by l times, φΠ lΠ represents a rightward cyclic shift of the columns of the measurement matrix φ by l times, and Π represents the permutation matrix.

[0217] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.

[0218] In this embodiment, the device for short message communication based on block sparse vector code is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0219] This invention also provides a computer device having the above-described features. Figure 8 or Figure 9 The apparatus shown is a short message communication device based on block sparse vector code.

[0220] Please see Figure 10 , Figure 10 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of the present invention, such as... Figure 10 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 10 Take a processor 10 as an example.

[0221] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GPA), or any combination thereof.

[0222] The memory 20 stores instructions executable by at least one processor 10 to cause at least one processor 10 to perform the method shown in the above embodiments.

[0223] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0224] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0225] The computer device also includes a communication interface 30 for communicating with other devices or communication networks.

[0226] This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0227] A portion of this invention can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to the invention through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0228] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and all such modifications and variations fall within the defined scope.

Claims

1. A short message communication method based on block sparse vector code, characterized in that, Applied to the data sending end, the method includes: The block sparse vector is obtained by mapping the information bits to be transmitted according to a preset mapping strategy, including: dividing the information bits to be transmitted into a first information bit and a second information bit based on the length of the information to be transmitted; obtaining a non-zero block index for indicating the specific location of a non-zero block after the first information bit is subjected to block sparse mapping; obtaining the value of a non-zero block after the second information bit is subjected to preset modulation mapping; wherein, the value of the non-zero block and the non-zero block index together constitute the block sparse vector; The block sparse vector is pseudo-randomly expanded; The extended block sparse vector is mapped to time-frequency resources to obtain the time-frequency information to be transmitted, and the time-frequency information is transmitted to the receiving end.

2. The method according to claim 1, characterized in that, The pseudo-random expansion of the block sparse vector specifically includes: Obtain the number of non-zero blocks, the support set of non-zero blocks, the subcodebook matrix corresponding to the non-zero blocks, and the values ​​of non-zero blocks in the block sparse vector; Based on the pseudo-random expansion algorithm, the block sparse vector is pseudo-randomly expanded using the value of the non-zero block, the number of non-zero blocks, the support set of the non-zero blocks, and the subcodebook matrix corresponding to the non-zero blocks. The pseudo-random expansion algorithm is expressed by the following formula: in, B is the k-th non-zero block element of the block sparse vector s. k Let k be the support set of the non-zero block. Let x be the subcodebook matrix corresponding to the k-th non-zero block, x be the block sparse vector after pseudo-random expansion, and K be the number of non-zero blocks.

3. A method for short message communication based on block sparse vector code, characterized in that, Applied to a data receiving end, the method includes: Obtain the time and frequency information sent by the data sender; The block sparse vector and channel gain are determined based on the received time-frequency information; Based on the cyclic block orthogonal matching pursuit algorithm, the index of the non-zero block and the value of the non-zero block are obtained by using the block sparse vector and the channel gain through the column of the measurement matrix corresponding to the cyclic shift channel gain. The information bits of the data sending end are obtained by performing an inverse information bit operation on the index and value of the non-zero block.

4. The method according to claim 3, characterized in that, The cyclic block orthogonal matching pursuit algorithm, which uses the block sparse vector and channel gain to obtain the index of non-zero blocks and the value of non-zero blocks, specifically includes: The residual of the initial block sparse vector is the received signal, the initial non-zero block candidate set is an empty set, the initial combination index set is an empty set, and the initial combination number is zero; wherein, the received signal represents the signal determined by the block sparse vector and the channel gain; The codebook matrix of the block sparse vector is cyclically shifted l times, and a new measurement matrix is ​​obtained after each shift; wherein, after each shift, the correlation value between the l-th block of the measurement matrix and the received signal is calculated. Obtain the first target correlation value of the correlation value set after the l-th column cyclic shift; where the first target correlation value represents the maximum value in the correlation value set; The first target index corresponding to the block is determined based on the first target relevance value; The first target index determined after the l-th column cyclic shift is added to the non-zero block candidate set, and the duplicate indexes in the non-zero block candidate set corresponding to the (l-1)-th column cyclic shift are removed. Based on the indexes in the non-zero block candidate set after the current iteration update, and all candidate combinations between the indices in the non-zero block candidate set during all iterations before the current iteration update; The candidate combinations are added to the combination index set, and the number of candidate combinations is calculated to identify each candidate combination; The residual is updated using the updated set of non-zero block candidates to serve as a new received signal during the (l+1)th column cyclic shift. For each candidate combination, calculate the relevance value corresponding to the candidate combination; Obtain the set of relevance values ​​corresponding to the candidate combinations, and determine the second target relevance value from the set; wherein, the second target relevance value represents the maximum value in the set of relevance values ​​corresponding to the candidate combinations; The second target index is determined based on the second target relevance value; wherein the second target index represents the index of a non-zero block; The non-zero support set is determined based on the second target index, and the value of the non-zero block is determined through the non-zero support set.

5. The method according to claim 4, characterized in that, The received signal is determined by the following formula: y=φΠ l P -l s+w; Where y represents the received signal, φ represents the measurement matrix corresponding to the channel gain, s represents the block sparse vector, and σ represents the mean of 0 and the covariance matrix is ​​σ. 2 I M The additive white Gaussian noise vector, σ 2 I represents the noise variance. M Represents an M×M dimensional identity matrix; Π -l s represents a downward cyclic shift of the sparse vector s by l times, φΠ l Π represents a rightward cyclic shift of the columns of the measurement matrix φ by l times, and Π represents the permutation matrix.

6. A device for short message communication based on block sparse vector code, characterized in that, The device, applied to a data transmitting end, includes: An encoding module is used to obtain a mapped block sparse vector based on the information bits to be transmitted according to a preset mapping strategy, including: dividing the information bits to be transmitted into a first information bit and a second information bit based on the length of the information to be transmitted; obtaining a non-zero block index for indicating the specific location of a non-zero block after performing block sparse mapping on the first information bit; obtaining the value of a non-zero block after performing preset modulation mapping on the second information bit; wherein the value of the non-zero block and the non-zero block index together constitute the block sparse vector; A pseudo-random expansion module is used to perform pseudo-random expansion on the block sparse vector; The time-frequency resource mapping module is used to map the extended block sparse vector to time-frequency resources to obtain the time-frequency information to be transmitted, so as to transmit the time-frequency information to the receiving end.

7. A device for short message communication based on block sparse vector code, characterized in that, The device, applied to a data receiving end, includes: The time and frequency information acquisition module is used to acquire the time and frequency information sent by the data sending end; The time-frequency information analysis module is used to determine the block sparse vector and channel gain based on the received time-frequency information; The matching pursuit algorithm calculation module is used to obtain the index of non-zero blocks and the value of non-zero blocks by using the block sparse vector and channel gain through the columns of the measurement matrix corresponding to the cyclic shift channel gain based on the cyclic block orthogonal matching pursuit algorithm. The decoding module is used to perform information bit inverse operation on the index and value of the non-zero block to obtain the information bits of the data sending end.

8. A computer device, characterized in that, include: A memory and a processor are communicatively connected, the memory storing computer instructions, and the processor executing the computer instructions to perform the short message communication method based on block sparse vector code as described in any one of claims 1-2 or 3-5.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to perform the method of short message communication based on block sparse vector code as described in any one of claims 1-2 or 3-5.

10. A computer program product, characterized in that, Includes computer instructions for causing a computer to perform the method of short message communication based on block sparse vector code as described in any one of claims 1-2 or 3-5.

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