Bandwidth lossless adjustment device and method for fine-grained optical transport network based on FPGA

Abstract

The present application discloses a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA. When the adjustment indication setting value is 1 obtained through a data cache module, the time slot value corresponding to the X value is determined through a time slot counter. The adjustment position prediction module determines the adjustment position prediction value according to the bandwidth lossless adjustment algorithm and the X value, and outputs a bandwidth lossless adjustment enable signal, so that an adjusted fgODUflex signal is generated based on the adjusted fgTS, and the adjusted fgODUflex signal is mapped to each adjusted fgTS in the ODUk frame structure, so that the lossless bandwidth adjustment function of the fine-grained optical transport network can be realized.

Description

Technical Field

[0001] The present application relates to the technical field of fine-grained optical transport networks, and in particular to a bandwidth lossless adjustment device and method for fine-grained optical transport networks based on FPGA. Background Art

[0002] Fine Grain Optical Transport Network (fgOTN) is the technological evolution of SDH (ITU-TG.707) and OTN (ITU-G.709). It perfectly inherits the high reliability and deterministic latency characteristics of SDH and OTN (Optical Transport Network), supports a variety of VBR (variable bit rate) and CBR (constant bit rate) services such as Ethernet, E1, SDH, etc., and can provide a secure hard isolation solution based on rigid hard pipes for quality connections. It can be widely used in operators' government and enterprise dedicated lines, as well as private networks in industries such as electricity and transportation.

[0003] How to achieve lossless bandwidth adjustment in fine-grained optical transport networks has become a technical problem that needs to be solved urgently. Summary of the invention

[0004] The purpose of the present application is to provide a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA, which can realize the function of bandwidth lossless adjustment.

[0005] In a first aspect, the present application provides a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA, the device comprising:

[0006] A data cache module, used for writing the received fgODUflex signal of the current fgODUflex channel number into the corresponding storage space in sequence, storing a 16-byte data block and a corresponding adjustment indication setting value in each storage space, wherein the adjustment indication setting value is 0 or 1;

[0007] A time slot search module, configured to store a first time slot configuration table, the first time slot configuration table storing the fgODUflex channel number corresponding to each fgTS, and generate a second time slot configuration table in response to a bandwidth lossless adjustment instruction, the second time slot configuration table storing the fgODUflex channel number corresponding to each fgTS after adjustment;

[0008] The lossless adjustment switching module includes a time slot counter, which is used to determine at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure according to the first time slot configuration table, and when the first target fgTS is determined in the ODUk frame structure, the time slot counter is triggered to perform counting, and a corresponding time slot count value is generated in response to each target fgTS, wherein the time slot count value is used to indicate the number of the target fgTS in the ODUk frame structure;

[0009] The data cache module is further configured to obtain a first current time slot count value of the time slot counter in response to the adjustment indication setting value being 1, and use the first current time slot count value as the X value, where the X value indicates that the 16-byte block of the 3rd row and the 1st to the 16th column of the fgODUflex signal is mapped to a corresponding time slot value in the ODUk frame structure;

[0010] An adjustment position prediction module is used to determine an adjustment position prediction value Y according to a bandwidth lossless adjustment algorithm of a fine-grained optical transport network and an X value, wherein the adjustment position prediction value Y is a 16-byte block from row 3, columns 1905 to 1920 of the fgODUflex signal mapped to a corresponding time slot value in the ODUk frame structure;

[0011] The lossless adjustment switching module is used to output a bandwidth lossless adjustment enable signal in response to the second current time slot count value of the time slot counter being consistent with the adjustment position prediction value Y, wherein the bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

[0012] Furthermore, the data cache module is specifically used for:

[0013] When writing each data block corresponding to a preset position in the fgODUflex signal into a corresponding storage space, determining that the adjustment indication setting value corresponding to each data block is 0, and the preset position is a 16-byte block from row 3 and columns 1 to 16 of the fgODUflex signal;

[0014] When writing a data block corresponding to a preset position in the fgODUflex signal into a corresponding storage space, obtaining a BWR_IND value of an overhead area in the fgODUflex signal, and if the BWR_IND value is 0 and the CRC check is correct, determining that the adjustment indication setting value corresponding to the data block is 0; if the BWR_IND value is 1 and the CRC check is correct, determining that the adjustment indication setting value corresponding to the data block is 1, wherein the BWR_IND value of 1 indicates an indication of lossless bandwidth adjustment;

[0015] Each data block corresponding to a preset position in the fgODUflex signal is written into a corresponding storage space, and an adjustment indication setting value corresponding to each data block is determined to be 0 until all the fgODUflex signals are written into the storage space.

[0016] Furthermore, the device also includes a frame structure counter and a multi-frame counter, wherein:

[0017] Whenever a clock signal arrives, the frame structure counter is triggered to count bytes with a counting step of 16 bytes to obtain a count value of the frame structure. In response to the count value of the frame structure reaching 956, the frame structure counter is reset, and when the frame structure counter repeatedly counts 32 count values ​​of 1 to 956, the count value of the multi-frame counter is increased by one, and the frame structure counter is reset, and so on, until the count value of the multi-frame counter reaches a first maximum value, the frame structure counter and the multi-frame counter are reset, wherein each count value of the frame structure counter in any counting cycle indicates a current position in the ODUK frame structure, the count value of the multi-frame counter indicates the number of the ODUK multi-frame, and the first maximum value is determined according to the rate level k of the ODUK frame.

[0018] Furthermore,

[0019] A time slot search module, used to determine the current fgTS value in the corresponding ODUK frame based on the current count value of the frame structure counter, and to find the corresponding current fgODUflex channel number, start indication, end indication and valid indication in the first time slot configuration table with the current fgTS value, and determine at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure, wherein the first time slot configuration table stores the fgODUflex channel number, start indication, end indication and valid indication corresponding to each fgTS, the start indication indicates whether the target fgTS is the first target fgTS among 1 to 119 fgTSs, the end indication indicates whether the target fgTS is the last target fgTS among 1 to 119 fgTSs, and the valid indication indicates whether the target fgTS is valid;

[0020] The time slot counter is used for counting up by one each time the slot search module finds the target fgTS, thereby generating a corresponding time slot count value, until the time slot count value reaches the second maximum value, and the time slot counter is cleared, wherein the second maximum value is determined according to the value of the parameter Pserver0 mapped by fgGMP, and the value of the parameter Pserver0 represents the total number of fgTS for fgGMP mapping within an ODUk multiframe period.

[0021] Further, the device also includes a fgGMP mapping module, and the fgGMP mapping module includes:

[0022] A configuration storage unit is used to store a first fgGMP mapping configuration table, wherein the first fgGMP mapping configuration table includes a correspondence between the current fgODUflex channel number and the first fgGMP mapping parameter, wherein the first fgGMP mapping parameter includes a parameter C m0 B. Parameter C m0 , min Parameter C m0 , max and parameter Pserver0, where parameter C m0 , min and parameter C m0 , max Determined according to the fgGMP algorithm and parameter Pserver0;

[0023] The first memory is used to store the parameter C of the current multiframe period corresponding to the current fgODUflex channel number m0 ;

[0024] fgGMP algorithm unit for the C m0 Using the fgGMP mapping algorithm and parameter Pserver0, obtain each valid data area in the fgODTU.M frame structure, determine the data area enable signal of each valid data area, and read each data block and adjustment indication setting value corresponding to the current fgODUflex channel number from the data cache module based on each data area enable signal;

[0025] The parameter updating unit is used to update the rate at which the fgODUflex signal is written into the data cache module and the rate at which the signal is read from the data cache module in the current multiframe period, from the parameter C m0 , min and parameter C m0 , max Select a value in the range between 1 and 2, and use this value as the parameter C of the next multiframe period. m1 ;

[0026] The second memory is used to store the parameter C of the next multiframe period corresponding to the current fgODUflex channel number m1 .

[0027] Furthermore, the adjustment position prediction module includes a multiplication unit, a division unit, a comparison unit, a first prediction unit and a second prediction unit:

[0028] The multiplication unit is used to use the multiplication core to convert the parameter C of the current multiframe period m0 Multiply it with the X value to get the A value;

[0029] A division unit, used to calculate the A value and the parameter Pserver0 using a division core and round them to obtain the B value;

[0030] Comparison unit, used to compare the sum of B+118 with the parameter C of the current multiframe period m0 Compare, if the former is less than or equal to the latter, execute the function of the first prediction unit, otherwise execute the function of the second prediction unit;

[0031] The first prediction unit is used to call the multiplication core to calculate the product of B+118 and the parameter Pserver0 to obtain the C1 value, and call the division core to calculate the C1 value and the parameter C of the current multi-frame period. m0 Obtaining a first adjustment position prediction value Y1;

[0032] The second prediction unit is used to call the multiplication kernel to calculate B+118-C m0 The product of the C2 value and the parameter Pserver0 is used to obtain the C2 value, and the division core is called to calculate the C2 value and the parameter C of the next multiframe period. m1 The second adjustment position prediction value Y2 is obtained.

[0033] Furthermore,

[0034] A multiframe counter is used to mark the multiframe number of the first ODUK multiframe as 0, mark the multiframe number of the second ODUK multiframe as 1, mark the multiframe number of the third ODUK multiframe as 0, mark the multiframe number of the fourth ODUK multiframe as 1, and so on, to obtain the multiframe number of each ODUK multiframe;

[0035] The fgGMP algorithm unit is used to alternately read the corresponding parameters from the first memory and the second memory according to the multiframe number of the ODUK multiframe, and the multiframe number 0 corresponds to the parameter C m0 , the corresponding parameter for multiframe number 1 is C m1 .

[0036] Furthermore, the device includes a fgODUflex signal generation module, wherein:

[0037] The fgODUflex signal generating module is used to generate an adjusted fgODUflex signal according to the adjusted fgTS corresponding to the current fgODUflex channel number in response to the bandwidth lossless adjustment enabling signal;

[0038] A data cache module, used to write the adjusted fgODUflex signal of the current fgODUflex channel number received into a corresponding storage space in sequence;

[0039] The configuration storage unit is configured to generate and store a second fgGMP mapping configuration table based on the adjusted fgTS corresponding to the current fgODUflex channel number, wherein the second fgGMP mapping configuration table includes a correspondence between the current fgODUflex channel number and the second fgGMP mapping parameter, and the second fgGMP mapping parameter includes a parameter C m1 B. Parameter C m1 , min Parameter C m1 , max and parameter Pserver1, where parameter C m1 , min and parameter C m1 , max Determined according to the fgGMP algorithm and the parameter Pserver1, the parameter Pserver1 is determined according to the total number of fgTS after adjustment;

[0040] The parameter updating unit is used to respond to the bandwidth lossless adjustment enable signal and use the intermediate parameter C when performing the fgGMP mapping algorithm in the first multiframe period and the second multiframe period. m T and parameter Pserver1, and in the second multiframe period, according to the adjusted rate of writing the fgODUflex signal to the data cache module and the rate of reading from the data cache module, from parameter C m1 , min and parameter C m1 , max Select a value in the range between and , and use the value as a parameter of the third multiframe period;

[0041] The fgGMP algorithm unit is used to use the fgGMP mapping algorithm based on the fgGMP parameters of the current multi-frame period to obtain each valid data area in the fgODTU.M frame structure, determine the data area enable signal of each valid data area, read the adjusted fgODUflex signal from the data cache module based on each data area enable signal, and map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

[0042] In a second aspect, the present application provides a bandwidth lossless adjustment method for a fine-grained optical transport network based on FPGA, the method comprising:

[0043] The received fgODUflex signal of the current fgODUflex channel number is sequentially written into the corresponding storage space, and a 16-byte data block and a corresponding adjustment indication setting value are stored in each storage space, where the adjustment indication setting value is 0 or 1;

[0044] storing a first time slot configuration table, the first time slot configuration table storing the fgODUflex channel number corresponding to each fgTS, and generating a second time slot configuration table in response to a bandwidth lossless adjustment instruction, the second time slot configuration table storing the fgODUflex channel number corresponding to each fgTS after adjustment;

[0045] Determine at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure according to the first time slot configuration table, and when the first target fgTS is determined in the ODUk frame structure, trigger the time slot counter to perform counting, and generate a corresponding time slot count value in response to each target fgTS, wherein the time slot count value is used to indicate the number of the target fgTS in the ODUk frame structure;

[0046] In response to the adjustment indication setting value being 1, obtaining a first current timeslot count value of the timeslot counter, taking the first current timeslot count value as the X value, where the X value represents the mapping of the 16-byte block of the 3rd row and the 1st to the 16th column of the fgODUflex signal to the corresponding timeslot value in the ODUk frame structure;

[0047] According to the bandwidth lossless adjustment algorithm of the fine-grained optical transport network and the X value, the adjustment position prediction value Y is determined, where the adjustment position prediction value Y is the 16-byte block from the 1905th to the 1920th column of the 3rd row of the fgODUflex signal mapped to the corresponding time slot value in the ODUk frame structure;

[0048] In response to the second current time slot count value of the time slot counter being consistent with the adjustment position prediction value Y, a bandwidth lossless adjustment enable signal is output, and the bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

[0049] In a third aspect, the present application provides a communication device, including the bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA as described above.

[0050] The present application can realize the function of lossless adjustment of bandwidth of fine-grained optical transport network and the switching function during rapid response lossless adjustment. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 A first system block diagram of a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA provided in an embodiment of the present application;

[0052] Figure 2 A schematic diagram of the fgODUflex rate switching position provided in an embodiment of the present application;

[0053] Figure 3 A second system block diagram of the bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA provided in an embodiment of the present application;

[0054] Figure 4 A third system block diagram of the bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA provided in an embodiment of the present application;

[0055] Figure 5 A system block diagram of a fgGMP mapping module is provided for an embodiment of the present application;

[0056] Figure 6 A system block diagram of an adjustment position prediction module provided in an embodiment of the present application;

[0057] Figure 7 A fourth system block diagram of a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA provided in an embodiment of the present application;

[0058] Figure 8 A schematic diagram of a flow chart of a bandwidth lossless adjustment method for a fine-grained optical transport network based on FPGA provided in an embodiment of the present application;

[0059] Fig. 9 A system block diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0060] The present application will be described in detail below in conjunction with the specific implementation modes shown in the accompanying drawings, but these implementation modes do not limit the present application. Structural, methodological, or functional changes made by ordinary technicians in the field based on these implementation modes are included in the protection scope of the present application.

[0061] The lossless bandwidth adjustment in the fine-grained optical transport network is to flexibly configure the capacity of the container according to the actual size of the service and ensure that the service is not damaged during the bandwidth adjustment process. UnitFlex, fine-grained flexible optical data unit) is used as an example. If the current service is 10M and the capacity of the fgODUflex container is 10.409203M, the current service can be placed in the fgODUflex container. Assuming that the subsequent service is increased to 20M, the capacity of the fgODUflex container needs to be increased to 2*10.409203M. In the process of increasing the bandwidth of the fgODUflex container, the service remains at 10M and unchanged. Only after the container bandwidth is increased will the service change. In the process of increasing the bandwidth of the fgODUflex container, it is ensured that the service is not damaged. This lossless adjustment is the process of increasing the bandwidth of the container. The current capacity of the fgODUflex container is 10.409203M*2, and the current service is only 10M. The fgODUflex container can place the service. Assuming that the capacity of the fgODUflex container is to be changed to 10.409203M, the service is still 10M in the process of decreasing the bandwidth. In the process of decreasing the bandwidth of the container, it is ensured that the service is not damaged. This lossless adjustment is the process of decreasing the bandwidth of the container. The fgODUflex signal is mapped to the corresponding fgTS (fine-grained time slot) in the ODUk (Optical Data Unit-k) container, so during lossless adjustment, the rate of the ODUk container increases or decreases accordingly. The present application provides a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA, which can realize the function of bandwidth lossless adjustment in a fine-grained optical transport network.

[0062] like Figure 1As shown, a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA is provided in an embodiment of the present application, and the device includes a data cache module 11, a time slot search module 12, a lossless adjustment switching module 13, and an adjustment position prediction module 14. The data cache module 11 writes the received fgODUflex signal of the current fgODUflex channel number into the corresponding storage space in sequence, and stores a 16-byte data block and a corresponding adjustment indication setting value in each storage space, wherein the adjustment indication setting value is 0 or 1. The time slot search module 12 stores a first time slot configuration table, which stores the fgODUflex channel number corresponding to each fgTS, and generates a second time slot configuration table in response to a bandwidth lossless adjustment instruction, and the second time slot configuration table stores the fgODUflex channel number corresponding to each fgTS after adjustment. The lossless adjustment switching module 13 includes a time slot counter 131. The time slot counter 131 determines at least one target fgTS to be mapped in the ODUk frame structure according to the first time slot configuration table. When the first target fgTS is determined in the ODUk frame structure, the time slot counter 131 is triggered to perform counting, and a corresponding time slot count value is generated in response to each target fgTS, wherein the time slot count value is used to indicate the number of target fgTS in the ODUk frame structure. When the data buffer module 11 responds to the adjustment indication setting value of 1, the first current time slot count value of the time slot counter 131 is obtained, and the first current time slot count value is taken as the value X, and the value X indicates that the 16-byte block of the 3rd row and the 1st to the 16th column of the fgODUflex signal is mapped to the corresponding time slot value in the ODUk frame structure. The adjustment position prediction module 14 determines the adjustment position prediction value Y according to the bandwidth lossless adjustment algorithm of the fine-grained optical transport network and the X value. The adjustment position prediction value Y is the 16-byte block of the 3rd row, 1905 to 1920 columns of the fgODUflex signal mapped to the corresponding time slot value in the ODUk frame structure. The lossless adjustment switching module 13 outputs a bandwidth lossless adjustment enable signal in response to the second current time slot count value of the time slot counter 131 being consistent with the Y value. The bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.In this implementation manner, during lossless bandwidth adjustment, when the data cache module 11 reads that the adjustment indication setting value is 1, the value 1 indicates an indication of bandwidth adjustment, and the corresponding current time slot value is determined by the time slot count 131, so that the X value can be determined, and the adjustment position prediction value Y is further determined based on the X value and the lossless bandwidth adjustment algorithm, that is, the time slot value corresponding to the fgODUflex signal in the ODUk frame structure is determined, and the adjustment position is adjusted from after the time slot, so that the rate adjustment of the fgODUflex signal and the ODUk frame signal can be achieved, and the lossless bandwidth adjustment function of the optical transport network can be achieved.

[0063] The fgODUflex frame structure consists of 4 rows of block structures, each containing 3824 bytes. The ODUK frame consists of 4 rows of block structures, each containing 3824 bytes, where k = 0, 1, 2, or flex. In the protocol, ODU0 is divided into 119 10M fine-grained time slots fgTS, which are used to place fgODUflex signals, that is, fgODUflex signals are mapped to corresponding fgTS, for example, one fgTS places one fgODUflex signal. ODU1 is divided into 2*119 10M fine-grained time slots fgTS, ODU2 is divided into 8*119 10M fine-grained time slots fgTS, and ODU flex is divided into N*119 10M fine-grained time slots fgTS, where N is 3~7. The ODU0 multiframe consists of 32 ODU0 frames. The ODU1 multiframe consists of 2*32 ODU1 frames. The ODU2 multiframe consists of 8*32 ODU2 frames. The ODU flex multiframe consists of N*32 ODUflex frames. The rate of the fgODUflex signal is 10.409203M. The structure of fgODTU.M is based on the multiframe of ODUK. For example, ODU0 is a group of 32 frames, and ODU0 is a group of 64 frames. When mapping the fgODUflex signal to the ODUK container, the fgODUflex signal is mapped to the fgODTU.M payload area in units of 16-byte blocks. The fgODTU.M payload area includes 256*M 16-byte payload blocks, where M represents M fgTS.

[0064] The time slot search module 12 stores the first time slot configuration table, which stores the fgODUflex channel number corresponding to each fgTS. The first time slot configuration table is pre-configured and configured according to user needs and actual needs. Each fgTS in ODUK can be used to carry multi-channel fgODUflex signals, so it is necessary to configure the fgODUflex channel number corresponding to each fgTS. Exemplarily, the first time slot configuration table stores the fgODUflex channel number, start indication, end indication and valid indication corresponding to each fgTS. The start indication indicates whether the fgTS is the first target fgTS among 1 to 119 fgTSs, and the start indication is 1, indicating that the fgTS is the first target fgTS among 1 to 119 fgTSs. The end indication indicates whether the fgTS is the last target fgTS among 1 to 119 fgTSs, and the end indication is 1, indicating that the fgTS is the last target fgTS among 1 to 119 fgTSs. The valid indication indicates whether the fgTS is valid, and the value of 1 indicates valid. For example, the bandwidth of fgODUflex with channel number 2 is 10.409203M*5, occupying 5 fgTSs, and the configured target fgTSs are fgTS2, fgTS3, fgTS5, fgTS7, and fgTS9. Then, the configuration in the first time slot configuration table is:

[0065] fgTS2: fgODUflex channel number = 2, start indication = 1, end indication = 0, valid indication = 1;

[0066] fgTS3: fgODUflex channel number = 2, start indication = 0, end indication = 0, valid indication = 1;

[0067] fgTS5: fgODUflex channel number = 2, start indication = 0, end indication = 0, valid indication = 1;

[0068] fgTS7: fgODUflex channel number = 2, start indication = 0, end indication = 0, valid indication = 1;

[0069] fgTS9: fgODUflex channel number = 2, start indication = 0, end indication = 1, valid indication = 1.

[0070] In this example, all fgTS2, fgTS3, fgTS5, fgTS7, and fgTS9 in ODUk are used to carry fgODUflex signals with a channel number of 2, and their bandwidth is 10.409203M*5.

[0071] The time slot search module 12 generates a second time slot configuration table in response to the bandwidth lossless adjustment instruction, and the second time slot configuration table stores the fgODUflex channel numbers corresponding to each adjusted fgTS. The source node receives a bandwidth lossless adjustment instruction or receives a bandwidth lossless adjustment instruction sent by an upstream node, which is used to instruct the fgTS of the container to be adjusted. The adjustment can be to add fgTS or to delete fgTS. Therefore, based on the instruction, the fgTS to be added is determined, or the fgTS to be deleted is determined. Therefore, based on the fgTS to be added or the fgTS to be deleted, the adjusted second time slot configuration table is generated, and the second time slot configuration table stores the fgODUflex channel numbers corresponding to each adjusted fgTS. Similarly, the second time slot configuration table stores the fgODUflex channel number, start indication, end indication and valid indication corresponding to each fgTS after adjustment. The implementation method is similar to the above and will not be repeated here.

[0072] like Figure 2The fgODUflex rate switching position shown in the figure, according to the lossless bandwidth adjustment protocol of the fine-grained optical transport network, the fgODUflex signal has a rate change requirement. The green block is a 16-byte block located in the 1st row, 1st column, to the 16th column of the fgODUflex signal, which carries the last 8 bits of the fgBWR RCOH overhead. The blue block is a 16-byte block located in the 3rd row, 1889th column, to the 1904th column of the fgODUflex signal, which represents the last 16-byte block before the fgBWR takes effect. The yellow block is a 16-byte block located in the 3rd row, 1905th column, to the 1920th column of the fgODUflex signal, which represents the byte block after the fgBWR takes effect. The BWR_IND value in the fgBWR RCOH overhead byte indicates whether the rate jump is performed. When the BWR_IND value is 1, it indicates the rate jump of the fgODUflex signal. When the BWR_IND value is 1, the one-step rate jump of the fgODUflex will be completed immediately after the last bit of the blue block and before the first bit of the yellow block. For example, if the rate of the fgODUflex container is to be changed from 10.409203M*2 to 10.409203M*4, the rate of the fgODUflex container after the yellow block becomes 10.409203M*4. It can be seen from the above that the change in the rate of the fgODUflex container is actually the change in fgTS, so the rate of ODUK must also be adjusted to adapt to the rate of fgODUflex, that is, the fgTS mapped to ODUK by the fgODUflex signal is also adjusted. Taking the above embodiment as an example, the fgTS of ODUK is changed from 2 to 4. When it is detected that the BWR_IND value in the 16-byte block of the green block is 1, the rate needs to be adjusted after the 16-byte block of the blue block, so it is necessary to determine the time slot position of the 16-byte block of the green block in ODUK, and then determine the time slot position of the 16-byte block of the blue block in ODUK.

[0073] In some embodiments, the data cache module 11 writes the fgODUflex signal into the corresponding storage spaces in sequence with a data bit width of 16 bytes, writes the received fgODUflex signal of the current fgODUflex channel number into the corresponding storage spaces in sequence, and when writing the corresponding data blocks before the preset position in the fgODUflex signal into the corresponding storage spaces, it is determined that the adjustment indication setting value corresponding to each data block is 0, and the preset position is a 16-byte block located at the 1st row, 1st column to the 16th column of the fgODUflex signal, that is, the above-mentioned green block. When writing the data block corresponding to the preset position in the fgODUflex signal into the corresponding storage space, the BWR_IND indication value of the overhead area in the fgODUflex signal is obtained, if the BWR_IND indication value is 0, and after the CRC check is correct, it is determined that the adjustment indication setting value corresponding to the data block is 0, if the BWR_IND indication value is 1, and after the CRC check is correct, it is determined that the adjustment indication setting value corresponding to the data block is 1, wherein the BWR_IND value of 1 indicates an indication of lossless bandwidth adjustment. When the data cache module 11 obtains BWR_IND as 1, it indicates the indication of lossless bandwidth adjustment, that is, the corresponding cached 16-byte block is the green block mentioned above, and subsequent bandwidth adjustment processing is required. Write each data block corresponding to the preset position in the fgODUflex signal into the corresponding storage space, and determine that the adjustment indication setting value corresponding to each data block is 0 until the fgODUflex signal is completely written into the storage space.

[0074] In some embodiments, Figure 3As shown, the device further includes a frame structure counter 15 and a multi-frame counter 16. Whenever a clock signal arrives, the frame structure counter 15 is triggered to count bytes with a counting step of 16 bytes to obtain a count value of the frame structure. In response to the count value of the frame structure reaching 956, the frame structure counter 15 is reset, and the frame structure counter 15 re-executes counting. When the frame structure counter 15 repeatedly counts 32 count values ​​of 1 to 956, the count value of the multi-frame counter 16 is increased by one, the frame structure counter 15 is reset, and the counting is restarted, and so on, until the count value of the multi-frame counter 16 reaches a first maximum value, the frame structure counter 15 and the multi-frame counter 16 are reset, wherein each count value of the frame structure counter 15 indicates the current position in the ODUK frame structure, the count value of the multi-frame counter 16 indicates the number of the ODUK multi-frame, and the first maximum value is determined according to the rate level k of the ODUK frame. Taking ODU0 as an example, it can be known from the ODU0K frame structure that the ODU0 frame is composed of 4*3824 bytes, and an ODU0 multiframe is composed of 32 ODU0 frames. The count value of the frame structure counter 15 increases by 16 bytes each time. When the count value is 1, the first 16 bytes correspond to the overhead bytes. When the count value is 2, the second 16 bytes correspond to fgTS#1, and the third byte corresponds to fgTS#2. By analogy, when the count value reaches 956, the frame structure counter 15 is reset and the counting starts again until the count value of the multiframe counter 16 increases by 1 when 32 count values ​​of 1 to 956 are counted. Because the ODU0 multiframe is composed of 32 ODU0 frames, the maximum count value of the multiframe counter 16 is 1. Based on this implementation, the current position in the ODUK frame structure, that is, the number of 16-byte blocks, is determined by each count value of the frame structure counter 15, so that the fgTS value of the ODUK frame structure can be determined according to the count value, and the number of multiframes can be determined by the multiframe counter 16.

[0075] In some embodiments, the time slot search module 12 determines the current fgTS value in the corresponding ODUK frame based on the current count value of the frame structure counter 15. As can be seen from the above, the current fgTS value can be determined based on the current count value. The time slot search module 12 uses the current fgTS value as an index to find the corresponding current fgODUflex channel number, start indication, end indication and valid indication in the first time slot configuration table. Based on the first time slot configuration table, each fgTS corresponding to the current fgODUflex channel number can be obtained, that is, at least one target fgTS to be mapped in the ODUk frame structure by the fgODUflex signal of the current fgODUflex channel number can be determined, wherein the first time slot configuration table stores the fgODUflex channel number, start indication, end indication and valid indication corresponding to each fgTS, the start indication indicates whether the target fgTS is the first target fgTS among 1 to 119 fgTSs, the end indication indicates whether the target fgTS is the last target fgTS among 1 to 119 fgTSs, and the valid indication indicates whether the target fgTS is valid. For example, it can be seen from the above embodiment that the target fgTS to be mapped to the fgODUflex signal with a channel number of 2 in the ODUk frame structure are fgTS2, fgTS3, fgTS5, fgTS7, and fgTS9.

[0076] In some embodiments, when the slot search module 12 finds the target fgTS each time, the slot counter 131 performs a count plus one, thereby generating a corresponding slot count value, until the slot count value reaches a second maximum value, and the slot counter 131 is cleared, wherein the second maximum value is determined according to the parameter Pserver0 value of the fgGMP mapping, and the parameter Pserver0 value represents the total number of fgTSs available for fgGMP mapping within an ODUk multiframe period. The second maximum value is determined according to the parameter Pserver0 value of the fgGFP mapping, and the parameter Pserver value represents the total number of fgTSs available for fgGFP mapping within an ODUk multiframe period. For example, if the fgODUflex signal occupies only one fgTS in ODU0, then the parameter Pserver0 value is 256, and the second maximum value is 256. If the fgODUflex signal occupies 10 fgTSs in ODU0, then the parameter Pserver0 value is 2560, and the second maximum value is 2560.

[0077] Exemplarily, taking ODU0 as an example, assuming that the current fgTS value in the corresponding ODU0 frame is fgTS2 based on the current count value of the frame structure counter 15, and fgTS2 is used as an index. In the first time slot configuration table, fgTS2 is found to correspond to fgODUflex channel No. 2, and then based on the first time slot configuration table, it is determined that the target fgTS corresponding to fgODUflex channel No. 2 is only fgTS2, that is, the second maximum value is 256. When the time slot search module 12 finds fgTS2 in the first time slot configuration table for the first time, the time slot counter 131 counts from 0 to 1. When the time slot search module 12 finds fgTS2 in the first time slot configuration table for the second time, the time slot counter 131 counts from 1 to 2, and so on, until the count reaches 256, and the time slot counter 131 is cleared. For another example, when the current count value of the frame structure counter 15 determines that the current fgTS value in the corresponding ODU0 frame is fgTS5, fgTS5 is used as an index to find that fgTS5 corresponds to the No. 3 fgODUflex channel in the first time slot configuration table, and the target fgTS corresponding to the No. 3 fgODUflex channel is determined based on the second time slot configuration table: fgTS5, fgTS7, fgTS9, when the time slot search module 12 finds fgTS5 in the first time slot configuration table for the first time, the time slot counter 131 counts from 0 to 1, and when the time slot search module 12 finds fgTS7 in the first time slot configuration table for the first time, the time slot counter 131 counts from 0 to 1. The time slot counter 131 counts from 1 to 2. When the time slot search module 12 finds fgTS9 in the first time slot configuration table for the first time, the time slot counter 131 counts from 2 to 3. When the time slot search module 12 finds fgTS5 in the first time slot configuration table for the second time, the time slot counter 131 counts from 3 to 4. When the time slot search module 12 finds fgTS7 in the first time slot configuration table for the second time, the time slot counter 131 counts from 4 to 5. When the time slot search module 12 finds fgTS9 in the first time slot configuration table for the second time, the time slot counter 131 counts from 5 to 6, and so on, until the count value reaches 256*3, the time slot counter 131 is cleared. Based on this implementation, the positions of each target fgTS of the fgODUflex signal mapped to the ODUk can be obtained.

[0078] In response to the adjustment indication setting value being 1, the data cache module 11 obtains the first current time slot count value of the time slot counter 131, and takes the first current time slot count value as the X value, where the X value indicates that the 16-byte block of the 3rd row, 1st to 16th column of the fgODUflex signal is mapped to the corresponding time slot value in the ODUk frame structure. As can be seen from the above, each count value of the time slot counter 131 can determine the corresponding target fgTS position. Therefore, when the adjustment indication setting value is 1, that is, the adjustment indication of the lossless bandwidth is obtained, the 16-byte block of the 3rd row, 1st to 16th column of the fgODUflex signal is mapped to the corresponding time slot value in the ODUk frame structure through the first current time slot count value of the slot counter 131, that is, the time slot value corresponding to the green block in the ODUk frame structure.

[0079] In some embodiments, Figure 4 Shown and Figure 5 As shown, the device also includes a fgGMP mapping module 17, and the fgGMP mapping module 17 includes a configuration storage unit 171, a first memory 172, an fgGMP algorithm unit 173, a parameter updating unit 174 and a second memory 175.

[0080] The configuration storage unit 171 stores a first fgGMP mapping configuration table, wherein the first fgGMP mapping configuration table includes a correspondence between the current fgODUflex channel number and the first fgGMP mapping parameter, wherein the first fgGMP mapping parameter includes a parameter C m0 B. Parameter C m0 , min Parameter C m0 , max and parameter Pserver0, where parameter C m0 , min and parameter C m0 , max Determined by the GMP algorithm and parameter Pserver0. As can be seen from the above, the value of parameter Pserver0 indicates the total number of fgTS that can be mapped to GFP within an ODUk multiframe period. From the formula of the fgGMP algorithm, it can be seen that in an area of ​​the size of Pserver, the Cn operator is used to calculate which positions in the area are used to place data and which positions are not used to place data and are only filled with 0. The value of parameter Pserver0 is this area. For example, if parameter Pserver0 is 256, it means that among the 256 fgTS, it is calculated which positions are used to place data and which positions are not used to place data. Parameter C m0 , min and parameter C m0 , max It can be calculated using the formula of the fgGMP algorithm and will not be described in detail here.

[0081] The first memory 172 stores the parameter C of the current multiframe period corresponding to the current fgODUflex channel number. m0 For example, parameter C m0 It can be determined by the cache waterline of the data cache module 11, that is, based on the rate at which the fgODUflex signal is written into the data cache module 11 and the rate at which the fgODUflex signal is read from the data cache module 11. It can be understood that in the first multiframe period, the parameter C m0 The initial value can be obtained from the parameter C m0 , min and parameter C m0 , max As the parameter of the multiframe period, the parameter is determined based on the rate at which the fgODUflex signal is written into the data cache module 11 and the rate at which the signal is read from the data cache module 11 in the first multiframe period, and the parameter is determined from the parameter C m0 , min and parameter C m0 , max Select a value in the range between 1 and 2 as the parameter C of the next multiframe period. m1 , that is, the parameter C of the current multiframe period m0 It is determined based on the cache waterline of the data cache module 11 in the previous multi-frame period. For example, when the parameter Pserver0 is 256, the parameter C m0 Generally, it varies between 255 and 256. When the parameter Pserver0 is 2560, the parameter C m0 It usually fluctuates between 2559 and 2560.

[0082] The fgGMP algorithm unit 173 is based on the parameter C m0The fgGMP mapping algorithm is used with the parameter Pserver0 to obtain each valid data area in the fgODTU.M frame structure, determine the data area enable signal of each valid data area, and read each data block and adjustment indication setting value corresponding to the current fgODUflex channel number from the data cache module 11 based on each data area enable signal. The fgGMP mapping is a general mapping algorithm that uses the Sigma-Delta algorithm for filling, with a granularity of 16 bytes per block, and increases the fgODUflex signal rate more evenly to the same rate as the fgODTU.M rate in the ODUk. Based on the fgGMP mapping algorithm, the area of ​​the size of Pserver0 is divided into a valid data area and a filling area. The valid data area carries the fgODUflex signal, and the filling area can be filled with 0. Based on the frame structure of ODUk, the time slot or the corresponding byte position of each valid data area can be determined, and then the data area enable signal of each valid data area is generated. When the data area enable signal of any valid data is enabled, the data block corresponding to the valid data area and the corresponding adjustment indication setting value are read from the data cache module 11 to complete the data reading function of the data cache module 11.

[0083] The parameter updating unit 174 updates the parameter C according to the rate at which the fgODUflex signal is written into the data buffer module 11 and the rate at which the fgODUflex signal is read from the data buffer module 11 in the current multiframe period. m0 , min and parameter C m0 , max Select a value in the range between 1 and 2, and use this value as the parameter C of the next multiframe period. m1 The second memory 175 stores the parameter C of the next multiframe period corresponding to the current fgODUflex channel number. m1 The mapping parameters of fgGMP are adjusted according to the amount of remaining cached data in the data cache module 11 to ensure that the cached data in the data cache module 11 will not overflow or be emptied.

[0084] In some embodiments, in order to facilitate subsequent processing, the multiframe number of the first ODUK multiframe is marked as 0, the multiframe number of the second ODUK multiframe is marked as 1, the multiframe number of the third ODUK multiframe is marked as 0, the multiframe number of the fourth ODUK multiframe is marked as 1, and so on, to obtain the multiframe number of each ODUK multiframe, so the multiframe number of each ODUK multiframe is 0 or 1. The fgGMP algorithm unit 173 reads the corresponding parameters from the first memory 172 and the second memory 175 alternately according to the multiframe number of the ODUK multiframe, and the multiframe number 0 corresponds to the parameter C m0 , the corresponding parameter for multiframe number 1 is C m1In this embodiment, the ODUK multiframe number is marked as 0 or 1. When the ODUK multiframe with multiframe number 0 is mapped by the fgGMP algorithm, the parameter C is used. m0 , read from the first memory 172, the ODUK multiframe with multiframe number 1 is mapped using the parameter C when the fgGMP algorithm is used. m1 , read from the second memory 175. For example, the first ODUK multiframe, numbered 0, uses parameter C m0 , the second ODUK multiframe, numbered 1, uses parameter C m1 , the third ODUK multiframe, numbered 0, uses parameter C m0 , the fourth ODUK multiframe, numbered 1, uses parameter C m1 , and so on. This implementation simplifies the parameter update process, facilitates the management of operations, and when ODUK signals of multiple channels are involved, only two parameters need to be managed through two memories, and the parameter value required for the current operation of the channel only needs to be obtained through the current ODUK number of 0 or 1, which simplifies the complex parameter update process.

[0085] The lossless bandwidth adjustment protocol of the fine-grained optical transport network provides a prediction formula for how to obtain the position of the above blue block. The prediction formula is as follows:

[0086] if +118 Formula (1);

[0087] Formula (2);

[0088] otherwise, Formula (3);

[0089] In the above formula, Pserver corresponds to the parameter Pserver of fgGMP mapping, which is determined based on the fgTS used by fgODUflex, and C m(i) It is the parameter C mapped by fgGMP in the current multiframe period, that is, the multiframe where the green block is located. m Value, C m(i+1)It is the parameter Cm value of fgGMP mapping in the next multi-frame period. The above prediction formula includes two cases. Case 1 is that the green block and the blue block are in the same ODUK multi-frame, and case 2 is that the green block and the blue block are not in the same ODUK multi-frame. For case 1, formula (1) is used to calculate the position of the blue block, and for case 2, formula (2) is used to calculate the position of the blue block. In formula (1), the meaning of floor() calculates the number of valid data blocks currently mapped by fgGMP, and the value of floor()+118 is the total number of valid data blocks at the position of the blue block. Celling() is used to round up to get the position of the blue block Y. In formula (2), the meaning of floor() calculates the number of valid data blocks currently mapped by fgGMP, and the value of floor()+118-C m The value of (i) is the total number of valid data blocks at the position of the blue block, because the next multiframe is based on C m (i+1) is used to perform fgGMP calculation, so celling() is rounded up to the position of the blue block in the next ODUK multiframe.

[0090] In this embodiment, the position of the blue block is predicted by using the multiplication core and division core inside the FPGA and the prediction formula of the position of the blue block. Figure 6 As shown, the adjustment position prediction module 14 includes a multiplication unit 141, a division unit 142, a comparison unit 143, a first prediction unit 144 and a second prediction unit 145. The multiplication unit 141 uses a multiplication kernel to convert the parameter C of the current multi-frame period into m0 The value A is obtained by multiplying the value X. The division unit 142 uses the division core to calculate the value A and the parameter Pserver0 and rounds to obtain the value B. The comparison unit 143 compares the sum of B+118 with the parameter C of the current multiframe period. m0 Compare, if the former is less than or equal to the latter, that is, corresponding to the above situation 1, execute the function of the first prediction unit 154, otherwise execute the function of the second prediction unit 145, that is, corresponding to the above situation 2. The first prediction unit 144 calls the multiplication core to calculate the product of B+118 and the parameter Pserver0 to obtain the C1 value, and calls the division core to calculate the C1 value and the parameter C of the current multi-frame period. m0 The first adjusted position prediction value Y1 is obtained, that is, the position of Y in case 1 is obtained. The second prediction unit 145 calls the multiplication kernel to calculate B+118-C m0 The product of the C2 value and the parameter Pserver0 is calculated, and the division core is called to calculate the C2 value and the parameter C of the next multiframe period. m1 The second adjusted position prediction value Y2 is obtained, that is, the position of Y in the second situation is obtained.

[0091] The lossless adjustment switching module 13 obtains the Y value output by the adjustment position prediction module 14, and obtains the second current time slot count value output by the time slot counter 131. When the second current time slot count value is consistent with the Y value, the bandwidth lossless adjustment enable signal is output. The bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure. Through the enable signal, the switching to the second time slot configuration table is triggered. The second time slot configuration table stores the fgODUflex channel number corresponding to each adjusted fgTS. Based on the adjusted fgTS corresponding to the current fgODUflex channel number, according to the adjusted fgTS, in the subsequent fgGMP mapping algorithm and parameter C m When calculating, corresponding adjustments will be made. At the same time, the rate of the fgODUflex signal is adjusted accordingly, and the rate of the ODUk frame is also adjusted accordingly, completing a one-step jump in the rate of the fgODUflex signal and the ODUk frame, thereby realizing the function of lossless bandwidth adjustment.

[0092] In some embodiments, Figure 7 As shown, the device also includes a fgODUflex signal generating module 18. The fgODUflex signal generating module 18 responds to the bandwidth lossless adjustment enable signal, and generates an adjusted fgODUflex signal according to the adjusted fgTS corresponding to the current fgODUflex channel number, wherein the adjusted fgTS is to add fgTS or delete fgTS, thereby achieving rate adjustment of the fgODUflex signal. In this example, for how to generate the fgODUflex signal, reference may be made to the implementation method of the fine-grained flexible optical data unit signal generating device and method based on FPGA with patent application number 2024113884714, which will not be repeated here.

[0093] The data cache module 11 writes the received adjusted fgODUflex signal of the current fgODUflex channel number into the corresponding storage space in sequence. The configuration storage unit 171 generates and stores a second fgGMP mapping configuration table based on the adjusted fgTS corresponding to the current fgODUflex channel number. The second fgGMP mapping configuration table is a mapping table after lossless bandwidth adjustment. The second fgGMP mapping configuration table includes a correspondence between the current fgODUflex channel number and the second fgGMP mapping parameter. The second fgGMP mapping parameter includes a parameter C m1 B. Parameter C m1 , min Parameter C m1 , maxand parameter Pserver1, where parameter C m1 , min and parameter C m1 , max The parameter updating unit 174 responds to the bandwidth lossless adjustment enable signal and uses the intermediate parameter C when performing the GMP mapping algorithm in the first multiframe period and the second multiframe period. m T and parameter Pserver2, and in the second multiframe period, according to the adjusted rate of writing the fgODUflex signal into the data cache module 11 and the rate of reading from the data cache module 11, from parameter C m1 , min and parameter C m1 , max According to the lossless bandwidth adjustment protocol of the fine-grained optical transport network, during the lossless bandwidth adjustment, in the first multiframe cycle and the second multiframe cycle, the intermediate parameter C is used when performing the fgGMP mapping algorithm. m T, C m T can be C m，nom In the second multiframe period, according to the adjusted rate of writing the fgODUflex signal into the data cache module 11 and the rate of reading the fgODUflex signal from the data cache module 11, the parameter C m1 , min and parameter C m1 , max A value is selected in the range between, and the value is used as the parameter of the third multi-frame period. The parameter adjustment of each subsequent multi-frame period is similar to the above embodiment and will not be repeated here. The fgGMP algorithm unit 173 uses the fgGMP mapping algorithm based on the parameters of the current period and the parameter Pserver2 to obtain each valid data area in the fgODTU.M frame structure, determine the data area enable signal of each valid data area, and read the adjusted fgODUflex signal in the data cache module 11 based on each data area enable signal, and map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure, thereby realizing the rate adjustment of the ODUk signal. As above, in the first multi-frame period and the second multi-frame period, the fgGMP algorithm unit 173 uses the intermediate parameter C mT and parameter Pserver2 are used to calculate the valid data area. In the third multi-frame period, the fgGMP algorithm unit 173 uses the parameters determined in the current multi-frame period (i.e., the parameters of the third multi-frame period determined above) and parameter Pserver2 to calculate the valid data area. In each subsequent multi-frame period, the determination of the valid data area is similar to the above embodiment, which will not be repeated here. Similarly, the first memory 172 stores the parameters in the current multi-frame period, and the second memory 175 stores the parameters in the next multi-frame period. The implementation method is the same as the above embodiment, which will not be repeated here.

[0094] Based on the same inventive concept, an embodiment of the present application also provides a bandwidth lossless adjustment method for a fine-grained optical transport network based on FPGA. The implementation solution for solving the problem provided by the method is similar to the implementation solution recorded in the above-mentioned device. Therefore, the specific limitations in one or more embodiments of the bandwidth lossless adjustment method for a fine-grained optical transport network based on FPGA provided below can be referred to the limitations of the bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA above, and will not be repeated here.

[0095] Please refer to Figure 8 The present application provides a bandwidth lossless adjustment method for a fine-grained optical transport network based on FPGA, the method comprising the steps of:

[0096] S801, writing the received fgODUflex signal of the current fgODUflex channel number into the corresponding storage space in sequence, storing a 16-byte data block and a corresponding adjustment indication setting value in each storage space, wherein the adjustment indication setting value is 0 or 1;

[0097] S802, storing a first time slot configuration table, the first time slot configuration table storing the fgODUflex channel number corresponding to each fgTS, and generating a second time slot configuration table in response to a bandwidth lossless adjustment instruction, the second time slot configuration table storing the adjusted fgODUflex channel number corresponding to each fgTS;

[0098] S803, determining at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure according to the first time slot configuration table, and when the first target fgTS is determined in the ODUk frame structure, triggering the time slot counter to perform counting, and generating a corresponding time slot count value in response to each target fgTS, wherein the time slot count value is used to indicate the number of the target fgTS in the ODUk frame structure;

[0099] S804. In response to the adjustment indication setting value being 1, obtain a first current timeslot count value of the timeslot counter, and use the first current timeslot count value as the X value, where the X value indicates that the 16-byte block of the third row and the first to the 16th column of the fgODUflex signal is mapped to a corresponding timeslot value in the ODUk frame structure;

[0100] S805. Determine an adjustment position prediction value Y according to the bandwidth lossless adjustment algorithm of the fine-grained optical transport network and the X value, where the adjustment position prediction value Y is a 16-byte block from row 3, columns 1905 to 1920 of the fgODUflex signal mapped to a corresponding time slot value in the ODUk frame structure;

[0101] S806. In response to the second current time slot count value of the time slot counter being consistent with the adjustment position prediction value Y, a bandwidth lossless adjustment enable signal is output, where the bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

[0102] In this embodiment, when the adjustment indication setting value is read as 1, the value 1 indicates an indication of lossless bandwidth adjustment, and the corresponding current time slot value is determined by time slot counting, so that the X value can be determined, and the adjustment position prediction value Y is determined based on the X value and the bandwidth lossless adjustment algorithm, that is, the time slot value corresponding to the fgODUflex signal in the ODUk frame structure is determined, and the adjustment position is adjusted from after the time slot, thereby realizing the lossless bandwidth adjustment function of the optical transport network.

[0103] As an example, see Fig. 9, which shows a schematic diagram of the structure of a communication device provided by an embodiment of the present application. The network device includes a bandwidth lossless adjustment generation device 901 based on FPGA, a communication interface 902, a processor 903, a memory 904 and a bus 905. The processor 903, the memory 904, the communication interface 902 and the bandwidth lossless adjustment device 901 of the fine-grained optical transport network based on FPGA are connected to each other through the bus 905. The memory 904 can be used to store computer programs, and the computer program can include instructions and data. In the embodiment of the present application, the memory 904 can be various types of storage media, such as random access memory, static random access memory, non-volatile RAM, DDR, etc. The memory 904 can include a hard disk and / or a memory. The processor 903 can be a general-purpose processor, which can be a processor that performs specific steps and / or operations by reading and executing a computer program stored in a memory (such as memory 904), and the general-purpose processor is used to process the data output by the bandwidth lossless adjustment device 901 of the fine-grained optical transport network based on FPGA. The general-purpose processor can be, for example, but not limited to, a central processing unit. In addition, the processor 903 may also be a dedicated processor. A dedicated processor may be a processor specially designed to perform specific steps and / or operations. A dedicated processor may be, for example but not limited to, an ASIC and an FPGA. In addition, the processor 903 may also be a combination of multiple processors, such as a multi-core processor. The communication interface 902 may include an input / output interface, a physical interface, a logical interface, and other interfaces for interconnecting devices within a network device, as well as an interface for interconnecting a network device with other devices (such as a network device). The physical interface may be a Gigabit Ethernet interface, which may be used to interconnect a network device with other devices, and the logical interface is an interface within a network device, which may be used to interconnect devices within a network device. The bus 905 may be any type of communication bus, such as a system bus, for interconnecting the processor 903, the memory 904, the communication interface 902, and the bandwidth lossless adjustment device 901 for a fine-grained optical transmission network based on FPGA. The structure of the bandwidth lossless adjustment device 901 for a fine-grained optical transmission network based on FPGA can refer to Figure 1 The interconnection of any one of the processor 903, the memory 904 and the communication interface 902 with the bandwidth lossless adjustment device 901 for a fine-grained optical transport network based on FPGA may specifically refer to the interconnection of any one of the devices with the device in the bandwidth lossless adjustment device 901 for a fine-grained optical transport network based on FPGA.

[0104] The embodiments disclosed in the present application also provide a computer-readable storage medium, which stores instructions. When the computer-readable storage medium is executed on a computer, the computer executes the bandwidth lossless adjustment method of the fine-grained optical transport network based on FPGA as described in any of the above embodiments.

[0105] Although the preferred embodiments of the present application have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the application as disclosed in the accompanying claims.

Claims

1. A bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA, characterized in that: The device comprises: A data cache module, used to write the received fgODUflex signal of the current fgODUflex channel number into the corresponding storage space in sequence, and store a 16-byte data block and a corresponding adjustment indication setting value in each storage space, wherein the adjustment indication setting value is 0 or 1; A time slot search module, configured to store a first time slot configuration table, the first time slot configuration table storing the fgODUflex channel number corresponding to each fgTS, and generate a second time slot configuration table in response to a bandwidth lossless adjustment instruction, the second time slot configuration table storing the adjusted fgODUflex channel number corresponding to each fgTS; The lossless adjustment switching module includes a time slot counter, which is used to determine at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure according to the first time slot configuration table, and when the first target fgTS is determined in the ODUk frame structure, trigger the time slot counter to perform counting, and generate a corresponding time slot count value in response to each target fgTS, wherein the time slot count value is used to indicate the number of the target fgTS in the ODUk frame structure; The data cache module is further configured to, in response to the adjustment indication setting value being 1, obtain a first current timeslot count value of the timeslot counter, and use the first current timeslot count value as an X value, wherein the X value indicates that a 16-byte block of the third row and the first to the 16th columns of the fgODUflex signal is mapped to a corresponding timeslot value in the ODUk frame structure; An adjustment position prediction module, configured to determine an adjustment position prediction value Y according to a bandwidth lossless adjustment algorithm of a fine-grained optical transport network and the X value, wherein the adjustment position prediction value Y is a time slot value corresponding to a 16-byte block of row 3, columns 1905 to 1920 of the fgODUflex signal mapped to the ODUk frame structure; The lossless adjustment switching module is configured to output a bandwidth lossless adjustment enable signal in response to a second current time slot count value of the time slot counter being consistent with the adjustment position prediction value Y, wherein the bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

2. The device according to claim 1, characterized in that The data cache module is specifically used for: When writing each data block corresponding to a preset position in the fgODUflex signal into a corresponding storage space, determining that the adjustment indication setting value corresponding to each data block is 0, wherein the preset position is a 16-byte block from row 3 and columns 1 to 16 of the fgODUflex signal; When writing the data block corresponding to the preset position in the fgODUflex signal into the corresponding storage space, obtaining the BWR_IND value of the overhead area in the fgODUflex signal, and if the BWR_IND value is 0 and the CRC check is correct, determining that the adjustment indication setting value corresponding to the data block is 0; if the BWR_IND value is 1 and the CRC check is correct, determining that the adjustment indication setting value corresponding to the data block is 1, wherein the BWR_IND value of 1 indicates an indication of lossless bandwidth adjustment; Each data block corresponding to a preset position in the fgODUflex signal is written into a corresponding storage space, and an adjustment indication setting value corresponding to each data block is determined to be 0 until all the fgODUflex signals are written into the storage space.

3. The device according to claim 1, characterized in that The device also includes a frame structure counter and a multi-frame counter, wherein: Whenever a clock signal arrives, the frame structure counter is triggered to count bytes with a counting step of 16 bytes to obtain a count value of the frame structure. In response to the count value of the frame structure reaching 956, the frame structure counter is reset, and when the frame structure counter repeatedly counts 32 count values ​​of 1 to 956, the count value of the multi-frame counter is increased by one, and the frame structure counter is reset, and so on, until the count value of the multi-frame counter reaches a first maximum value, the frame structure counter and the multi-frame counter are reset, wherein each count value of the frame structure counter in any counting cycle indicates a current position in the ODUK frame structure, the count value of the multi-frame counter indicates the number of the ODUK multi-frame, and the first maximum value is determined according to the rate level k of the ODUK frame.

4. The device according to claim 3, characterized in that The time slot search module is used to determine the current fgTS value in the corresponding ODUK frame based on the current count value of the frame structure counter, and use the current fgTS value to find the corresponding current fgODUflex channel number, start indication, end indication and valid indication in the first time slot configuration table, and determine at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure, wherein the first time slot configuration table stores the fgODUflex channel number, start indication, end indication and valid indication corresponding to each fgTS, the start indication indicates whether the target fgTS is the first target fgTS among 1 to 119 fgTSs, the end indication indicates whether the target fgTS is the last target fgTS among 1 to 119 fgTSs, and the valid indication indicates whether the target fgTS is valid; The time slot counter is used for counting plus one each time the time slot search module finds the target fgTS, thereby generating a corresponding time slot count value, until the time slot count value reaches a second maximum value, and the time slot counter is cleared, wherein the second maximum value is determined according to the parameter Pserver0 value of the fgGMP mapping, and the parameter Pserver0 value represents the total number of fgTS for fgGMP mapping within an ODUk multiframe period.

5. The device according to claim 4, characterized in that The device also includes a fgGMP mapping module, and the fgGMP mapping module includes: A configuration storage unit is configured to store a first fgGMP mapping configuration table, wherein the first fgGMP mapping configuration table includes a correspondence between a current fgODUflex channel number and a first fgGMP mapping parameter, wherein the first fgGMP mapping parameter includes a parameter C m0 B. Parameter C m0 , min Parameter C m0 , max and parameter Pserver0, where the parameter C m0 , min and parameter C m0 , max Determined according to the fgGMP algorithm and parameter Pserver0; The first memory is used to store the parameter C of the current multiframe period corresponding to the current fgODUflex channel number m0 ; fgGMP algorithm unit for C based on the parameters m0 Using the fgGMP mapping algorithm and parameter Pserver0, obtain each valid data area in the fgODTU.M frame structure, determine the data area enable signal of each valid data area, and read each data block and adjustment indication setting value corresponding to the current fgODUflex channel number from the data cache module based on each data area enable signal; A parameter updating unit is used to update the rate at which the fgODUflex signal is written into the data cache module and the rate at which the data cache module is read from the data cache module according to the fgODUflex signal in the current multiframe period, from the parameter C m0 , min and parameter C m0 , max Select a value in the range between 1 and 2, and use this value as the parameter C of the next multiframe period. m1 ; The second memory is used to store the parameter C of the next multiframe period corresponding to the current fgODUflex channel number m1 .

6. The device according to claim 5, characterized in that The adjustment position prediction module includes a multiplication unit, a division unit, a comparison unit, a first prediction unit and a second prediction unit: The multiplication unit is used to use the multiplication core to multiply the parameter C of the current multiframe period m0 Multiply it with the X value to get the A value; The division unit is used to calculate the A value and the parameter Pserver0 using a division core and round them to obtain the B value; The comparison unit is used to compare the sum of B+118 with the parameter C of the current multiframe period. m0 Compare and if the former is less than or equal to the latter, execute the function of the first prediction unit, otherwise execute the function of the second prediction unit; The first prediction unit is used to call the multiplication core to calculate the product of B+118 and the parameter Pserver0 to obtain the C1 value, and call the division core to calculate the C1 value and the parameter C of the current multi-frame period. m0 Obtaining a first adjustment position prediction value Y1; The second prediction unit is used to call the multiplication kernel to calculate B+118-C m0 The product of the C2 value and the parameter Pserver0 is used to obtain the C2 value, and the division core is called to calculate the C2 value and the parameter C of the next multiframe period. m1 The second adjustment position prediction value Y2 is obtained.

7. The device according to claim 5, characterized in that The multiframe counter is used to mark the multiframe number of the first ODUK multiframe as 0, mark the multiframe number of the second ODUK multiframe as 1, mark the multiframe number of the third ODUK multiframe as 0, mark the multiframe number of the fourth ODUK multiframe as 1, and so on, to obtain the multiframe number of each ODUK multiframe; The fgGMP algorithm unit is used to alternately read corresponding parameters from the first memory and the second memory according to the multiframe number of the ODUK multiframe, and the multiframe number 0 corresponds to the parameter C m0 , the corresponding parameter for multiframe number 1 is C m1 .

8. The device according to claim 5, characterized in that The device comprises a fgODUflex signal generating module, wherein: The fgODUflex signal generating module is configured to generate an adjusted fgODUflex signal according to the adjusted fgTS corresponding to the current fgODUflex channel number in response to the bandwidth lossless adjustment enabling signal; The data cache module is used to write the received adjusted fgODUflex signal of the current fgODUflex channel number into the corresponding storage space in sequence; The configuration storage unit is used to generate and store a second fgGMP mapping configuration table based on the adjusted fgTS corresponding to the current fgODUflex channel number, wherein the second fgGMP mapping configuration table includes a correspondence between the current fgODUflex channel number and the second fgGMP mapping parameter, and the second fgGMP mapping parameter includes a parameter C m1 B. Parameter C m1 , min Parameter C m1 , max and parameter Pserver1, where the parameter C m1 , min and parameter C m1 , max Determined according to the fgGMP algorithm and the parameter Pserver1, wherein the parameter Pserver1 is determined according to the adjusted total number of fgTS; The parameter updating unit is used to respond to the bandwidth lossless adjustment enabling signal and use the intermediate parameter C when performing the fgGMP mapping algorithm in the first multiframe period and the second multiframe period. m T and parameter Pserver1, and in the second multiframe period, according to the adjusted rate of writing the fgODUflex signal into the data cache module and the rate of reading from the data cache module, from parameter C m1 , min and parameter C m1 , max Select a value in the range between and , and use the value as a parameter of the third multiframe period; The fgGMP algorithm unit is used to use the fgGMP mapping algorithm based on the fgGMP parameters of the current multi-frame period to obtain each valid data area in the fgODTU.M frame structure, determine the data area enable signal of each valid data area, read the adjusted fgODUflex signal from the data cache module based on each data area enable signal, and map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

9. A bandwidth lossless adjustment method for a fine-grained optical transport network based on FPGA, characterized in that: The method comprises: The received fgODUflex signal of the current fgODUflex channel number is sequentially written into the corresponding storage space, and a 16-byte data block and a corresponding adjustment indication setting value are stored in each storage space, wherein the adjustment indication setting value is 0 or 1; storing a first time slot configuration table, the first time slot configuration table storing the fgODUflex channel number corresponding to each fgTS, and generating a second time slot configuration table in response to a bandwidth lossless adjustment instruction, the second time slot configuration table storing the adjusted fgODUflex channel number corresponding to each fgTS; Determine at least one target fgTS to be mapped by the current fgODUflex channel number in the ODUk frame structure according to the first time slot configuration table, and when the first target fgTS is determined in the ODUk frame structure, trigger a time slot counter to perform counting, and generate a corresponding time slot count value in response to each target fgTS, wherein the time slot count value is used to indicate the number of the target fgTS in the ODUk frame structure; In response to the adjustment indication setting value being 1, obtaining a first current timeslot count value of the timeslot counter, taking the first current timeslot count value as an X value, wherein the X value indicates that a 16-byte block of the third row and the first to the 16th columns of the fgODUflex signal is mapped to a corresponding timeslot value in the ODUk frame structure; Determine an adjustment position prediction value Y according to a bandwidth lossless adjustment algorithm of a fine-grained optical transport network and the X value, wherein the adjustment position prediction value Y is a time slot value corresponding to the mapping of a 16-byte block from row 3, columns 1905 to 1920 of the fgODUflex signal to the ODUk frame structure; In response to the second current time slot count value of the time slot counter being consistent with the adjustment position prediction value Y, a bandwidth lossless adjustment enable signal is output, wherein the bandwidth lossless adjustment enable signal is used to enable the fgODUflex signal to generate an adjusted fgODUflex signal based on the adjusted fgTS, and to map the adjusted fgODUflex signal to each adjusted fgTS in the ODUk frame structure.

10. A communication device, characterized in that: It comprises a bandwidth lossless adjustment device for a fine-grained optical transport network based on FPGA as described in any one of claims 1-8.

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