Digital closed-loop control system and method for quartz vibration beam accelerometer

Abstract

The present invention discloses a digital closed-loop control system and method for a quartz vibration beam accelerometer, and relates to the technical field of resonant inertial devices. The system includes a current detection circuit, a comparator circuit, a phase sampling module, an error solving module, a closed-loop control module, and a digitally controlled oscillator. The system has strong anti-interference capability and easy parameter adjustment. It not only integrates communication and data processing functions, but also has resonance control and frequency measurement capabilities, and can directly output frequency digital quantities, which can solve the problems of insufficient output frequency stability and single function of the current closed-loop control system.

Description

Technical Field

[0001] The present invention relates to the technical field of resonant inertial devices, and in particular to a digital closed-loop control system and method for a quartz vibration beam accelerometer. Background Art

[0002] Quartz vibration beam acceleration sensor (quartz vibration beam accelerometer) has the advantages of high sensitivity, large range, low power consumption, small size, etc., and has broad development prospects. The development of this technical route will hopefully solve the problem of improving the accuracy and stability of micro acceleration sensors. The quartz vibration beam acceleration sensor utilizes the characteristics that the resonant frequency of the quartz vibration beam resonator is related to the axial force it is subjected to. With the help of the inertia of the sensitive mass, the acceleration to be measured is converted into the axial force acting on the vibration beam, thereby obtaining acceleration information by detecting the change in the resonance frequency of the vibration beam.

[0003] The electrical characteristics of the sensitive unit of the quartz beam accelerometer are essentially the same as those of the passive quartz crystal oscillator, so the most commonly used quartz beam accelerometer control system is still the quartz crystal oscillator circuit. However, the quartz crystal oscillator circuit is an analog circuit. The performance and parameters of analog devices are easily affected by the environment, the error compensation method is complex, and an additional frequency measurement circuit is required to measure the frequency of the output waveform. It is gradually unable to meet the performance requirements of the new quartz beam accelerometer.

[0004] Chinese patent CN117607491A discloses a method for quickly detecting the frequency of a vibration beam of a quartz resonant acceleration sensor. The method determines the resonant frequency of the quartz vibration beam by combining logarithmic frequency sweeping and linear frequency sweeping. The excitation frequency changes in a predetermined manner, which belongs to an open-loop excitation method and requires an independent frequency measurement system. Although corresponding detection can be performed under laboratory conditions, the solution is not real-time, making it unsuitable for practical applications. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the digital closed-loop control system and method of the quartz vibrating beam accelerometer provided by the present invention solves the problem that the control system of the existing quartz vibrating beam accelerometer adopts a quartz crystal oscillator circuit, which leads to susceptibility to environmental influences and low performance.

[0006] In order to achieve the above-mentioned object of the invention, the technical solution adopted by the present invention is:

[0007] A digital closed-loop control system for a quartz vibration beam accelerometer is provided, which includes a current detection circuit, a comparator circuit, a phase sampling module, an error resolution module, a closed-loop control module and a digitally controlled oscillator; wherein:

[0008] A current detection circuit, used for converting a current signal output by the resonant element into a voltage signal;

[0009] A comparator circuit is used to compare the voltages of the output signals of the current detection circuit and the digitally controlled oscillator, and output a logic level according to the comparison result;

[0010] A phase sampling module is connected to the comparator circuit and the digitally controlled oscillator, and uses the edge of the logic level output by the comparator circuit as a trigger condition to sample the phase value output by the digitally controlled oscillator;

[0011] An error solving module is used to calculate the error value between the phase value sampled by the phase sampling module and the inherent resonant frequency of the resonant element;

[0012] A closed-loop control module is used to output a frequency control amount according to the error value obtained by the error solving module, and control the output signal frequency of the digital control oscillator;

[0013] The digital controlled oscillator is used to receive the frequency control quantity output by the closed-loop control module, generate a periodic signal of the corresponding frequency, and drive the resonant element to work so that the working frequency of the resonant element is equal to the inherent resonant frequency of the resonant element.

[0014] Further, the digital controlled oscillator includes a parallel driving channel and a reference channel; wherein:

[0015] The driving channel includes a first direct digital frequency synthesis module, a first pulse modulation module, a first logic output port and a first low-pass filter circuit connected in sequence, and is used to drive the excitation signal of the resonant element to work;

[0016] The reference channel includes a multiplier, a second direct digital frequency synthesis module, a second pulse modulation module, a second logic output port and a second low-pass filter circuit connected in sequence, and is used to output a reference signal to the comparator circuit;

[0017] The multiplier is used to increase the frequency of the reference channel to N times the frequency of the driving channel.

[0018] Furthermore, the current detection circuit adopts a charge amplifier.

[0019] Further, the phase sampling module includes a clock phase shift time digital converter, a sampling submodule and an interpolation submodule; wherein:

[0020] The clock phase-shift time-to-digital converter is used to obtain the precise time interval between the rising edge of the comparator circuit pulse output and the reference signal 0 phase point, that is, to obtain the fine sampling time point; and to give a sampling pulse aligned with the high-speed clock, that is, the coarse sampling time point;

[0021] The sampling submodule is used to sample the phase of the reference signal at a coarse sampling time point and a fine sampling time point respectively, and obtain a coarse sampling result and a fine sampling result respectively;

[0022] The interpolation submodule is used to interpolate the coarse sampling result through the fine sampling result to obtain the final phase sampling data.

[0023] Furthermore, the quartz beam accelerometer digital closed-loop control system also includes a data processing module, a system configuration module and a communication protocol module, wherein:

[0024] A data processing module, used for receiving and processing the frequency control quantity output by the closed-loop control module;

[0025] A communication protocol module, connected to the data processing module, for transmitting the frequency control quantity output by the closed-loop control module to the outside of the system;

[0026] The system configuration module is connected to the communication protocol module, parses the configuration commands input from outside the system, and stores the configuration parameters of the system.

[0027] Furthermore, the communication protocol module adopts a TTL serial port.

[0028] Furthermore, the data processing module includes a digital filter and a data extraction submodule.

[0029] A method for a digital closed-loop control system based on a quartz beam accelerometer is provided, comprising the following steps:

[0030] S1, converting the current signal output by the resonant element into a voltage signal; obtaining the voltage magnitude of the output signal of the digital controlled oscillator;

[0031] S2, comparing the voltage signal obtained by the conversion with the voltage of the output signal of the digital controlled oscillator, and outputting a logic level according to the comparison result;

[0032] S3, using the edge of the output logic level as a trigger condition to sample the phase value output by the digital controlled oscillator;

[0033] S4, calculating the error value between the phase value obtained by sampling and the inherent resonant frequency of the resonant element;

[0034] S5, outputting a frequency control amount according to the error value to control the output signal frequency of the digital controlled oscillator;

[0035] S6. Receive the frequency control amount through the digital controlled oscillator and generate a periodic signal of the corresponding frequency to drive the resonant element to work, so that the working frequency of the resonant element is equal to the inherent resonant frequency of the resonant element.

[0036] Furthermore, the specific method of sampling the phase value output by the digital controlled oscillator using the edge of the output logic level as a trigger condition is as follows:

[0037] The precise time interval between the rising edge of the output logic level and the reference signal 0 phase point is obtained through the clock phase-shift time digital converter, that is, the fine sampling time point is obtained; and a sampling pulse aligned with the high-speed clock is given through the clock phase-shift time digital converter, that is, the coarse sampling time point;

[0038] The phase of the reference signal is sampled at a coarse sampling time point and a fine sampling time point respectively, and a coarse sampling result and a fine sampling result are obtained correspondingly;

[0039] The coarse sampling result is interpolated through the fine sampling result to obtain the final phase sampling data.

[0040] Furthermore, in the closed-loop control process, the frequency control amount is received and processed by the data processing module; the frequency control amount is transmitted to the outside of the system by the communication protocol module; the configuration command input from the outside of the system is parsed by the system configuration module, and the configuration parameters of the system are stored.

[0041] The beneficial effects of the present invention are:

[0042] 1. The present invention adopts digital control mode, which is less affected by the environment, has strong anti-interference ability and high performance, and can solve the problems of insufficient output frequency stability and single function of the current closed-loop control system.

[0043] 2. The error detection method adopted by the present invention can obtain amplitude and phase information at the same time, and does not require the participation of an analog-to-digital converter, effectively saving costs and power consumption.

[0044] 3. The present invention realizes the integration of resonance control function and frequency measurement function, and can directly output the digital frequency quantity without the need for an additional frequency measurement system, thereby effectively reducing the cost of the supporting system of the quartz vibration beam acceleration sensor.

[0045] 4. The present invention includes a communication protocol module and a system configuration module, which enables users to easily configure system parameters and adapt to different acceleration sensors, effectively improving the flexibility of the system.

[0046] 5. The present invention includes a communication protocol module and a data processing module, which can perform error compensation and preprocessing on the output data, effectively improving the reliability and usability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 This is the structural diagram of this system;

[0048] Figure 2 It is a structural diagram of a digital controlled oscillator;

[0049] Figure 3 Schematic diagram of the charge amplifier used in the embodiment;

[0050] Figure 4 This is the ModelSim simulation result of the clock phase-shift time-to-digital converter;

[0051] Figure 5 A schematic diagram of a frame structure of serial port data transmission in an embodiment;

[0052] Figure 6 It is a structural schematic diagram of a quartz vibration beam accelerometer;

[0053] Figure 7 The reference signal and feedback signal waveforms of the control system in the embodiment;

[0054] Figure 8 Receive frequency measurement data for the serial port;

[0055] Fig. 9 is the output frequency measurement result;

[0056] Fig.10 This is the result of Allan variance calculation;

[0057] Fig.11 is the noise spectral density calculation result. DETAILED DESCRIPTION

[0058] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0059] like Figure 1 As shown, the digital closed-loop control system of the quartz beam accelerometer includes a current detection circuit, a comparator circuit, a phase sampling module, an error solving module, a closed-loop control module, a digitally controlled oscillator, a data processing module, a system configuration module and a communication protocol module; wherein:

[0060] A current detection circuit, used for converting a current signal output by the resonant element into a voltage signal;

[0061] A comparator circuit is used to compare the voltages of the output signals of the current detection circuit and the digitally controlled oscillator, and output a logic level according to the comparison result;

[0062] A phase sampling module is connected to the comparator circuit and the digitally controlled oscillator, and uses the edge of the logic level output by the comparator circuit as a trigger condition to sample the phase value output by the digitally controlled oscillator;

[0063] An error solving module is used to calculate the error value between the phase value sampled by the phase sampling module and the inherent resonant frequency of the resonant element;

[0064] A closed-loop control module is used to output a frequency control amount according to the error value obtained by the error solving module, and control the output signal frequency of the digital control oscillator;

[0065] A digitally controlled oscillator is used to receive the frequency control quantity output by the closed-loop control module, generate a periodic signal of a corresponding frequency, and drive the resonant element to work so that the working frequency of the resonant element is equal to the inherent resonant frequency of the resonant element;

[0066] A data processing module, used for receiving and processing the frequency control quantity output by the closed-loop control module;

[0067] A communication protocol module, connected to the data processing module, for transmitting the frequency control quantity output by the closed-loop control module to the outside of the system;

[0068] The system configuration module is connected to the communication protocol module, parses the configuration commands input from outside the system, and stores the configuration parameters of the system.

[0069] like Figure 2 As shown, the digital controlled oscillator includes a parallel driving channel and a reference channel; wherein:

[0070] The driving channel includes a first direct digital frequency synthesis module, a first pulse modulation module, a first logic output port and a first low-pass filter circuit connected in sequence, and is used to drive the excitation signal of the resonant element to work;

[0071] The reference channel includes a multiplier, a second direct digital frequency synthesis module, a second pulse modulation module, a second logic output port and a second low-pass filter circuit connected in sequence, and is used to output a reference signal to the comparator circuit;

[0072] The multiplier is used to increase the frequency of the reference channel to N times the frequency of the driving channel, where N is a positive integer. In this embodiment, the value of N can be 3.

[0073] The direct digital frequency synthesis module can be composed of a phase accumulator and a lookup table. The phase accumulator is an N-bit unsigned loop overflow accumulator. The increment of the phase accumulator in each working clock cycle is controlled by the frequency word Fword, and the bit width of the frequency word is the same as that of the phase accumulator. The lookup table stores the waveform data of a complete cycle according to the linear time address relationship. The output of the phase accumulator will be used as the address input to the lookup table, and the lookup table outputs the waveform value of the corresponding address. If the digital-to-analog converter DAC is connected to the post-stage of the digital controlled oscillator, the digital quantity output by the lookup table can be converted into an analog quantity to generate an actual waveform.

[0074] The operating clock frequency in the digitally controlled oscillator is 200MHz, the bit width of the phase register and the frequency word is 48, the bit width of the lookup table address is 12, and the data bit width is 10. The lookup table data uses the ROM IP core to call the on-chip BlockMemory resource for storage.

[0075] The current detection circuit uses a charge amplifier. The charge amplifier is a signal conversion circuit widely used in piezoelectric sensors. Its output voltage is proportional to the integral value of the input current, that is, the total amount of charge injected. Since the quartz vibration beam uses the piezoelectric effect to achieve vibration detection, its output has the same characteristics as the piezoelectric sensor, that is, the output impedance is high (>50kΩ) and the generated current is weak (100nA~1μA), so there are special requirements for the performance of the current detection circuit. For this reason, the schematic diagram of the charge amplifier used in this embodiment is as follows Figure 3 As shown in the figure, the charge amplifier utilizes the virtual short and virtual break characteristics of the negative feedback circuit of the operational amplifier, and converts the weak current input at the IN terminal into a larger voltage output through the ultra-high impedance feedback network composed of resistor R1 and capacitor C1. The input impedance of the operational amplifier is much higher than the output impedance of the quartz beam, so the interference caused by the high output impedance of the quartz beam can be avoided. The impedance modulus of the feedback network can reach several MΩ, corresponding to a current-to-voltage conversion gain greater than 10 6 , which can directly convert weak currents at the μA level into voltages at the V level. The charge amplifier circuit has an integral effect on the input current and is an analog integral circuit with the inherent low-pass characteristics of the integrator, which reduces the bandwidth requirements for the operational amplifier and has a certain inhibitory effect on high-frequency noise. At the same time, due to its integral characteristics, it can provide a flat 90° phase shift over a large frequency range.

[0076] In this embodiment, the phase sampling module includes a clock phase shift time digital converter, a sampling submodule and an interpolation submodule; wherein:

[0077] The clock phase-shift time-to-digital converter is used to obtain the precise time interval between the rising edge of the comparator circuit pulse output and the reference signal 0 phase point, that is, to obtain the fine sampling time point; and to give a sampling pulse aligned with the high-speed clock, that is, the coarse sampling time point;

[0078] The sampling submodule is used to sample the phase of the reference signal at a coarse sampling time point and a fine sampling time point respectively, and obtain a coarse sampling result and a fine sampling result respectively;

[0079] The interpolation submodule is used to interpolate the coarse sampling result through the fine sampling result to obtain the final phase sampling data.

[0080] The clock phase-shifted time-to-digital converter (TDC) has two steps: coarse measurement and fine measurement. The coarse measurement is to give a sampling pulse that is aligned with the high-speed clock (200M). The fine measurement performs multi-phase phase shift on the high-speed clock to shorten the time quantization interval, obtain more accurate phase information, and improve control accuracy. Specifically, the fine measurement inputs four 200MHz high-speed clocks with phases of 0 degrees, 45 degrees, 90 degrees, and 135 degrees, respectively. Four rising edge trigger registers and four falling edge trigger registers are used to sample the input pulses, which is equivalent to an 8-phase clock. The equivalent high-speed clock frequency is 1600MHz. During the sampling process, the phase value can be obtained by knowing the clock period. The output signal of the clock phase-shifted time-to-digital converter is in the form of a rising edge detection flag and a fine measurement thermometer code. For example Figure 4 As shown, the ModelSim simulation results of the clock phase-shifted time-to-digital converter are in line with expectations.

[0081] In the error solution module, the number of phase samplings required for a single calculation result can be set by parameters, and the phase detection accuracy can be improved by increasing the number of phase samplings. The workflow is controlled by a state machine. It is divided into three serial loop working states, including waiting for rising edge events, phase sampling and interpolation, and calculation of in-phase components and orthogonal components. The module design also uses a variety of methods to reduce resource consumption: the coefficients in the module are all integer powers of 2, and shifting can be used directly instead of multiplication calculations; the direct addition method is used instead of square and square root to characterize the amplitude, avoiding multiplication and square root calculations; because when the control system is working, the oscillation frequency of the quartz vibration beam is in a very small range near the resonant frequency point most of the time, within this range, the amplitude of the current feedback signal is almost unchanged, and the phase difference value is also small. At this time, the phase difference can be directly measured by the amplitude of the orthogonal component. There is no need to introduce inverse tangent calculations.

[0082] In the closed-loop control module, the calculation expression of the frequency control quantity is:

[0083]

[0084] Where y(k) is the calculated frequency control quantity; K p is the proportional coefficient; x(k) is the kth error value obtained by the error solving module; K i is the integral coefficient; x(n) is the nth error value obtained by the error solving module.

[0085] In order to meet the timing constraints, the entire calculation process is decomposed into four stages and executed sequentially, and the state machine is used to control the calculation process. The first stage calculates the values ​​of the proportional term and the integral term respectively, the second stage adds the proportional term and the integral term, the third stage adds a bias to the output result, and the fourth stage controls. The coefficients of the proportion and the integral are both integer powers of 2, which can be directly implemented by shifting to save hardware resources. The integrator has a limiting anti-saturation function, which can prevent abnormalities in the control process.

[0086] In this embodiment, in order to reduce the output rate of the frequency measurement data, the frequency word is digitally low-pass filtered and extracted, so the data processing module includes a digital filter and a data extraction submodule. The digital filter is a first-order low-pass IIR digital filter. In order to save hardware resources, the coefficients of the filter are obtained by shifting, without using a multiplier.

[0087] The communication protocol module uses a TTL serial port. The filtered frequency measurement data is output through the TTL serial port. The transmission of serial port data is based on a frame structure, with the frame as the basic unit for sending data. The frame structure diagram of serial port data transmission is as follows: Figure 5 As shown in the figure, at the beginning of each frame, there needs to be a 1-bit start bit fixed at a low level; after the start bit, there are 8 bits of valid data, and at the end of each frame, there must also be a 1-bit stop bit fixed at a high level, that is, the most basic frame structure (excluding checksums, etc.) is 10 bits long. When no data is sent, the transmitter TX is in an idle state, and TX maintains a high level at this time. When the data frame transmission starts, there will first be a start bit, then 8 bits of data bits, and then a 1-bit stop bit, after which TX continues to enter the idle state and wait for the next data transmission.

[0088] The components of the communication protocol module include a baud rate counter, a data bit count counter, and a serial port transmission sequencer that supports a maximum of 64 bits of valid data (8 serial port data frames) sent at a time. The communication protocol module can configure the baud rate and the number of data frames sent at a time through parameters. In actual applications, the baud rate is set to 9600, and the single data transmission bit width is set to 48, which is the same as the DDS frequency word width.

[0089] The method based on the digital closed-loop control system of the quartz beam accelerometer comprises the following steps:

[0090] S1, converting the current signal output by the resonant element into a voltage signal; obtaining the voltage magnitude of the output signal of the digital controlled oscillator;

[0091] S2, comparing the voltage signal obtained by the conversion with the voltage of the output signal of the digital controlled oscillator, and outputting a logic level according to the comparison result;

[0092] S3, using the edge of the output logic level as a trigger condition to sample the phase value output by the digital controlled oscillator;

[0093] S4, calculating the error value between the phase value obtained by sampling and the inherent resonant frequency of the resonant element;

[0094] S5, outputting a frequency control amount according to the error value to control the output signal frequency of the digital controlled oscillator;

[0095] S6. Receive the frequency control amount through the digital controlled oscillator and generate a periodic signal of the corresponding frequency to drive the resonant element to work, so that the working frequency of the resonant element is equal to the inherent resonant frequency of the resonant element.

[0096] Using the edge of the output logic level as the trigger condition, the specific method for sampling the phase value output by the digital controlled oscillator is:

[0097] The precise time interval between the rising edge of the output logic level and the reference signal 0 phase point is obtained through the clock phase-shift time digital converter, that is, the fine sampling time point is obtained; and a sampling pulse aligned with the high-speed clock is given through the clock phase-shift time digital converter, that is, the coarse sampling time point;

[0098] The phase of the reference signal is sampled at a coarse sampling time point and a fine sampling time point respectively, and a coarse sampling result and a fine sampling result are obtained correspondingly;

[0099] The coarse sampling result is interpolated through the fine sampling result to obtain the final phase sampling data.

[0100] In the closed-loop control process, the frequency control quantity is received and processed by the data processing module; the frequency control quantity is transmitted to the outside of the system through the communication protocol module; the configuration commands input from the outside of the system are parsed by the system configuration module, and the configuration parameters of the system are stored.

[0101] The structural diagram of the quartz beam accelerometer is as follows: Figure 6 As shown, one terminal of the quartz beam is connected to the excitation source, and the other terminal is connected to the inverting input of the operational amplifier in the charge amplifier. When the charge amplifier circuit works normally, the voltages of the in-phase input and inverting input of the operational amplifier are equal. Therefore, the in-phase input is connected to the signal ground of the dual power system or the virtual ground (reference voltage) of the single power system. At this time, the input can also be regarded as connected to the ground. The excitation and detection are carried out simultaneously.

[0102] In this embodiment, a digitally controlled oscillator, a phase sampling module, an error solving module and a closed-loop control module form a phase-locked loop, and the current signal of the quartz vibration beam is used as the feedback signal of the phase-locked loop. The output signal of the phase-locked loop is divided into two paths, one path is used as the excitation signal of the quartz vibration beam, and the other path is used as the input reference signal of the phase-locked loop. Since the phase-locked loop can adjust the excitation frequency, the phase difference between the feedback signal and the reference signal is minimized, so that the quartz vibration beam can be controlled to always remain in a resonant state. In this embodiment, FPGA can be used as the implementation platform of the phase-locked loop to implement the phase-locked loop and the corresponding algorithm in the form of a logic circuit.

[0103] In one embodiment of the present invention, in order to eliminate irrelevant interference and more accurately test the performance of the control system, a 32.768kHz crystal oscillator is used as a controlled resonant device, model X321532768KGD2SI, and the equivalent circuit parameters are shown in Table 1.

[0104] Table 1

[0105] Parameter name Parameter Value Dynamic resistance R 70kΩ Dynamic inductance L 5.361kH Dynamic capacitance C 4.4fF <![CDATA[Static capacitance C 0 > 1.2pF

[0106] Turn on the power supply of this control system, load the relevant binary files into FPGA, use an oscilloscope to measure the signal waveform of the control system, measure the reference signal and feedback signal, and the waveform is as follows: Figure 7 As shown, the waveform quality is good, the reference signal frequency is about 98.29kHz, the feedback signal frequency is about 32.76kHz, which satisfies the 3-fold frequency relationship, and the phase relationship of the frequency-doubled signal can remain in phase, proving that the control system can excite the resonant element to work normally.

[0107] Connect the serial port to USB module and use the serial port host computer to receive the frequency measurement data output by this control system, such as Figure 8 As shown in the figure, the serial port host computer communicates normally with the control system and can continuously and correctly receive the 48-bit frequency data. This shows that the key functions of the control system are running normally, proving the rationality of the system design.

[0108] After verifying that the basic functions of the control system are normal, a performance test is conducted. 4800 output frequency data are collected using the serial port host computer, with a sampling rate of 8Hz and a total duration of 10 minutes. The original binary data is processed using the MATLAB program to calculate the actual frequency value. The results are as follows: Fig. 9 shown.

[0109] This embodiment also performs a stability analysis of the resonant control system:

[0110] Allan variance is widely used in random error modeling of inertial devices and clock references. It can characterize the random noise component of the control system output frequency through the slope of the double logarithmic coordinate graph. The stability of the resonant control system, also known as zero-bias stability, corresponds to the frequency noise caused by random fluctuations in the parameters of the resonant components and circuit analog devices. It can be obtained by calculating the Allan variance value of the zero slope segment. Use MATLAB to calculate the Allan variance of the measurement results, as shown in the following figure: Fig.10 As shown. From the calculation results, the value corresponding to the Allan variance 0 slope segment can be read, which is the stability of the resonant control system, which is approximately equal to 18μHz@8.25s. It meets the requirement of stability ≤100μHz in the task book and meets the application standards of actual high-performance accelerometer products.

[0111] This embodiment also performs frequency measurement resolution analysis:

[0112] Calculate the noise spectral density at the output frequency, such as Fig.11 As shown, the calculation results show that the spectrum density of white frequency noise is approximately This means that when the output bandwidth is 1 Hz, the standard deviation of the output frequency is 60 μHz.

[0113] According to the National Metrology Verification Regulations JJG349-201, for the frequency measurement system, the definition of resolution is the value represented by the lowest stable and accurate digit in the instrument display measurement result, also known as the effective resolution. In other words, the effective resolution should be greater than the random fluctuation of the instrument measurement result, so that when the scale value displayed by the instrument measurement result is equal to the effective resolution, the display result of the instrument remains stable. The degree of random fluctuation of the displayed measurement result can be measured by the standard deviation of the measurement result. Taking the frequency sampling rate of 1Hz as the standard, the output bandwidth of the frequency measurement system is stipulated to be 1Hz. As mentioned above, the standard deviation of the output frequency σ=60μHz. From the knowledge of statistics, it can be known that under the normal distribution, the probability of data falling within the range of (μ-2σ,μ+2σ) is 95.44%. Therefore, when the scale value displayed by the instrument is not less than 4σ, it can be considered that the instrument measurement display result can remain stable at this time. That is, the value of the effective resolution is also 4σ=4×60μHz=240μHz. It meets the requirement of frequency measurement resolution ≤1mHz.

[0114] In summary, the present invention adopts a digital control method, which is less affected by the environment, has strong anti-interference ability and high performance; the error detection method adopted can obtain amplitude and phase information at the same time, and does not require the participation of an analog-to-digital converter, effectively saving costs and power consumption.

Claims

1. A digital closed-loop control system for a quartz beam accelerometer, characterized in that: It includes a current detection circuit, a comparator circuit, a phase sampling module, an error solving module, a closed-loop control module and a digitally controlled oscillator; wherein: A current detection circuit, used for converting a current signal output by the resonant element into a voltage signal; A comparator circuit is used to compare the voltages of the output signals of the current detection circuit and the digitally controlled oscillator, and output a logic level according to the comparison result; A phase sampling module is connected to the comparator circuit and the digitally controlled oscillator, and uses the edge of the logic level output by the comparator circuit as a trigger condition to sample the phase value output by the digitally controlled oscillator; An error solving module is used to calculate the error value between the phase value sampled by the phase sampling module and the inherent resonant frequency of the resonant element; A closed-loop control module is used to output a frequency control amount according to the error value obtained by the error solving module, and control the output signal frequency of the digital control oscillator; The digital controlled oscillator is used to receive the frequency control quantity output by the closed-loop control module, generate a periodic signal of the corresponding frequency, and drive the resonant element to work so that the working frequency of the resonant element is equal to the inherent resonant frequency of the resonant element.

2. The digital closed-loop control system of the quartz beam accelerometer according to claim 1, characterized in that: The digital controlled oscillator includes a parallel driving channel and a reference channel; wherein: The driving channel includes a first direct digital frequency synthesis module, a first pulse modulation module, a first logic output port and a first low-pass filter circuit connected in sequence, and is used to drive the excitation signal of the resonant element to work; The reference channel includes a multiplier, a second direct digital frequency synthesis module, a second pulse modulation module, a second logic output port and a second low-pass filter circuit connected in sequence, and is used to output a reference signal to the comparator circuit; The multiplier is used to increase the frequency of the reference channel to N times the frequency of the driving channel.

3. The digital closed-loop control system of the quartz vibration beam accelerometer according to claim 1, characterized in that: The current detection circuit uses a charge amplifier.

4. The digital closed-loop control system of the quartz beam accelerometer according to claim 2, characterized in that: The phase sampling module includes a clock phase shift time digital converter, a sampling submodule and an interpolation submodule; wherein: The clock phase-shift time-to-digital converter is used to obtain the precise time interval between the rising edge of the comparator circuit pulse output and the reference signal 0 phase point, that is, to obtain the fine sampling time point; and to give a sampling pulse aligned with the high-speed clock, that is, the coarse sampling time point; The sampling submodule is used to sample the phase of the reference signal at a coarse sampling time point and a fine sampling time point respectively, and obtain a coarse sampling result and a fine sampling result respectively; The interpolation submodule is used to interpolate the coarse sampling result through the fine sampling result to obtain the final phase sampling data.

5. The digital closed-loop control system of the quartz vibration beam accelerometer according to claim 1, characterized in that: It also includes a data processing module, a system configuration module and a communication protocol module, wherein: A data processing module, used for receiving and processing the frequency control quantity output by the closed-loop control module; A communication protocol module, connected to the data processing module, for transmitting the frequency control quantity output by the closed-loop control module to the outside of the system; The system configuration module is connected to the communication protocol module, parses the configuration commands input from outside the system, and stores the configuration parameters of the system.

6. The digital closed-loop control system of the quartz vibration beam accelerometer according to claim 5, characterized in that: The communication protocol module uses TTL serial port.

7. The digital closed-loop control system of the quartz vibration beam accelerometer according to claim 5, characterized in that: The data processing module includes a digital filter and a data extraction submodule.

8. A method for controlling a digital closed-loop quartz vibration beam accelerometer based on any one of claims 1 to 7, characterized in that: The following steps are involved: S1, converting the current signal output by the resonant element into a voltage signal; obtaining the voltage magnitude of the output signal of the digital controlled oscillator; S2, comparing the voltage signal obtained by the conversion with the voltage of the output signal of the digital controlled oscillator, and outputting a logic level according to the comparison result; S3, using the edge of the output logic level as a trigger condition to sample the phase value output by the digital controlled oscillator; S4, calculating the error value between the phase value obtained by sampling and the inherent resonant frequency of the resonant element; S5, outputting a frequency control amount according to the error value to control the output signal frequency of the digital controlled oscillator; S6. Receive the frequency control amount through the digital controlled oscillator and generate a periodic signal of the corresponding frequency to drive the resonant element to work, so that the working frequency of the resonant element is equal to the inherent resonant frequency of the resonant element.

9. The method according to claim 8, characterized in that Using the edge of the output logic level as the trigger condition, the specific method for sampling the phase value output by the digital controlled oscillator is: The precise time interval between the rising edge of the output logic level and the reference signal 0 phase point is obtained through the clock phase-shift time digital converter, that is, the fine sampling time point is obtained; and a sampling pulse aligned with the high-speed clock is given through the clock phase-shift time digital converter, that is, the coarse sampling time point; The phase of the reference signal is sampled at a coarse sampling time point and a fine sampling time point respectively, and a coarse sampling result and a fine sampling result are obtained correspondingly; The coarse sampling result is interpolated through the fine sampling result to obtain the final phase sampling data.

10. The method according to claim 8, characterized in that In the closed-loop control process, the frequency control quantity is received and processed by the data processing module; the frequency control quantity is transmitted to the outside of the system through the communication protocol module; the configuration commands input from the outside of the system are parsed by the system configuration module, and the configuration parameters of the system are stored.

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