A Pre-Regulator Circuit with Wide Input Range

Abstract

The present invention provides a pre-voltage stabilization circuit with a wide input range, strong load capacity, small change with temperature, and easy to adjust output voltage. On the basis of the bandgap reference 1.2V voltage, the opposite characteristics of the temperature coefficients of the transistor and the capacitor are used to generate a power supply voltage that changes little with temperature. In the temperature range of ‑50°‑125°, the power supply voltage drop is below 200mV, and the voltage can be adjusted as required. Taking a 5V power supply voltage as an example, the present invention can generate a stable 5V voltage within an input voltage range of 5.7V‑60V, and the voltage will decrease with the input voltage below 5.7V. Taking into account that light-load low-voltage modules such as reference modules require a more stable power supply voltage, the present invention designs a two-stage output structure, the first stage is for light-load modules, and the second stage is for heavy-load modules. The present invention has a strong load capacity, and it has been found through simulation that it can carry 20mA. The output voltage can also be stabilized very quickly when the current load suddenly changes.

Description

Technical Field

[0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a pre-stabilizing circuit with a wide input range. Background Art

[0002] The pre-regulator circuit can provide low-voltage power for subsequent circuits after preliminary stabilization of the higher voltage input to its input end, and has important applications in the field of integrated circuits with high-voltage processes. With the development of high-voltage integrated circuits, such as high-voltage switching power supplies, it is inevitable that high-voltage modules and low-voltage modules exist at the same time. The development of integrated circuits has put forward higher requirements for the basic low-voltage modules of analog circuits, such as bandgap reference circuits, oscillator circuits, level shifters, etc. The use of high-voltage tubes to design low-voltage modules has the problem of too large an area, and these basic modules all require stable on-chip pre-regulator power supply circuits.

[0003] Traditional pre-regulator circuits usually only combine a Zener diode and a transistor to obtain a voltage that is a Zener diode voltage minus a transistor conduction voltage drop, that is, the output voltage depends on the Zener diode voltage.

[0004] In existing high-voltage process integrated circuits, high-voltage resistant devices often have high threshold voltages, poor performance, and occupy a large area, resulting in large process deviations in the pre-regulator circuit and large changes in output voltage with temperature, making it unstable. Summary of the invention

[0005] In order to solve the above problems, the present invention discloses a pre-stabilization circuit with a wide input range, which can effectively improve the stability of the output voltage when the temperature changes and reduce the voltage drop of the output voltage when the current load changes suddenly.

[0006] To achieve the above object, the technical solution of the present invention is as follows:

[0007] A pre-regulator circuit with a wide input range comprises 7 NMOS tubes, namely NM1, NM2, NM3, NM4, NM5, NM6 and NM7, wherein NM4, NM5 and NM6 are high-voltage tubes; 5 PMOS tubes, namely PM1, PM2, PM3, PM4 and PM5, wherein PM3 and PM4 are high-voltage tubes; 6 resistors, namely R1, R2, R3, R4, R5 and R6; 3 capacitors, namely C1, C2 and C3; and 6 triodes, namely Q1, Q2, Q3, Q4, Q5 and Q6.

[0008] PM1, PM2, PM3, PM4, NM1, NM2, NM3, NM7, R5, and R6 form a current source that is independent of the power supply, providing bias current for NM6 and Q3, and bias voltage for the gates of NM4 and NM5; the gate and drain of PM1, the gate and drain of NM7 are interconnected and connected to the drain of NM1 and the gate of PM2; the source of PM1 and one end of R6 are connected to the input terminal Vin; the source of PM2 is connected to the other end of R6; the gate of NM 2, the gates of NM1 and NM3 are interconnected and connected to the source of NM7 and the drain of PM2, the sources of NM1 and NM2 are connected to one end of R5, and the other end of R5 is connected to the ground terminal GND; the source of NM3 is connected to one end of R5, the source of PM3 is connected to the input terminal Vin, the drain and gate of PM3 are interconnected and connected to the drain of NM3 and the gate of PM4; the source of PM4 is connected to the input terminal Vin, and the drain of PM4 serves as the current source output electrode Vgate.

[0009] In order to achieve the goal of small voltage change with temperature and simple circuit, the present invention selects a bandgap reference structure to generate a reference voltage with a low temperature coefficient. The bandgap reference structure is simple and does not require the use of a high-gain operational amplifier with a complex design using a high-voltage tube. It can be used to generate a 1.2V reference voltage. R1, R2, R3, Q1, Q2, and Q3 form a bandgap reference basic structure circuit to generate a 1.2V reference voltage with a low temperature coefficient. One end of R1 is connected to the emitter of Q4 and one end of R2, the other end of R1 is connected to the collector of Q1 and the base of Q3, and the other end of R2 is connected to the collector and base of Q2; one end of R3 is connected to the ground terminal GND, and the other end of R3 is connected to the emitter of Q1; the base of Q1 is connected to the base and collector of Q2; the emitters of Q2 and Q3 are connected to the ground terminal GND; the collector of Q3 is connected to the source of NM6.

[0010] Q4, Q5, Q6, R4, NM4, NM6, C1, C2 and the energy gap infrastructure constitute a pre-regulated primary output circuit for use with low-voltage modules with low current loads such as reference modules and current bias circuits. The base of Q4 is connected to the collector of Q4, the gate of NM6 and the emitter of Q5, the base of Q5 is connected to the collector of Q5 and the emitter of Q6, the base of Q6 is connected to the collector of Q6 and one end of R4, and the other end of R4 is connected to the source of NM4, the positive end of C2 and the gate of PM5, i.e., the primary output terminal Vout1; the drain of NM4 is connected to the input terminal Vin, and the gate of NM4 is connected to the current source output terminal Vgate; the positive end of C1 is connected to the current source output terminal Vgate, and the negative end of C1 is connected to the ground terminal GND; the drain of NM6 is connected to the current source output terminal Vgate.

[0011] NM5, PM5, and C3 form a secondary output circuit for use by low-voltage modules with periodic high current loads such as oscillators and inverter buffers. The drain of NM5 is connected to the input terminal Vin, and the source of NM5 is connected to the secondary output terminal Vout2; the source of PM5 is connected to the secondary output terminal Vout2, and the drain of PM5 is connected to the ground terminal GND; the positive end of C3 is connected to the secondary output terminal Vout2, and the negative end of C3 is connected to the ground terminal GND.

[0012] The beneficial effects of the present invention are:

[0013] Generally, the voltage regulator tube in the pre-stabilization circuit using the voltage regulator tube changes greatly with temperature, which has a great influence on the power supply voltage. Based on the bandgap reference 1.2V voltage, the present invention utilizes the opposite characteristics of the temperature coefficients of the triode and the resistor to generate a power supply voltage that changes little with temperature. Within the temperature range of -50℃-125℃, the power supply voltage drop is below 200mV, and the voltage can be adjusted as required.

[0014] Taking a 5V power supply voltage as an example, the present invention can generate a stable 5V voltage within an input voltage range of 5.7V-60V, and the voltage will decrease with the input voltage below 5.7V.

[0015] The present invention takes into account that light-load low-voltage modules such as reference modules require a more stable power supply voltage, and designs a two-stage output structure, wherein the first stage is used for the light-load modules, and the second stage is used for the heavy-load modules.

[0016] The invention has a strong load carrying capacity, and simulation shows that it can carry a load of 20 mA. When the current load suddenly changes, the output voltage can also be stabilized very quickly. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the circuit principle proposed by the present invention. DETAILED DESCRIPTION

[0018] The present invention will be further explained below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the following specific embodiments are only used to illustrate the present invention and are not used to limit the scope of the present invention.

[0019] like Figure 1As shown, the present invention provides a pre-voltage stabilization circuit with a wide input voltage range, strong load capacity, small temperature change, and well-adjustable output voltage, including 7 NMOS tubes, namely NM1, NM2, NM3, NM4, NM5, NM6, and NM7, wherein NM4, NM5, and NM6 are high-voltage tubes; 5 PMOS tubes, namely PM1, PM2, PM3, PM4, and PM5, wherein PM3 and PM4 are high-voltage tubes; 6 resistors, namely R1, R2, R3, R4, R5, and R6; 3 capacitors, namely C1, C2, and C3; and 6 triodes, namely Q1, Q2, Q3, Q4, Q5, and Q6.

[0020] PM1, PM2, PM3, PM4, NM1, NM2, NM3, NM7, R5, and R6 form a current source that is independent of the power supply, providing bias current for NM6 and Q3, and bias voltage for the gates of NM4 and NM5. NM7 is used to eliminate the degeneracy point, and PM1, PM2, NM1, and NM2 form the basic structure of the current source. The large resistor R5 generates a floating voltage, so that the CMOS tube on R5 can use a low-voltage tube, greatly reducing the chip area. NM2 and NM3 form a current mirror to copy the current source current, and PM3 and PM4 form a current mirror to transmit the current, which also plays a role in voltage resistance. The gate and drain of PM1, the gate and drain of NM7 are interconnected and connected to the drain of NM1 and the gate of PM2, the source of PM1 and one end of R6 are connected to the input terminal Vin; the source of PM2 is connected to the other end of R6; the gate and drain of NM2, the gates of NM1 and NM3 are interconnected and connected to the source of NM7 and the drain of PM2, the sources of NM1 and NM2 are connected to one end of R5, and the other end of R5 is connected to the ground terminal GND; the source of NM3 is connected to one end of R5, the source of PM3 is connected to the input terminal Vin, the drain and gate of PM3 are interconnected and connected to the drain of NM3 and the gate of PM4; the source of PM4 is connected to the input terminal Vin, and the drain of PM4 serves as the current source output terminal Vgate.

[0021] In order to achieve the goal of small voltage change with temperature and simple circuit, the present invention selects a bandgap reference structure to generate a reference voltage with a low temperature coefficient. The bandgap reference structure is simple and does not require the use of a high-gain operational amplifier with a complex design using a high-voltage tube. It can be used to generate a 1.2V reference voltage. R1, R2, R3, Q1, Q2, and Q3 form a bandgap reference basic structure circuit to generate a 1.2V reference voltage with a low temperature coefficient. One end of R1 is connected to the emitter of Q4 and one end of R2, the other end of R1 is connected to the collector of Q1 and the base of Q3, and the other end of R2 is connected to the collector and base of Q2; one end of R3 is connected to the ground terminal GND, and the other end of R3 is connected to the emitter of Q1; the base of Q1 is connected to the base and collector of Q2; the emitters of Q2 and Q3 are connected to the ground terminal GND; the collector of Q3 is connected to the source of NM6.

[0022] Q4, Q5, Q6, R4, NM4, NM6, C1, C2 and the energy gap infrastructure form a pre-stabilized primary output circuit for use with low-voltage modules with low current loads such as reference modules and current bias circuits. The present invention utilizes the opposite characteristics of the triode and the temperature coefficient of the resistor to generate a voltage that changes little with temperature, which together with the reference voltage forms the required output voltage Vout1. NM4 and NM6 are used for withstand voltage and protection, and capacitor C1 is used to stabilize the gate voltage of NM4 and NM6, compensate for the gate current when the gate voltage suddenly changes, and achieve the purpose of stabilizing the output voltage. C2 is used to improve the load capacity. The base of Q4 is connected to the collector of Q4, the gate of NM6 and the emitter of Q5, the base of Q5 is connected to the collector of Q5 and the emitter of Q6, the base of Q6 is connected to the collector of Q6 and one end of R4, and the other end of R4 is connected to the source of NM4, the positive end of C2 and the gate of PM5, i.e., the first-level output end Vout1; the drain of NM4 is connected to the input end Vin, and the gate of NM4 is connected to the current source output end Vgate; the positive end of C1 is connected to the current source output end Vgate, and the negative end of C1 is connected to the ground end GND; the drain of NM6 is connected to the current source output end Vgate.

[0023] NM5, PM5, and C3 form a secondary output circuit for use in low-voltage modules with periodic high-current loads such as oscillators and inverter buffers. NM5 is used for voltage resistance and protection. PM5 is a high-resistance tube that reduces the voltage drop under heavy load. C3 is used to improve the load capacity. The drain of NM5 is connected to the input terminal Vin, and the source of NM5 is connected to the secondary output terminal Vout2; the source of PM5 is connected to the secondary output terminal Vout2, and the drain of PM5 is connected to the ground terminal GND; the positive end of C3 is connected to the secondary output terminal Vout2, and the negative end of C3 is connected to the ground terminal GND.

[0024] In summary, the present invention uses a low-voltage tube to design a current source that is independent of the power supply to provide a bias current for the voltage stabilizer. Based on the energy gap reference structure, a stable 1.2V voltage with a low temperature coefficient is generated. The opposite characteristics of the triode and the resistor temperature coefficient are used to generate a voltage that changes little with temperature, and the 1.2V reference voltage constitutes the required output voltage Vout1, which is used by low-voltage modules with low current loads such as reference modules and current bias circuits. The secondary output voltage Vout2 is designed, and a large-capacitance capacitor C3 and a high-resistance tube PM5 are used to improve the load capacity, which is used by low-voltage modules with periodic large current loads such as oscillators and inverter buffers.

[0025] This circuit is often used in high-voltage power management chips to generate low-voltage power within the system to power low-voltage digital circuit modules and low-voltage analog circuit modules. The entire circuit uses only a small number of high-voltage devices to achieve the function of generating low-voltage power in a high-voltage circuit system.

[0026] The pre-voltage regulator circuit proposed in this paper is built using a 60V CMOS silicon process and verified by candence simulation. The pre-voltage regulator circuit proposed in this invention can operate between an input voltage of 3.5V and 60V. When the input voltage is less than 5.7V, the output voltage decreases with the input voltage; when the input voltage is greater than 5.7V, the output voltage can be stably maintained at 5V. Although the voltage regulation accuracy is poorer than that of LDO, it has a simple structure, low power consumption and low cost. Simulation shows that under different loads, the power supply voltage changes less than 400mV at full temperature and full process angle, and the power supply voltage drop is less than 200mV in the temperature range of -50°-125°. A 20mA load capacity can be provided within the full input range by selecting a larger size of load capacitor or voltage-resistant tube.

[0027] It should be noted that the above content only illustrates the technical idea of ​​the present invention and cannot be used to limit the protection scope of the present invention. For ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications all fall within the protection scope of the claims of the present invention.

Claims

1. A pre-regulator circuit with a wide input range, characterized in that: PM1, PM2, PM3, PM4, NM1, NM2, NM3, NM7, R5, and R6 form a current source that is independent of the power supply, providing bias current for NM6 and Q3, and bias voltage for the gates of NM4 and NM5; the gate and drain of PM1, the gate and drain of NM7 are interconnected and connected to the drain of NM1 and the gate of PM2; the source of PM1 and one end of R6 are connected to the input terminal Vin; the source of PM2 is connected to the other end of R6; the gate of NM 2, the gates of NM1 and NM3 are interconnected and connected to the source of NM7 and the drain of PM2, the sources of NM1 and NM2 are connected to one end of R5, and the other end of R5 is connected to the ground terminal GND; the source of NM3 is connected to one end of R5, the source of PM3 is connected to the input terminal Vin, the drain and gate of PM3 are interconnected and connected to the drain of NM3 and the gate of PM4; the source of PM4 is connected to the input terminal Vin, and the drain of PM4 serves as the current source output electrode Vgate; R1, R2, R3, Q1, Q2, Q3 form a bandgap reference basic structure circuit; one end of R1 is connected to the emitter of Q4 and one end of R2, the other end of R1 is connected to the collector of Q1 and the base of Q3, and the other end of R2 is connected to the collector and base of Q2; one end of R3 is connected to the ground terminal GND, and the other end of R3 is connected to the emitter of Q1; the base of Q1 is connected to the base and collector of Q2; the emitters of Q2 and Q3 are connected to the ground terminal GND; the collector of Q3 is connected to the source of NM6; Q4, Q5, Q6, R4, NM4, NM6, C1, C2 and the bandgap reference infrastructure circuit form a pre-regulated primary output circuit for use with low-voltage modules with low current loads; the base of Q4 is connected to the collector of Q4, the gate of NM6 and the emitter of Q5, the base of Q5 is connected to the collector of Q5 and the emitter of Q6, the base of Q6 is connected to the collector of Q6 and one end of R4, and the other end of R4 is connected to the source of NM4, the positive end of C2 and the gate of PM5, i.e., the primary output terminal Vout1; the drain of NM4 is connected to the input terminal Vin, and the gate of NM4 is connected to the current source output terminal Vgate; the positive end of C1 is connected to the current source output terminal Vgate, and the negative ends of C1 and C2 are connected to the ground terminal GND; the drain of NM6 is connected to the current source output terminal Vgate; NM5, PM5, and C3 form a secondary output circuit for use with a low-voltage module with a periodic high current load; the drain of NM5 is connected to the input terminal Vin, and the source of NM5 is connected to the secondary output terminal Vout2; the source of PM5 is connected to the secondary output terminal Vout2, and the drain of PM5 is connected to the ground terminal GND; the positive end of C3 is connected to the secondary output terminal Vout2, and the negative end of C3 is connected to the ground terminal GND; Among them, NM1, NM2, NM3, NM4, NM5, NM6, and NM7 are NMOS tubes, and NM4, NM5, and NM6 are high-voltage tubes; PM1, PM2, PM3, PM4, and PM5 are PMOS tubes, and PM3 and PM4 are high-voltage tubes; R1, R2, R3, R4, R5, and R6 are resistors; C1, C2, and C3 are capacitors, and Q1, Q2, Q3, Q4, Q5, and Q6 are transistors.

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