A server, a network-on-chip system, and a packet processing device and method

Abstract

The application discloses a server, a network-on-chip system and a message processing device and method, and is applied to the technical field of computers. The message processing device is arranged in the network-on-chip system, the network-on-chip system further comprises a scheduling device and N processor cores as N request nodes; the scheduling device is connected with the message processing device and the N request nodes respectively; the N request nodes are all provided with a cache; N is a positive integer; the message processing device comprises an address taking device, a directory control device, a message loading device, a message processing device and a message generating device, and forms a five-stage pipeline structure. According to the scheme, the message processing device provided with the five-stage pipeline structure can effectively improve the message processing efficiency between the multi-core processors, reduce the delay, and guarantee the cache consistency at the same time.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a server, a network-on-a-chip system, and a message processing device and method. Background Technology

[0002] With the continuous development of computer technology, multi-core processors have been widely used to improve the performance of computing systems. A multi-core processor integrates multiple processor cores on the same chip, enabling it to execute multiple tasks in parallel, effectively providing higher computing performance and throughput.

[0003] However, the introduction of multi-core processors has also brought a series of new challenges, one of which is the cache coherence problem. In multi-core processors, each processor core has its own cache. Since each processor core can independently modify the data in its cache, and these modifications may not be immediately reflected in the caches of other processor cores, data inconsistency occurs. There has been some research on cache coherence in multi-core processors, for example, through jointly customized cache coherence protocols such as ACE (Advanced Coherent Extensions) and MESI (Modified Exclusive-Shared-Invalid). These protocols define the communication and cooperation rules between the various processor cores in a multi-core processor to ensure cache coherence. However, current solutions suffer from low packet throughput and high packet processing latency.

[0004] In summary, how to effectively improve the message processing efficiency between multi-core processors, reduce latency, and ensure cache consistency is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a server, an on-chip network system, and a message processing device and method to effectively improve message processing efficiency among multi-core processors, reduce latency, and ensure cache consistency.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0007] In a first aspect, the present invention provides a message processing device, wherein the message processing device is disposed in an on-chip network system, the on-chip network system further comprising a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively; each of the N request nodes is provided with a cache; N is a positive integer, and the message processing device includes:

[0008] The address fetching device is used to load the message used in the read transaction or the write transaction when it receives the message used in the read transaction or the write transaction initiated by the requesting node through the scheduling device, and send the loaded message to the directory control device.

[0009] The directory control device is configured to, after receiving any message, record the address of the message in the address occupancy database when the message carries an address and the address of the message is not recorded in the address occupancy database of the directory control device; determine that the address of the message is occupied when the message carries an address and the address of the message is recorded in the address occupancy database; and delete the address of the message recorded in the address occupancy database to release the occupancy when the read transaction or write transaction corresponding to the message is completed.

[0010] A message loading device is used to receive the message sent by the directory control device, and when the address of the message is occupied, send the message back to the address fetching device; otherwise, send the message to the message processing device.

[0011] The message processing device is used to process the received messages based on preset processing rules for maintaining the consistency of the cache, and generate corresponding parameter information.

[0012] A message generation device is used to generate a message to be output based on the parameter information and output it to the corresponding requesting node through the scheduling device.

[0013] The addressing device, directory control device, message loading device, message processing device, and message generation device in the message processing equipment constitute a five-stage pipeline structure.

[0014] On the other hand, the catalog control device is also used for:

[0015] After receiving any of the aforementioned messages, when the message carries an address, the system retrieves the directory information corresponding to the address of the message from its own stored directory and sends it to the message processing device.

[0016] Maintain the directory; wherein the directory is a directory that records the data status of the multiple cached addresses in each of the request nodes;

[0017] The message processing device is specifically used for:

[0018] Based on preset processing rules for maintaining the consistency of the cache and the directory information sent by the directory control device, the received messages are processed to generate corresponding parameter information.

[0019] The directory update information in the parameter information is fed back to the directory control device so that the directory control device can maintain the directory based on the directory update information.

[0020] On the other hand, after receiving any of the aforementioned messages, when the message carries an address, retrieving directory information corresponding to the address of the message from its own stored directory and sending it to the message processing device includes:

[0021] After receiving any of the aforementioned messages, if the message carries an address, determine whether the address of the message exists in the directory where it is stored.

[0022] If it exists, the directory information corresponding to the address of the message is obtained from the directory and sent to the message processing device;

[0023] If it does not exist, then a directory message indicating that the address was not matched is sent to the message processing device.

[0024] On the other hand, maintaining the directory includes:

[0025] After receiving the directory update information, determine whether the address carried in the directory update information exists in the directory stored in the system.

[0026] If it exists, then based on the directory update information, update the content in the directory corresponding to the address carried in the directory update information;

[0027] If it does not exist, then determine whether the preset directory storage space for storing the directory is full;

[0028] If the directory is not full, the remaining space will be used to store the directory update information;

[0029] If the directory is full, the update information is stored by overwriting the existing data.

[0030] On the other hand, the message processing device also includes a first-in-first-out memory;

[0031] When the address of the message is occupied, sending the message back to the addressing device includes:

[0032] When the address of the message is occupied, the message is sent to the first-in-first-out (FIFO) memory so that the message can be sent back to the addressing device through the FIFO memory.

[0033] On the other hand, the address-fetching device is specifically used for:

[0034] When the scheduling device receives a message used in a read transaction or write transaction initiated by the requesting node, it loads the message used in the read transaction or the message used in the write transaction in order according to a preset priority rule, and sends the loaded message to the directory control device.

[0035] On the other hand, message types include request messages, response messages, listening messages, and data messages;

[0036] The priority rules used by the addressing device are as follows: the response message has the first priority, the data message has the second priority, the message sent by the directory control device has the third priority, and the request message has the fourth priority.

[0037] On the other hand, the directory control device is communicatively connected to the message generation device;

[0038] When the read or write transaction corresponding to the message is completed, the directory control device deletes the recorded address of the message to release it from occupancy, including:

[0039] When the read transaction or write transaction corresponding to the message is determined to be completed based on the release signal sent by the message generation device, the address of the message recorded in the address occupancy database is deleted to release the occupancy.

[0040] On the other hand, it also includes: a buffer output circuit connected to the message generation device;

[0041] The message generation device is specifically used for:

[0042] Generate the output message based on the parameter information;

[0043] Each message to be output is placed into the buffer output circuit, so that the buffer output circuit can be used to gradually output each message to the corresponding request node through the scheduling device.

[0044] On the other hand, it also includes: slave nodes connected to the memory and the scheduling device respectively, so as to realize communication with the message processing device through the scheduling device;

[0045] The message processing device is also used to: read and write memory through communication with the slave node during the process of processing read and write transactions initiated by each of the requesting nodes.

[0046] On the other hand, when processing a first read transaction pointing to a first address initiated by any of the requesting nodes, the message processing device is specifically used for:

[0047] Based on communication with the N requesting nodes, the latest data in the first address is fed back to the requesting node that initiated the first read transaction, and the data status corresponding to the first address in the cache of the requesting node is set to exclusive status, while the data status corresponding to the first address in the caches of the remaining requesting nodes is set to invalid status, and the memory is updated.

[0048] On the other hand, when processing a second read transaction pointing to a second address initiated by any of the requesting nodes, the message processing device is specifically used for:

[0049] Based on communication with the N requesting nodes, the latest data in the second address is fed back to the requesting node that initiated the second read transaction, the data state corresponding to the second address in the cache of each requesting node is maintained, and the memory is updated.

[0050] On the other hand, when processing a first write transaction to a third address initiated by any of the requesting nodes, the message processing device is specifically used for:

[0051] Based on communication with the N requesting nodes, the latest data is written to the third address of the cache of the requesting node that sent the first write transaction, and the data status corresponding to the third address in the cache of that requesting node is set to exclusive status, while the data status corresponding to the third address in the caches of the remaining requesting nodes is set to invalid status.

[0052] On the other hand, when processing a second write transaction pointing to a fourth address initiated by any of the requesting nodes, the message processing device is specifically used for:

[0053] Based on communication with the N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sent the second write transaction, and the data state corresponding to the fourth address in the cache of each requesting node is maintained.

[0054] Secondly, the present invention provides an on-chip network system, including the message processing device as described above, and further including a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively; each of the N request nodes is provided with a cache; N is a positive integer.

[0055] Thirdly, the present invention provides a server including the on-chip network system as described above.

[0056] Fourthly, the present invention provides a message processing method applied to a message processing device, wherein the message processing device is configured in a network-on-a-chip system, the network-on-a-chip system further includes a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively; each of the N request nodes is provided with a cache; N is a positive integer, and the message processing method includes:

[0057] When the addressing device receives a message used in a read transaction or write transaction initiated by the requesting node through the scheduling device, it loads the message used in the read transaction or the message used in the write transaction and sends the loaded message to the directory control device.

[0058] After receiving any message, the directory control device records the message's address in the address occupancy database when the message carries an address and the address of the message is not recorded in the address occupancy database; and determines that the message's address is occupied when the message carries an address and the address of the message is recorded in the address occupancy database. When the read transaction or write transaction corresponding to the message is completed, the address of the message recorded in the address occupancy database is deleted to release the occupancy.

[0059] The message loading device receives the message sent by the directory control device, and when the address of the message is occupied, it sends the message back to the address fetching device; otherwise, it sends the message to the message processing device.

[0060] The message processing device processes the received messages based on preset processing rules for maintaining the consistency of the cache, and generates corresponding parameter information.

[0061] The message generation device generates a message to be output based on the parameter information and outputs it to the corresponding requesting node through the scheduling device.

[0062] The addressing device, directory control device, message loading device, message processing device, and message generation device in the message processing equipment constitute a five-stage pipeline structure.

[0063] By applying the technical solution provided in this embodiment of the invention, a message processing device with a five-stage pipeline structure effectively improves message processing efficiency and ensures cache consistency. Specifically, each of the N processor cores can act as a request node, initiating read and write transactions. The scheduling device is connected to both the message processing device and the N request nodes, thereby enabling communication between the message processing device and the N request nodes.

[0064] The message processing device includes an address fetching unit, a directory control unit, a message loading unit, a message processing unit, and a message generation unit to process messages. Specifically, the address fetching unit loads messages used in read transactions and write transactions, and sends the loaded messages to the directory control unit. To avoid access conflicts, the directory control unit performs a conflict check after receiving any message. Specifically, when a message carries an address and the address occupancy database of the directory control unit does not record the message's address, it indicates that read / write operations can be performed on that address, and therefore, the message's address can be recorded in the address occupancy database. Correspondingly, when a message carries an address and the address occupancy database records the message's address, it is determined that the message's address is occupied. In this case, the message loading unit sends the message back to the address fetching unit; otherwise, the message can be sent to the message processing unit. Furthermore, when the read or write transaction corresponding to the message is completed, the message's address recorded in the address occupancy database can be deleted to release the occupancy. To ensure cache consistency, the message processing unit processes received messages based on preset processing rules for maintaining cache consistency, generating corresponding parameter information. Finally, the message generation unit generates the output message based on the parameter information and outputs it. It can be seen that these five devices in the message processing equipment work together effectively to process messages, and these five devices can work simultaneously, forming a five-stage pipeline structure, which effectively improves message throughput and reduces message processing latency.

[0065] In summary, the solution proposed in this application, by setting up a five-stage pipeline structure for message processing equipment, can effectively improve the message processing efficiency between multi-core processors, reduce latency, and at the same time ensure cache consistency. Attached Figure Description

[0066] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0067] Figure 1 This is a schematic diagram of the structure of an on-chip network system provided in a specific embodiment of the present invention;

[0068] Figure 2 This is a schematic diagram of the structure of a message processing device provided in a specific embodiment of the present invention;

[0069] Figure 3A schematic diagram of the structure of a message processing device provided in another specific embodiment of the present invention;

[0070] Figure 4 A schematic diagram of the structure of an on-chip network system provided in another specific embodiment of the present invention;

[0071] Figure 5 A schematic diagram of message transmission during the execution of a first read transaction, provided for a specific embodiment of the present invention;

[0072] Figure 6 A schematic diagram of message transmission during the execution of a second read transaction, provided as a specific embodiment of the present invention;

[0073] Figure 7 This is a flowchart illustrating the implementation of a message processing method according to a specific embodiment of the present invention. Detailed Implementation

[0074] The core of this invention is to provide a server, an on-chip network system, and a message processing device and method. By setting up a message processing device with a five-stage pipeline structure, the message processing efficiency between multi-core processors can be effectively improved, latency can be reduced, and cache consistency can be guaranteed at the same time.

[0075] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0076] Please refer to Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the structure of an on-chip network system provided in a specific embodiment of the present invention. Figure 2 This is a schematic diagram of the structure of a message processing device provided in a specific embodiment of the present invention.

[0077] The message processing device 30 of this application is located in an on-chip network system, which also includes a scheduling device 20 and N processor cores 10 as N request nodes; N is a positive integer, usually not less than 2. The scheduling device 20 is connected to the message processing device 30 and the N request nodes respectively to realize communication between the message processing device 30 and the N request nodes; each of the N processor cores 10 is equipped with a cache, that is, each of the N request nodes is equipped with a cache. In practical applications, cache consistency of each request node can be maintained by listening to requests and directory control.

[0078] The message processing device 30 is used to process read and write transactions initiated by each requesting node and to maintain the consistency of the caches of each requesting node. For example, in practical applications, the message processing device 30 of this application can be implemented based on devices such as FPGA (Field Programmable Gate Array).

[0079] Specifically, the message processing device 30 includes:

[0080] The address fetching device 31 is used to load the message used in the read transaction or the write transaction when it receives the message used in the read transaction or the write transaction initiated by the requesting node through the scheduling device 20, and send the loaded message to the directory control device 32.

[0081] The directory control device 32 is configured to, after receiving any message, record the address of the message in the address occupancy database when the message carries an address and the address of the message is not recorded in the address occupancy database of the directory control device 32; determine that the address of the message is occupied when the message carries an address and the address of the message is recorded in the address occupancy database; and delete the address of the message recorded in the address occupancy database to release the occupancy when the read transaction or write transaction corresponding to the message is completed.

[0082] The message loading device 33 is used to receive messages sent by the directory control device 32, and when the address of the message is occupied, it sends the message back to the address fetching device 31; otherwise, it sends the message to the message processing device 34.

[0083] The message processing device 34 is used to process the received messages based on preset processing rules for maintaining the consistency of the buffer, and generate corresponding parameter information.

[0084] The message generation device 35 is used to generate a message to be output based on parameter information and output it to the corresponding requesting node through the scheduling device 20.

[0085] The addressing device 31, directory control device 32, message loading device 33, message processing device 34, and message generation device 35 in the message processing device 30 constitute a five-stage pipeline structure.

[0086] Specifically, in Figure 1 The example shows 4 processor cores 10, i.e., N=4. Each processor core 10 can act as a request node, therefore... Figure 1 These four processor cores 10 can also be referred to as request node 1, request node 2, request node 3, and request node 4, respectively. The message processing device 30 is used as the master node, that is, the message processing device 30 of this application can be referred to as the master node.

[0087] Each processor core 10 has a cache and cache consistency can be achieved by listening to requests and controlling the directory.

[0088] The scheduling device 20 is connected to the message processing device 30 and N request nodes to enable communication between the message processing device 30 and the N request nodes. That is, messages sent by the message processing device 30, after reaching the scheduling device 20, can be forwarded by the scheduling device 20 to the designated request nodes. Similarly, messages sent by the request nodes, after reaching the scheduling device 20, can be forwarded by the scheduling device 20 to the message processing device 30. When the scheduling device 20 receives messages from multiple request nodes, it can sequentially send them to the message processing device 30 based on predefined scheduling rules. Specific scheduling rules can be set according to actual needs; for example, they can be simply set to send messages in the order of their reception time.

[0089] The message processing device 30 must not only be able to handle read and write transactions initiated by each requesting node, but also maintain the consistency of the cache of each requesting node. For example, in one scenario, the message processing device 30 can communicate with N requesting nodes to process messages according to the CHI protocol to ensure the consistency of the cache.

[0090] The CHI (Coherent Hub Interface) protocol offers high scalability and flexibility, making it suitable for high-performance multi-core processor systems. The message processing device 30 is responsible for managing cache line states, processing access requests, coordinating data transmission, and synchronization operations. Therefore, the design of the message processing device 30 determines the cache coherency management method and data access efficiency in the on-chip network system of a multi-core processor.

[0091] In response, the message processing device 30 designed in this application adopts a five-stage pipeline structure consisting of an address fetching device 31, a directory control device 32, a message loading device 33, a message processing device 34, and a message generation device 35, which effectively ensures message processing efficiency. In addition, the on-chip network system of this application also has good scalability and does not limit the number of requesting nodes. The scheduling device 20 can connect more requesting nodes according to actual needs, that is, it supports more processor cores 10, making the scalability and flexibility of the solution in this application very high.

[0092] The address fetching device 31 is used to load messages used in read transactions and write transactions, and sends the loaded messages to the directory control device 32. Taking a read transaction as an example, Figure 1All four processor cores can act as request nodes (RNs) to send read requests, and the addressing device 31 is responsible for processing request messages from any request node.

[0093] Regardless of the specific protocol used, the messages used in read and write transactions typically have multiple types and utilize different channels. For example, when using the CHI protocol, messages can be classified into four categories based on the channel: request messages (request channel), response messages (response channel), data messages (data channel), and listen messages (listen channel). (Further details will follow.) Figure 3 In the diagram, the input terminals of the addressing device 31 show the request channel, the response channel, and the data channel.

[0094] In one specific embodiment of the present invention, the address-finding device 31 can be specifically used for:

[0095] When the scheduling device 20 receives a message used in a read transaction or write transaction initiated by a requesting node, it processes the message used in the read transaction or write transaction, loads the message in order according to a preset priority rule, and sends the loaded message to the directory control device 32.

[0096] When the addressing device 31 loads messages used in read transactions and write transactions, a simple approach is to load them in the order they arrive. However, this approach takes into account that during the execution of a read transaction or a write transaction, multiple messages may be involved. Furthermore, the messages involved in the execution process may differ depending on the protocol used and the specific read / write type of the read / write transaction. The addressing device 31 may simultaneously receive messages belonging to different read / write transactions. Loading messages in the order they arrive may not achieve optimal message processing efficiency.

[0097] In this implementation, packets can be loaded in order according to a preset priority rule, which improves processing efficiency and ensures flexibility. Of course, the specific priority rule can be set and adjusted according to the specific protocol used and actual needs to achieve optimal packet processing efficiency. For example, in one scenario, considering that a certain processor core is set to carry important services, packets originating from that processor core can be processed first.

[0098] In one specific embodiment of the present invention, when the message types include request messages, response messages, listening messages and data messages, the priority rules used by the addressing device 31 are as follows: response messages have the first priority, data messages have the second priority, messages sent by the directory control device 32 have the third priority, and request messages have the fourth priority.

[0099] In this implementation, the response message has the highest priority, followed by data messages, then messages sent by the directory control device 32, and the lowest priority is the request message. As described above, multiple messages are involved in the execution of a read or write transaction, and the specific types of read / write transactions differ, resulting in different messages involved in the execution process. Read / write transactions typically begin with a request message and end with a response message. Therefore, this implementation sets the response message as the highest priority message and the request message as the lowest priority message. For example, in this implementation, if the addressing device 31 receives both a response message and a request message simultaneously, it can be understood that the transaction corresponding to the response message is in progress or about to end, while the transaction corresponding to the request message has just started. In other words, the transaction corresponding to the response message occurred first, and the transaction corresponding to the request message occurred later. Furthermore, since address conflicts need to be avoided when executing transactions, the transaction executed earlier will occupy the address. Therefore, in this example, the response message should be executed first.

[0100] The priority order of data packets and packets sent by the directory control device 32 can be set as needed. In this embodiment, considering that data packets usually appear near the end of the transaction execution process, the data packets are set to a higher second priority.

[0101] Each time the address fetching device 31 loads a message, it sends the loaded message to the directory control device 32. In order to avoid address conflicts, after receiving any message, the directory control device 32 needs to determine the address conflict situation when the message carries an address.

[0102] Specifically, the directory control device 32 stores the currently occupied addresses in an address occupancy database. Therefore, when a message carries an address and the address occupancy database of the directory control device 32 does not record the address of the message, it means that the address is not occupied. At this time, the address of the message needs to be recorded in the address occupancy database so that other transactions cannot read or write to the address before the transaction corresponding to the message is completed.

[0103] Correspondingly, when the message carries an address and the address occupancy database records the address of the message, it means that the address of the message is currently occupied, that is, an address conflict. At this time, the message will be sent back to the address retrieval device 31 by the message loading device 33.

[0104] Furthermore, it is understandable that when a read or write transaction corresponding to a certain message is completed, the address of that message recorded in the address occupancy database needs to be deleted in order to release the occupancy of that address.

[0105] It should also be noted that not all messages need to carry an address. For example, when using the CHI protocol mentioned above, only request messages carry an address, while other types of messages do not.

[0106] Regardless of whether the address is occupied, the directory control device 32 needs to send the message to the message loading device 33. Of course, the information on whether the address is occupied also needs to be sent to the message loading device 33. For example, in a specific case, the directory control device 32 uses the level state of the specially set address_busy pin to reflect whether there is an address conflict. If a message does not carry an address or the address it carries does not conflict with the address occupancy library, the level of the address_busy pin is pulled high. Correspondingly, if a message carries an address and conflicts with the address occupancy library, the level of the address_busy pin is pulled low.

[0107] After the directory control device 32 sends the message and the result of whether the address of the message is occupied to the message loading device 33, if the address of the message is occupied, the message loading device 33 will send the message back to the address fetching device 31. Otherwise, if the message does not carry an address or the address it carries is not occupied, the message needs to be sent to the message processing device 34.

[0108] In one specific embodiment of the present invention, see [reference needed]. Figure 3 The message processing device 30 also includes a first-in-first-out memory 36;

[0109] Accordingly, when the address of a message is occupied, the message is sent back to the address fetching device, specifically including:

[0110] When the address of the message is occupied, the message is sent to the first-in-first-out memory 36, so that the message can be sent back to the address fetching device 31 through the first-in-first-out memory 36.

[0111] In this embodiment, considering that in situations with high concurrency, there may be a large number of messages that need to be sent back to the addressing device 31 by the message loading device 33, in order to avoid the accumulation of messages affecting the operation of the message loading device 33 or the addressing device 31, a first-in-first-out (FIFO) memory 36 is provided in the message processing device 30 in this embodiment to implement temporary storage of messages. Since it is a FIFO memory 36, it can be understood that the messages that are first put into the FIFO memory 36 will be retrieved first.

[0112] Because the first-in-first-out memory 36 is provided in this embodiment, the message loading device 33 can send messages to the first-in-first-out memory 36, which can cope with the possible large accumulation of messages without affecting the normal operation of the message loading device 33 and the addressing device 31.

[0113] After receiving a message, the message processing device 34 can process it. This processing is based on preset rules for maintaining cache consistency. Of course, the generated parameter information will differ depending on the protocol used and the specific message type being processed. For example, after processing a request message, the generated parameter information may include protocol-defined fields, the current transaction processing status, the input field opcode, the number of nodes to be monitored in this output message, and so on.

[0114] In one specific embodiment of the present invention, the directory control device 32 is communicatively connected to the message generation device 35;

[0115] When the read or write transaction corresponding to the message is completed, the directory control device 32 deletes the recorded address of the message to release it from occupancy, specifically including:

[0116] When the read or write transaction corresponding to the message is determined to be completed based on the release signal sent by the message generation device 35, the address of the message recorded in the address occupancy database is deleted to release the occupancy.

[0117] As described above, when a read or write transaction corresponding to a message is completed, the directory control device 32 needs to delete the address of that message recorded in the address occupancy database to release the occupancy of that address. This implementation takes into account that, in practice, the message generation device 35 can inform the directory control device 32 of this situation.

[0118] Specifically, the directory control device 32 is communicatively connected to the message generation device 35. When a read or write transaction corresponding to a message is completed, the message generation device 35 can send a release signal to the directory control device 32. The directory control device 32 can then determine, based on the release signal, which address needs to be released, that is, which address should be deleted from the address occupancy database.

[0119] In one specific embodiment of the present invention, the catalog control device 32 is further configured to:

[0120] After receiving any message, when the message carries an address, the system retrieves the directory information corresponding to the address of the message from its own stored directory and sends it to the message loading device 33.

[0121] Maintain the directory; the directory is a record of the data status of multiple cached addresses in each request node;

[0122] Message processing device 34 is specifically used for:

[0123] Based on preset processing rules for maintaining cache consistency and directory information sent by directory control device 32, the received messages are processed to generate corresponding parameter information.

[0124] The directory update information in the parameter information is fed back to the directory control device 32, so that the directory control device 32 can maintain the directory based on the directory update information.

[0125] As described above, the message processing device 34 needs to process the received messages based on preset processing rules for maintaining cache consistency. This implementation takes into account that, while maintaining cache consistency, when executing a read / write transaction for a certain request node, it is often necessary to monitor the cache data status of other nodes. In this regard, in this implementation, the directory control device 32 maintains a directory that records the data status of multiple cached addresses in each request node, which is beneficial to further improve transaction execution efficiency.

[0126] Specifically, the directory maintained by the directory control device 32 can typically be in the form of a table, with each row corresponding to an address. For example, the content of a certain row in the table is: Address A, Request Node 1 - I state, Request Node 2 - I state, Request Node 3 - SD state. This means that for cached address A, the data state in the cache of Request Node 1 at this address is I state, i.e. invalid state; the data state in the cache of Request Node 2 at this address is also I state, i.e. invalid state; and the data state in the cache of Request Node 3 at this address is SD state, i.e. dirty state. This indicates that for cached address A, the latest data is in the cache of Request Node 3.

[0127] For example, in one scenario, request node 1 sends a request message specifically requesting data to be read from address A. As indicated by the aforementioned directory, the latest data for address A is in request node 3. Therefore, only a listening message needs to be generated and sent to request node 3; there's no need to listen to request node 2. However, if no directory is set or the directory is not found, the message processing device 30 will not know the data status of address A cached by request nodes 2 and 3. Therefore, it needs to generate listening messages and send them to request nodes 2 and 3 respectively. It can be seen that the former scenario is more conducive to ensuring transaction execution efficiency compared to the latter.

[0128] Furthermore, it is understandable that, due to the limited storage space of the directory control device 32, i.e., the limited capacity of the directory, it may not be possible to record the data status of every cached address in each request node. Of course, if the capacity allows, the data status of every cached address in each request node can be recorded, thus preventing directory misses.

[0129] After receiving any message, if the message carries an address, it indicates that it is a request type message. Therefore, the directory control device 32 can obtain the directory information corresponding to the address of the message from its own stored directory and send it to the message processing device 34, so that the message processing device 34 can process the message using the obtained directory information.

[0130] Furthermore, it is understood that since the directory control device 32 in this implementation has a directory, if the parameter information obtained by the message processing device 34 contains directory update information, the directory update information needs to be fed back to the directory control device 32 so that the directory control device 32 can maintain the directory based on the directory update information. For example, after executing a message, if the data status of each request node corresponding to the cached address A in the above example changes, this directory update information needs to be fed back to the directory control device 32.

[0131] Furthermore, in one specific embodiment of the present invention, after receiving any message, the directory control device 32, when the message carries an address, retrieves the directory information corresponding to the address of the message from its own stored directory and sends it to the message processing device 34, specifically including:

[0132] After receiving any message, if the message carries an address, check if the address of the message exists in its own storage directory;

[0133] If it exists, the directory information corresponding to the address of the message is retrieved from the directory and sent to the message processing device 34;

[0134] If it does not exist, a directory message indicating that the address was not matched is sent to the message processing device 34.

[0135] This implementation takes into account that, when sending directory information, the directory control device 32 has limited storage space and may not be able to record the data status of every cached address in each request node. Therefore, for a message carrying an address, if the address of the message exists in the directory stored by the directory control device 32, the directory information corresponding to the address of the message can be obtained from the directory and sent to the message processing device 34. If it does not exist, it means that the address has not been matched with the directory. Therefore, in this implementation, directory information indicating that the address has not been matched is sent to the message processing device 34 so that the message processing device 34 can clearly understand that the current directory has not been matched. In addition, in some implementations, if the address has not matched the directory, it is also possible to choose not to output any directory information, which can be set according to actual needs.

[0136] In one specific embodiment of the present invention, the directory control device 32 performs directory maintenance, which may specifically include:

[0137] After receiving directory update information, determine whether the address carried in the directory update information exists in the directory stored in the system.

[0138] If it exists, then based on the directory update information, update the content in the directory corresponding to the address carried in the directory update information;

[0139] If it does not exist, then check if the preset directory storage space for storing directories is full;

[0140] If the space is not full, the remaining space will be used to store directory update information;

[0141] If the directory is full, the update information is stored by overwriting the data.

[0142] The directory update information carries an address. In this implementation, after receiving the directory update information, it can determine whether the address carried in the directory update information exists in its own stored directory. If it exists, it means that the address hits the directory. That is, the directory records the data state corresponding to this address in each request node. Therefore, after obtaining the directory update information, it is necessary to update the data state of each request node corresponding to this address in the directory according to the directory update information. For example, in one case, the request node 1-I state in address A in the example above is updated to the request node 1-SD state.

[0143] If the address carried in the directory update information does not exist in the directory, it is necessary to determine whether the directory storage space is full. Understandably, if it is not full, the remaining space can be used to store the directory update information; that is, the directory update information can be written to the directory. If it is full, the directory update information needs to be stored by overwriting data. For example, in the example above, the directory is stored in a table format, which can store 1000 rows of content. Each row includes one address and the cached data status of each request node at that address. Therefore, one row can be deleted, and the directory update information can be stored in it. Furthermore, it is understandable that deletion can be performed on rows that have not been used for a long time.

[0144] In one specific embodiment of the present invention, it may further include: a buffer output circuit 37 connected to the message generation device 35;

[0145] Accordingly, the message generation device 35 is specifically used for:

[0146] Generate the output message based on the parameter information;

[0147] Each message to be output is placed into the buffer output circuit 37, so that each message to be output can be gradually output to the corresponding request node through the scheduling device 20 using the buffer output circuit 37.

[0148] See also Figure 3 ,exist Figure 3In this example, the message generation device 35 can output messages of corresponding types through request channels, data channels, response channels, and listening channels. This implementation considers that the message generation device 35 often generates multiple messages to be output simultaneously. If these messages were output one by one by the message generation device 35, it would be unable to process the new parameter information sent by the message processing device 34, causing the pipeline to stall. Therefore, in this implementation, the messages to be output generated by the message processing device 34 can be directly placed into the buffer output circuit 37, and then the buffer output circuit 37 can gradually output each message to be output without affecting the operation of the message generation device 35. This allows the five-stage pipeline structure of this application to operate continuously. Furthermore, it can be understood that the buffer output circuit 37 can gradually output each buffered message to be output according to a first-in, first-out (FIFO) rule.

[0149] To facilitate understanding of the five-stage pipeline structure consisting of the address fetching device 31, directory control device 32, message loading device 33, message processing device 34, and message generation device 35 in the message processing device 30, the following explanation will take a request message sent by a requesting node as an example.

[0150] In the first clock cycle, the message loading device 33 loads the REQ message (request message) and sends it to the directory control device 32. In the second clock cycle, the directory control device 32 determines whether the address for the request message is occupied. If the result is that the address is not occupied, the directory control device 32 sends the request message and the determination result to the message loading device 33. In the third clock cycle, the message loading device 33 sends the request message to the message processing device 34. In the fourth clock cycle, the message processing device 34 processes the request message. For example, based on whether the directory is hit, it determines that listening requests need to be sent to several corresponding request nodes and generates corresponding parameter information. The parameter information may include the opcode (type) of the listening request to be sent, the number of request nodes to be listened to, the ID of each request node to be listened to, the ID of the message processing device 30, the ID of the request message, the current transaction status of the request message, the opcode (type) of the request message, etc. In the fifth clock cycle, the message generation device 35 generates the message to be output and sends it to the buffer output circuit 37.

[0151] Let's take the example of a requesting node sending a response message to illustrate this further.

[0152] In the first clock cycle, the message loading device 33 loads the RSP message (response message) and sends it to the directory control device 32. In the second clock cycle, since the response message does not require address determination, the directory control device 32 sends the response message to the message loading device 33. In the third clock cycle, the message loading device 33 sends the response message to the message processing device 34. In the fourth clock cycle, the message processing device 34 processes the response message. For example, in a specific example, it determines whether the response message needs processing based on its opcode, and then generates corresponding parameter information. The parameter information may include, for example, the corresponding transaction information extracted from the response message, the update information of the number of request nodes to be monitored, the data status information of the monitored request nodes cached at the corresponding address, etc. In the fifth clock cycle, the message generation device 35 generates the message to be output and sends it to the cache output circuit 37. For example, in one scenario, in the fifth clock cycle, the message generation device 35 may also send a release signal to release the corresponding address from occupation.

[0153] Let's take the example of a request node sending a data packet to illustrate this further.

[0154] In the first clock cycle, the message loading device 33 loads the data message and sends it to the directory control device 32. In the second clock cycle, since the data message does not require address determination, the directory control device 32 sends the data message to the message loading device 33. In the third clock cycle, the message loading device 33 sends the data message to the message processing device 34. In the fourth clock cycle, the message processing device 34 processes the data message, for example, processing it according to protocol requirements and generating corresponding parameter information. If dirty data is written back, a write request needs to be initiated to memory. The parameter information may include, for example, the corresponding transaction information extracted from the data message, the update information of the number of request nodes to be monitored, the data status information of the cached request nodes at the corresponding addresses, etc. In the fifth clock cycle, the message generation device 35 generates the message to be output and sends it to the cache output circuit 37. For example, in one scenario, in the fifth clock cycle, the message generation device 35 can also send a release signal to release the corresponding address from occupation.

[0155] In one specific embodiment of the present invention, see [reference needed]. Figure 4 It may also include: a slave node 40 connected to the memory and the scheduling device 20 respectively, so as to communicate with the message processing device 30 through the scheduling device 20;

[0156] The message processing device 30 is also used to: read and write memory through communication with the slave node 40 during the process of processing read and write transactions initiated by each requesting node.

[0157] This implementation takes into account that the solution of this application can ensure the consistency of the cache of each request node. However, in some implementations, when the data in the cache is updated, the relevant data needs to be written to memory.

[0158] In this embodiment, a slave node 40 is also provided, which is connected to both the memory and the scheduling device 20. The slave node 40 can communicate with the message processing device 30 through the scheduling device 20, which is equivalent to realizing communication between the message processing device 30 and the memory.

[0159] Therefore, in this embodiment, during the process of processing read and write transactions, the message processing device 30 can perform read or write operations on the memory according to actual needs through communication with the slave node 40.

[0160] Furthermore, in one specific embodiment of the present invention, when processing a first read transaction initiated by any requesting node pointing to a first address, the message processing device 30 is specifically used for:

[0161] Based on communication with N requesting nodes, the latest data in the first address is fed back to the requesting node that initiated the first read transaction, and the data status corresponding to the first address in the cache of that requesting node is set to exclusive status, while the data status corresponding to the first address in the caches of the remaining requesting nodes is set to invalid status, and the data in the memory is updated.

[0162] For ease of understanding Figure 5 For example, in this implementation method, it is by Figure 5 The first read transaction initiated by request node 1, pointing to the first address, means that request node 1 needs to read the data in the cached first address, and after reading, it needs to switch to exclusively owning the data.

[0163] In this embodiment, the message processing device 30, based on communication with N requesting nodes, can feed back the latest data at the first address to the requesting node that initiated the first read transaction, and set the data status corresponding to the first address in the cache of that requesting node to an exclusive state. Since this data content is exclusively occupied by requesting node 1, the data status corresponding to the first address in the caches of the other requesting nodes is set to an invalid state, and the memory needs to be updated.

[0164] For this type of read transaction, Figure 5In the example, requesting node 1 sends a ReadUnique (read and exclusive) request message to message processing device 30. For instance, it hits a directory, and the directory shows that for the first address, requesting node 2 is in the SC state and requesting node 3 is in the SD state, indicating that the latest data is stored in requesting node 3. Message processing device 30 needs to send listening messages (listening channel) to both requesting node 2 and requesting node 3. After receiving the listening message, requesting node 2 changes the state of the data corresponding to the first address in its own cache from the SC state to the invalid state (I state) and replies with a response message. After receiving the listening message, requesting node 3 changes the state of the data corresponding to the first address in its own cache from the SD state to the invalid state (I state) and replies with a data message containing the data that requesting node 1 needs to read.

[0165] After receiving feedback from requesting nodes 2 and 3, message processing device 30 can send a data packet to requesting node 1, which initiated the first read transaction. Since there is dirty data written back, it needs to send a request packet to slave node 40. After slave node 40 responds with a response packet indicating that data can be sent, message processing device 30 sends a data packet to slave node 40 to write the data into memory. Finally, after receiving the data packet from message processing device 30, requesting node 1 can store the corresponding data in its own cache at the first address, change the data state corresponding to the first address in its cache from the I state to the U state (exclusive state), and send a response packet to message processing device 30 to indicate the end of the first read transaction.

[0166] In one specific embodiment of the present invention, when processing a second read transaction pointing to a second address initiated by any requesting node, the message processing device 30 is specifically used for:

[0167] Based on communication with N requesting nodes, the latest data in the second address is fed back to the requesting node that initiated the second read transaction, the data state corresponding to the second address in the cache of each requesting node is maintained, and the data in memory is updated.

[0168] For ease of understanding Figure 6 For example, in this implementation method, it is by Figure 6 The second read transaction initiated by request node 1, pointing to the second address, means that request node 1 needs to read the data in the cached second address, but does not make any data status adjustments after reading.

[0169] In this embodiment, the message processing device 30, based on communication with N requesting nodes, can feed back the latest data in the second address to the requesting node that initiated the second read transaction, maintain the data state corresponding to the second address in the cache of each requesting node, and update the data in the memory.

[0170] For this type of read transaction, Figure 6 In the example, requesting node 1 sends a ReadOnce type (read-only) request message to message processing device 30. For example, if a directory is hit and the directory shows a second address, requesting node 3 is in the I state and requesting node 2 is in the SD state, indicating that the latest data is stored in requesting node 2. In this example, no data state adjustment is required, and since the latest data is stored in requesting node 2, message processing device 30 only needs to send a listening message to requesting node 2. After receiving this message, requesting node 2 will reply with a data message containing the data that requesting node 1 needs to read.

[0171] After receiving feedback from the requesting node, message processing device 30 can send a data packet to requesting node 1, which initiated the second read transaction. Because there is dirty data written back, it needs to send a request packet to slave node 40. After slave node 40 responds with a response packet indicating that data can be sent, message processing device 30 sends a data packet to slave node 40 to write the corresponding data into memory. Finally, after receiving the data packet, requesting node 1 can obtain the required data, without adjusting the data status corresponding to the second address in requesting node 1's cache. Figure 6 In the example, it is still in state I. And the requesting node 1 will send a response message to message processing device 30 to indicate that the second read transaction has ended.

[0172] In one specific embodiment of the present invention, when processing a first write transaction initiated by any requesting node pointing to a third address, the message processing device 30 is specifically used for:

[0173] Based on communication with N requesting nodes, the latest data is written to the third address of the cache of the requesting node that sent the first write transaction, and the data status corresponding to the third address in the cache of that requesting node is set to exclusive status, while the data status corresponding to the third address in the caches of the remaining requesting nodes is set to invalid status.

[0174] In this embodiment, based on communication with N requesting nodes, the message processing device 30 can write the latest data to the third address of the cache of the requesting node that sent the first write transaction, and set the data status of the data corresponding to the third address in the cache of the requesting node to an exclusive state. Since it is exclusively occupied by the requesting node, it is necessary to set the data status of the data corresponding to the third address in the caches of the other requesting nodes to an invalid state.

[0175] For this type of write transaction, for example, in one scenario, requesting node 1 sends a WriteUnique (write and exclusive) request message to message processing device 30. Message processing device 30 requires all other requesting nodes to send listening messages so that all other requesting nodes set the data state corresponding to the third address in their own cache to the 'I' state and reply with response messages to message processing device 30. After receiving feedback from all requesting nodes, message processing device 30 can send a response message to requesting node 1, which initiated the first write transaction. Requesting node 1 can then send the data to be written to message processing device 30 in the form of a data packet. Subsequently, message processing device 30 will write the latest data to the third address in requesting node 1's cache and set the data state corresponding to the third address in requesting node 1's cache to the exclusive state. In addition, in some embodiments, the latest data can also be written to memory.

[0176] In one specific embodiment of the present invention, when processing a second write transaction pointing to a fourth address initiated by any requesting node, the message processing device 30 is specifically used for:

[0177] Based on communication with N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sent the second write transaction, and the data state corresponding to the fourth address in the cache of each requesting node is maintained.

[0178] In this implementation, the message processing device 30, based on communication with N requesting nodes, can write the latest data to the fourth address of the cache of the requesting node sending the second write transaction, and maintain the data state corresponding to the fourth address in the caches of each requesting node. It is understood that, because it is necessary to maintain the data state corresponding to the fourth address in the caches of each requesting node, this type of write transaction can only be initiated by requesting nodes in U-state or SD-state. Furthermore, it is understood that for this type of write transaction, the message processing device 30 does not need to listen to other requesting nodes during execution. In some implementations, the latest data can also be written to memory.

[0179] As described above, after receiving a message, the message processing device 34 can process the received message. It needs to process the message based on preset processing rules for maintaining the consistency of the cache. When different protocols are used and different message types are processed, the parameter information generated after processing will be different accordingly.

[0180] In one specific embodiment of the present invention, after receiving a request message, the message processing device 34 can record some parameter information based on the table entries, which facilitates the management of parameter information and the updating of related parameters.

[0181] Please refer to Table 1, which is a schematic table of table entries generated in one specific implementation method.

[0182] Table 1:

[0183]

[0184] The transaction status, also known as the status of a read or write transaction, can occupy 1 bit and be located in the 0th position of the entry. For example, this bit may remain 1 during the transaction and return to 0 upon completion of the transaction.

[0185] The first to seventh bits indicate the transaction type, such as the different types of read / write transactions exemplified above. It is understood that other types of read / write transactions may also exist in other specific implementations.

[0186] Bits 8 and 9 indicate the number of request nodes that need to be monitored, up to a maximum of 4. In other implementations, if there are more than 4 processor cores, this item will require more bits.

[0187] Bits 11 to 18 represent the data status of the address corresponding to the request message in the cache of each request node. Two bits can be used to represent the data status of the address corresponding to the request message in the cache of one request node. Bits 11 to 18 correspond to request node 1 to request node 4, respectively.

[0188] Bits 19 to 55 represent the address, which is the cache address pointed to by the read / write transaction, i.e., the address carried in the request message. If other transactions need to operate on this address, they cannot operate on this address before this transaction ends.

[0189] By applying the technical solution provided in the embodiments of the present invention, the message processing efficiency is effectively improved and the consistency of the cache is guaranteed through the five-stage pipeline structure of the message processing device 30.

[0190] Specifically, each of the N processor cores can act as a request node, initiating read and write transactions. The scheduling device 20 is connected to the message processing device 30 and the N request nodes, respectively, thereby realizing communication between the message processing device 30 and the N request nodes.

[0191] The message processing device 30 includes an address fetching device 31, a directory control device 32, a message loading device 33, a message processing device 34, and a message generation device 35 to process messages. Specifically, the address fetching device 31 can load messages used in read transactions and messages used in write transactions, and send the loaded messages to the directory control device 32. To avoid access conflicts, the directory control device 32 will perform conflict judgment after receiving any message. Specifically, when the message carries an address and the address occupancy database of the directory control device 32 does not record the address of the message, it means that read / write operations can be performed on that address. Therefore, the address of the message can be recorded in the address occupancy database. Correspondingly, when the message carries an address and the address occupancy database records the address of the message, it is determined that the address of the message is occupied. In this case of occupancy, the message loading device 33 will send the message back to the address fetching device 31. If it is not occupied, the message can be sent to the message processing device 34. Furthermore, when the read or write transaction corresponding to a message is completed, the address of the message recorded in the address occupancy database can be deleted to release the occupancy. To ensure cache consistency, the message processing device 34 processes the received messages based on preset processing rules for maintaining cache consistency, generates corresponding parameter information, and finally, the message generation device 35 generates the message to be output based on the parameter information and outputs it. It can be seen that the five devices in the message processing device 30 work together to effectively process messages, and these five devices can work simultaneously, forming a five-stage pipeline structure, which can effectively improve message throughput and reduce message processing latency.

[0192] In summary, the solution of this application, by setting up a five-stage pipeline structure for the message processing device 30, can effectively improve the message processing efficiency between multi-core processors, reduce latency, and at the same time ensure cache consistency.

[0193] Corresponding to the above embodiment of the message processing device 30, this embodiment of the invention also provides an on-chip network system, which may include the message processing device 30 as in any of the above embodiments, and further include a scheduling device 20 and N processor cores 10 as N request nodes; the scheduling device 20 is connected to the message processing device 30 and the N request nodes respectively; each of the N request nodes is provided with a cache; N is a positive integer.

[0194] Corresponding to the above embodiments of the message processing device 30 and the on-chip network system, this embodiment of the invention also provides a server, which may include the on-chip network system as described in any of the above embodiments. Reference can be made in correspondence with the above text.

[0195] Corresponding to the above embodiment of the message processing device 30, this embodiment of the invention also provides a message processing method, which can be applied to the processing device 30, as detailed below. Figure 7 This includes the following steps:

[0196] Step S701: When the address fetching device receives a message used in a read transaction or write transaction initiated by a requesting node through the scheduling device, it loads the message used in the read transaction or write transaction and sends the loaded message to the directory control device.

[0197] Step S702: After receiving any message, the directory control device records the message's address in the address occupancy database when the message carries an address and the address occupancy database does not contain the message's address. When the message carries an address and the address occupancy database contains the message's address, it determines that the message's address is occupied. When the read or write transaction corresponding to the message is completed, the address of the message recorded in the address occupancy database is deleted to release the occupancy.

[0198] Step S703: The message loading device receives the message sent by the directory control device, and when the address of the message is occupied, it sends the message back to the address fetching device; otherwise, it sends the message to the message processing device.

[0199] Step S704: The message processing device processes the received message based on preset processing rules for maintaining buffer consistency and generates corresponding parameter information.

[0200] Step S705: The message generation device generates a message to be output based on the parameter information and outputs it to the corresponding requesting node through the scheduling device;

[0201] The message processing unit consists of an address fetching device, a directory control device, a message loading device, a message processing device, and a message generation device, forming a five-stage pipeline structure.

[0202] In one specific embodiment of the present invention, it further includes:

[0203] After receiving any message, when the message carries an address, the directory control device retrieves the directory information corresponding to the address of the message from its own stored directory and sends it to the message processing device.

[0204] The directory control device maintains the directory; the directory is a directory that records the data status of multiple cached addresses in each request node.

[0205] Step S704 specifically includes:

[0206] The message processing device processes the received messages based on preset processing rules for maintaining cache consistency and directory information sent by the directory control device, and generates corresponding parameter information.

[0207] The message processing device feeds back the directory update information from the parameter information to the directory control device, so that the directory control device can maintain the directory based on the directory update information.

[0208] In one specific embodiment of the present invention, after receiving any message, the directory control device, when the message carries an address, retrieves the directory information corresponding to the address of the message from its own stored directory and sends it to the message processing device, including:

[0209] After receiving any message, the directory control device determines whether the address of the message exists in its own stored directory when the message carries an address.

[0210] If it exists, retrieve the directory information corresponding to the address of the message from the directory and send it to the message processing device;

[0211] If it does not exist, a directory message indicating that the address was not matched is sent to the message processing device.

[0212] In one specific embodiment of the present invention, the directory control device performs directory maintenance, including:

[0213] After receiving directory update information, the directory control device determines whether the address carried in the directory update information exists in its own stored directory.

[0214] If it exists, then based on the directory update information, update the content in the directory corresponding to the address carried in the directory update information;

[0215] If it does not exist, then check if the preset directory storage space for storing directories is full;

[0216] If the space is not full, the remaining space will be used to store directory update information;

[0217] If the directory is full, the update information is stored by overwriting the data.

[0218] In one specific embodiment of the present invention, the message processing device further includes a first-in-first-out memory;

[0219] Step S703, which describes sending the message back to the address fetching device when the address of the message is occupied, may specifically include:

[0220] When the address of a message is occupied, the message is sent to the first-in-first-out (FIFO) memory so that the message can be sent back to the address fetching device via the FIFO memory.

[0221] In one specific embodiment of the present invention, step S701 specifically includes:

[0222] When the scheduling device receives a message used in a read transaction or write transaction initiated by a requesting node, it loads the messages used in the read transaction or write transaction in order according to a preset priority rule and sends the loaded messages to the directory control device.

[0223] In one specific embodiment of the present invention, the message types include request messages, response messages, listening messages, and data messages;

[0224] The priority rules used by the addressing device are as follows: response messages are the first priority, data messages are the second priority, messages sent by the directory control device are the third priority, and request messages are the fourth priority.

[0225] In one specific embodiment of the present invention, the directory control device is communicatively connected to the message generation device;

[0226] Step S702 describes the process where, when the read or write transaction corresponding to the message is completed, the directory control device deletes the recorded message address to release it from occupancy, including:

[0227] When the read or write transaction corresponding to the message is determined to be completed based on the release signal sent by the message generation device, the address of the message recorded in the address occupancy database is deleted to release the occupancy.

[0228] In one specific embodiment of the present invention, it further includes: a buffer output circuit connected to the message generation device;

[0229] Step S705 specifically includes:

[0230] The message generation device generates the message to be output based on parameter information;

[0231] The message generation device places each message to be output into the buffer output circuit, so that the buffer output circuit can gradually output each message to be output to the corresponding requesting node through the scheduling device.

[0232] In one specific embodiment of the present invention, it further includes: a slave node connected to the memory and the scheduling device respectively, so as to realize communication with the message processing device through the scheduling device;

[0233] The message processing method also includes: during the process of processing read and write transactions initiated by each requesting node, the message processing device reads and writes memory through communication with the slave node.

[0234] In one specific embodiment of the present invention, when the message processing device processes a first read transaction initiated by any requesting node pointing to a first address, it specifically includes:

[0235] Based on communication with N requesting nodes, the latest data in the first address is fed back to the requesting node that initiated the first read transaction, and the data status corresponding to the first address in the cache of that requesting node is set to exclusive status, while the data status corresponding to the first address in the caches of the remaining requesting nodes is set to invalid status, and the data in the memory is updated.

[0236] In one specific embodiment of the present invention, when the message processing device processes a second read transaction initiated by any requesting node pointing to a second address, it specifically includes:

[0237] Based on communication with N requesting nodes, the latest data in the second address is fed back to the requesting node that initiated the second read transaction, the data state corresponding to the second address in the cache of each requesting node is maintained, and the data in memory is updated.

[0238] In one specific embodiment of the present invention, when the message processing device processes a first write transaction initiated by any requesting node pointing to a third address, it specifically includes:

[0239] Based on communication with N requesting nodes, the latest data is written to the third address of the cache of the requesting node that sent the first write transaction, and the data status corresponding to the third address in the cache of that requesting node is set to exclusive status, while the data status corresponding to the third address in the caches of the remaining requesting nodes is set to invalid status.

[0240] In one specific embodiment of the present invention, when the message processing device processes a second write transaction initiated by any requesting node pointing to a fourth address, it specifically includes:

[0241] Based on communication with N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sent the second write transaction, and the data state corresponding to the fourth address in the cache of each requesting node is maintained.

[0242] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0243] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this invention. Specific examples have been used herein to illustrate the principles and implementation methods of the invention; the description of the above embodiments is only for the purpose of helping to understand the technical solution and core ideas of the invention. It should be noted that those skilled in the art can make several improvements and modifications to the invention without departing from the principles of the invention, and these improvements and modifications also fall within the protection scope of the invention.

Claims

1. A message processing device, characterized in that, The message processing device is located in an on-chip network system, which also includes a scheduling device and N processor cores serving as N request nodes; the scheduling device is connected to the message processing device and the N request nodes respectively. All N request nodes are configured with a cache; N is a positive integer, and the message processing device includes: The address fetching device is used to load the message used in the read transaction or the write transaction when it receives the message used in the read transaction or the write transaction initiated by the requesting node through the scheduling device, and send the loaded message to the directory control device. The directory control device is configured to, after receiving any message, record the address of the message in the address occupancy database when the message carries an address and the address of the message is not recorded in the address occupancy database of the directory control device; determine that the address of the message is occupied when the message carries an address and the address of the message is recorded in the address occupancy database; and delete the address of the message recorded in the address occupancy database to release the occupancy when the read transaction or write transaction corresponding to the message is completed. A message loading device is used to receive the message sent by the directory control device, and when the address of the message is occupied, send the message back to the address fetching device; otherwise, send the message to the message processing device. The message processing device is used to process the received messages based on preset processing rules for maintaining the consistency of the cache, and generate corresponding parameter information. A message generation device is used to generate a message to be output based on the parameter information and output it to the corresponding requesting node through the scheduling device. The addressing device, directory control device, message loading device, message processing device, and message generation device in the message processing equipment constitute a five-stage pipeline structure.

2. The message processing device according to claim 1, characterized in that, The catalog control device is also used for: After receiving any of the aforementioned messages, when the message carries an address, the system retrieves the directory information corresponding to the address of the message from its own stored directory and sends it to the message processing device. Maintain the directory; wherein the directory is a directory that records the data status of the multiple cached addresses in each of the request nodes; The message processing device is specifically used for: Based on preset processing rules for maintaining the consistency of the cache and the directory information sent by the directory control device, the received messages are processed to generate corresponding parameter information. The directory update information in the parameter information is fed back to the directory control device so that the directory control device can maintain the directory based on the directory update information.

3. The message processing device according to claim 2, characterized in that, After receiving any of the aforementioned messages, when the message carries an address, retrieving the directory information corresponding to the address of the message from its own stored directory and sending it to the message processing device, including: After receiving any of the aforementioned messages, if the message carries an address, determine whether the address of the message exists in the directory where it is stored. If it exists, the directory information corresponding to the address of the message is obtained from the directory and sent to the message processing device; If it does not exist, then a directory message indicating that the address was not matched is sent to the message processing device.

4. The message processing device according to claim 2, characterized in that, Maintaining the directory includes: After receiving the directory update information, determine whether the address carried in the directory update information exists in the directory stored in the system. If it exists, then based on the directory update information, update the content in the directory corresponding to the address carried in the directory update information; If it does not exist, then determine whether the preset directory storage space for storing the directory is full; If the directory is not full, the remaining space will be used to store the directory update information; If the directory is full, the update information is stored by overwriting the data.

5. The message processing device according to claim 1, characterized in that, The message processing device also includes a first-in-first-out (FIFO) memory; When the address of the message is occupied, sending the message back to the addressing device includes: When the address of the message is occupied, the message is sent to the first-in-first-out (FIFO) memory so that the message can be sent back to the addressing device through the FIFO memory.

6. The message processing device according to claim 1, characterized in that, The address-finding device is specifically used for: When the scheduling device receives a message used in a read transaction or write transaction initiated by the requesting node, it loads the message used in the read transaction or the message used in the write transaction in order according to a preset priority rule, and sends the loaded message to the directory control device.

7. The message processing device according to claim 6, characterized in that, Message types include request messages, response messages, listening messages, and data messages; The priority rules used by the addressing device are as follows: the response message has the first priority, the data message has the second priority, the message sent by the directory control device has the third priority, and the request message has the fourth priority.

8. The message processing device according to claim 1, characterized in that, The directory control device is communicatively connected to the message generation device; When the read or write transaction corresponding to the message is completed, the directory control device deletes the recorded address of the message to release it from occupancy, including: When the read transaction or write transaction corresponding to the message is determined to be completed based on the release signal sent by the message generation device, the address of the message recorded in the address occupancy database is deleted to release the occupancy.

9. The message processing device according to claim 1, characterized in that, Also includes: The buffer output circuit is connected to the message generation device; The message generation device is specifically used for: Generate the message to be output based on the parameter information; Each message to be output is placed into the buffer output circuit, so that the buffer output circuit can be used to gradually output each message to the corresponding request node through the scheduling device.

10. The message processing apparatus according to any one of claims 1 to 9, characterized in that, Also includes: The slave nodes are respectively connected to the memory and the scheduling device to communicate with the message processing device through the scheduling device; The message processing device is also used to: read and write memory through communication with the slave node during the process of processing read and write transactions initiated by each of the requesting nodes.

11. The message processing device according to claim 10, characterized in that, When processing a first read transaction pointing to a first address initiated by any of the requesting nodes, the message processing device is specifically used for: Based on communication with the N requesting nodes, the latest data in the first address is fed back to the requesting node that initiated the first read transaction, and the data status corresponding to the first address in the cache of the requesting node is set to exclusive status, while the data status corresponding to the first address in the caches of the remaining requesting nodes is set to invalid status, and the memory is updated.

12. The message processing device according to claim 10, characterized in that, When processing a second read transaction pointing to a second address initiated by any of the requesting nodes, the message processing device is specifically used for: Based on communication with the N requesting nodes, the latest data in the second address is fed back to the requesting node that initiated the second read transaction, the data state corresponding to the second address in the cache of each requesting node is maintained, and the memory is updated.

13. The message processing device according to claim 10, characterized in that, When processing a first write transaction to a third address initiated by any of the requesting nodes, the message processing device is specifically used for: Based on communication with the N requesting nodes, the latest data is written to the third address of the cache of the requesting node that sent the first write transaction, and the data status corresponding to the third address in the cache of that requesting node is set to exclusive status, while the data status corresponding to the third address in the caches of the remaining requesting nodes is set to invalid status.

14. The message processing device according to claim 10, characterized in that, When processing a second write transaction pointing to a fourth address initiated by any of the requesting nodes, the message processing device is specifically used for: Based on communication with the N requesting nodes, the latest data is written to the fourth address of the cache of the requesting node that sent the second write transaction, and the data state corresponding to the fourth address in the cache of each requesting node is maintained.

15. An on-chip network system, characterized in that, The device includes the message processing apparatus as described in any one of claims 1 to 14, and further includes a scheduling device and N processor cores as N request nodes; the scheduling device is connected to the message processing apparatus and the N request nodes respectively; each of the N request nodes is provided with a cache; N is a positive integer.

16. A server, characterized in that, Including the on-chip network system as described in claim 15.

17. A message processing method, characterized in that, The method is applied to a message processing device, which is set in a network-on-a-chip system. The network-on-a-chip system also includes a scheduling device and N processor cores as N request nodes. The scheduling device is connected to the message processing device and the N request nodes respectively. All N request nodes are configured with a cache; N is a positive integer, and the message processing method includes: When the addressing device receives a message used in a read transaction or write transaction initiated by the requesting node through the scheduling device, it loads the message used in the read transaction or the message used in the write transaction and sends the loaded message to the directory control device. After receiving any message, the directory control device records the message's address in the address occupancy database when the message carries an address and the address of the message is not recorded in the address occupancy database; and determines that the message's address is occupied when the message carries an address and the address of the message is recorded in the address occupancy database. When the read transaction or write transaction corresponding to the message is completed, the address of the message recorded in the address occupancy database is deleted to release the occupancy. The message loading device receives the message sent by the directory control device, and when the address of the message is occupied, it sends the message back to the address fetching device; otherwise, it sends the message to the message processing device. The message processing device processes the received messages based on preset processing rules for maintaining the consistency of the cache, and generates corresponding parameter information. The message generation device generates a message to be output based on the parameter information and outputs it to the corresponding requesting node through the scheduling device. The addressing device, directory control device, message loading device, message processing device, and message generation device in the message processing equipment constitute a five-stage pipeline structure.

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