Display panel and display device thereof

Abstract

The embodiment of the invention provides a display panel and a display device thereof, the display panel comprises a display area and a non-display area, and the non-display area at least partially surrounds the display area; the display area comprises a main display area and an auxiliary display area, and the main display area at least partially surrounds the auxiliary display area; the auxiliary display area comprises a light hole which is used for transmitting light to the photosensitive element; the display panel further comprises a substrate and a plurality of signal lines, the signal lines comprise first signal lines, and the first signal lines extend in the first direction; the first signal line comprises a first fracture; in the second direction, the orthographic projection of the first fracture on the substrate is overlapped with the orthographic projection of the light hole on the substrate; wherein the first direction intersects with the second direction. According to the technical scheme provided by the embodiment of the invention, the first signal line around the light hole is subjected to fracture setting, namely, the first signal line comprises the first fracture, so that the light transmittance of the display panel in the light hole can be improved through setting of the fracture, and the capacity of the display panel for obtaining external light is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of display technology, and in particular to a display panel and a display device thereof. Background Art

[0002] With the continuous development of display technology, display panels have been widely used in people's production and life. In order to better meet people's needs, the display panel can be adjusted, such as adjusting the wiring in the display panel, so as to improve the overall effect of the display panel. Summary of the Invention

[0003] An embodiment of the present invention provides a display panel and a display device thereof, wherein a first signal line around a light-transmitting hole is provided with a break, thereby increasing the light transmittance of the display panel at the light-transmitting hole and improving the display panel's ability to receive external light.

[0004] In a first aspect, an embodiment of the present invention provides a display panel, comprising a display area and a non-display area, wherein the non-display area at least partially surrounds the display area;

[0005] The display area includes a main display area and an auxiliary display area, wherein the main display area at least partially surrounds the auxiliary display area; the auxiliary display area includes a light-transmitting hole, and the light-transmitting hole is used to transmit light to the photosensitive element;

[0006] The display panel further includes a substrate and a plurality of signal lines, wherein the signal lines include a first signal line, the first signal line extending along a first direction; the first signal line includes a first break; along a second direction, an orthographic projection of the first break on the substrate overlaps with an orthographic projection of the light-transmitting hole on the substrate;

[0007] The first direction and the second direction intersect.

[0008] In a second aspect, an embodiment of the present invention provides a display device, including the display panel described in the first aspect;

[0009] The display device further includes a photosensitive element;

[0010] Along the thickness direction of the display device, the light-transmitting hole overlaps with the photosensitive element.

[0011] An embodiment of the present invention provides a display panel, wherein the display area of ​​the display panel includes a main display area and an auxiliary display area, and the auxiliary display area includes a light-transmitting hole, wherein the light-transmitting hole is configured to transmit light to a photosensitive element, thereby enabling the display panel to capture external light. Furthermore, the display panel includes a plurality of signal lines extending along a first direction, wherein the signal lines include a first signal line, wherein the orthographic projection of a first break provided in the first signal line on a substrate overlaps with the orthographic projection of the light-transmitting hole on the substrate along a second direction, i.e., the first break and the light-transmitting hole are provided at positions close to or adjacent to each other. Thus, the first break provided on the first signal line increases the transmittance of the display panel at the light-transmitting hole, thereby improving the display panel's ability to capture external light.

[0012] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings introduced here only illustrate some of the embodiments to be described by the present invention, and are not exhaustive. A person skilled in the art can derive other drawings based on these drawings without inventive effort.

[0014] Figure 1 is a schematic structural diagram of a first display panel provided by an embodiment of the present invention;

[0015] Figure 2 is an enlarged schematic diagram of the first auxiliary display area provided by an embodiment of the present invention;

[0016] Figure 3 is an enlarged schematic diagram of the second auxiliary display area provided by an embodiment of the present invention;

[0017] Figure 4 yes Figure 1 An enlarged schematic diagram of the middle region B;

[0018] Figure 5 yes Figure 4 A schematic diagram of the first cross section along the section line C-C';

[0019] Figure 6 yes Figure 4 A second cross-sectional view along the section line C-C';

[0020] Figure 7 This is an enlarged schematic diagram of the first auxiliary display area provided in the prior art;

[0021] Figure 8 is an enlarged schematic diagram of the second auxiliary display area provided in the prior art;

[0022] Figure 9 is a structural diagram of a second display panel provided by an embodiment of the present invention;

[0023] Figure 10 This is a schematic diagram of a film layer setting of an auxiliary line in the prior art;

[0024] Figure 11 is an enlarged schematic diagram of the third auxiliary display area provided by an embodiment of the present invention;

[0025] Figure 12 is an enlarged schematic diagram of a fourth auxiliary display area provided by an embodiment of the present invention;

[0026] Figure 13 is an enlarged schematic diagram of the fifth auxiliary display area provided by an embodiment of the present invention;

[0027] Figure 14 is an enlarged schematic diagram of a sixth auxiliary display area provided by an embodiment of the present invention;

[0028] Figure 15 is an enlarged schematic diagram of the seventh auxiliary display area provided by an embodiment of the present invention;

[0029] Figure 16 is a schematic structural diagram of a third display panel provided by an embodiment of the present invention;

[0030] Figure 17 is a schematic structural diagram of a fourth display panel provided by an embodiment of the present invention;

[0031] Figure 18 is a structural diagram of a fifth display panel provided by an embodiment of the present invention;

[0032] Figure 19 is a structural diagram of a first pixel circuit provided by an embodiment of the present invention;

[0033] Figure 20 The embodiment of the present invention provides a Figure 19 The timing of the signal of the pixel circuit shown in the embodiment;

[0034] Figure 21 is a structural diagram of a second pixel circuit provided by an embodiment of the present invention;

[0035] Figure 22 The embodiment of the present invention provides a Figure 21 The timing of the signal of the pixel circuit shown in the embodiment;

[0036] Figure 23 yes Figure 1 The first enlarged schematic diagram of the middle area D;

[0037] Figure 24 yes Figure 1 A second enlarged schematic diagram of the middle region D;

[0038] Figure 25 yes Figure 1 A third enlarged schematic diagram of the middle area D;

[0039] Figure 26 yes Figure 1 A fourth enlarged schematic diagram of the middle region D;

[0040] Figure 27 yes Figure 1 The fifth enlarged schematic diagram of the middle area D;

[0041] Figure 28 is an enlarged schematic diagram of an eighth auxiliary display area provided by an embodiment of the present invention;

[0042] Figure 29 yes Figure 1 Another enlarged schematic diagram of the middle region B;

[0043] Figure 30 yes Figure 29 A schematic cross-sectional view along the section line F-F';

[0044] Figure 31 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0046] It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a system, product, or device comprising a series of units is not necessarily limited to those steps or units explicitly listed, but may include other units that are not explicitly listed or that are inherent to these products or devices.

[0047] Figure 1 is a structural diagram of a first display panel provided by an embodiment of the present invention, Figure 2 is an enlarged schematic diagram of the first auxiliary display area provided by an embodiment of the present invention, Figure 3 This is an enlarged schematic diagram of the second auxiliary display area provided by an embodiment of the present invention, referring to Figures 1 to 3 As shown, an embodiment of the present invention provides a display panel 10, which includes a display area AA and a non-display area NA, and the non-display area NA at least partially surrounds the display area AA; the display area AA includes a main display area AA1 and an auxiliary display area AA2, and the main display area AA1 at least partially surrounds the auxiliary display area AA2; the auxiliary display area AA2 includes a light-transmitting hole 100, and the light-transmitting hole 100 is used to transmit light to a photosensitive element (not specifically shown in the figure); the display panel 10 also includes a substrate 200 and a plurality of signal lines 300, the signal line 300 includes a first signal line 310, and the first signal line 310 extends along a first direction X1; the first signal line 310 includes a first break 310a; along the second direction X2, the orthographic projection of the first break 310a on the substrate 200 overlaps with the orthographic projection of the light-transmitting hole 100 on the substrate 200; wherein the first direction X1 and the second direction X2 intersect.

[0048] Among them, reference Figure 1 As shown, the display panel 10 includes a display area AA and a non-display area NA. The display area AA includes a light-emitting element 400 and signal lines (not specifically shown in the figure) connected to the light-emitting element 400, etc., for realizing the display function of the display panel 10. The non-display area NA includes a display controller, such as a driver chip, etc. (not specifically shown in the figure). The display controller can be electrically connected to some signal lines located in the display area AA. For example, taking data signal lines as an example, the display controller can provide display signals to the data signal lines in the display area AA, thereby driving the display panel 10 to realize the display function. The non-display area NA surrounds at least a portion of the display area AA. The specific locations of the display area AA and the non-display area NA are not specifically limited in this embodiment of the present invention.

[0049] For further reference, Figure 1 As shown, the display area AA includes a main display area AA1 and an auxiliary display area AA2, and the main display area AA1 at least partially surrounds the auxiliary display area AA2, wherein the auxiliary display area AA2 includes a light-transmitting hole 100, and the light-transmitting hole 100 is used to transmit light to the photosensitive element, and along the thickness direction of the display panel 10, the number of photosensitive elements corresponding to the light-transmitting hole 100 is diverse, and the embodiment of the present invention does not provide a specific description of this. Among them, the main display area AA1 and the auxiliary display area AA2 can be understood as follows: the main display area AA1 is used to realize the main display function of the display panel 10, and the auxiliary display area AA2 can meet the light transmission requirements of the display panel 10 while realizing the display function of the display panel 10. It should be noted that Figure 1 In order to clearly show the relative position relationship between the main display area AA1 and the auxiliary display area AA2, Figure 1 The signal lines electrically connected to the light emitting element 400 are not shown; at the same time, the arrangement of the auxiliary display area AA2 in the display area AA is diverse and flexible. Figure 1 The figure only illustrates one relative positional relationship between the main display area AA1 and the auxiliary display area AA2. In different display panels 10, the positions of the light-transmitting holes 100 vary based on the different locations of the photosensitive elements. Consequently, the relative positions of the main display area AA1 and the auxiliary display area AA2 vary. It is understood that multiple light-transmitting holes 100 may be provided in the auxiliary display area AA2 to increase light transmittance.

[0050] Furthermore, the photosensitive element can be understood as an optical sensor, and external light can be transmitted to the photosensitive element through the light-transmitting hole of the display panel 10. Exemplarily, the photosensitive element can be an under-screen camera, a fingerprint recognition module, an ambient light sensor or an infrared sensor, etc., which transmits external light to the photosensitive element through the light-transmitting hole 100, and the photosensitive element then works based on the external light. The embodiment of the present invention does not specifically limit this. Among them, the light-transmitting hole 100 can be understood as the area within the light-transmitting hole 100 that can transmit external light to the photosensitive element, that is, the size of the luminous flux that can be transmitted to the light-transmitting hole 100 directly affects the transmittance of the display panel 10.

[0051] Further, Figure 4 yes Figure 1 An enlarged schematic diagram of area B in the middle, Figure 5 yes Figure 4 The first cross-sectional diagram along the section line C-C' is shown in FIG. Figure 6 yes Figure 4 The second cross-sectional diagram along the section line C-C', refer to Figures 4 to 6 As shown, the display panel 10 further includes a light shielding layer 500, wherein the light shielding layer 500 includes at least one opening 500a. Along the thickness direction of the display panel 10, the opening 500a of the light shielding layer 500 is arranged to overlap with the through hole 100. Along the thickness direction of the display panel 10, the opening 500a and the through hole 100 may at least partially overlap, or the opening 500a and the through hole 100 may completely overlap, and this is not specifically limited in the embodiment of the present invention. Among them, the area of ​​the light shielding layer 500 without the opening 500a can block the transmission of light, while the light can be transmitted at the opening 500a, that is, the light can be transmitted through the opening 500a to the through hole 100, and then transmitted to the photosensitive element.

[0052] Optionally, refer to Figure 5As shown, the light-shielding layer 500 can be understood as a pixel definition layer 500b that can block light. The pixel definition layer 500b defines the size of the first electrode 401 (i.e., the anode) in the light-emitting element 400. The pixel definition layer 500b can block light, and a portion of the pixel definition layer 500b is opened to form an opening 500a. The opening 500a is arranged corresponding to the light-transmitting hole 100, that is, the opening 500a can transmit light to the photosensitive element.

[0053] Optionally, refer to Figure 6 As shown, the light shielding layer 500 can be located on the side of the light emitting element 400 away from the substrate 200. The light shielding layer 500 includes a black matrix 500c and a filter layer 500d. The filter layer 500d can include filter layers of different colors. The black matrix 500c is opened to form an opening 500a in the light shielding layer 500. The opening 500a is arranged corresponding to the light-transmitting hole 100, that is, the opening 500a can transmit light to the photosensitive element.

[0054] Further, Figure 5 and Figure 6 The light-transmitting hole 100 shown in the figure is hollowed out by hollowing out the film layer 600 on one side of the substrate 200, wherein the film layer 600 may include an array layer, etc., and the embodiment of the present invention does not give examples one by one. Optionally, the light-transmitting hole 100 may also be designed to hollow out part of the film layer 600 (not specifically shown in the figure). With respect to the specific setting of the light-transmitting hole 100, it can be adaptively adjusted according to different display panels 10, or adaptively adjusted according to corresponding different photosensitive elements. The embodiment of the present invention does not make specific limitations on this. It is understandable that in some embodiments, only the light-shielding layer 500 may be hollowed out, that is, only an opening is provided in the light-shielding layer 500 to form the light-transmitting hole 100.

[0055] The light flux transmitted to the photosensitive element through the light-transmitting hole 100 is related to the wiring around the light-transmitting hole 100 along the thickness direction of the display panel 10 , or the light-shielding structure around the light-transmitting hole 100 . Figure 2 and Figure 3 The light-transmitting hole 100 indicated by the dashed rectangular frame is shown for example only. The specific shape and size of the light-transmitting hole 100 are not specifically limited in the present embodiment. The display panel 10 can adjust the light flux transmitted to the light-transmitting hole 100, that is, adjust the structure that blocks light, thereby increasing the light transmittance of the light-transmitting hole 100, thereby achieving adjustment of the light transmittance of the display panel 10.

[0056] Specifically, refer to Figure 2 and Figure 3 As shown, Figure 2 and Figure 3The auxiliary display area AA2 is magnified to show that the display panel 10 includes a substrate 200 and a signal line 300. The signal line 300 is disposed on one side of the substrate 200. The signal line 300 includes a first signal line 310 extending along a first direction X1. The first signal line 310 also includes a first break 310a. Specifically, the first signal line 310 is disconnected at the first break 310a, or the first signal line 310 does not extend completely in the first direction X1, thus having a break. The orthographic projection of the first break 310a on the first signal line 310 on the substrate 200 is adjacent to or intersects with the orthographic projection of the light-transmitting hole 100 on the substrate 200. This is equivalent to setting a break in the wiring that would originally block the light-transmitting hole 100. The setting of the first break 310a can increase the transmittance of the light-transmitting hole 100, that is, reduce the influence of the wiring on the transmittance of the light-transmitting hole 100, and then increase the transmittance of the display panel 10 at the light-transmitting hole 100, thereby reflecting the display panel 10's ability to obtain external light.

[0057] Specifically, refer to Figure 2 and Figure 3 As shown, along the second direction X2, the orthographic projection of the first fracture 310a on the substrate 200 overlaps with the orthographic projection of the light-transmitting hole 100 on the substrate 200. That is, the orthographic projection of the first fracture 310a on the substrate 200 is compared with the orthographic projection of the light-transmitting hole 100 on the substrate 200. Along the second direction X2, the two orthographic projections overlap. Or it can be understood that, Figure 2 and Figure 3 As shown, in the plan view (top view) without considering the film layer position relationship between the first signal line 310 and the light-transmitting hole 100, along the second direction X2, the first break 310a of the first signal line 310 overlaps with the light-transmitting hole 100, which can directly or indirectly increase the transmittance of the light-transmitting hole 100.

[0058] In the embodiment of the present invention, overlap is understood to be at least partial overlap, that is, there may be only a partial overlap or a complete overlap, which will not be described in detail in the subsequent content.

[0059] Figure 7 is an enlarged schematic diagram of the first auxiliary display area provided in the prior art. Figure 8 This is an enlarged schematic diagram of the second auxiliary display area provided in the prior art, referring to Figure 7 and Figure 8 As shown, further, if the first signal line 310 is arranged at the first break 310a instead of the break design, the part of the line will block the light transmitted to the light hole 100, thereby affecting the transmittance of the light hole 100. For example, compared with reference Figure 7 and Figure 2As shown, if the first signal line 310 is not broken at the first break 310a, the routing of the first break 310a will directly affect the light transmission of the light hole 100, that is, reduce the light transmittance at the light hole 100 (for comparison, see reference Figure 7 and Figure 2 The area of ​​the rectangular frame indicated by the light-transmitting hole 100 is shown in FIG. Figure 8 and Figure 3 As shown, if a wiring is arranged at the first break 310 a , it will affect the arrangement of other wirings, thereby indirectly affecting the transmittance of the light-transmitting hole 100 , and further affecting the overall transmittance of the display panel 10 .

[0060] In order to improve the light transmittance of the display panel 10, that is, to increase the light transmittance of the light-transmitting hole 100, the embodiment of the present invention sets a break on some of the lines that will block the light transmitted to the light-transmitting hole 100, that is, sets a first break 310a on the first signal line 310, thereby ensuring the overall light transmittance of the display panel 10. Furthermore, with the continuous development of the display panel 10, the functions of the display panel 10 are more abundant, and the types and numbers of corresponding lines will increase accordingly. Therefore, there are limitations to improving the light transmittance by avoiding the lines. The embodiment of the present invention does not need to adjust the line setting position, and does not need to consider the problem of line space. Only by setting the line that blocks the light to the light-transmitting hole 100 with a break, the light transmittance of the light-transmitting hole 100 can be improved, thereby improving the overall light transmittance of the display panel 10. For example, refer to Figure 2 As shown, the first signal line 310 is designed to have a break at the first break 310a, which can directly increase the light transmittance of the light-transmitting hole 100 and improve the light transmittance of the display panel 10. Figure 3 As shown, the first signal line 310 is designed with a break at the first break 310a. When the line near the light-transmitting hole 100 is set on the same layer as the first signal line 310, the line can be extended or bent toward the first break 310a, thereby increasing the transmittance of the light-transmitting hole 100 and improving the transmittance of the display panel 10.

[0061] In summary, an embodiment of the present invention provides a display panel, in which a break is set on the first signal line in the display panel, and the orthographic projection of the first break set in the first signal line on the substrate is the orthographic projection of the light-transmitting hole on the substrate, and overlaps along the second direction, that is, the setting position of the first break and the light-transmitting hole is close to or adjacent to each other. In this way, the transmittance of the display panel in the light-transmitting hole is increased by the first break set on the first signal line, which can improve the ability of the display panel to obtain external light.

[0062] Figure 9 is a structural diagram of a second display panel provided by an embodiment of the present invention, Figure 2 、 Figure 3 and Figure 9 As shown, the signal line 300 also includes a data signal line 320, and multiple data signal lines 320 extend along the third direction X3 and are arranged along the fourth direction X4; the third direction X3 and the fourth direction X4 intersect; the signal line 300 also includes multiple auxiliary lines 330; the non-display area NA includes a fan-out area A1 located on one side of the display area AA, and the fan-out area A1 includes multiple fan-out lines S0; the auxiliary line 330 includes a data auxiliary line 331, and at least part of a data auxiliary line 331 is located in the display area AA; at least part of the data signal line 320 is electrically connected to the fan-out line S0 through the data auxiliary line 331; the auxiliary line 330 also includes a virtual auxiliary line 332 located in the display area AA, and the virtual auxiliary line 332 is in the same layer as the data auxiliary line 331 and is insulated; the first signal line 310 includes the virtual auxiliary line 332.

[0063] Specific, combined Figure 1 and Figure 9 As shown, the signal line 300 includes a data signal line 320 extending along a third direction X3, and a plurality of data signal lines 320 are arranged along a fourth direction X4, wherein the third direction X3 can be understood as Figure 9 In the middle column direction, the fourth direction X4 can be understood as Figure 9 The data signal line 320 is used to transmit data signals to ensure the display function of the display panel 10. Figure 9 As shown, the display panel 10 further includes a fan-out area A1 in the non-display area NA. The fan-out area A1 includes a plurality of fan-out traces S0 . The fan-out traces S0 are electrically connected to a plurality of data signal lines 320 to ensure stable transmission of data signals.

[0064] Furthermore, the signal line 300 also includes multiple auxiliary lines 330, and the auxiliary lines 330 include data auxiliary lines 331. One end of the data auxiliary line 331 can be electrically connected to the fan-out line S0, and the other end can be electrically connected to a portion of the data signal line 320 away from the fan-out area A1 along the fourth direction X4. In this way, it can be ensured that the data signal line 320 away from the fan-out area A1 does not need to be directly electrically connected to the fan-out line S0 in the fan-out area A1, and can also indirectly obtain the data signal. Therefore, the setting area of ​​the fan-out area A1 can also be reduced, effectively reducing the proportion of the non-display area NA, increasing the proportion of the display area AA of the display panel 10, and increasing the display effect of the display panel 10.

[0065] Specifically, the display area AA includes a plurality of data signal lines 320, and some of the data signal lines 320 can be directly electrically connected to the fan-out traces S0 in the fan-out area A1. Figure 9As shown in the middle area B1, the data signal line 320 in the area B1 is relatively close to the fan-out line S0 and can be directly electrically connected to the fan-out line S0. Further, part of the data signal line 320 can be electrically connected to the fan-out line S0 through the data auxiliary line 331. Figure 9 As shown in the middle area B2, in the fourth direction X4, the data signal line 320 in the area B2 is farther away from the fan-out area A1 than the data signal line in the area B1, that is, the data signal line 320 in the area B2 is closer to the edge of the display panel 10. The data signal line 320 in the area B2 can be electrically connected to the fan-out line S0 through the data auxiliary line 331, thereby reducing the space occupied by the fan-out line S0, thereby reducing the setting area of ​​the fan-out area A1, effectively reducing the proportion of the non-display area NA, increasing the proportion of the display area AA of the display panel 10, and increasing the display effect of the display panel 10.

[0066] Furthermore, the auxiliary line 330 also includes a virtual auxiliary line 332 located in the display area AA, and the virtual auxiliary line 332 is on the same layer as the data auxiliary line 331. By setting the virtual auxiliary line 332, the display panel 10 can ensure that the routing set on the display panel 10 is balanced. Among them, the virtual auxiliary line 332 is insulated from the data auxiliary line 331, that is, the virtual auxiliary line 332 will not affect the normal transmission of the data signal in the data auxiliary line 331. In general, by setting the virtual auxiliary line 332, the data auxiliary line 331 can be balanced in the overall routing setting of the display panel 10, ensuring that the routing setting density in different areas is balanced, thereby avoiding different light reflectivity in the display panel 10 due to unbalanced routing settings, and avoiding uneven display effects of the display panel 10.

[0067] For further reference, Figure 2 and Figure 3 As shown, the first signal line 310 may include a virtual auxiliary line 332. Specifically, the first signal line 310 includes a first break 310a, and the virtual auxiliary line 332 used to balance the routing balance can also be provided with a break. That is, the virtual auxiliary line 332 estimated near the light-transmitting hole 100 can be provided with a break to ensure the transmittance of the light-transmitting hole 100, thereby improving the overall transmittance of the display panel 10. Therefore, the first signal line 310 can include the virtual auxiliary line 332. On the one hand, it does not affect the display effect of the display panel 10, and on the other hand, it can improve the display panel 10's ability to obtain external light. In addition, the virtual auxiliary line 332 can transmit a fixed potential signal.

[0068] Further, Figure 10 This is a schematic diagram of the film layer setting of an auxiliary line in the prior art, refer to Figure 10 As shown, Figure 10The auxiliary line 330 shown in FIG. 3 may be a data auxiliary line 331 and / or a virtual auxiliary line 332, which is not specifically limited in the embodiment of the present invention. Figure 10 As shown, in the film layer where the auxiliary line 330 is located, there is also a data signal line 320 extending in the same direction as the auxiliary line 330 shown in the figure, and there is also a power signal line ( Figure 10 The transmission is shown as an example using the positive power signal PVDD), and in order to ensure the transmission of the power signal in the power signal line, the line width of the power signal line is generally set to be larger. Figure 10 In the film layer shown in FIG, the signal line 300 is arranged in a relatively compact space, leaving little room for routing the signal line. Consequently, the signal line 300 cannot be prevented from blocking light transmitted to the light-transmitting hole 100. Furthermore, the improved display panel 10 of the present invention has virtual auxiliary lines 332 near the light-transmitting hole 100 broken, thereby increasing the light transmittance of the light-transmitting hole 100.

[0069] Figure 11 is an enlarged schematic diagram of the third auxiliary display area provided by an embodiment of the present invention, Figure 12 This is an enlarged schematic diagram of the fourth auxiliary display area provided by an embodiment of the present invention, referring to Figure 9 、 Figure 11 and Figure 12 As shown, the data auxiliary line 331 includes an electrically connected first data auxiliary routing line 3311 and a second data auxiliary routing line 3312, the first data auxiliary routing line 3311 extends along the third direction X1 and is electrically connected to the fan-out routing line S0, and the second data auxiliary routing line 3312 extends along the fourth direction X4 and is electrically connected to the data signal line 320; the virtual auxiliary line 332 includes an electrically connected first virtual auxiliary routing line 3321 and a second virtual auxiliary routing line 3322, the first virtual auxiliary routing line 3321 extends along the third direction X1, and the second virtual auxiliary routing line 3322 extends along the fourth direction X4; the first virtual auxiliary routing line 3321 and the first data auxiliary routing line 3311 are on the same layer and are insulated, and the second virtual auxiliary routing line 3322 and the second data auxiliary routing line 3312 are on the same layer and are insulated; the first signal line 310 includes at least part of the first virtual auxiliary routing line 3321; the first direction X1 and the third direction X3 are the same direction, and the second direction X2 and the fourth direction X4 are the same direction.

[0070] Among them, reference Figure 9 As shown, the data auxiliary line 331 includes a first data auxiliary line 3311 and a second data auxiliary line 3312 that are electrically connected. The extension direction of the first data auxiliary line 3311 is the same as the extension direction of the data signal line 320, and the extension direction of the second data auxiliary line 3312 intersects with the extension direction of the data signal line 320. Figure 9Part of the data signal line 320 in the middle area B2 is first electrically connected to the second data auxiliary routing line 3312 extending along the fourth direction X4, and the second data auxiliary routing line 3312 is then electrically connected to the first data auxiliary routing line 3311 extending along the third direction X3, and the first data auxiliary routing line 3311 is then electrically connected to the fan-out routing line S0 in the fan-out area A1, thereby realizing the transmission of the data signal in the fan-out routing line S0 to the data signal line 320 through the data auxiliary line 331.

[0071] For further reference, Figure 9 As shown, the virtual auxiliary line 332 includes an electrically connected first virtual auxiliary routing 3321 and a second virtual auxiliary routing 3322, the first virtual auxiliary routing 3321 and the first data auxiliary routing 3311 have the same extension direction, and the first virtual auxiliary routing 3321 and the first data auxiliary routing 3311 are insulated; the second virtual auxiliary routing 3322 and the second data auxiliary routing 3311 have the same extension direction, and the second virtual auxiliary routing 3322 and the second data auxiliary routing 3312 are insulated; by setting the first virtual auxiliary routing 3321 and the first data auxiliary routing 3311, the routing setting of the display panel 10 can be balanced in both the third direction X3 and the fourth direction X4, and the routing setting density in different areas can be balanced, thereby avoiding different light reflectivity in the display panel 10 due to unbalanced routing settings, and avoiding uneven display effects of the display panel 10.

[0072] Further, combined Figure 11 and Figure 12 As shown, the third direction X3 can be the same as the first direction X1, and the fourth direction X4 can be the same as the second direction X2. In this way, the first signal line 310 can be understood as extending along the third direction X3. The first virtual auxiliary trace 3321 is the virtual auxiliary trace 332, and the first virtual auxiliary trace 3321 is extended along the third direction X3. Therefore, the first virtual auxiliary trace 3321 can be at least partially located in the auxiliary display area AA2. Therefore, the first signal line 310 includes at least a portion of the first virtual auxiliary trace 3321, that is, the first signal line 310 includes the portion of the first virtual auxiliary trace 3321 located in the auxiliary display area AA2.

[0073] Continue to refer Figure 11 and Figure 12 As shown, the data signal line 320 includes a first data signal line 321, and at least a portion of a first data signal line 321 is located in the auxiliary display area AA2; the first virtual auxiliary routing 3321 includes a first sub-virtual auxiliary routing 3321a, and at least a portion of a first sub-virtual auxiliary routing 3321a is located in the auxiliary display area AA2; the first data signal line 321 is adjacent to the first sub-virtual auxiliary routing 3321a.

[0074] The data signal line 320 includes a first data signal line 321. The first data signal line 321 is at least partially located in the auxiliary display area AA2. Figure 11 and Figure 12 As shown, it can be understood that the display panel 10 includes multiple data signal lines 320 extending along the third direction X3, among which there is a first data signal line 321. Part of the first data signal line 321 is arranged in the auxiliary display area AA2, that is, the arrangement position of the first data signal line 321 is closer to the light transmission hole 100 than the arrangement positions of other data signal lines 320. Therefore, the arrangement of the first data signal line 321 will affect the transmittance of the light transmission hole 100 in the auxiliary display area AA2.

[0075] Specific, combined Figure 11 and Figure 12 As shown, when the first signal line 310 is the first virtual auxiliary routing 3321, the first virtual auxiliary routing 3321 includes a first sub-virtual auxiliary routing 3321a, that is, the first sub-virtual auxiliary routing 3321a can be understood as a routing structure along the third direction X3 on both sides of the first break 310a. Figure 11 and Figure 12 As shown, the auxiliary display area AA2 includes at least a portion of the first sub-virtual auxiliary routing 3321a and at least a portion of the first data signal line 321, wherein the first data signal line 321 is arranged adjacent to the first sub-virtual auxiliary routing 3321a. By adjusting the relative positions of the first data signal line 321 and the first sub-virtual auxiliary routing 3321a, differential adjustment of the transmittance of the light-transmitting hole 100 can be achieved. In general, the first virtual auxiliary routing 3321 extending along the third direction X3 is the first signal line 310, and a first break 310a is set in the first virtual auxiliary routing 3321. The routings on both sides of the first break 310a are the first sub-virtual auxiliary routing 3321a. By setting the first break 310a, light obstruction can be effectively avoided, thereby increasing the transmittance of the light-transmitting hole 100, and thus improving the transmittance of the display panel 10.

[0076] Continue to refer Figure 12 As shown, the first data signal line 321 is located on the side of the first sub-virtual auxiliary routing 3321a close to the light-transmitting hole 100; the first data signal line 321 includes an electrically connected first main body portion 3211 and a first bending portion 3212; along the fourth direction X4, the orthographic projection of the first bending portion 3212 on the substrate 200 overlaps with the orthographic projection of the light-transmitting hole 100 on the substrate 200; along the third direction X3, the orthographic projection of the first bending portion 3212 on the substrate 200 overlaps with the orthographic projection of the first sub-virtual auxiliary routing 3321a on the substrate 200.

[0077] For further reference, Figure 12 As shown, the first data signal line 321 includes a first main body portion 3211 and a first bending portion 3212, wherein the first main body portion 3211 can be understood as a main wiring structure extending along the third direction X3, and the first bending portion 3212 (refer to Figure 12 The area shown in C1 in the middle) can be understood as a routing structure in the first data signal line 321 that is protruding compared to the first main body 3211 or a routing structure that is bent compared to the first main body 3211, that is, the extension direction of at least part of the structure of the first bending portion 3212 intersects with the extension direction of the first main body 3211.

[0078] Furthermore, along the fourth direction X4, the orthographic projection of the first bent portion 3212 on the substrate 200 overlaps with the orthographic projection of the light-transmitting hole 100 on the substrate 200, that is, when the orthographic projection of the first bent portion 3212 on the substrate 200 is compared with the orthographic projection of the light-transmitting hole 100 on the substrate 200, the two projections overlap along the fourth direction X4. Or it can be understood that, with reference to Figure 12 As shown, in a plan view (top view) without considering the positional relationship between the first bending portion 3212 and the light-transmitting hole 100 , the first bending portion 3212 and the light-transmitting hole 100 overlap along the fourth direction X4.

[0079] For further reference, Figure 12 As shown, the first data signal line 321 is located on a side of the first dummy auxiliary sub-line 3321a close to the light-transmitting hole 100. Combined with the positional relationship between the first bend 3212 and the light-transmitting hole 100, it can be seen that the location of the first data signal line 321 directly blocks light transmitted to the light-transmitting hole 100, thereby affecting the transmittance of the light-transmitting hole 100, that is, the transmittance of the display panel 10. Combined with the first break 310a provided in the first signal line 310, by adjusting the first data signal line 321, the transmittance of the light-transmitting hole 100 can be increased, thereby improving the transmittance of the display panel 10.

[0080] Specifically, along the third direction X3, the orthographic projection of the first bending portion 3212 on the substrate 200 overlaps with the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200, that is, the orthographic projection of the first bending portion 3212 on the substrate 200 is compared with the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200, and the two projections overlap along the third direction X3. Or it can be understood that, with reference to Figure 12As shown, the first bend portion 3212 extends to the first fracture 310a of the first signal line 310, so along the third direction X3, the orthographic projection of the first bend portion 3212 on the substrate 200 and the orthographic projection of the first sub-virtual auxiliary routing 3321a on the substrate 200 overlap, that is, in the plan view (top view) without considering the positional relationship between the film layer where the first bend portion 3212 and the first signal line 310 are located, the first bend portion 3121 extends to the first fracture 310a, and the two projections at least partially overlap along the third direction X3.

[0081] Further, comparative reference Figure 8 and Figure 12 As shown, by setting a first break 310a on the first signal line 310 and extending part of the structure of the first data signal line 321 located on the first signal line 310 near the light-transmitting hole 100 to the first break 310a, the first data signal line 321 can be further prevented from blocking light, thereby effectively increasing the transmittance of the light-transmitting hole 100, thereby improving the overall transmittance of the display panel 10.

[0082] Figure 13 is an enlarged schematic diagram of the fifth auxiliary display area provided by an embodiment of the present invention, referring to Figure 9 and Figure 13 As shown, the first data signal line 321 is located on the side of the first sub-virtual auxiliary routing 3321a close to the light-transmitting hole 100; the first data signal line 321 includes an electrically connected first main body portion 3211 and a first bending portion 3212; along the fourth direction X4, the orthographic projection of the first bending portion 3212 on the substrate 200 and the orthographic projection of the light-transmitting hole 100 on the substrate 200 overlap; along the third direction X3, the orthographic projection of the first bending portion 3212 on the substrate 200 and the orthographic projection of the first sub-virtual auxiliary routing 3321a on the substrate 200 do not overlap.

[0083] For further reference, Figure 13 As shown, along the third direction X3, the orthographic projection of the first bending portion 3212 on the substrate 200 overlaps with the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200, that is, the orthographic projection of the first bending portion 3212 on the substrate 200 is compared with the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200, and the two projections do not overlap along the third direction X3, that is, in the plan view (top view) without considering the positional relationship between the film layers where the first bending portion 3212 and the first sub-virtual auxiliary trace 3321a are located, the two projections do not overlap along the third direction X3. Or it can be understood that, with reference to Figure 13As shown, the first bend 3212 does not extend toward the first break 310a of the first signal line 310, or the first bend 3212 does extend toward the first break 310a of the first signal line 310, but does not extend into the area where the first break 310a is located. Therefore, along the third direction X3, the orthographic projection of the first bend 3212 on the substrate 200 and the orthographic projection of the first dummy auxiliary sub-trace 3321a on the substrate 200 do not overlap.

[0084] For further reference, Figure 13 As shown, when the first signal line 310 is provided with the first break 310a, the first data signal line 321 is not significantly adjusted, which can reduce the difficulty in manufacturing the first data signal line 321. Furthermore, although the first bend 3212 exists between the first break 310a and the light-transmitting hole 100, the break design of the first signal line 310 and the proximity of the first signal line 310 to the light-transmitting hole 100 relative to other lines can effectively improve the light transmittance of the display panel 10.

[0085] Continue to refer Figure 9 and Figure 11 As shown, the first data signal line 321 is located on a side of the first sub-dummy auxiliary trace 3321 a away from the light-transmitting hole 100 ; in the thickness direction of the display panel 10 , the first break 310 a and the light-transmitting hole 100 overlap.

[0086] Among them, reference Figure 11 As shown, the first data signal line 321 is located on a side of the first sub-dummy auxiliary trace 3321 a away from the light-transmitting hole 100 , that is, the first signal line 310 is located on a side of the first data signal line 321 close to the light-transmitting hole 100 .

[0087] For further reference, Figure 11 As shown, the first signal line 310 includes a first break 310a, and along the thickness direction of the display panel 10, the first break 310a overlaps with the light-transmitting hole 100 in the substrate 200. It can be understood that the first signal line 310 is closer to one side of the light-transmitting hole 100 than the other signal lines 300. Therefore, along the fourth direction X4, a break is set in the portion of the line corresponding to the light-transmitting hole 100, that is, the first break 310a. The first break 310a can directly prevent the line from blocking light, thereby directly increasing the light transmittance of the light-transmitting hole 100, thereby improving the overall light transmittance of the display panel 10.

[0088] Further, comparative reference Figure 7 and Figure 11 As shown, by setting a first break 310a on the first signal line 310, Figure 7The area where no fracture is set will block the light-transmitting hole 100, thereby affecting the light transmittance of the light-transmitting hole 100; and Figure 11 The first signal line 310 is provided with a break, ie, a first break 310 a . The first break 310 a does not block light, thereby directly increasing the light transmittance of the light-transmitting hole 100 and thus improving the overall light transmittance of the display panel 10 .

[0089] Figure 14 is an enlarged schematic diagram of the sixth auxiliary display area provided by an embodiment of the present invention, Figure 15 is an enlarged schematic diagram of the seventh auxiliary display area provided by an embodiment of the present invention, referring to Figure 9 、 Figure 14 and Figure 15 As shown, the first sub-virtual auxiliary routing 3321a includes a first routing division 3321a1 and a second routing division 3321a2 respectively located on both sides of the first break 310a; multiple first routing divisions 3321a1 arranged along the fourth direction X4 are electrically connected through the second virtual auxiliary routing 3322; and / or, multiple second routing divisions 3321a2 arranged along the fourth direction X4 are electrically connected through the second virtual auxiliary routing 3322.

[0090] Specifically, refer to Figure 9 As shown, the virtual auxiliary line 332 includes a first virtual auxiliary line 3321 and a second virtual auxiliary line 3322 that are electrically connected, wherein the first virtual auxiliary line 3321 and the second virtual auxiliary line 3322 extend in different directions. Figure 14 and Figure 15 As shown, the first virtual auxiliary routing 3321 can be the first signal line 310, and the first virtual auxiliary routing 3321 includes a first sub-virtual auxiliary routing 3321a. The first sub-virtual auxiliary routing 3321a includes a first routing section 3321a1 and a second routing section 3321a2 located on either side of the first break 310a. Furthermore, the first routing section 3321a1 and the second routing section 3321a2 are adjusted to receive potential signals, thereby enabling the virtual auxiliary line 332 to transmit the relevant potential signal.

[0091] Specifically, refer to Figure 14 As shown, a plurality of first routing sections 3321a1 arranged along the fourth direction X4 can be electrically connected through the second virtual auxiliary routing 3322, that is, when the virtual auxiliary line 332 transmits an electrical signal, the electrical connection between the first routing sections 3321a1 can be achieved through the second virtual auxiliary routing 3322 (that is, electrical connection through vias, refer to FIG. Figure 14Further, when the plurality of first routing sections 3321a1 arranged along the fourth direction X4 can be electrically connected via the second virtual auxiliary routing 3322, the plurality of second routing sections 3321a2 arranged along the fourth direction X4 can be electrically connected directly to the signal bus transmitting the potential signal to obtain the relevant potential signal; or, referring to Figure 15 As shown, a plurality of second routing sections 3321a2 arranged along the fourth direction X4 can also be electrically connected via the second virtual auxiliary routing 3322, that is, when the virtual auxiliary line 332 transmits an electrical signal, the electrical connection relationship between the second routing sections 3321a2 can be achieved via the second virtual auxiliary routing 3322. It should be noted that, Figure 14 In the example, the first virtual auxiliary wiring 3321a is located on the side of the first data signal line 321 away from the light-transmitting hole 100. Figure 15 In the example, the first dummy auxiliary sub-line 3321a is located on a side of the first data signal line 321 close to the light-transmitting hole 100.

[0092] Similarly, the plurality of second routing sections 3321a2 arranged along the fourth direction X4 can be electrically connected via the second virtual routing section 3322, and the plurality of first routing sections 3321a1 arranged along the fourth direction X4 can be electrically connected directly to the signal bus transmitting the potential signal to obtain the relevant potential signal; or, referring to Figure 15 As shown, multiple second routing sections 3321a2 arranged along the fourth direction X4 can also be electrically connected through the second virtual auxiliary routing 3322, that is, when the virtual auxiliary line 332 transmits electrical signals, the electrical connection between the second routing sections 3321a2 can be achieved through the second virtual auxiliary routing 3322.

[0093] In other words, the first virtual auxiliary routing 3321 can be provided with a break in the auxiliary display area AA2, namely the first break 310a. However, the first virtual auxiliary routing 3321 can be electrically connected to the second virtual auxiliary routing 3322, thereby ensuring that the first virtual auxiliary routing 3321 with a break can still receive relevant electrical signals. However, in this case, the second virtual auxiliary routing 3322 extending along the fourth direction X4 needs to maintain a direct electrical connection with the first virtual auxiliary routing 3321. Therefore, for the second virtual auxiliary routing 3322 with a portion provided in the auxiliary display area AA2, it is configured as a routing continuously extending along the fourth direction X4, without a break.

[0094] In general, there are various electrical connection methods for the first wiring sub-portion 3321a1 and the second wiring sub-portion 3321a2, and the embodiments of the present invention will not be described one by one here.

[0095] Figure 16 is a schematic structural diagram of a third display panel provided by an embodiment of the present invention, Figure 17 is a schematic structural diagram of a fourth display panel provided by an embodiment of the present invention, Figure 18 is a schematic structural diagram of a fifth display panel provided by an embodiment of the present invention, referring to Figure 9 、 Figures 16 to 18 As shown, the display panel 10 further includes a signal bus 340 located in the non-display area NA, and the second dummy auxiliary trace 3322 is electrically connected to the signal bus 340 ; the signal bus 340 is located on at least one side of the display area AA along the fourth direction X4.

[0096] Specifically, refer to Figures 16 to 18 As shown, the display panel 10 further includes a signal bus 340, which is located in the non-display area NA of the display panel 10. The electrical signal transmitted in the signal bus 340 is electrically connected to the signal line 300 located in the display area AA. Figures 16 to 18 As shown, the signal bus 340 is electrically connected to the metal pad 341 corresponding to the non-display area NA. For example, the signal bus 340 can be used to transmit a power signal, such as a negative power signal (PVEE). The embodiment of the present invention does not specifically limit the type of signal transmitted by the signal bus 340.

[0097] Specifically, refer to Figures 16 to 18 As shown, the second auxiliary dummy trace 3322 can be electrically connected to the signal bus 340, that is, the dummy trace 332 is used to transmit the electrical signal provided by the signal bus 340. With respect to the first sub-dummy trace 3321a (that is, the first auxiliary dummy trace 3321 partially located in the auxiliary display area AA2), due to the presence of the first break 310a, to ensure that the first sub-dummy trace 3321a can obtain the relevant electrical signal, the first dummy trace 3321a is adjusted to be electrically connected to the second auxiliary dummy trace 3322, thereby achieving acquisition and transmission of the electrical signal.

[0098] Furthermore, the signal bus 340 disposed in the non-display area NA has flexibility in its location. Figure 16 As shown, the signal bus 340 is arranged around the display area AA, that is, the signal bus 340 surrounds the display area AA; or, referring to Figure 17 As shown, along the fourth direction X4, the signal bus 340 is located on one side of the display area AA; or, referring to Figure 18As shown, along the fourth direction X4, the signal bus lines 340 are located on both sides of the display area AA. The arrangement of the signal bus lines 340 in the non-display area NA is flexible and can be varied based on the different requirements of the display panel 10 or the different arrangements of the non-display area NA in the display surface 10. Examples are not provided one by one in the embodiments of the present invention.

[0099] Furthermore, the second auxiliary virtual line 3322 electrically connected to the signal bus 340 extends along the fourth direction, so the setting position of the signal bus 340 is adjusted to be located on at least one side of the display area AA along the fourth direction X4. This ensures that the setting relationship of the electrical connection between the second virtual auxiliary line 3322 and the signal bus 340 is simple, and thus the electrical signal transmitted in the signal bus 340 can be directly transmitted to the virtual auxiliary line 332 over a shorter distance, thereby ensuring that the transmission of the electrical signal is stable and reliable, thereby improving the overall effect of the display panel 10.

[0100] Furthermore, the second virtual auxiliary trace 3322 receives a fixed potential signal.

[0101] Specifically, the second virtual auxiliary line 3322 is electrically connected to the signal bus 320. Furthermore, the second virtual auxiliary line 3322 receives the fixed potential signal transmitted in the signal bus 320. The second virtual auxiliary line 3322 is electrically connected to the first virtual auxiliary line 3321, that is, the virtual auxiliary line 332 is used to receive and transmit the fixed potential signal.

[0102] Furthermore, on the one hand, it can avoid interference to the display panel 10 caused by coupling other signals due to the floating potential of the virtual auxiliary line 332. On the other hand, the virtual auxiliary line 332 is connected in parallel with the fixed potential signal line, which can reduce the resistance on the fixed potential signal line and ensure that the fixed potential signal has less loss during transmission.

[0103] Figure 19 is a structural diagram of a first pixel circuit provided by an embodiment of the present invention, Figure 20 The embodiment of the present invention provides a Figure 19 The timing of the signal of the pixel circuit shown in the embodiment, Figure 21 is a structural diagram of a second pixel circuit provided by an embodiment of the present invention, Figure 22 The embodiment of the present invention provides a Figure 21 The timing of the signal of the pixel circuit shown in the embodiment is shown in FIG. Figure 1 、 Figures 19 to 22 As shown, the fixed potential signal includes a power supply signal, an initialization signal or a bias adjustment signal.

[0104] The display panel 10 further includes a plurality of pixel circuits in the display area AA ( Figure 1 The pixel circuit is electrically connected to the light-emitting element 400 to drive the light-emitting element 400 and ensure that the light-emitting element 400 emits light. Furthermore, the signal line 200 in the display panel 10 can be configured to provide a voltage signal and / or a current signal to the pixel circuit, thereby enabling the pixel circuit to drive the light-emitting element 400.

[0105] The pixel circuits may be arranged in various ways, and thus the display panel 10 may be arranged in various ways. Figure 19 As shown, the pixel circuit is illustrated by "7T1C". Based on the setting mode of the pixel circuit, those skilled in the art can make adaptive adjustments as needed. The pixel circuit may include a first light-emitting control transistor T1, a data writing transistor T2, a driving transistor T3, a threshold compensation transistor T4, an initialization reset transistor T5, a second light-emitting control transistor T6, an anode reset transistor T7 and a storage capacitor Cst. Optionally, the types of transistors in the pixel circuit may be diverse. The transistor may include a low-temperature polysilicon transistor (LTPS), which has the advantages of high switching speed, high carrier mobility and low power.

[0106] Specifically, for the timing operation process of the pixel circuit, refer to Figure 20For example, the scanning signal line (shown as S1 in the figure) connected to the control terminal of the initialization reset transistor T5 can control the conduction and shutoff of the initialization reset transistor T5, and when the initialization reset transistor T5 is turned on, the initialization signal in the initialization signal line (shown as Vref1 in the figure) connected to the input terminal of the initialization reset transistor T5 is written to the gate of the driving transistor T3, that is, the initialization signal includes a gate initialization signal to reset the first node N1. The storage capacitor Cst is set to ensure that the potential of the first node N1 is stable. The scanning signal line (shown as SP in the figure) connected to the control terminal of the data write transistor T2 can control the conduction and shutoff of the data write transistor T2, and when the data write transistor T2 is turned on, the data signal on the data signal line (shown as Vdata in the figure) is written to the first electrode of the driving transistor T3. The scanning signal line (shown as S2 in the figure) connected to the control end of the threshold compensation transistor T4 can control the conduction and cutoff of the threshold compensation transistor T4, and compensate the threshold voltage of the driving transistor T3 when the threshold compensation transistor T4 is turned on; at the same time, the scanning signal line (shown as SP in the figure) connected to the control end of the anode reset transistor T7 can control the conduction and cutoff of the anode reset transistor T7, and reset the anode of the light-emitting element 400 connected to the pixel circuit when the anode reset transistor T7 is turned on, that is, the initialization signal on the anode initialization signal line (shown as Vref2 in the figure) is written to the anode of the light-emitting element 400, that is, the initialization signal includes the anode initialization signal. The light control signal line (shown as Emit in the figure) connected to the control terminal of the first light control transistor T1 and the control terminal of the second light control transistor T6 can control the conduction and shutoff of the control terminal of the first light control transistor T1 and the second light control transistor T6, and when the first light control transistor T1 and the second light control transistor T6 are turned on, the power signal transmitted by the positive power signal line PVDD is written to the anode of the light emitting element 400, and the cathode of the light emitting element 400 is connected to the negative power signal line PVEE, thereby realizing the display and light emission of the light emitting element 400. Specifically, refer to Figure 20As shown, a frame of the display panel 10 includes at least an initialization writing phase P1, a data writing phase P2, and a light emitting phase P3. In the initialization phase P1, the initialization reset transistor T5 is turned on under the control of the scanning signal line (shown as S1 in the figure), and the initialization signal in the initialization signal line (shown as Vref1 in the figure) is written to the first node N1 electrically connected to the gate of the driving transistor T3 to initialize the gate of the driving transistor T3. At the same time, since the threshold compensation transistor T4 is turned on, the initialization signal in the gate initialization signal line (shown as Vref1 in the figure) is simultaneously written to the second electrode of the driving transistor T3, that is, the N3 node. In the data writing phase P2, the data writing transistor T2 is turned on under the control of the scanning signal line (shown as SP in the figure), and the threshold compensation transistor T4 is turned on under the control of the scanning signal line (shown as S2 in the figure), so that the data signal Vdata is sequentially written to the gate of the driving transistor T3 through the data writing transistor T2, the driving transistor T3, and the threshold compensation transistor T4. At the same time, during the data writing phase P2, the anode reset transistor T7 is turned on under the control of the scanning signal line (indicated by SP in the figure), and the initialization signal on the anode initialization signal line (indicated by Vref2 in the figure) is written into the anode of the light-emitting element 400, thereby initializing the anode of the light-emitting element 400. During the light-emitting phase P3, the first light-emitting transistor T1 and the second light-emitting control transistor T6 are turned on under the control of the light-emitting control signal Emit, so that the driving transistor T3 generates a driving current that can be transmitted to the anode of the light-emitting element 400, thereby driving the light-emitting element 400 to emit light.

[0107] For further reference, Figure 19 As shown, the fixed potential signal connected to the pixel circuit can include a power signal and an initialization signal, wherein the power signal includes a positive power signal PVDD and a negative power signal PVEE, and the initialization signal includes a gate initialization signal and an anode initialization signal. Therefore, the fixed potential signal received by the second virtual auxiliary trace 3322 can be a power signal and / or an initialization signal.

[0108] For further reference, Figure 21 and Figure 22 As shown, the pixel circuit is illustrated as "8T1C". The pixel circuit may include a first light-emitting control transistor T1, a data writing transistor T2, a driving transistor T3, a threshold compensation transistor T4, an initialization reset transistor T5, a second light-emitting control transistor T6, an anode reset transistor T7, a bias transistor T8 and a storage capacitor Cst. Optionally, for Figure 17The pixel circuit shown includes low-temperature polysilicon transistors and may also include oxide transistors (Indium Gallium Zinc Oxide, IGZO). Oxide transistors have advantages such as low leakage current, while low-temperature polysilicon transistors have advantages such as high switching speed, high carrier mobility and low power.

[0109] Among them, the working process of the pixel circuit is similar to Figure 19 The process of the corresponding pixel circuit is similar and will not be described again here. Figure 21 In the pixel circuit, a scanning signal line (shown as Sp* in the figure) connected to the control end of the bias transistor T8 can control the on and off of the bias transistor T8, and when the bias transistor T8 is turned on, the bias adjustment signal transmitted by the bias adjustment signal line (shown as DVH in the figure) is written into the bias transistor T8, and the bias adjustment of the second node N2 is performed.

[0110] Specifically, for the timing operation process of the pixel circuit, refer to Figure 22 As shown, further, in a driving cycle Q of the pixel circuit, it includes a data writing stage Q1, a light emitting stage Q2 and a light emitting holding stage Q3, wherein the data writing stage Q1 includes a non-enable level stage of the light emitting control signal Emit, the light emitting stage Q2 includes an enable level stage of the light emitting control signal Emit, and in the light emitting holding stage Q3, the light emitting control signal Emit includes multiple non-enable level stages and at least one enable level stage ( Figure 22(An enable level stage is used as an example for explanation.) Meanwhile, the level of the bias adjustment signal on the bias adjustment signal line (shown as DVH in the figure) in the data writing stage Q1 and the light emitting stage Q2 can be the same as the level of the bias adjustment signal on the bias adjustment signal line (shown as DVH in the figure) in the light emitting holding stage Q3. Furthermore, the data writing phase Q1 includes a first bias adjustment phase Q11. In the first bias adjustment phase Q11, the signal transmitted by the scanning signal line (shown as SP* in the figure) includes at least one low-level period, and during this period, the signal transmitted by the scanning signal line (shown as S2N in the figure) includes at least one high-level period. In other words, in the first bias adjustment phase Q11, at least the bias transistor T8 and the threshold compensation transistor T4 are turned on, and the bias adjustment signal of the bias adjustment signal line (shown as DVH in the figure) is transmitted to the driving transistor T3 through the bias transistor T8, and then transmitted to the gate of the driving transistor T3 through the threshold compensation transistor T4. That is, in the first bias adjustment phase Q11, the bias signal can bias the first node N1, the second node N2, and the third node N3. The data writing phase Q1 also includes an initialization and second bias adjustment phase Q12. In the initialization and second bias adjustment phase Q12, the signal transmitted by the scanning signal line (shown as S2N in the figure) includes at least one high-level period. At the same time, there is also a signal transmitted by the scanning signal line (shown as S2N in the figure) including at least one high-level period. In other words, in the initialization and second bias adjustment phase Q12, the initialization transistor T5 is turned on, and the later threshold compensation transistor T4 is also turned on. The gate initialization reset signal in the initialization signal line (shown as Vref1 in the figure) can adjust the gate of the driving transistor T3 through the initialization transistor T5. The initialization signal line (shown as Vref1 in the figure) can also adjust the third node N3 through the initialization transistor T5 and the threshold compensation transistor T4. The data writing phase Q1 also includes a data signal writing phase Q13. During the data signal writing phase Q13, the signal transmitted by the scanning signal line (shown as S2N in the figure) includes a high-level period, and the signal transmitted by the scanning signal line (shown as SP** in the figure) includes at least one low-level period. In other words, during the data signal writing phase Q13, the data writing transistor T2 and the threshold compensation transistor T4 are turned on, and the data signal (shown as Vdata in the figure) on the data signal line can be transmitted to the gate of the driving transistor T3 through the data writing transistor T2 and the threshold compensation transistor T4. The data writing phase Q1 also includes a third bias adjustment phase Q14. During the third bias adjustment phase Q14, the signal transmitted by the scanning signal line (shown as SP* in the figure) includes at least one low-level period. During this period, the bias of the second phase N2 can be further adjusted via the bias transistor T8.

[0111] For further reference, Figure 21 As shown, the fixed potential signals connected to the pixel circuit can include a power signal, an initialization signal, and a bias adjustment signal. The power signal includes a positive power signal PVDD and a negative power signal PVEE, and the initialization signal includes a gate initialization reset signal and an anode reset signal. Therefore, the fixed potential signal received by the second virtual auxiliary trace 3322 can be at least one of the power signal, the initialization signal, and the bias adjustment signal.

[0112] The types of fixed potential signals received by the second virtual auxiliary trace 3322 are diverse and can be adaptively adjusted according to different display panels 10 . This embodiment of the present invention will not provide detailed examples.

[0113] Figure 23 yes Figure 1 The first enlarged schematic diagram of the middle area D, Figure 24 yes Figure 1 The second enlarged schematic diagram of the middle area D, Figure 25 yes Figure 1 The third enlarged schematic diagram of the middle area D, refer to Figures 23 to 25 As shown, the data signal line 320 includes a second data signal line 322 located in the main display area AA1 , and the second data signal line 322 includes a second main portion 3221 and a second bending portion 3222 that are electrically connected.

[0114] Specifically, Figures 23 to 24 yes Figure 1 The enlarged schematic diagram of the middle area D is Figures 23 to 24 1 is an enlarged schematic diagram of the display panel 10 in the main display area AA1. Specifically, the data signal line 320 includes a first data signal line 321 and a second data signal line 322. The first data signal line 321 is at least partially located in the auxiliary display area AA2, and the second data signal line 322 is located in the main display area AA1.

[0115] For further reference, Figure 24 As shown, the second data signal line 322 includes a second main body portion 3221 and a second bending portion 3222, and the second main body portion 3221 and the second bending portion 3222 are electrically connected. Figure 12 、 Figure 13 and Figure 24 As shown, the first data signal line 321 includes a first main portion 3211 and a first bending portion 3212, that is, the arrangement of the data signal line 320 is consistent, and both the first data signal line 321 and the second data signal line 322 have a main portion and a bending portion. This can simplify the process of preparing the data signal line 320. Further, corresponding to the reference Figure 11 and Figure 23As shown, the first data signal line 321 and the second data signal line 322 are similar.

[0116] Optional, reference Figure 25 As shown, the second data signal line 322 located in the main display area AA1 may also not have the second bending portion 3222 , which can reduce the space occupied by the data signal line 320 in the main display area AA1 and provide more space for other wiring.

[0117] For further reference, Figure 11 、 Figure 12 、 Figure 23 and Figure 24 As shown, the data signal line 320 includes a first data signal line 321, and at least a portion of a first data signal line 321 is located in the auxiliary display area AA2; the first data signal line 321 includes an electrically connected first main body portion 3211 and a first bending portion 3212; along the fourth direction X4, the orthographic projection of the first bending portion 3212 on the substrate 200 overlaps with the orthographic projection of the light-transmitting hole 100 on the substrate 200; two adjacent first data signal lines 321 include two adjacent first bending portions 3212, and the distance between the two adjacent first bending portions 3212 is L1; two adjacent second data signal lines 320 include two adjacent second bending portions 3222, and the distance between the two adjacent second bending portions 3222 is L2; ​​wherein, L1≥L2.

[0118] Specifically, refer to Figure 11 As shown, two adjacent first data signal lines 321 each include two adjacent first bending portions 3212, and along the fourth direction X4, the distance between the two adjacent first bending portions 3212 is L1. Figure 23 As shown, two adjacent second data signal lines 322 each include two adjacent second bends 3222, and along the fourth direction X4, the distance between the two adjacent second bends 3222 is L2, where L1 and L2 satisfy the relationship: L1 ≥ L2. This can be understood as the arrangement trend or arrangement method of the second bends 3222 in the second data signal line 322 located in the main display area AA1 being the same as or similar to the arrangement trend or arrangement method of the first bend 3212 in the first data signal line 321 located in the auxiliary display area AA2. In other words, the routing of the data signal lines 320 in the main display area AA1 and the auxiliary display area AA2 is balanced, which helps ensure a uniform display effect on the display panel 10.

[0119] Similarly, reference Figure 12 As shown, two adjacent first data signal lines 321 each include two adjacent first bending portions 3212, and along the fourth direction X4, the distance between the two adjacent first bending portions 3212 is L1. Figure 24 As shown, two adjacent second data signal lines 322 each include two adjacent second bends 3222, and along the fourth direction X4, the distance between the two adjacent second bends 3222 is L2, where L1 and L2 satisfy the relationship: L1 ≥ L2. This can be understood as the arrangement trend or arrangement method of the second bends 3222 in the second data signal line 322 located in the main display area AA1 being the same as or similar to the arrangement trend or arrangement method of the first bend 3212 in the first data signal line 321 located in the auxiliary display area AA2.

[0120] Continue to refer Figures 23 to 25 As shown, the first virtual auxiliary routing line 3321 includes a second sub-virtual auxiliary routing line 3321 b , and the second sub-virtual auxiliary routing line 3321 b is located in the main display area AA1 ; the second sub-virtual auxiliary routing line 3321 b is adjacent to the second data signal line 320 .

[0121] For further reference, Figure 23 As shown, the first virtual auxiliary trace 3321 includes a first sub-virtual auxiliary trace 3321a and a second sub-virtual auxiliary trace 3321b, wherein at least part of the structure of the first sub-virtual auxiliary trace 3321a is located in the auxiliary display area AA2, and the second sub-virtual auxiliary trace 3321b is located in the main display area AA1. Figure 24 and Figure 25 As shown, in the auxiliary display area AA2, the first virtual auxiliary routing line 3321 includes a second sub-virtual auxiliary routing line 3321b.

[0122] Furthermore, in the auxiliary display area AA2, a portion of the first dummy auxiliary sub-line 3321a is arranged adjacent to the first data signal line 321; in the main display area AA1, the second dummy auxiliary sub-line 3321b is arranged adjacent to the second data signal line 320. In other words, in the main display area AA1, a dummy auxiliary line 332 also exists, and in the auxiliary display area AA2, the dummy auxiliary line 332 is arranged adjacent to the data signal line 320, and in the main display area AA1, the dummy auxiliary line 332 is also arranged adjacent to the data signal line 320. The arrangement of the signal line 300 in the main display area AA1 and the auxiliary display area AA2 is similar.

[0123] refer to Figure 23 and Figure 24 As shown, along the fourth direction X4, the orthographic projection of the second sub-virtual auxiliary trace 3321b on the substrate 200 overlaps with the orthographic projection of the second bending portion 3222 on the substrate 200.

[0124] Furthermore, along the fourth direction X4, the orthographic projection of the second sub-virtual auxiliary trace 3321b on the substrate 200 overlaps with the orthographic projection of the second bending portion 3222 on the substrate 200, that is, the orthographic projection of the second sub-virtual auxiliary trace 3321b on the substrate 200 is compared with the orthographic projection of the second bending portion 3222 on the substrate 200, and the two projections overlap along the fourth direction X4. Or it can be understood that, with reference to Figure 23 and Figure 24 As shown, in a plan view (top view) that does not consider the positional relationship between the film layers where the second sub-virtual auxiliary routing 3321b and the second bend 3222 are located, along the fourth direction X4, the second bend 3222 overlaps the second sub-virtual auxiliary routing 3321b. That is, the second sub-virtual auxiliary routing 3321b is different from the first sub-virtual auxiliary routing 3321a. The first sub-virtual auxiliary routing 3321a has a first break 310a, but the second sub-virtual auxiliary routing 3321b does not have a break. The second sub-virtual auxiliary routing 3321b is an integral extended routing. This ensures that along the fourth direction X4, the orthographic projection of the second sub-virtual auxiliary routing 3321b on the substrate 200 overlaps with the orthographic projection of the second bend 3222 on the substrate 200.

[0125] Furthermore, the second sub-dummy auxiliary trace 3321b located in the main display area AA1 is not provided with a break, thereby ensuring continuity of signal transmission in the second sub-dummy auxiliary trace 3321b and further ensuring signal transmission effect in the display panel 10 .

[0126] Further, comparison Figure 23 and Figure 11 As shown, or compared Figure 24 and Figure 12 As shown, for the auxiliary display area AA2, it is necessary to improve the transmittance of this area, that is, to increase the transmittance of the light-transmitting hole 100. Therefore, a fracture design is performed on the second-word dummy auxiliary trace 3321a, that is, a first fracture 310a is added. For the main display area AA1, the transmittance of the display panel 10 does not need to be considered, so a fracture design is not required for the second-word dummy auxiliary trace 3321b. When the dummy auxiliary trace 332 transmits a potential signal, this can reduce the process of connecting through the via hole, thereby reducing the manufacturing cost of the display panel 10.

[0127] Figure 26 yes Figure 1 The fourth enlarged schematic diagram of the middle area D, Figure 27 yes Figure 1 The fifth enlarged schematic diagram of the middle area D, refer to Figure 26 and Figure 27As shown, the second sub-virtual auxiliary trace 3321b includes a second break 3321b1; along the fourth direction X4, the orthographic projection of the second break 3321b1 on the substrate 200 overlaps with the orthographic projection of the second bending portion 3222 on the substrate 200.

[0128] For further reference, Figure 26 and Figure 27 As shown, the second sub-virtual auxiliary trace 3321b includes a second break 3321b1. Along the fourth direction X4, the orthographic projection of the second break 3321b1 on the substrate 200 overlaps with the orthographic projection of the second bending portion 3222 on the substrate 200. That is, the orthographic projection of the second break 3321b1 on the substrate 200 is compared with the orthographic projection of the second bending portion 3222 on the substrate 200. The two projections overlap along the fourth direction X4. Or it can be understood that, with reference to Figure 26 and Figure 27 As shown, in a plan view (top view) that disregards the positional relationship between the second sub-virtual auxiliary routing 3321b and the film layer where the second bend 3222 is located, along the fourth direction X4, the second bend 3222 overlaps with the projection of the second fracture 3321b1. That is, the second sub-virtual auxiliary routing 3321b is close to the first sub-virtual auxiliary routing 3321a. The first sub-virtual auxiliary routing 3321a has the first fracture 310a. The second sub-virtual auxiliary routing 3321b also has a fracture, and the second sub-virtual auxiliary routing 3321b includes the second fracture 3321b1.

[0129] Furthermore, the second sub-virtual auxiliary routing 3321b located in the main display area AA1 is also provided with a fracture. When preparing the first virtual auxiliary routing 3321, a fracture design can be performed on both. That is, the first virtual auxiliary routing 3321 located in the main display area AA1 has a fracture (i.e., the first fracture 310a), and the first virtual auxiliary routing 3321 located in the auxiliary display area AA2 also has a fracture (i.e., the second fracture 3321b1). This ensures that the first virtual auxiliary routings 3321 have the same or similar arrangement pattern, thereby simplifying the difficulty in preparing the first virtual auxiliary routings 3321, that is, simplifying the difficulty in the process of preparing the routing of the display panel 10.

[0130] Further, comparison Figure 26 and Figure 11 As shown, or compared Figure 27 and Figure 12As shown, for the auxiliary display area AA2, it is necessary to improve the transmittance of this area and reduce the light blocking caused by the wiring, that is, to increase the transmittance of the through hole 100. Therefore, a fracture design is performed on the second-character dummy auxiliary wiring 3321a, that is, a first fracture 310a is added. For the main display area AA1, although the transmittance of the display panel 10 does not need to be considered, in order to ensure the uniformity of the wiring, a fracture design can also be performed on the second-character dummy auxiliary wiring 3321b, thereby reducing the difficulty of manufacturing the display panel 10.

[0131] Continue to refer Figure 27 As shown, along the third direction X3, the orthographic projection of the second bending portion 3222 on the substrate 200 overlaps with the orthographic projection of the second sub-virtual auxiliary trace 3321b on the substrate 200.

[0132] Specifically, along the third direction X3, the orthographic projection of the second bending portion 3222 on the substrate 200 overlaps with the orthographic projection of the second sub-virtual auxiliary trace 3321b on the substrate 200, that is, the orthographic projection of the second bending portion 3222 on the substrate 200 is compared with the orthographic projection of the second sub-virtual auxiliary trace 3321b on the substrate 200, and the two projections overlap along the third direction X3. Or it can be understood that, with reference to Figure 23 As shown, the second bending portion 3222 can extend to the second break 3321b1 of the second sub-virtual auxiliary routing 3321b, so along the third direction X3, the orthographic projection of the second bending portion 3222 on the substrate 200 overlaps with the orthographic projection of the second sub-virtual auxiliary routing 3321b on the substrate 200.

[0133] Further, in the auxiliary display area AA2, refer to Figure 12 As shown, part of the structure of the first data signal line 321 can be extended to the first break 310a, which can effectively increase the transmittance of the light-transmitting hole 100, thereby improving the overall transmittance of the display panel 10. In order to ensure the uniformity of the overall routing, at the main display area AA1, refer to Figure 27 As shown, a portion of the second data signal line 322 can also be extended to the second break 3321 b 1 to ensure the regularity of the overall routing of the display panel 10 .

[0134] Figure 28 is an enlarged schematic diagram of the eighth auxiliary display area provided by an embodiment of the present invention, referring to Figure 9 and Figure 28As shown, the data auxiliary line 331 includes an electrically connected first data auxiliary routing line 3311 and a second data auxiliary routing line 3312, the first data auxiliary routing line 3311 extends along the third direction X1 and is electrically connected to the fan-out routing line S0, and the second data auxiliary routing line 3312 extends along the fourth direction X4 and is electrically connected to the data signal line 320; the virtual auxiliary line 332 includes an electrically connected first virtual auxiliary routing line 3321 and a second virtual auxiliary routing line 3322, the first virtual auxiliary routing line 3321 extends along the third direction X1, and the second virtual auxiliary routing line 3322 extends along the fourth direction X4; the first virtual auxiliary routing line 3321 and the first data auxiliary routing line 3311 are on the same layer and are insulated, and the second virtual auxiliary routing line 3322 and the second data auxiliary routing line 3312 are on the same layer and are insulated; the first signal line 310 includes at least a portion of the second virtual auxiliary routing line 3322; the first direction X1 and the fourth direction X4 are the same direction, and the second direction X2 and the third direction X3 are the same direction.

[0135] Similarly, reference Figure 9 As shown, the data auxiliary line 331 includes a first data auxiliary line 3311 and a second data auxiliary line 3312 that are electrically connected. The extension of the first data auxiliary line 3311 is the same as the extension direction of the data signal line 320, and the extension direction of the second data auxiliary line 3312 intersects with the extension direction of the data signal line 320. Figure 9 Part of the data signal line 320 in the middle area B2 is first electrically connected to the second data auxiliary routing line 3312 extending along the fourth direction X4, and the second data auxiliary routing line 3312 is then electrically connected to the first data auxiliary routing line 3311 extending along the third direction X3, and the first data auxiliary routing line 3311 is then electrically connected to the fan-out routing line S0 in the fan-out area A1, thereby realizing the transmission of the data signal in the fan-out routing line S0 to the data signal line 320 through the data auxiliary line 331.

[0136] For further reference, Figure 9As shown, the virtual auxiliary line 332 includes an electrically connected first virtual auxiliary routing 3321 and a second virtual auxiliary routing 3322, the first virtual auxiliary routing 3321 and the first data auxiliary routing 3311 have the same extension direction, and the first virtual auxiliary routing 3321 and the first data auxiliary routing 3311 are insulated; the second virtual auxiliary routing 3322 and the second data auxiliary routing 3311 have the same extension direction, and the second virtual auxiliary routing 3322 and the second data auxiliary routing 3312 are insulated; by setting the first virtual auxiliary routing 3321 and the first data auxiliary routing 3311, the routing setting of the display panel 10 can be balanced in both the third direction X3 and the fourth direction X4, and the routing setting density in different areas can be balanced, thereby avoiding different light reflectivity in the display panel 10 due to unbalanced routing settings, and avoiding uneven display effects of the display panel 10.

[0137] Further, combined Figure 28 As shown, the fourth direction X3 can be the same direction as the first direction X1, and the third direction X3 can be the same direction as the second direction X2. In this way, the first signal line 310 can be understood as extending along the fourth direction X4. The second virtual auxiliary trace 3322 is a virtual auxiliary line 332, and the second virtual auxiliary trace 3322 is extended along the fourth direction X4. Therefore, the second virtual auxiliary trace 3322 can be at least partially located in the auxiliary display area AA2. Therefore, the first signal line 310 includes at least a portion of the second virtual auxiliary trace 3322, that is, the first signal line 310 includes the portion of the second virtual auxiliary trace 3322 located in the auxiliary display area AA2. Furthermore, since setting the second virtual auxiliary trace 3322 and setting the first virtual auxiliary trace 3321 as the first signal line 310 are similar, the embodiment of the second virtual auxiliary trace 3322 will not be repeated here.

[0138] Figure 29 yes Figure 1 Another enlarged schematic diagram of area B in the middle, Figure 30 yes Figure 29 A cross-sectional diagram along the section line F-F', refer to Figure 1 、 Figure 29 and Figure 30 As shown, the display panel 10 includes a plurality of light-emitting elements 400 , each of which includes a first electrode 401 , a second electrode 402 and a light-emitting layer 403 located between the first electrode 401 and the second electrode 402 ; in the thickness direction of the display panel 10 , the first electrode 401 and the first break 310 a overlap.

[0139] Specifically, refer to Figure 1 and Figure 29As shown, the display panel 10 includes a plurality of light emitting elements 400, and the display function of the display panel 10 is realized by the light emitting elements 400. Figure 30 As shown, the light emitting element 400 includes a first electrode 401 , a second electrode 402 and a light emitting layer 403 , wherein the first electrode 401 is located on a side of the second electrode 402 close to the substrate 200 , and the light emitting layer 403 is located between the first electrode 401 and the second electrode 402 .

[0140] For further reference, Figure 29 As shown, along the thickness direction of the display panel 10, the first electrode 401 covers the first break 310a. It should be noted that the second electrode 402 and the light-emitting layer 403 can be laid on the entire surface. Figure 25 The second electrode 402 and light-emitting layer 403 are not shown; only the first electrode 401 of the light-emitting element 400 is shown. By covering the first break 310a with the first electrode 401, that is, by shielding the break in the wiring, color shift caused by the break in the transmission light can be avoided, thereby ensuring the overall display quality of the display panel 10. Furthermore, shielding the first break 310a with the first electrode 401 also helps improve the overall flatness of the display panel 10.

[0141] Based on the same inventive concept, an embodiment of the present invention further provides a display device, Figure 31 is a structural diagram of a display device provided by an embodiment of the present invention, such as Figure 31 As shown, the display device 1 includes the display panel 10 described in any of the above embodiments. Therefore, the display device 1 provided by the embodiment of the present invention has the corresponding beneficial effects in the above embodiments, which will not be repeated here. Furthermore, the display device 1 also includes a photosensitive element 20, and along the thickness direction of the display device 10, the light-transmitting hole overlaps with the photosensitive element 20. Exemplarily, the display device 1 can be an electronic device such as a mobile phone, a computer, a smart wearable device (for example, a smart watch), and a vehicle-mounted display device; the photosensitive element 20 can be an under-screen camera, a fingerprint recognition module, or an ambient light sensor, etc., which is not limited in the embodiment of the present invention. It should be noted that in the display device 1, the number of photosensitive elements 20 set is diverse, Figure 31 Only one photosensitive element 20 is shown, or it can be understood as Figure 31 , the arrangement area of ​​at least one photosensitive element is shown. The specific arrangement of the photosensitive element can be adaptively adjusted according to the adjustment of the display device 1.

[0142] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: comprising a display area and a non-display area, wherein the non-display area at least partially surrounds the display area; The display area includes a main display area and an auxiliary display area, wherein the main display area at least partially surrounds the auxiliary display area; the auxiliary display area includes a light-transmitting hole, and the light-transmitting hole is used to transmit light to the photosensitive element; The display panel further includes a substrate and a plurality of signal lines, wherein the signal lines include a first signal line, and the first signal line extends along a first direction; the first signal line includes a first break; along a second direction, an orthographic projection of the first break on the substrate overlaps with an orthographic projection of the light-transmitting hole on the substrate; The first direction and the second direction intersect.

2. The display panel according to claim 1, characterized in that: The signal lines further include data signal lines, and a plurality of the data signal lines extend along a third direction and are arranged along a fourth direction; the third direction intersects with the fourth direction; The signal line also includes a plurality of auxiliary lines; The non-display area includes a fan-out area located at one side of the display area, and the fan-out area includes a plurality of fan-out wirings; The auxiliary lines include data auxiliary lines, at least part of one of the data auxiliary lines is located in the display area; at least part of the data signal lines are electrically connected to the fan-out wiring through the data auxiliary line; The auxiliary lines further include virtual auxiliary lines located in the display area, and the virtual auxiliary lines are in the same layer as the data auxiliary lines and are insulated; The first signal line includes the virtual auxiliary line.

3. The display panel according to claim 2, characterized in that: The data auxiliary line includes a first data auxiliary routing line and a second data auxiliary routing line that are electrically connected, the first data auxiliary routing line extends along the third direction and is electrically connected to the fan-out routing line, and the second data auxiliary routing line extends along the fourth direction and is electrically connected to the data signal line; The virtual auxiliary line includes a first virtual auxiliary line and a second virtual auxiliary line connected, the first virtual auxiliary line extends along the third direction, and the second virtual auxiliary line extends along the fourth direction; the first virtual auxiliary line and the first data auxiliary line are in the same layer and insulated, and the second virtual auxiliary line and the second data auxiliary line are in the same layer and insulated; The first signal line includes at least a portion of the first virtual auxiliary line; the first direction and the third direction are the same direction, and the second direction and the fourth direction are the same direction.

4. The display panel according to claim 3, characterized in that: The data signal lines include first data signal lines, at least a portion of one of the first data signal lines is located in the auxiliary display area; The first virtual auxiliary routing line includes a first sub-virtual auxiliary routing line, and at least a portion of one of the first sub-virtual auxiliary routing lines is located in the auxiliary display area; The first data signal line is arranged adjacent to the first sub-virtual auxiliary wiring.

5. The display panel according to claim 4, characterized in that: The first data signal line is located on a side of the first sub-virtual auxiliary wiring close to the light-transmitting hole; The first data signal line comprises a first main body portion and a first bending portion which are electrically connected; along the fourth direction, an orthographic projection of the first bending portion on the substrate overlaps with an orthographic projection of the light-transmitting hole on the substrate; Along the third direction, an orthographic projection of the first bending portion on the substrate overlaps with an orthographic projection of the first sub-virtual auxiliary routing on the substrate.

6. The display panel according to claim 4, characterized in that: The first data signal line is located on a side of the first sub-virtual auxiliary wiring close to the light-transmitting hole; The first data signal line comprises a first main body portion and a first bending portion which are electrically connected; along the fourth direction, an orthographic projection of the first bending portion on the substrate overlaps with an orthographic projection of the light-transmitting hole on the substrate; Along the third direction, an orthographic projection of the first bending portion on the substrate and an orthographic projection of the first sub-virtual auxiliary routing on the substrate do not overlap.

7. The display panel according to claim 4, characterized in that: The first data signal line is located at a side of the first sub-virtual auxiliary wiring away from the light-transmitting hole; in the thickness direction of the display panel, the first break and the light-transmitting hole overlap.

8. The display panel according to claim 4, characterized in that: The first sub-virtual auxiliary routing includes a first routing section and a second routing section respectively located on both sides of the first break; A plurality of the first routing sections arranged along the fourth direction are electrically connected via the second virtual auxiliary routing; And / or, a plurality of the second routing sections arranged along the fourth direction are electrically connected via the second virtual auxiliary routing.

9. The display panel according to claim 8, characterized in that: The display panel further comprises a signal bus located in the non-display area, and the second virtual auxiliary wiring is electrically connected to the signal bus; The signal bus is located at at least one side of the display area along the fourth direction.

10. The display panel according to claim 8, characterized in that: The second virtual auxiliary wiring receives a fixed potential signal.

11. The display panel according to claim 10, characterized in that: The fixed potential signal includes a power supply signal, an initialization signal or a bias adjustment signal.

12. The display panel according to claim 3, characterized in that: The data signal line includes a second data signal line located in the main display area, and the second data signal line includes a second main body portion and a second bending portion which are electrically connected.

13. The display panel according to claim 12, characterized in that: The data signal line comprises a first data signal line, at least a portion of which is located in the auxiliary display area; the first data signal line comprises a first main body portion and a first bending portion which are electrically connected; along the fourth direction, an orthographic projection of the first bending portion on the substrate overlaps with an orthographic projection of the light-transmitting hole on the substrate; Two adjacent first data signal lines include two adjacent first bending portions, and a distance between the two adjacent first bending portions is L1; Two adjacent second data signal lines include two adjacent second bending portions, and a distance between the two adjacent second bending portions is L2; Among them, L1≥L2.

14. The display panel according to claim 12, characterized in that: The first virtual auxiliary routing includes a second sub-virtual auxiliary routing, and the second sub-virtual auxiliary routing is located in the main display area; The second sub-dummy auxiliary wiring is adjacent to the second data signal line.

15. The display panel according to claim 14, characterized in that: Along the fourth direction, an orthographic projection of the second sub-virtual auxiliary routing line on the substrate overlaps with an orthographic projection of the second bending portion on the substrate.

16. The display panel according to claim 14, characterized in that: The second sub-virtual auxiliary routing includes a second break; Along the fourth direction, an orthographic projection of the second fracture on the substrate overlaps with an orthographic projection of the second bent portion on the substrate.

17. The display panel according to claim 16, characterized in that: Along the third direction, an orthographic projection of the second bending portion on the substrate overlaps with an orthographic projection of the second sub-virtual auxiliary routing on the substrate.

18. The display panel according to claim 2, characterized in that: The data auxiliary line includes a first data auxiliary routing line and a second data auxiliary routing line that are electrically connected, the first data auxiliary routing line extends along the third direction and is electrically connected to the fan-out routing line, and the second data auxiliary routing line extends along the fourth direction and is electrically connected to the data signal line; The virtual auxiliary line includes a first virtual auxiliary line and a second virtual auxiliary line connected, the first virtual auxiliary line extends along the third direction, and the second virtual auxiliary line extends along the fourth direction; the first virtual auxiliary line and the first data auxiliary line are in the same layer and insulated, and the second virtual auxiliary line and the second data auxiliary line are in the same layer and insulated; The first signal line includes at least a portion of the second virtual auxiliary routing line; the first direction and the fourth direction are the same direction, and the second direction and the third direction are the same direction.

19. The display panel according to claim 1, characterized in that: The display panel includes a plurality of light emitting elements, each of which includes a first electrode, a second electrode, and a light emitting layer located between the first electrode and the second electrode; In a thickness direction of the display panel, the first electrode and the first break overlap.

20. A display device, characterized in that: A display panel comprising any one of claims 1 to 19; The display device also includes a photosensitive element; Along the thickness direction of the display device, the light-transmitting hole overlaps with the photosensitive element.

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