Display panel and display device
By designing a pixel definition layer with a specific structure in the OLED display panel and optimizing the flow and curing of the ink, the problem of limited width of the OLED display panel border is solved, and a narrow-border display panel design is achieved.
Patent Information
- Application Number
- CN202411281571.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-12
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2044-09-12
AI Technical Summary
During the formation process of existing OLED display panels, the peripheral ink naturally dries, resulting in uneven film thickness, causing MURA phenomenon and low display quality, and the narrow bezel design is limited by the range of virtual pixels.
By designing a specific pixel definition layer in the display panel, including multiple opening groups spaced apart along a first direction, each opening group includes a first and a second opening, with the first connecting opening communicating with the adjacent second opening, and the second connecting opening communicating with the adjacent first opening or the adjacent first and second openings. The sizes and arrangement of these openings meet specific proportional relationships to control the flow and curing of ink.
By optimizing the size and arrangement of the openings, the flow resistance of the ink in the non-display area is reduced, the uniform solidification of the ink in the display area is ensured, and the range of the virtual pixels is reduced, thereby realizing a narrow-border display panel design.
Smart Images

Figure CN119156069B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] Organic Light Emitting Diodes (OLEDs) are considered the next generation of display devices due to their self-luminescence, high efficiency, vibrant colors, thinness, energy efficiency, and rollability, and have attracted increasing attention in recent years. When forming the light-emitting layer of an OLED display panel, inks containing different light-emitting materials are dripped into the pixel openings. After vacuum drying and other steps, the ink forms a film. During the period from the time the ink is dripped into the pixel openings to the time it dries and forms a film through vacuum drying, the ink on the periphery of the display panel naturally dries, resulting in a difference in film thickness and shape between the ink on the periphery and the ink in the center of the display panel. When the display panel is turned on, MURA is visible on the periphery of the display panel, indicating low quality.
[0003] Because the film formation on the periphery of a display panel is relatively thin, this area has traditionally been set as a non-luminous area (dummy pixels). Therefore, display panels must include dummy pixels. In order to achieve a narrow-frame display panel, it is essential to reduce the range of dummy pixels. Summary of the Invention
[0004] In view of this, the present application provides a display panel capable of reducing the range of virtual pixels to achieve a narrow frame.
[0005] To solve the above problems, the technical solutions provided by this application are as follows:
[0006] An embodiment of the present application provides a display panel, which includes a display area and a non-display area; the display panel also includes: an array substrate; a pixel definition layer, having a plurality of opening groups arranged at intervals along a first direction, each opening group including a plurality of first openings and a plurality of second openings, the first openings and the second openings are located in the display area, and the second openings are located in the non-display area, the plurality of second openings are arranged at intervals along a second direction intersecting the first direction, and the plurality of second openings are arranged around the plurality of first openings; and a light-emitting layer, including a plurality of light-emitting units and a plurality of virtual light-emitting units; one light-emitting unit is located in one first opening, and one virtual light-emitting unit is located in one second opening; wherein the pixel definition layer also includes a first connecting opening and a second connecting opening, the first connecting opening connects any two adjacent second openings, the second connecting opening connects any two adjacent first openings or connects adjacent first openings and second openings; the total size of the plurality of first connecting openings in the second direction is L1, the size of the plurality of first connecting openings in the first direction is b1, the size of one second connecting opening in the second direction is L2, and the size of one second connecting opening in the first direction is b2, then L1, L2, b1 and b2 satisfy: L1 / b1>L2 / b2.
[0007] In some embodiments of the present application, the pixel definition layer includes: a first pixel definition portion, located between any two adjacent ones of a plurality of first openings and a plurality of second openings; a second pixel definition portion, located between two adjacent opening groups and located at the outermost periphery of the display area and the non-display area; and a third pixel definition portion, located at both ends of the first pixel definition portion in the second direction and respectively connected to both ends of the first pixel definition portion in the second direction; the second direction intersects with the first direction; wherein the first pixel definition portion is connected to two adjacent second pixel definition portions at both ends in the first direction; the first opening is formed by enclosing adjacent first pixel definition portions and second pixel definition portions, and the second opening is formed by enclosing adjacent first pixel definition portions, second pixel definition portions and third pixel definition portions or by enclosing adjacent first pixel definition portions and second pixel definition portions; in the stacking direction of the array substrate and the pixel definition layer, the height of the first pixel definition portion is less than the height of the second pixel definition portion, and the opening between the adjacent first pixel definition portions and the second pixel definition portions is a first connection opening or a second connection opening.
[0008] In some embodiments of the present application, an overlapping area between the first pixel definition portion and the second pixel definition portion in the display area is greater than or equal to an overlapping area between the first pixel definition portion and the second pixel definition portion in the non-display area.
[0009] In some embodiments of the present application, the second pixel definition portion located in the non-display area includes a first sub-pixel definition portion and a second sub-pixel definition portion; the first sub-pixel definition portion is located between two adjacent opening groups and extends along the second direction, each second sub-pixel definition portion is connected to a first sub-pixel definition portion and extends along the first direction, and the opening between the first pixel definition portion and the two adjacent second sub-pixel definition portions is a first connecting opening; wherein the thickness of the first sub-pixel definition portion in the stacking direction of the array substrate and the pixel definition layer is greater than the thickness of the second sub-pixel definition portion in the stacking direction of the array substrate and the pixel definition layer, so as to form a concave-convex structure on the second pixel definition portion.
[0010] In some embodiments of the present application, in the stacking direction of the array substrate and the pixel definition layer, the second sub-pixel definition portion and the first pixel definition portion at least partially overlap, and the first sub-pixel definition portion is located on the first pixel definition portion; or the two ends of the first pixel definition portion in the first direction are respectively connected to the two adjacent second sub-pixel definition portions, and in the stacking direction of the array substrate and the pixel definition layer, the second sub-pixel definition portion and the first pixel definition portion do not overlap.
[0011] In some embodiments of the present application, the second pixel definition portion located in the display area includes a first sub-pixel definition portion, and the two ends of the first pixel definition portion in the first direction are respectively connected to two adjacent first sub-pixel definition portions, and the opening between the first pixel definition portion and the two adjacent first sub-pixel definition portions is a second connection opening.
[0012] In some embodiments of the present application, b1 and b2 also satisfy: b1 <b2。
[0013] In some embodiments of the present application, a size of the first connection opening close to the first opening in the first direction is smaller than a size of the first connection opening far from the first opening in the first direction.
[0014] In some embodiments of the present application, a dimension of the first connection opening in the first direction gradually decreases from a side away from the first opening to a side close to the first opening.
[0015] In some embodiments of the present application, b1 and b2 also satisfy: b1>2 / 3b2.
[0016] In some embodiments of the present application, L1 and L2 also satisfy: L1>L2.
[0017] In some embodiments of the present application, the opening density of the first openings per unit area is smaller than the opening density of the second openings and the third openings, and the size of each second opening in the second direction is smaller than the size of the first opening in the second direction.
[0018] In some embodiments of the present application, the first pixel definition portion further has an opening, which extends along the stacking direction of the array substrate and the pixel definition layer, and is connected to the first connection opening to form a concave-convex structure on the first pixel definition portion.
[0019] In some embodiments of the present application, the size of the gap between two adjacent openings is greater than 2 μm.
[0020] In some embodiments of the present application, the pixel definition layer also includes a third opening located in the display area and close to the non-display area, the third opening is located between the first opening and the second opening, and the size of the second connection opening located in the display area and close to the non-display area in the first direction is smaller than the size of the other second connection openings located in the display area in the first direction.
[0021] In some embodiments of the present application, the first pixel definition portion located in the non-display area has an opening, and the first pixel definition portion located in the display area does not have an opening, and the opening extends along the stacking direction of the array substrate and the pixel definition layer; the size of the first pixel definition portion in the display area in the first direction is larger than the size of the first pixel definition portion in the non-display area in the first direction.
[0022] In some embodiments of the present application, a size of a first pixel definition portion close to the display area in the first direction is smaller than a size of a first pixel definition portion far from the display area in the first direction.
[0023] In some embodiments of the present application, the density of the first pixel definition portion located in the non-display area is greater than the density of the first pixel definition portion located in the display area; the first pixel definition portion located in the non-display area has an opening, and the opening extends along the stacking direction of the array substrate and the pixel definition layer.
[0024] In some embodiments of the present application, a display device includes the display panel as described above.
[0025] The beneficial effects of this application are:
[0026] The display panel and display device provided by the present application include a display area and a non-display area; the display panel also includes: an array substrate; a pixel definition layer, having a plurality of opening groups arranged at intervals along a first direction, each opening group including a plurality of first openings and a plurality of second openings, the first opening is located in the display area, the second opening is located in the non-display area, the plurality of first openings and the plurality of second openings are arranged at intervals along the second direction, and the first direction intersects the second direction; and a light-emitting layer, including a plurality of light-emitting units and a plurality of virtual light-emitting units; one light-emitting unit is located in one first opening, and one virtual light-emitting unit is located in one second opening; wherein the pixel definition layer also includes a first connecting opening and a second connecting opening, the first connecting opening connects any two adjacent second openings, the second connecting opening connects any two adjacent first openings or connects adjacent first openings and second openings; the total size of the plurality of first connecting openings in the first direction is L1, the size of the plurality of first connecting openings in the first direction is b1, the size of the second connecting opening in the first direction is L2, and the size of the second connecting opening in the first direction is b2, then L1, L2, b1 and b2 satisfy: L1 / b1>L2 / b2. Since L1, L2, b1 and b2 of the display panel satisfy: L1 / b1>L2 / b2, b in the pressure loss calculation formula decreases, the pressure loss increases, and the resistance of the luminescent ink dripped into the second opening 42 to the first opening increases. The luminescent ink in the second opening is not easy to flow to the first opening, and the flow resistance of the luminescent ink in the first opening to the second opening also increases. The luminescent ink in the first opening is not easy to flow to the second opening. After curing, the thickness of the luminescent ink in the first opening remains basically the same. In this way, the range of the virtual pixel will not be further increased, which is equivalent to reducing the range of the virtual pixel, which is conducive to achieving a narrow frame. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] In order to more clearly illustrate the embodiments or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0028] Figure 1 A top view of a display panel provided in some embodiments of the present application.
[0029] Figure 2 for Figure 1 A cross-sectional view of the display panel along AA is shown.
[0030] Figure 3 for Figure 2 Schematic diagram of the film layer structure of the display panel at BB is shown.
[0031] Figure 4 for Figure 2 A cross-sectional view of the first pixel defining portion and the second pixel defining portion along CC is shown.
[0032] Figure 5 for Figure 2 Another cross-sectional view of the first pixel defining portion and the second pixel defining portion along CC is shown.
[0033] Figure 6 for Figure 2 A top view of another opening group of a pixel definition layer of a display panel is shown.
[0034] Figure 7 for Figure 2 A top view of another opening group in a pixel definition layer of a display panel is shown.
[0035] Figure 8 for Figure 2 A top view of another opening group in a pixel definition layer of a display panel is shown.
[0036] Figures 9 to 12 for Figure 2 A top view of the opening groups of the other four pixel definition layers of the display panel is shown.
[0037] Figure 13 A schematic diagram of a module of a display device provided in some embodiments of the present application. DETAILED DESCRIPTION
[0038] The following descriptions of the embodiments are made with reference to the attached diagrams to illustrate specific embodiments in which the present invention can be implemented. The directional terms mentioned in the present invention, such as [up], [down], [front], [back], [left], [right], [inside], [outside], [side], etc., are only with reference to the directions of the attached diagrams. Therefore, the directional terms used are used to illustrate and understand the present invention, rather than to limit the present invention. In the figures, units with similar structures are represented by the same reference numerals. In the accompanying drawings, the thickness of some layers and areas is exaggerated for clarity of understanding and ease of description. That is, the size and thickness of each component shown in the drawings are arbitrarily shown, but the present invention is not limited thereto.
[0039] Please refer to Figure 1 , Figure 1 is a top view of a display panel provided in an embodiment of the present application, Figure 2 for Figure 1 The cross-sectional view of the display panel along AA is shown, Figure 3 for Figure 2The display panel 100 may include a display area 101 and a non-display area 102 located on at least one side of the periphery of the display area 101 .
[0040] In one possible implementation, the non-display area 102 of the display panel 100 is an annular area, and the non-display area 102 of the display panel 100 may be distributed around the display area 101. The display panel 100 may include: an array substrate 110, a pixel definition layer 120, a light-emitting layer 130, and a second electrode layer 140. The pixel definition layer 120 is located on one side of the array substrate 110, the light-emitting layer 130 is located on a side of the pixel definition layer 120 away from the array substrate 110, and the second electrode layer 140 is located on a side of the light-emitting layer 130 away from the pixel definition layer 120. In this embodiment, the second electrode layer 140 is a cathode layer.
[0041] Please refer again Figure 3 The array substrate 110 includes a substrate 10, a transistor 20, and a first electrode layer 30. The transistor 20 is located on one side of the substrate 10. The first electrode layer 30 is located on a side of the transistor 20 away from the substrate 10. The pixel definition layer 120 covers the first electrode layer 30. The first electrode layer 30 includes a plurality of anode portions 31.
[0042] Please refer again Figure 2 The pixel definition layer 120 has a plurality of opening groups 121 arranged at intervals along a first direction X. Each opening group 121 includes a plurality of first openings 41 and a plurality of second openings 42. The first openings 41 are located in the display area 101. The second openings 42 are located on one side of the first openings 41 and in the non-display area 102. The plurality of second openings 42 are arranged at intervals along a second direction Y intersecting the first direction X. The plurality of second openings 42 are arranged around the plurality of first openings 41.
[0043] The pixel definition layer 120 also includes a first connection opening 44 and a second connection opening 45. The first connection opening 44 connects to any two adjacent second openings 42, and the second connection opening 45 connects to any two adjacent first openings 41. The total size of the multiple first connection openings 44 in the second direction Y is L1, the size of the multiple first connection openings 44 in the first direction X is b1, the size of one second connection opening 45 in the second direction Y is L2, and the size of one second connection opening 45 in the first direction X is b2. Then L1, L2, b1 and b2 satisfy: L1 / b1>L2 / b2.
[0044] The light-emitting layer 130 includes a plurality of light-emitting units 51 and a plurality of dummy light-emitting units 52 . One light-emitting unit 51 is located in one first opening 41 , and one dummy light-emitting unit 52 is located in one second opening 42 .
[0045] The pressure loss is calculated by the formula: ΔP is the pressure loss, μ is the dynamic viscosity coefficient, L is the length of the groove, Q is the flow rate, b is the width of the groove, and h is the depth of the groove.
[0046] When the pressure loss of the luminescent ink in the second opening 42 located in the non-display area 101 increases, the resistance of the luminescent ink dripped into the second opening 42 to flow toward the first opening 41 increases, and the luminescent ink in the second opening 42 is not easy to flow toward the first opening 41. The flow resistance of the luminescent ink in the first opening 41 to the second opening 42 also increases, and the luminescent ink in the first opening 41 is not easy to flow toward the second opening 42. After curing, the thickness of the luminescent ink in the first opening 41 remains basically the same. In this way, the range of the virtual pixel will not be further increased, which is equivalent to reducing the range of the virtual pixel, which is conducive to achieving a narrow frame.
[0047] Please continue reading Figure 3 , multiple anode portions 31 are connected one-to-one with multiple light-emitting units 51 and multiple virtual light-emitting units 52, the anode portion 31 corresponding to the light-emitting unit 51 is connected to the transistor 20, and the anode portion 31 corresponding to the virtual light-emitting unit 52 is not connected to the transistor 20.
[0048] In some embodiments of the present application, the plurality of light-emitting units 51 and the plurality of dummy light-emitting units 52 are made of the same material. The thickness of the plurality of light-emitting units 51 in the stacking direction of the array substrate and the pixel definition layer is greater than the thickness of the dummy light-emitting units 52 in the stacking direction of the array substrate and the pixel definition layer.
[0049] Please continue reading Figure 2The pixel definition layer 120 further includes a first pixel definition portion 46, a second pixel definition portion 47, and a third pixel definition portion 48. The first pixel definition portion 46 is located between any two adjacent first openings 41 and the second openings 42. The second pixel definition portion 47 is located between two adjacent opening groups 121 and is located at the outermost periphery of the display area 101 and the non-display area 102. The first pixel definition portion 46 is connected to the two adjacent second pixel definition portions 47 at both ends in the first direction X. The third pixel definition portion 48 is located at both ends of the first pixel definition portion 46 in the second direction Y and is connected to both ends of the first pixel definition portion 46 in the second direction Y. The second direction Y intersects the first direction X. The first opening 41 is located between adjacent first pixel definition portions 46 and second pixel definition portions 47, and the second opening 42 is located between adjacent first pixel definition portions 46, second pixel definition portions 47, and third pixel definition portions 48, or between adjacent first pixel definition portions 46 and second pixel definition portions 47. That is, the first opening 41 is formed by the adjacent first pixel defining portion 46 and the second pixel defining portion 47, and the second opening 42 is formed by the adjacent first pixel defining portion 46, the second pixel defining portion 47, and the third pixel defining portion 48, or by the adjacent first pixel defining portion 46 and the second pixel defining portion 47. In the stacking direction of the array substrate 110 and the pixel definition layer 120, the height of the first pixel defining portion 46 is less than the height of the second pixel defining portion 47, and the opening between the adjacent first pixel defining portion 46 and the second pixel defining portion 47 is the first connection opening 44 or the second connection opening 45.
[0050] See also Figure 4 and Figure 5 In some embodiments of the present application, the overlapping area between the first pixel definition portion 46 and the second pixel definition portion 47 located in the display area 101 is greater than or equal to the overlapping area between the first pixel definition portion 46 and the second pixel definition portion 47 located in the non-display area 102.
[0051] See also Figure 4 The second pixel definition portion 47 located in the non-display area 102 includes a first sub-pixel definition portion 471 and a second sub-pixel definition portion 472. The first sub-pixel definition portion 471 is located between two adjacent opening groups 121 and extends along the second direction Y. Each second sub-pixel definition portion 472 is connected to a first sub-pixel definition portion 471 and extends along the first direction X. The opening between two adjacent second sub-pixel definition portions 472 is a first connection opening 44.
[0052] In some embodiments of the present application, in the stacking direction of the array substrate 110 and the pixel definition layer 120 , the second sub-pixel definition portion 472 at least partially overlaps with the first pixel definition portion 46 , and the second sub-pixel definition portion 472 is located on the first pixel definition portion.
[0053] In some embodiments of the present application, the two ends of the first pixel defining portion 46 in the first direction X are respectively connected to two adjacent second sub-pixel defining portions 472. In the stacking direction of the array substrate 110 and the pixel defining layer 120, there is no overlap between the second sub-pixel defining portion 472 and the first pixel defining portion 46.
[0054] Among them, the second pixel defining portion 47 located in the display area 101 does not include the second sub-pixel defining portion 472, that is, the second pixel defining portion 47 located in the display area 101 only includes the first sub-pixel defining portion 471. The gap between two adjacent first sub-pixel defining portions 471 is the second connection opening 45.
[0055] Among them, the materials of the first pixel defining portion 46 and the second pixel defining portion 47 are different. In some embodiments of the present application, the materials of the second pixel defining portion 47 and the third pixel defining portion are the same.
[0056] In some embodiments of the present application, the size of the first opening 41 is equal to the size of the second opening 42, and b1 and b2 also satisfy: b1 < b2, that is, the size of the first connection opening 44 in the first direction X is smaller than the size of the second connection opening 45 in the first direction X. That is, the size of the first pixel defining portion 46 in the display area 101 in the first direction X is larger than the size of the first pixel defining portion 46 in the non-display area 102 in the first direction X. Correspondingly, the size of the second pixel defining portion 47 corresponding to each first pixel defining portion 46 in the non-display area 102 in the first direction X is smaller than the size of the second pixel defining portion 47 corresponding to each first pixel defining portion 46 in the display area 101 in the first direction X.
[0057] When the size of the first connection opening 44 in the first direction X decreases, that is, b in the pressure loss calculation formula decreases, the pressure loss increases, and the resistance to the flow of the light-emitting ink dripping into the second opening 42 towards the first opening 41 increases. It is not easy for the light-emitting ink in the second opening 42 to flow towards the first opening 41, and the flow resistance of the light-emitting ink in the first opening 41 towards the second opening 42 also increases. It is not easy for the light-emitting ink in the first opening 41 to flow towards the second opening 42. After curing, the thickness of the light-emitting ink in the first opening 41 basically remains the same. In this way, the range of the virtual pixel will not be further increased, which is equivalent to reducing the range of the virtual pixel, and is beneficial to achieving a narrow border.
[0058] In some embodiments of the present application, b1 and b2 also satisfy: b1 > 2 / 3b2. In this way, it can be avoided that when the width b1 of the first connection opening 44 is reduced to an extremely narrow degree, when forming the light-emitting layer by an inkjet printing process, the ink cannot be dropped into the corresponding second opening 42.
[0059] Where b1 is determined by b2 and the size of the ink droplet. In some embodiments of the present application, when the ink droplet size is 4 pl and b2 = 30 μm, b1 is preferably greater than 20 μm. Where pl is a unit of volume measurement, such as picoliter or picoliter.
[0060] See also Figure 3 In some embodiments of the present application, the dimension c1 of the second opening 42 in the first direction X and the dimension c2 of the first opening 41 in the first direction X further satisfy: c1=c2.
[0061] In some embodiments of the present application, the light emitting units 51 in the same opening group 121 emit lights of the same color, while the light emitting units 51 in two adjacent opening groups 121 emit lights of different colors.
[0062] In some embodiments of the present application, the color of the light emitted by the light emitting unit 51 can be one of red, green, blue, etc. Correspondingly, the light emitting unit 51 corresponds to red, green, blue, etc. pixels.
[0063] In the present application, the light-emitting layer 130 in the display panel 100 can be formed using an inkjet printing process. For example, during the inkjet printing process, an organic solution containing an organic light-emitting material can be sequentially printed into the first opening 41 and the second opening 42 of the pixel definition layer 120 using a print head. After the organic solution in the first opening 41 solidifies, the light-emitting unit 51 is formed in the first opening 41; after the organic solution in the second opening 42 solidifies, the dummy light-emitting unit 52 is formed in the second opening 42.
[0064] See also Figure 6 The present application also provides a display panel 200 , the structure of the display panel 200 is basically the same as that of the display panel 100 , the difference being that the structure of the pixel definition layer 220 of the display panel 200 is not completely the same as that of the pixel definition layer 120 of the display panel 100 .
[0065] In this embodiment, the size of the second opening 42 of the pixel definition layer 220 is smaller than that of the first opening 41, and b1 and b2 satisfy: b1 < b2. That is, the size b1 of the first connection opening 44 in the first direction X is smaller than the size b2 of the second connection opening 45 in the first direction. That is, the size of the first pixel definition portion 46 close to the display area 101 in the first direction X is smaller than the size of the first pixel definition portion 46 far from the display area 101 in the first direction X. Thus, b in the pressure loss calculation formula decreases, the pressure loss increases, the resistance when the light-emitting ink dropped into the second opening 42 flows toward the first opening 41 increases, the light-emitting ink in the second opening 42 is not easily to flow toward the first opening 41, the flow resistance of the light-emitting ink in the first opening 41 toward the second opening 42 also increases, and the light-emitting ink in the first opening 41 is not easily to flow toward the second opening 42. After curing, the thickness of the light-emitting ink in the first opening 41 basically remains the same. Thus, the range of the virtual pixels will not be further increased, which is equivalent to reducing the range of the virtual pixels, and is beneficial to achieving a narrow border.
[0066] In some embodiments of the present application, the size of the first connection opening 44 of the pixel definition layer 220 gradually decreases from the side far from the first opening 41 to the side close to the first opening 41 in the first direction X. The size of the second opening 42 of the pixel definition layer 220 gradually decreases from the side far from the first opening 41 to the side close to the first opening 41. Correspondingly, the size of the second sub-pixel definition portion 472 located in the non-display area 102 gradually increases in the first direction X. Correspondingly, b1, b2, c1 and c2 also satisfy: b1 < b2; and c1 ≤ c2. Thus, the resistance when the light-emitting ink dropped into the second opening 42 flows toward the first opening 41 gradually increases in the first direction X, the light-emitting ink in the second opening 42 is more not easily to flow toward the first opening 41, the flow resistance of the light-emitting ink in the first opening 41 toward the second opening 42 is further increased, and the light-emitting ink in the first opening 41 is more not easily to flow toward the second opening 42. After curing, the thickness of the light-emitting ink in the first opening 41 basically remains the same. Thus, it is more beneficial to achieve a narrow border.
[0067] In some embodiments of the present application, b1 is greater than 20 μm. Thus, it can be avoided that when the width b1 of the first connection opening 44 is reduced to an extremely narrow level, the ink cannot be dropped into the corresponding second opening 42 when forming the light-emitting layer by an inkjet printing process.
[0068] Among them, b1 is determined by b2 and the size of the ink droplet. b1 and b2 also satisfy: b1 > 2 / 3b2.
[0069] In some embodiments of the present application, when the size of the ink droplet is 4 pl and b2 = 30 μm, b1 and c1 are preferably greater than 20 μm.
[0070] See also Figure 7 The present application also provides a display panel 300 , the structure of the display panel 300 is basically the same as that of the display panel 100 , except that the structure of the pixel definition layer 320 of the display panel 300 is not completely the same as that of the pixel definition layer 120 of the display panel 100 .
[0071] In this embodiment, the number of first pixel definition portions 46 located within the non-display area 102 of the pixel definition layer 320 is increased. Specifically, the dimension d1 of each second opening 42 in the second direction Y is smaller than the dimension d2 of the first opening 41 in the second direction Y. The opening density of the first openings 41 per unit area is lower than the opening density of the second openings 42. In other words, the density of the first pixel definition portions 46 located within the non-display area 102 is greater than the density of the first pixel definition portions 46 located within the display area 101. As the number of first pixel definition portions 46 increases, the number of first connection openings 44 within the non-display area 102 also increases. Consequently, the total length of the first connection openings 44 in the second direction Y increases, i.e., L1 increases. L1 and L2 also satisfy the following relationship: L1 > L2. In this way, L in the pressure loss calculation formula increases, the pressure loss increases, the resistance of the luminescent ink dripped into the second opening 42 to the first opening 41 increases, the luminescent ink in the second opening 42 is not easy to flow to the first opening 41, the flow resistance of the luminescent ink in the first opening 41 to the second opening 42 also increases, and the luminescent ink in the first opening 41 is not easy to flow to the second opening 42. After curing, the thickness of the luminescent ink in the first opening 41 remains basically the same, which is more conducive to achieving a narrow frame.
[0072] See also Figure 8 The present application also provides a display panel 400 , the structure of the display panel 400 is basically the same as that of the display panel 100 , except that the structure of the pixel definition layer 420 of the display panel 400 is not completely the same as that of the pixel definition layer 120 of the display panel 100 .
[0073] In this embodiment, the first pixel definition portion 46 of the pixel definition layer 420 further includes an opening 461, which extends along the stacking direction of the array substrate 110 and the pixel definition layer 420. The opening 461 communicates with the first connection opening 44, forming a concave-convex structure on the first pixel definition portion 46. The opening 461 increases the total length L1 of the first connection opening 44 in the second direction Y (the total length is equal to the sum of the dimension of the first connection opening 44 in the second direction Y and the opening depth of the opening 461). That is, L1 and L2 also satisfy the following: L1>L2. This increases L in the pressure loss calculation formula, increasing pressure loss. This increases the resistance to flow of the luminescent ink dripping into the second opening 42 toward the first opening 41, making it difficult for the luminescent ink in the second opening 42 to flow toward the first opening 41. The resistance to flow of the luminescent ink in the first opening 41 toward the second opening 42 also increases, making it difficult for the luminescent ink in the first opening 41 to flow toward the second opening 42. After curing, the thickness of the luminescent ink in the first opening 41 remains substantially consistent, further facilitating the realization of a narrow frame.
[0074] In some embodiments of the present application, the gap between two adjacent openings 461 is larger than 2 μm, which facilitates development and reduces manufacturing difficulty.
[0075] See also Figure 9 The present application also provides a display panel 500. The structure of the display panel 500 is substantially the same as that of the display panel 100, except that the structure of the pixel definition layer 520 of the display panel 500 is not identical to that of the pixel definition layer 120 of the display panel 100. The pixel definition layer 520 includes a third opening 43 located in the display area 101 and adjacent to the non-display area 102. The third opening 43 is located between the first opening 41 and the second opening 42. The "third opening 43" herein can also be understood as a "first opening" located adjacent to the second opening 42. The second connection opening 45 of the pixel definition layer 520 located in the display area 101 and adjacent to the non-display area 102 has a dimension d21 in the first direction X that is smaller than the dimension d2 of the other second connection openings 45 located in the display area 101. The presence of the third opening 43 can further prevent luminescent ink dripping into the second opening 42 from flowing toward the third opening 43. This prevents the range of the virtual pixel from being further expanded, which is equivalent to reducing the range of the virtual pixel, further facilitating the realization of a narrow frame.
[0076] See also Figure 10 The present application also provides a display panel 600 . The structure of the display panel 600 is basically the same as that of the display panel 100 . The difference is that an opening 461 is further provided on the pixel definition layer 620 located in the non-display area 102 of the display panel 600 .
[0077] In the display panel provided in this embodiment, b1 < b2 causes b in the pressure loss calculation formula to decrease, and the pressure loss increases; the opening 461 causes L1 > L2, and L in the pressure loss calculation formula increases, resulting in an increase in the pressure loss. The combination of b1 < b2 and the opening 461 further increases the pressure loss, further increasing the resistance when the light-emitting ink dropped into the second opening 42 flows toward the first opening 41. It is not easy for the light-emitting ink in the second opening 42 to flow toward the first opening 41. The flow resistance of the light-emitting ink in the first opening 41 toward the second opening 42 also further increases, and it is not easy for the light-emitting ink in the first opening 41 to flow toward the second opening 42. After curing, the thickness of the light-emitting ink in the first opening 41 is basically kept consistent. Thus, it is more conducive to achieving a narrow border.
[0078] Please refer to Figure 11 , this application also provides a display panel 700. The structure of the display panel 700 is basically the same as that of the display panel 200, except that an opening 461 is further provided on the pixel definition layer 720 located in the non-display area 102 of the display panel 700.
[0079] In the display panel provided in this embodiment, the size of the first connection opening 44 of the pixel definition layer in the first direction X gradually decreases from the side far from the first opening 41 to the side close to the first opening 41, causing b in the pressure loss calculation formula to decrease, and the pressure loss further increases; the opening 461 causes L1 > L2, and L in the pressure loss calculation formula increases, resulting in an increase in the pressure loss. The combination of the two further increases the pressure loss, further increasing the resistance when the light-emitting ink dropped into the second opening 42 flows toward the first opening 41. It is not easy for the light-emitting ink in the second opening 42 to flow toward the first opening 41. The flow resistance of the light-emitting ink in the first opening 41 toward the second opening 42 also further increases, and it is not easy for the light-emitting ink in the first opening 41 to flow toward the second opening 42. After curing, the thickness of the light-emitting ink in the first opening 41 is basically kept consistent. Thus, it is more conducive to achieving a narrow border.
[0080] Please refer to Figure 12 , this application also provides a display panel 800. The structure of the display panel 800 is basically the same as that of the display panel 300, except that an opening 461 is further provided on the pixel definition layer 820 located in the non-display area 102 of the display panel 800.
[0081] The display panel provided in this embodiment has an increased number of first pixel defining portions 46 and a greater number of first connection openings 44 within the non-display area 102. This increases the total length of the first connection openings 44 in the second direction Y, i.e., L1. The openings 461 ensure that L1 is greater than L2, increasing L in the pressure loss calculation formula and increasing pressure loss. This combination further increases pressure loss, further increasing the resistance to flow of luminescent ink dropped into the second openings 42 toward the first openings 41. This makes it difficult for the luminescent ink in the second openings 42 to flow toward the first openings 41. The resistance to flow of the luminescent ink in the first openings 41 toward the second openings 42 is also increased, making it difficult for the luminescent ink in the first openings 41 to flow toward the second openings 42. After curing, the thickness of the luminescent ink in the first openings 41 remains substantially consistent, further facilitating the realization of a narrow bezel.
[0082] The improvements involved in the above-mentioned display panels 100 , 200 , 300 , 400 and 500 may be combined as needed.
[0083] See also Figure 13 The present application further provides a display device 1000, which includes the display panel 100 / 200 / 300 / 400 / 500 described above. The display device 1000 can be an electronic device such as a mobile phone, a computer, a watch, or a display screen.
[0084] The display panel and display device provided by the present application include a display area and a non-display area; the display panel also includes: an array substrate; a pixel definition layer, having a plurality of opening groups arranged at intervals along a first direction, each opening group including a plurality of first openings and a plurality of second openings, the first opening is located in the display area, the second opening is located in the non-display area, the plurality of first openings and the plurality of second openings are arranged at intervals along the second direction, and the first direction intersects the second direction; and a light-emitting layer, including a plurality of light-emitting units and a plurality of virtual light-emitting units; one light-emitting unit is located in one first opening, and one virtual light-emitting unit is located in one second opening; wherein the pixel definition layer also includes a first connecting opening and a second connecting opening, the first connecting opening connects any two adjacent second openings, the second connecting opening connects any two adjacent first openings or connects adjacent first openings and second openings; the total size of the plurality of first connecting openings in the first direction is L1, the size of the plurality of first connecting openings in the first direction is b1, the size of the second connecting opening in the first direction is L2, and the size of the second connecting opening in the first direction is b2, then L1, L2, b1 and b2 satisfy: L1 / b1>L2 / b2. Since L1, L2, b1 and b2 of the display panel satisfy: L1 / b1>L2 / b2, b in the pressure loss calculation formula decreases, the pressure loss increases, and the resistance of the luminescent ink dripped into the second opening 42 to the first opening increases. The luminescent ink in the second opening is not easy to flow to the first opening, and the flow resistance of the luminescent ink in the first opening to the second opening also increases. The luminescent ink in the first opening is not easy to flow to the second opening. After curing, the thickness of the luminescent ink in the first opening remains basically the same. In this way, the range of the virtual pixel will not be further increased, which is equivalent to reducing the range of the virtual pixel, which is conducive to achieving a narrow frame.
[0085] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0086] The above is a detailed introduction to the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A display panel comprising a display area and a non-display area; characterized in that: The display panel also includes: array substrate; a pixel definition layer having a plurality of opening groups arranged at intervals along a first direction, each of the opening groups including a plurality of first openings and a plurality of second openings, the first openings being located in a display area, the second openings being located in a non-display area, the plurality of second openings being arranged at intervals along a second direction intersecting the first direction, and the plurality of second openings being arranged around the plurality of first openings; and The light-emitting layer includes a plurality of light-emitting units and a plurality of virtual light-emitting units; one of the light-emitting units is located in one of the first openings, and one of the virtual light-emitting units is located in one of the second openings; The pixel definition layer further includes a first connecting opening and a second connecting opening, wherein the first connecting opening is connected to any two adjacent second openings, and the second connecting opening is connected to any two adjacent first openings or to adjacent first openings and second openings; The total size of the plurality of first connection openings in the second direction is L1, the size of the plurality of first connection openings in the first direction is b1, the size of one second connection opening in the second direction is L2, and the size of one second connection opening in the first direction is b2, then L1, L2, b1, and b2 satisfy: L1 / b1>L2 / b2.
2. The display panel according to claim 1, wherein The pixel definition layer includes: A first pixel defining portion is located between any two adjacent ones of the plurality of first openings and the plurality of second openings; and A second pixel definition portion is located between two adjacent opening groups and at the outermost periphery of the display area and the non-display area; a third pixel defining portion, located between the first pixel defining portions and connected to both ends of the first pixel defining portions in the second direction; Wherein, two ends of the first pixel definition portion in the first direction are respectively connected to two adjacent second pixel definition portions; The first opening is formed by the adjacent first pixel definition portion and the second pixel definition portion, and the second opening is formed by the adjacent first pixel definition portion, the second pixel definition portion and the third pixel definition portion or by the adjacent first pixel definition portion and the second pixel definition portion; in the stacking direction of the array substrate and the pixel definition layer, the height of the first pixel definition portion is smaller than the height of the second pixel definition portion, and the opening between the adjacent first pixel definition portion and the second pixel definition portion is the first connection opening or the second connection opening.
3. The display panel according to claim 2, wherein: An overlapping area between the first pixel definition portion and the second pixel definition portion located in the display area is greater than or equal to an overlapping area between the first pixel definition portion and the second pixel definition portion located in the non-display area.
4. The display panel according to claim 3, wherein: The second pixel definition portion located in the non-display area includes a first sub-pixel definition portion and a second sub-pixel definition portion; The first sub-pixel definition portion is located between two adjacent opening groups and extends along the second direction, each second sub-pixel definition portion is connected to a first sub-pixel definition portion and extends along the first direction, and the opening between the first pixel definition portion and two adjacent second sub-pixel definition portions is a first connecting opening; In which, the thickness of the first sub-pixel definition part in the stacking direction of the array substrate and the pixel definition layer is greater than the thickness of the second sub-pixel definition part in the stacking direction of the array substrate and the pixel definition layer, so as to form a concave-convex structure on the second pixel definition part.
5. The display panel according to claim 4, wherein: In the stacking direction of the array substrate and the pixel definition layer, the second sub-pixel definition portion at least partially overlaps with the first pixel definition portion, and the second sub-pixel definition portion is located on the first pixel definition portion; or Both ends of the first pixel definition portion in the first direction are respectively connected to two adjacent second sub-pixel definition portions, and in the stacking direction of the array substrate and the pixel definition layer, the second sub-pixel definition portion does not overlap with the first pixel definition portion.
6. The display panel according to claim 4 or 5, wherein: The second pixel definition portion located in the display area includes the first sub-pixel definition portion, and the two ends of the first pixel definition portion in the first direction are respectively connected to the two adjacent first sub-pixel definition portions, and the opening between the first pixel definition portion and the two adjacent first sub-pixel definition portions is a second connection opening.
7. The display panel according to claim 1, wherein: b1 and b2 also satisfy: b1 <b2。 8. The display panel according to claim 7, wherein: A size of the first connecting opening close to the first opening in the first direction is smaller than a size of the first connecting opening far from the first opening in the first direction.
9. The display panel according to claim 8, wherein: The size of the first connection opening in the first direction gradually decreases from a side away from the first opening to a side close to the first opening.
10. The display panel according to any one of claims 7 to 9, wherein: b1 and b2 also satisfy: b1>2 / 3b2.
11. The display panel according to any one of claims 1 to 5 and 7 to 9, wherein: The L1 and L2 also satisfy: L1>L2.
12. The display panel according to claim 11, wherein: An opening density of the first openings per unit area is smaller than an opening density of the second openings, and a size of each of the second openings in the second direction is smaller than a size of the first opening in the second direction.
13. The display panel according to claim 11, wherein: The first pixel definition portion further has an opening, which extends along the stacking direction of the array substrate and the pixel definition layer. The opening is connected to the first connection opening to form a concave-convex structure on the first pixel definition portion.
14. The display panel according to claim 13, wherein: The size of the gap between two adjacent openings is greater than 2 μm.
15. The display panel according to any one of claims 1 to 5 and 7 to 9, wherein: The pixel definition layer also includes a third opening located in the display area and close to the non-display area, the third opening is located between the first opening and the second opening, and the size of the second connection opening located in the display area and close to the non-display area in the first direction is smaller than the size of the other second connection openings located in the display area in the first direction.
16. The display panel according to claim 2, wherein: The first pixel definition portion located in the non-display area has an opening, and the first pixel definition portion located in the display area does not have an opening, and the opening extends along the stacking direction of the array substrate and the pixel definition layer; the size of the first pixel definition portion in the display area in the first direction is greater than the size of the first pixel definition portion in the non-display area in the first direction.
17. The display panel according to claim 16, wherein: A size of the first pixel definition portion close to the display area in the first direction is smaller than a size of the first pixel definition portion far from the display area in the first direction.
18. The display panel according to claim 2, wherein: The density of the first pixel definition portion located in the non-display area is greater than the density of the first pixel definition portion located in the display area; the first pixel definition portion located in the non-display area has an opening, and the opening extends along the stacking direction of the array substrate and the pixel definition layer.
19. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 18.
Citation Information
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