Current monitoring circuit, chip and electronic equipment

Abstract

The invention provides a current monitoring circuit, a chip and electronic equipment, and relates to the technical field of electronic circuits, and the circuit comprises a sampling circuit, an operational amplifier circuit and a signal processing circuit; the sampling circuit is connected with a sampling resistor of a monitoring target and outputs sampling voltage to the operational amplifier circuit; the operational amplification circuit outputs the sampling voltage difference after operational amplification to the signal processing circuit; the signal processing circuit comprises a multi-gear voltage generation module and a comparator, and the output end of the multi-gear voltage generation module is connected with the positive input end of the comparator so as to output target reference voltage to the comparator; the output end of the operational amplifier is connected with the negative input end of the comparator, the comparator outputs a feedback signal according to the target reference voltage and the sampling voltage difference, and the feedback signal is used for controlling the working state of a connecting chip; the multi-gear voltage generation module is used for generating reference voltages corresponding to different target currents. The method can adapt to multiple scenes with different current requirements.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a current monitoring circuit, a chip and an electronic device. Background Art

[0002] Current monitoring at the power supply end can realize overcurrent protection of the circuit. At present, the overcurrent protection circuit measures the current of the branch through a sampling resistor and then processes it through voltage conversion, amplification, voltage comparison, etc., and finally outputs a digital control signal for feedback control of the entire circuit.

[0003] In common overcurrent protection circuits, the signal flip point is a fixed value. In order to prevent current jitter from causing incorrect shutdown of the chip and system instability, hysteresis overcurrent protection is usually used. However, the hysteresis amount is also a fixed value, and the hysteresis overcurrent protection is likely to cause the chip to burn out when dealing with instantaneous large currents. It cannot be adaptively adjusted according to the specific needs and application scenarios of the chip, and is not applicable to occasions with large load changes or high current accuracy requirements.

[0004] In other words, the existing overcurrent protection solution cannot meet the needs of multiple scenarios and has low adaptability.

[0005] It should be noted that the above statements are only used to provide background technical information related to the present application and do not necessarily constitute prior art. Summary of the invention

[0006] In view of this, the purpose of the present invention is to propose a power supply end current monitoring circuit, chip and electronic device. The present invention can specifically solve the problem that the existing overcurrent protection scheme cannot meet the needs of multiple scenarios and has low adaptability.

[0007] Based on the above purpose, in the first aspect, the present invention proposes a current monitoring circuit, which includes: a sampling circuit, an operational amplifier circuit and a signal processing circuit; the sampling circuit is connected to a sampling resistor of a monitoring target, and is connected to the operational amplifier circuit through a sampling output terminal to output a sampling voltage to the operational amplifier circuit; the operational amplifier circuit is connected to the signal processing circuit through an operational amplifier output terminal to output the sampling voltage difference after operational amplification to the signal processing circuit; the signal processing circuit includes a multi-level voltage generating module and a comparator, the output terminal of the multi-level voltage generating module is connected to the positive input terminal of the comparator to output a target reference voltage to the comparator; the operational amplifier output terminal is connected to the negative input terminal of the comparator, and the comparator outputs a feedback signal according to the size of the target reference voltage and the sampling voltage difference, and the feedback signal is used to control the working state of the connection chip; wherein the multi-level voltage generating module is used to generate reference voltages corresponding to different target currents.

[0008] In some embodiments, the sampling circuit includes: a first constant current source module and a common-gate operational amplifier module; the first constant current source module is used to provide a stable first current for the common-gate operational amplifier module; the common-gate operational amplifier module includes a first transistor, a second transistor and a third transistor, the gates of the first transistor, the second transistor and the third transistor are connected to each other, the source of the first transistor and the second transistor is connected to one end of the sampling resistor, the source of the third transistor is connected to the other end of the sampling resistor, the drain of the first transistor is connected to the first constant current source module, the drain of the second transistor is connected to the first sampling output end, the drain of the third transistor is connected to the second sampling output end, and the first sampling output end and the second sampling output end are connected to the operational amplifier circuit.

[0009] In some embodiments, the sources of the first transistor, the second transistor and the third transistor are also connected to source negative feedback resistors, respectively; the first constant current source module, the first sampling output terminal and the second sampling output terminal are also grounded through current limiting resistors and clamping diodes, respectively, and the current limiting resistor and the clamping diode are connected in parallel.

[0010] In some embodiments, the multi-level voltage generating module includes a basic current providing circuit and a voltage level switching circuit; the basic current providing circuit is used to generate a basic current and output the target reference voltage; the voltage level switching circuit includes a plurality of sub-modules, each sub-module is connected in parallel with the basic current providing circuit, and the voltage level switching circuit is used to control the conduction or shutdown of each sub-module based on a level control signal to generate different target currents, the target current has a multiple relationship with the basic current, and the target reference voltage is obtained based on the target current.

[0011] In some embodiments, the voltage gear switching circuit includes 4 sub-modules, and the basic current providing circuit includes a second constant current source module, a fourth transistor, a fifth transistor, an eighteenth transistor, a nineteenth transistor, a twentieth transistor and an output resistor; the second constant current source module is used to provide a stable second current for the voltage gear switching circuit; the second constant current source module, the drain of the fifth transistor, the source of the fifth transistor, the drain of the fourth transistor, the source of the fourth transistor, the source of the eighteenth transistor, the drain of the eighteenth transistor, the source of the nineteenth transistor, the drain of the nineteenth transistor, the source of the twentieth transistor, the drain of the twentieth transistor, and the output resistor are connected in sequence to form the basic current loop; the gate of the fourth transistor is connected to the gate of the eighteenth transistor, the gate of the fifth transistor is connected to the gate of the nineteenth transistor, and the gate of the twentieth transistor is grounded.

[0012] In some embodiments, the four submodules include: a first submodule, a second submodule, a third module and a fourth submodule, each submodule includes three transistors connected in series; the first submodule includes a sixth transistor, a seventh transistor and an eighth transistor, the second submodule includes a ninth transistor, a tenth transistor and an eleventh transistor, the third submodule includes a twelfth transistor, a thirteenth transistor and a fourteenth transistor, and the fourth submodule includes a fifteenth transistor, a sixteenth transistor and a seventeenth transistor; the source of the sixth transistor, the source of the ninth transistor, the source of the twelfth transistor and the source of the fifteenth transistor are all connected to the source of the fourth transistor; The gate of the sixth transistor, the gate of the ninth transistor, the gate of the twelfth transistor, and the gate of the fifteenth transistor are all connected to the gate of the fourth transistor; the gate of the seventh transistor, the gate of the tenth transistor, the gate of the thirteenth transistor, and the gate of the sixteenth transistor are all connected to the gate of the fifth transistor; the drain of the eighth transistor, the drain of the eleventh transistor, the drain of the fourteenth transistor, and the drain of the seventeenth transistor are all connected to the output resistor; the gate of the eighth transistor, the gate of the eleventh transistor, the gate of the fourteenth transistor, and the gate of the seventeenth transistor are respectively connected to the gear control signal.

[0013] In some embodiments, the operational amplifier circuit includes a first buffer, a second buffer and an amplifier, the positive input terminal of the first buffer is connected to the first sampling output terminal, the positive input terminal of the second buffer is connected to the second sampling output terminal, the output terminal of the first buffer is respectively connected to the negative input terminal of the amplifier and the output terminal of the amplifier through a connecting resistor, the output terminal of the second buffer is connected to the positive input terminal of the amplifier, and the output terminal of the amplifier outputs the sampling voltage difference.

[0014] In some embodiments, the signal processing circuit also includes a filtering module and an analog-to-digital converter, the input end of the filtering module is connected to the operational amplifier output end of the operational amplifier circuit, the output end of the filtering module is connected to the analog-to-digital converter, and the analog-to-digital converter outputs a monitoring current.

[0015] In a second aspect, a chip is also provided, wherein the chip comprises the current monitoring circuit described in any one of the first aspects.

[0016] According to a third aspect, an electronic device is provided, comprising the current monitoring circuit described in any one of the first aspects.

[0017] In general, the present invention has at least the following beneficial effects:

[0018] A current monitoring circuit is provided, which obtains a sampling voltage through a sampling circuit, performs operational amplification on the sampling voltage through an operational amplifier circuit, and then outputs a sampling voltage difference to a signal processing circuit. The signal processing circuit includes a multi-level voltage generation module and a comparator, and generates a target reference voltage corresponding to different target currents through the multi-level voltage generation module, compares the target reference voltage with the sampling voltage difference, and outputs a feedback signal. The target current can be adjusted, and different responses can be made to different target currents, and the corresponding feedback signal can be output to control the working state of the chip in the electronic device, realize overcurrent protection, and adapt to multiple scenarios with different current requirements.

[0019] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in accordance with the present invention and should not be regarded as limiting the scope of the present invention. In addition, the same reference numerals are used to represent the same parts throughout the drawings.

[0021] Figure 1 A circuit structure schematic diagram of a current monitoring circuit provided in an embodiment of the present application is shown;

[0022] Figure 2 A circuit diagram of a sampling circuit provided in an embodiment of the present application is shown;

[0023] Figure 3 A schematic diagram showing the circuit structure of an operational amplifier circuit provided in an embodiment of the present application is shown;

[0024] Figure 4 A circuit diagram of a multi-level voltage generating module provided in an embodiment of the present application is shown;

[0025] Figure 5 In one example, the voltage difference between the two ends of the sampling resistor Rs and V G the relationship that exists between

[0026] Figure 6 Another circuit diagram of the current monitoring circuit provided by an embodiment of the present application is shown;

[0027] Figure 7 A circuit diagram of a filter provided in an embodiment of the present application is shown;

[0028] Figure 8An equivalent circuit diagram of a filter provided in an embodiment of the present application is shown;

[0029] Fig. 9 A schematic diagram showing the structure of a chip provided in an embodiment of the present application is shown;

[0030] Fig.10 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0031] The following embodiments of the technical solution of the present application will be described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0033] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0034] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0035] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0036] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0037] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0038] At present, it is necessary to monitor the current at the power supply end of electronic equipment to prevent excessive current from damaging the electronic equipment and to achieve overcurrent protection of the circuit. The current overcurrent protection circuit measures the current of the branch through a sampling resistor and then undergoes voltage conversion, amplification, voltage comparison and other processing, and finally outputs a digital control signal for feedback control of the entire circuit.

[0039] In common overcurrent protection circuits, the signal flip point is a fixed value. In order to prevent current jitter from causing incorrect shutdown of the chip and system instability, hysteresis overcurrent protection is usually used. However, the hysteresis amount is also a fixed value, and the hysteresis overcurrent protection is likely to cause the chip to burn out when dealing with instantaneous large currents. It cannot be adaptively adjusted according to the specific needs and application scenarios of the chip, and is not applicable to occasions with large load changes or high current accuracy requirements.

[0040] In view of the above problems, the embodiment of the present application provides a current monitoring circuit, which obtains a sampling voltage through a sampling circuit, performs operational amplification on the sampling voltage through an operational amplifier circuit, and then outputs a sampling voltage difference to a signal processing circuit. The signal processing circuit includes a multi-level voltage generation module and a comparator, and generates a target reference voltage corresponding to different target currents through the multi-level voltage generation module, compares the target reference voltage with the sampling voltage difference, and outputs a feedback signal. The target current can be adjusted, and different responses can be made to different target currents, and the corresponding feedback signal can be output to control the working state of the chip in the electronic device, realize overcurrent protection, and adapt to multiple scenarios with different current requirements.

[0041] Embodiment 1

[0042] Figure 1 FIG. 1 is a schematic diagram showing a circuit structure of a current monitoring circuit provided in an embodiment of the present application. Figure 1A current monitoring circuit 10 includes: a sampling circuit 101, an operational amplifier circuit 102 and a signal processing circuit 103; the sampling circuit 101 is connected to a sampling resistor of a monitoring target, and is connected to the operational amplifier circuit 102 through a sampling output terminal to output a sampling voltage to the operational amplifier circuit 102; the operational amplifier circuit 102 is connected to the signal processing circuit 103 through an operational amplifier output terminal to output a sampling voltage difference after operational amplification to the signal processing circuit 103; the signal processing circuit 103 includes a multi-level voltage generating module 104 and a comparator COMP1, the output terminal of the multi-level voltage generating module 104 is connected to the positive input terminal of the comparator to output a target reference voltage to the comparator COMP1; the operational amplifier output terminal is connected to the negative input terminal of the comparator COMP1, and the comparator COMP1 outputs a feedback signal according to the size of the target reference voltage and the sampling voltage difference, and the feedback signal is used to control the working state of the connected chip; wherein the multi-level voltage generating module 104 is used to generate reference voltages corresponding to different target currents.

[0043] In one example, the monitoring target can be an electronic device or a power circuit of an electronic device. The electronic device includes a chip that controls the electronic device to perform a preset function. The power circuit is used to provide power to the chip. When the current or voltage on the power circuit is too large, it may affect the chip. Because this embodiment connects the sampling resistor of the detection target through the sampling circuit 101, the voltage across the sampling resistor, that is, the sampling voltage, can be collected. In this way, the current of the power circuit can be monitored to avoid damage to the chip due to excessive current.

[0044] The sampling circuit 101 outputs the sampling voltage to the operational amplifier circuit 102 through the sampling output terminal. The operational amplifier circuit 102 can amplify and operate the sampling voltage, thereby realizing voltage signal processing functions such as signal amplification, filtering, and buffering, which can reduce errors and interference and improve the stability of the voltage signal. The operational amplifier circuit 102 is connected to the signal processing circuit 103 through the operational amplifier output terminal to output the sampling voltage difference after operational amplification to the signal processing circuit 103.

[0045] In this embodiment, the sampling voltage difference after operational amplification refers to the sampling voltage difference after the voltage difference calculation of the input voltages at the two input terminals of the operational amplifier circuit 102. For example, the sampling voltage input to the input terminal of the operational amplifier circuit 102 includes two voltages at both ends of the sampling voltage connection. Then, the sampling voltage difference output by the operational amplifier circuit 102 is the voltage difference after the two voltages are operationally amplified, which can be used to characterize the voltage difference at both ends of the sampling resistor.

[0046] In this embodiment, the multi-level voltage generating module 104 can generate a target reference voltage corresponding to the target current (that is, the required current adapted to the electronic device), and the size of the target current can be adjusted in multiple levels, thereby achieving adjustable target current to match the current requirements of different scenarios.

[0047] It can be seen from the above embodiments that the sampling voltage difference output by the output terminal of the operational amplifier circuit 102 represents the voltage difference across the sampling resistor, that is, the voltage of the sampling resistor. By connecting the output terminal of the operational amplifier 102 to the negative input terminal of the comparator and by connecting the output terminal of the multi-speed voltage generating module 104 to the positive input terminal of the comparator, the comparator can output a feedback signal according to the target reference voltage and the size of the sampling voltage difference. In other words, the comparator can be flipped according to the size of the input voltage values ​​at the positive input terminal and the negative input terminal of the comparator to output different feedback signals. The feedback signal is used to control the working state of the connected chip. For example, when the feedback signal is a low-level signal, the control chip is turned off and stops working. When the feedback signal is a high-level signal, the control chip is in a normal working state.

[0048] The above embodiment obtains the sampling voltage through the sampling circuit 101, and outputs the sampling voltage difference to the signal processing circuit 103 after the sampling voltage is operationally amplified by the operational amplifier circuit 102. The signal processing circuit 103 includes a multi-level voltage generation module 104 and a comparator. The multi-level voltage generation module 104 generates a target reference voltage corresponding to different target currents, compares the target reference voltage with the sampling voltage difference, and outputs a feedback signal. The target current can be adjusted, different responses can be made to different target currents, and corresponding feedback signals can be output to control the working state of the chip in the electronic device, realize overcurrent protection, and adapt to multiple scenarios with different current requirements.

[0049] Figure 2 A circuit diagram of a sampling circuit provided in an embodiment of the present application is shown, such as Figure 2As shown, the sampling circuit 101 includes: a first constant current source module 105 and a common-gate operational amplifier module 106; the first constant current source module 105 is used to provide a stable first current I1 for the common-gate operational amplifier module 106; the common-gate operational amplifier module 106 includes a first transistor MP1, a second transistor MP2 and a third transistor MP3, the gates of the first transistor MP1, the second transistor MP2 and the third transistor MP3 are all connected to each other, the sources of the first transistor MP1 and the second transistor MP2 are connected to one end of the sampling resistor Rs, the source of the third transistor MP3 is connected to the other end of the sampling resistor Rs, the drain of the first transistor MP1 is connected to the first constant current source module, the drain of the second transistor MP2 is connected to the first sampling output terminal A, the drain of the third transistor MP3 is connected to the second sampling output terminal B, and the first sampling output terminal A and the second sampling output terminal B are connected to the operational amplifier circuit 102.

[0050] like Figure 2 As shown, the first constant current source module 105 includes an amplifier AMP1, a positive input terminal of AMP1 inputs a reference voltage VREF1, an output terminal of AMP1 is connected to a gate of transistor MN1, a negative input terminal of AMP1 is connected to a source of transistor MN1 and is grounded through a resistor R2, and a drain of transistor MN1 is connected to a drain of a first transistor MP1.

[0051] In this embodiment, the sources of the first transistor MP1, the second transistor MP2 and the third transistor MP3 are also connected to source negative feedback resistors R1 respectively, R1 is connected to the sampling resistor Rs, and R1 serves as a source negative feedback resistor of the common gate operational amplifier, which can provide higher linearity.

[0052] The first constant current source module 105 , the first sampling output terminal A and the second sampling output terminal B are also grounded through a feedback resistor and a clamping diode respectively, and the feedback resistor and the clamping diode are connected in parallel.

[0053] Among them, the feedback resistor of the first constant current source module 105 is R2, and the clamping diode of the first constant current source module 105 is D1. The feedback resistor connected to the first sampling output terminal A is R3, and the clamping diode connected to the first sampling output terminal A is D2. The feedback resistor connected to the second sampling output terminal B is R4, and the clamping diode connected to the second sampling output terminal B is D3. The diodes D1, D2, and D3 have the same function, all of which play the role of voltage clamping, stabilizing the voltages at point C, point A, and point B, respectively.

[0054] In this embodiment, MP2 and MP3 can form a common gate operational amplifier, and MP1 can provide gate bias voltage to MP2 and MP3. The use of the common gate operational amplifier module 106 can solve the problem that the offset voltage of the conventional common source operational amplifier is not much different from the voltage difference across the sampling resistor Rs, which easily causes inaccurate sampling.

[0055] The circuit principle of the sampling circuit 101 is described below:

[0056] According to the virtual short characteristic of the operational amplifier AMP1, the potential V C is equal to VREF1, so the current I1 in the branch where point C is located is:

[0057]

[0058] According to the current mirror current replication principle (MP1 and MP2 gate-source voltage matching), the current in the branch where point A is located is also I1, so the potential V A for:

[0059] V A =I1*R3

[0060] MP1 and MP3 do not satisfy the current mirror current replication principle. The current of the branch where point B is located is recorded as I2, so the potential V B for:

[0061] V B =I2*R4

[0062] The relationship between the potential at point VIN_P, point VIN_N, point A, and point B is:

[0063] VIN_P=V A +I1*R1

[0064] VIN_N=V B +I2*R1

[0065] VIN_P-VIN_N=V A -V B +R1*(I1-I2)

[0066] VIN_P-VIN_N=I L *R S

[0067] V A -V B +R1*(I1-I2)=I L *R S

[0068] Through the relationship between the potentials at points VIN_P and VIN_N and the potentials at points A and B, the voltage values ​​VIN_P and VIN_N, that is, the voltages across Rs, can be obtained, thereby realizing sampling of the voltages across Rs.

[0069] Figure 3A schematic diagram of the circuit structure of the operational amplifier circuit provided in the embodiment of the present application is shown as follows: Figure 3 As shown, the operational amplifier circuit 102 includes a first buffer AMP3, a second buffer AMP2 and an amplifier AMP4, the positive input terminal of the first buffer AMP3 is connected to the first sampling output terminal A, the positive input terminal of the second buffer AMP2 is connected to the second sampling output terminal B, the output terminal of the first buffer AMP3 is respectively connected to the negative input terminal of the amplifier AMP4 and the output terminal of the amplifier AMP4 through a connecting resistor, the output terminal of the second buffer AMP2 is connected to the positive input terminal of the amplifier AMP4, and the output terminal of the amplifier AMP4 outputs a sampling voltage difference.

[0070] The output end of the first buffer AMP3 is connected to the negative input end of the amplifier AMP4 through a connecting resistor R5. A connecting resistor with a resistance k1 times that of R5 is provided between R5 and the output end of the amplifier AMP4, where k1 is the gain factor.

[0071] In this embodiment, the potentials at point A and point B are respectively input to both ends of the operational amplifier AMP4 through a first-level buffer. According to the virtual short characteristic of the operational amplifier, the potential at point D is equal to the potential at point B, the potential at point E is equal to the potential at point A, and the potential at point F is equal to the potential at point D. According to the virtual open characteristic of the operational amplifier, it can be obtained that:

[0072]

[0073] Where V E =V A , V F =V B , so we can get:

[0074] V G =k1*V B -k1*(V B -V A )

[0075] At this point, the voltage difference across the sampling resistor Rs has been operationally amplified.

[0076] Figure 4 A circuit diagram of a multi-level voltage generating module provided in an embodiment of the present application is shown. In this embodiment, the multi-level voltage generating module 104 includes a basic current providing circuit and a voltage level switching circuit; the basic current providing circuit is used to generate a basic current and output a target reference voltage; the voltage level switching circuit includes a plurality of sub-modules, each sub-module is connected in parallel with the basic current providing circuit, and the voltage level switching circuit is used to control the on or off of each sub-module based on a level control signal to generate different target currents, the target current has a multiple relationship with the basic current, and the target reference voltage is obtained according to the target current.

[0077] That is to say, in this embodiment, a basic current can be generated by a basic current providing circuit. On the basis of the basic current, the current of the multi-level voltage generating module 104 as a whole can be adjusted by adjusting the voltage level switching circuit to obtain a target current. The target current has a multiple relationship with the basic current, thereby realizing a controllable output of the multi-level current and generating a target reference voltage corresponding to the target current. In this way, different target reference voltages corresponding to target currents of different levels can be generated, and then the target reference voltage can be compared with the sampling voltage. It can be determined whether the current in the electronic device is too large by determining whether the sampling voltage is greater than the target reference voltage. When the current is too large, a feedback signal is generated to control the chip to stop working, thereby achieving overcurrent protection.

[0078] Specifically, refer to Figure 4 The voltage gear switching circuit includes 4 submodules, and the basic current providing circuit includes a second constant current source module 107, a fourth transistor MP4, a fifth transistor MP5, an eighteenth transistor MP18, a nineteenth transistor MP19, a twentieth transistor MP20, and an output resistor R7. The second constant current source module 107 is used to provide a stable second current I3 for the voltage gear switching circuit; the second constant current source module 107, the drain of the fifth transistor MP5, the source of the fifth transistor MP5, the drain of the fourth transistor MP4, the source of the fourth transistor MP4, the source of the eighteenth transistor MP18, the drain of the eighteenth transistor MP18, the source of the nineteenth transistor MP19, the drain of the nineteenth transistor MP19, the source of the twentieth transistor MP20, the drain of the twentieth transistor MP20, and the output resistor R7 are connected in sequence to form a basic current loop; the gate of the fourth transistor is connected to the gate of the eighteenth transistor MP18, the gate of the fifth transistor is connected to the gate of the nineteenth transistor MP19, and the gate of the twentieth transistor MP20 is grounded.

[0079] The second constant current source module includes an amplifier AMP5, a positive input terminal of AMP5 inputs a reference voltage VREF2, an output terminal of AMP5 is connected to the gate of transistor MN2, a negative input terminal of AMP5 is connected to the source of transistor MN2 and grounded through resistor R6, and a drain of transistor MN2 is connected to the drain of the fifth transistor MP5.

[0080] The following is an explanation of the principle of generating basic current:

[0081] According to the virtual short characteristic of the operational amplifier, the potential VD at point D is equal to VREF2, and the branch current I3 where D is located is:

[0082]

[0083] When the basic current is generated, the submodules of the voltage gear switching circuit are not turned on. Since the gate of the twentieth transistor MP20 is grounded, that is, the gate of the twentieth transistor MP20 is zero potential GND, the branch controlled by GND provides the basic current on R7. GND is always at a low level, MP20 is in the on-state, so MP19 and MP18 are in the on-state, and the branch has a current n*I3 (basic current) flowing into the E node, and the E node and the output terminal VREF_IPEAK of the multi-gear voltage generating module 104 are on the same branch, that is, the voltage value of the output terminal VREF_IPEAK of the multi-gear voltage generating module 104 is n*R7*I3. That is to say, at this time, the target current is n*I3, and the target reference voltage is n*R7*I3.

[0084] In the embodiment of the present application, the four submodules of the voltage gear switching circuit include: a first submodule 108, a second submodule 109, a third module 110 and a fourth submodule 111, each of which includes three transistors connected in series. The first submodule 108 includes a sixth transistor MP6, a seventh transistor MP7 and an eighth transistor MP8, the second submodule 109 includes a ninth transistor MP9, a tenth transistor MP10 and an eleventh transistor MP11, the third submodule 110 includes a twelfth transistor MP12, a thirteenth transistor MP13 and a fourteenth transistor MP14, and the fourth submodule 111 includes a fifteenth transistor MP15, a sixteenth transistor MP16 and a seventeenth transistor MP17.

[0085] The source of the sixth transistor MP6, the source of the ninth transistor MP9, the source of the twelfth transistor MP12, and the source of the fifteenth transistor MP15 are all connected to the source of the fourth transistor MP4; the gate of the sixth transistor MP6, the gate of the ninth transistor MP9, the gate of the twelfth transistor MP12, and the gate of the fifteenth transistor MP15 are all connected to the gate of the fourth transistor MP4; the gate of the seventh transistor MP7, the gate of the tenth transistor MP10, the gate of the thirteenth transistor MP13, and the gate of the sixteenth transistor MP16 are all connected to the gate of the fifth transistor MP5.

[0086] The drain of the eighth transistor MP8, the drain of the eleventh transistor MP11, the drain of the fourteenth transistor MP14, and the drain of the seventeenth transistor MP17 are all connected to the output resistor R7; the gate of the eighth transistor MP8, the gate of the eleventh transistor MP11, the gate of the fourteenth transistor MP14, and the gate of the seventeenth transistor MP17 are respectively connected to the gear control signal.

[0087] The gates of the eighth transistor MP8, the eleventh transistor MP11, the fourteenth transistor MP14 and the seventeenth transistor MP17 are connected to the gear control signals ADJ <0> 、ADJ <1> 、ADJ <2> 、ADJ <3> , which can be recorded as a 4-bit digital control signal ADJ<3:0>. By changing any one or more bits of the 4-bit digital control signal, 16 levels of adjustable target current can be achieved. In an example, the target current can correspond to a preset peak current in a scene.

[0088] It should be noted that the controllable number of gear control signals in this embodiment can be set to multiple according to actual needs. In this embodiment, 16 gears of adjustable target current and 4 sub-modules of the voltage gear switching circuit are taken as an example. In other examples, the sub-modules of the voltage gear switching circuit can also be 4, 5, 6, etc., and the corresponding target current gears and digital signals can also be adjusted accordingly.

[0089] Figure 4 The parameter m corresponding to each submodule represents the ratio of the number of parallel-connected transistors in the corresponding branch.

[0090] Below Figure 4 The working principle of the circuit is explained as follows:

[0091] As mentioned above, GND is always at a low level, MP20 is turned on, and thus MP19 and MP18 are turned on. This branch generates a basic current n*I3, which is ADJ <0> For example, when ADJ <0> is low level, ADJ <1> 、ADJ <2> 、ADJ <3> When it is high level, MP8 is turned on, MP11, MP14, and MP17 are turned off, so that MP6 and MP7 are turned on, and the branch where MP6, MP7, and MP8 are located has a current I3 generated and flows into the E node. At this time, the current flowing into the E node is (n+1)*I3, and the value of VREF_IPEAK is the product of the resistor R7 and the current flowing into the E node, that is:

[0092]

[0093] By analogy, we can conclude that in ADJ <0> 、ADJ <1> 、ADJ <2> 、ADJ <3> When they are different signals, different target reference voltages VREF_IPEAK can be obtained. Taking the reference voltage corresponding to the 16-level preset target current as an example, it can be shown in the following Table 1:

[0094] Table 1

[0095] ADJ<0> ADJ<1> ADJ<2> ADJ<3> VREF_IPEAK 0 0 0 0 (n+15) / k2*VREF2 1 0 0 0 (n+14) / k2*VREF2 0 1 0 0 (n+13) / k2*VREF2 1 1 0 0 (n+12) / k2*VREF2 0 0 1 0 (n+11) / k2*VREF2 1 0 1 0 (n+10) / k2*VREF2 0 1 1 0 (n+9) / k2*VREF2 1 1 1 0 (n+8) / k2*VREF2 0 0 0 1 (n+7) / k2*VREF2 1 0 0 1 (n+6) / k2*VREF2 0 1 0 1 (n+5) / k2*VREF2 1 1 0 1 (n+4) / k2*VREF2 0 0 1 1 (n+3) / k2*VREF2 1 0 1 1 (n+2) / k2*VREF2 0 1 1 1 (n+1) / k2*VREF2 1 1 1 1 n / k2*VREF2

[0096] As shown in Table 1, changing ADJ <0> 、ADJ <1> 、ADJ <2> 、ADJ <3> One or more high-level or low-level signals can generate different target reference voltages, thereby achieving multi-level adjustable output voltage.

[0097] Figure 5 In one example, the voltage difference between the two ends of the sampling resistor Rs and V G The relationship that exists between them.

[0098] Wherein, n represents the number of transistors, k2 is the ratio between the resistors R7 and R6, and VREF2=1.2V, n=6, k2=25, RS=0.01Ω is used as an example to illustrate the multi-level voltage generating module 104:

[0099] like Figure 5 As shown, by adjusting the reference voltage corresponding to the target current, that is, V G The comparison flip point can make the target current have multiple threshold selections between 1.6A and 20A. The voltage difference between the two ends of the sampling resistor Rs and V G The relationship between them is:

[0100]

[0101] In different application scenarios, different V G The target current threshold is set by comparing the flip points, thereby achieving more accurate monitoring of the current of the monitoring target.

[0102] Figure 6 Another circuit diagram of the current monitoring circuit provided by the embodiment of the present application is shown as follows: Figure 6 As shown, the signal processing circuit 103 also includes a filtering module 112 and an analog-to-digital converter 113, the input end of the filtering module 112 is connected to the operational amplifier output end of the operational amplifier circuit 102, the output end of the filtering module 112 is connected to the analog-to-digital converter 113, and the analog-to-digital converter 113 outputs a monitoring current.

[0103] The output V of the previous stage circuit is filtered out by the filter 112 G The ripple and noise above the cut-off frequency provide a sampling point with less ripple and noise for the subsequent analog-to-digital converter 113, thereby improving the accuracy of current monitoring at the power supply end. In this embodiment, the type of the analog-to-digital converter 113 is not limited, as long as it can accurately convert the output of the filter 112 into a digital signal.

[0104] In one example, the filter circuit diagram is as follows Figure 7 As shown, the input terminals of the filter are connected Figure 3The G potential and E potential, the E potential is connected to the positive input terminal of the amplifier AMP5, and is connected to the resistors R8 and R9 through the capacitor C1, the resistor R8 is connected to the G potential, the resistor R9 is connected to the output terminal of the amplifier AMP5, the potential E between the capacitor C1 and the resistor R8 is also connected to the negative input terminal of AMP5 through the resistor R11, and is connected to the output terminal of the amplifier AMP5 through the capacitor C2.

[0105] Depend on Figure 7 It can be seen that the potential at point E is equal to the potential at point A, where the voltage V A for:

[0106]

[0107] VREF1, R2, and R3 are all constant, so the potential at point E can be equivalent to the AC ground, and the filter circuit can be simplified to Figure 8 ,like Figure 8 As shown, according to the virtual short characteristic of the operational amplifier, V Y =0, so we can get:

[0108]

[0109] According to the above two equations, we can get the transfer function:

[0110]

[0111] Substituting s=jw, we can get:

[0112]

[0113] According to the characteristic frequency w0 of the even-order filter, the point where the real part of the denominator of the transfer function is 0 is Therefore, the cut-off frequency f0 is:

[0114]

[0115] Therefore, the ripple and noise above the cutoff frequency f0 of the output VG of the preceding circuit can be filtered out, providing a sampling point with smaller ripple and noise for the subsequent analog-to-digital converter 113 .

[0116] The above is the current monitoring circuit 10 provided in this embodiment. The sampling voltage is obtained through the sampling circuit 101, and the sampling voltage is amplified by the operational amplifier circuit 102, and then the sampling voltage difference is output to the signal processing circuit 103. The signal processing circuit 103 includes a multi-level voltage generation module 104 and a comparator. The multi-level voltage generation module 104 generates a target reference voltage corresponding to different target currents, compares the target reference voltage with the sampling voltage difference, and outputs a feedback signal. The target current can be adjusted, and different responses can be made to different target currents. The corresponding feedback signal is output to control the working state of the chip in the electronic device, realize overcurrent protection, and adapt to multiple scenarios with different current requirements. Since the target current and the target reference voltage are adjustable in multiple levels, frequent false triggering caused by current fluctuations can also be reduced.

[0117] Embodiment 2

[0118] Based on the same concept as the above current monitoring circuit 10, this embodiment also provides a chip, such as Fig. 9 As shown, the chip 20 is integrated with a current monitoring circuit 10 as in any of the above embodiments, for example, Figure 1 or Figure 6 The current monitoring circuit 10 is shown.

[0119] Specifically, the chip 20 may be a dedicated chip including the above-mentioned discrete devices. More specifically, the chip 20 may be an analog-digital hybrid chip or an MCU integrated chip, as long as the function of the above-mentioned current monitoring circuit 10 can be achieved.

[0120] The chip provided in this embodiment is based on the same concept as the above-mentioned current monitoring circuit 10, so it can at least achieve the beneficial effects that the above-mentioned current monitoring circuit 10 can achieve, and any implementation of the above-mentioned current monitoring circuit 10 can be applied to the chip provided in this embodiment, which will not be repeated here.

[0121] Embodiment 3

[0122] Based on the same concept as the above-mentioned current monitoring circuit 10 , this embodiment further provides an electronic device, on which the current monitoring circuit 10 as in any of the above-mentioned embodiments is integrated.

[0123] The electronic device 30 may also be an electronic device including the chip of the above-mentioned embodiment 2, such as an electronic device having both analog signal processing functions and digital signal processing functions, for example, the electronic device is a mobile terminal, a smart wearable device, a virtual reality interactive device, etc.

[0124] The electronic device provided in this embodiment is based on the same concept as the above-mentioned current monitoring circuit 10, so it can at least achieve the beneficial effects that the above-mentioned current monitoring circuit 10 can achieve, and any implementation of the above-mentioned current monitoring circuit 10 can be applied to the electronic device provided in this embodiment, which will not be repeated here.

[0125] It should be noted that:

[0126] In the above text, the term "comprises", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the method and device in the embodiment of the present invention is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0127] The embodiments of the present invention are described above in conjunction with the accompanying drawings, which are only specific implementation modes of the present invention. However, the present invention is not limited to the above-mentioned specific implementation modes. The above-mentioned specific implementation modes are merely illustrative and not restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A current monitoring circuit, characterized in that: The circuit comprises: a sampling circuit, an operational amplifier circuit and a signal processing circuit; The sampling circuit is connected to a sampling resistor of a monitoring target, and is connected to an operational amplifier circuit via a sampling output terminal to output a sampling voltage to the operational amplifier circuit; The operational amplifier circuit is connected to the signal processing circuit via an operational amplifier output terminal to output the sampled voltage difference after operational amplification to the signal processing circuit; The signal processing circuit includes a multi-level voltage generating module and a comparator, wherein the output end of the multi-level voltage generating module is connected to the positive input end of the comparator to output the target reference voltage to the comparator; the output end of the operational amplifier is connected to the negative input end of the comparator, and the comparator outputs a feedback signal according to the target reference voltage and the sampled voltage difference, and the feedback signal is used to control the working state of the connection chip; Wherein, the multi-level voltage generating module is used to generate reference voltages corresponding to different target currents.

2. The current monitoring circuit according to claim 1, characterized in that: The sampling circuit comprises: a first constant current source module and a common-gate operational amplifier module; The first constant current source module is used to provide a stable first current for the common-gate operational amplifier module; The common-gate operational amplifier module includes a first transistor, a second transistor and a third transistor, the gates of the first transistor, the second transistor and the third transistor are connected to each other, the sources of the first transistor and the second transistor are connected to one end of the sampling resistor, the source of the third transistor is connected to the other end of the sampling resistor, the drain of the first transistor is connected to the first constant current source module, the drain of the second transistor is connected to the first sampling output end, the drain of the third transistor is connected to the second sampling output end, and the first sampling output end and the second sampling output end are connected to the operational amplifier circuit.

3. The current monitoring circuit according to claim 2, characterized in that: The sources of the first transistor, the second transistor and the third transistor are also connected to source negative feedback resistors respectively; The first constant current source module, the first sampling output terminal and the second sampling output terminal are also grounded through a current limiting resistor and a clamping diode respectively, and the current limiting resistor and the clamping diode are connected in parallel.

4. The current monitoring circuit according to claim 1, characterized in that: The multi-level voltage generation module includes a basic current supply circuit and a voltage level switching circuit; The basic current providing circuit is used to generate a basic current and output the target reference voltage; The voltage gear switching circuit includes multiple sub-modules, each sub-module is connected in parallel with the basic current providing circuit, and the voltage gear switching circuit is used to control the conduction or shutdown of each sub-module based on a gear control signal to generate different target currents. The target current has a multiple relationship with the basic current, and the target reference voltage is obtained based on the target current.

5. The current monitoring circuit according to claim 4, characterized in that: The voltage gear switching circuit includes 4 submodules, and the basic current providing circuit includes a second constant current source module, a fourth transistor, a fifth transistor, an eighteenth transistor, a nineteenth transistor, a twentieth transistor and an output resistor; The second constant current source module is used to provide a stable second current for the voltage gear switching circuit; The second constant current source module, the drain of the fifth transistor, the source of the fifth transistor, the drain of the fourth transistor, the source of the fourth transistor, the source of the eighteenth transistor, the drain of the eighteenth transistor, the source of the nineteenth transistor, the drain of the nineteenth transistor, the source of the twentieth transistor, the drain of the twentieth transistor, and the output resistor are connected in sequence to form the basic current loop; A gate of the fourth transistor is connected to a gate of the eighteenth transistor, a gate of the fifth transistor is connected to a gate of the nineteenth transistor, and a gate of the twentieth transistor is grounded.

6. The current monitoring circuit according to claim 5, characterized in that: The four submodules include: a first submodule, a second submodule, a third module and a fourth submodule, each of which includes three transistors connected in series; The first submodule includes a sixth transistor, a seventh transistor and an eighth transistor, the second submodule includes a ninth transistor, a tenth transistor and an eleventh transistor, the third submodule includes a twelfth transistor, a thirteenth transistor and a fourteenth transistor, and the fourth submodule includes a fifteenth transistor, a sixteenth transistor and a seventeenth transistor; The source of the sixth transistor, the source of the ninth transistor, the source of the twelfth transistor, and the source of the fifteenth transistor are all connected to the source of the fourth transistor; the gate of the sixth transistor, the gate of the ninth transistor, the gate of the twelfth transistor, and the gate of the fifteenth transistor are all connected to the gate of the fourth transistor; The gate of the seventh transistor, the gate of the tenth transistor, the gate of the thirteenth transistor, and the gate of the sixteenth transistor are all connected to the gate of the fifth transistor; The drain of the eighth transistor, the drain of the eleventh transistor, the drain of the fourteenth transistor, and the drain of the seventeenth transistor are all connected to the output resistor; the gate of the eighth transistor, the gate of the eleventh transistor, the gate of the fourteenth transistor, and the gate of the seventeenth transistor are respectively connected to the gear control signal.

7. The current monitoring circuit according to claim 2, characterized in that: The operational amplifier circuit includes a first buffer, a second buffer and an amplifier, the positive input end of the first buffer is connected to the first sampling output end, the positive input end of the second buffer is connected to the second sampling output end, the output end of the first buffer is respectively connected to the negative input end of the amplifier and the output end of the amplifier through a connecting resistor, the output end of the second buffer is connected to the positive input end of the amplifier, and the output end of the amplifier outputs the sampling voltage difference.

8. The current monitoring circuit according to claim 1, characterized in that: The signal processing circuit also includes a filtering module and an analog-to-digital converter, the input end of the filtering module is connected to the operational amplifier output end of the operational amplifier circuit, the output end of the filtering module is connected to the analog-to-digital converter, and the analog-to-digital converter outputs a monitoring current.

9. A chip, characterized in that: The chip comprises the current monitoring circuit according to any one of claims 1-8.

10. An electronic device, characterized in that: The electronic device comprises the current monitoring circuit according to any one of claims 1-8.

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