Time-synchronized sensor data for robotic systems and applications

Abstract

The invention discloses time-synchronized sensor data for robotic systems and applications. In various examples, a set of related timestamps is sampled from a clock source. A set of related timestamps is used to compute conversion data, such as an offset and / or rate of change of a clock source. The offset and / or rate of change may be used to convert the timestamp to the reference time domain. The sampled clock source may be frequency locked, and the transitions may be performed without using the rate of change. For example, the running average of the offset may be used to perform the transition. The converted timestamps and corresponding sensor measurements may be provided to one or more applications for performing one or more operations of the machine, such as perceptual and / or control operations.

Description

Background Art

[0001] Computing systems (such as robotic systems) can use a range of sensors to perceive the environment, such as cameras, light detection and ranging (LIDAR) sensors, radar detection and ranging (RADAR) sensors, inertial measurement units (IMUs), temperature sensors, and / or humidity sensors. Sensors can capture different aspects of the environment, such as visual data, depth information, motion information, position information, and / or environmental conditions. Building a comprehensive and coherent understanding of the environment may require fusing measurements from sensors while accurately capturing the relative timing between different sensor events. However, different sensors may rely on different clock sources, which may introduce timing variations.

[0002] Global Positioning System (GPS) (or more generally, Global Navigation Satellite System (GNSS)) signals can be used to synchronize clocks associated with different clock sources. To this end, a GPS receiver can compare an internal clock with the received GPS time to adjust the internal clock. In addition, the received GPS time can be used to generate a pulse per second (PPS) signal whose other components are used as a reference signal for clock synchronization. The Network Time Protocol (NTP) can also be used to synchronize clocks associated with different clock sources. To this end, an NTP client can request time information from an NTP server and adjust the corresponding clock based on the received time information so that the clock is aligned with a global reference clock. However, in certain scenarios where there may be limited or blocked access to GPS signals and / or network communications (such as in indoor locations), effective NTP or GPS-based clock synchronization may not always be possible. Summary of the invention

[0003] Embodiments of the present disclosure relate to time-synchronized sensor data for robotic systems and applications (applicable in environments where GPS and the Internet are ineffective). Systems and methods are disclosed that can be used to convert timestamps for sensor measurements (referenced to different clock sources) into a common time domain without requiring access to network time.

[0004] Compared to conventional systems (such as those described above), the disclosed method can use a set of related samples of clock sources to calculate conversion data between clock sources and use the conversion data to perform time domain conversion of time data of sensor measurements. In at least one embodiment, a set of related timestamps is sampled from a clock source. The set of related timestamps can be used to calculate conversion data, such as an offset and / or rate of change of the clock source. The offset and / or rate of change can be used to convert the timestamp to a reference time domain. In at least one embodiment, the sampled clock source is frequency locked and the conversion is performed without using the rate of change. For example, a running average of the offset can be used to perform the conversion. The converted timestamp and the corresponding sensor measurement can be provided to one or more applications for performing one or more operations of the machine, such as sensing and / or control operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The present system and method for time-synchronized sensor data for robotic systems and applications is described in detail below with reference to the accompanying drawings, wherein:

[0006] Figure 1 is an example of a time synchronization system according to some embodiments of the present disclosure;

[0007] Figure 2 is an example of a graph of a set of associated timestamps for a sample of a set of timestamps corresponding to sensor measurements according to some embodiments of the present disclosure;

[0008] Figure 3 is a flow chart illustrating a method for converting a timestamp to a reference time domain based on receiving a set of related timestamps according to some embodiments of the present disclosure;

[0009] Figure 4 is a flow chart illustrating a method for converting time data into a reference time domain based on correlated samples of a clock source according to some embodiments of the present disclosure;

[0010] Figure 5 is a flow chart illustrating a method for initializing a time synchronization system according to some embodiments of the present disclosure;

[0011] Fig. 6A is an illustration of an exemplary autonomous vehicle according to some embodiments of the present disclosure;

[0012] Figure 6B According to some embodiments of the present disclosure Fig. 6A Example of camera positions and fields of view of an exemplary autonomous vehicle;

[0013] Figure 6C According to some embodiments of the present disclosure Fig. 6AA block diagram of an exemplary system architecture of an exemplary autonomous vehicle;

[0014] Fig.6D According to some embodiments of the present disclosure, one or more cloud-based servers and Fig. 6A A system diagram of an exemplary autonomous vehicle-to-vehicle communication system;

[0015] Figure 7 is a block diagram of an example computing device suitable for implementing some embodiments of the present disclosure; and

[0016] Figure 8 is a block diagram of an example data center suitable for implementing some embodiments of the present disclosure. DETAILED DESCRIPTION

[0017] Systems and methods are disclosed relating to time-synchronized sensor data for robotic systems and applications. Although the present disclosure may be related to an example autonomous or semi-autonomous vehicle 600 (alternatively referred to herein as "vehicle 600" or "machine 600"), the example reference FIG. 6A to FIG. 6D Description) is described, but this is not intended to be limiting. For example, the systems and methods described herein may be used by, but are not limited to, non-autonomous vehicles, semi-autonomous vehicles (e.g., in one or more adaptive driver assistance systems (ADAS)), autonomous vehicles, driven and undriven robots or robotic platforms, warehouse vehicles, off-road vehicles, vehicles coupled to one or more trailers, flying boats, boats, shuttles, emergency response vehicles, motorcycles, electric or motorized bicycles, airplanes, construction vehicles, underwater vehicles, drones, and / or other vehicle types. In addition, although the present disclosure may be described with respect to sensor data and perception, this is not intended to be limiting, and the systems and methods described herein may be used for augmented reality, virtual reality, mixed reality, robotics, security and surveillance, autonomous or semi-autonomous machine applications, and / or any other technology space where time domain conversion may be used.

[0018] The disclosed method can use a set of related samples of a clock source to calculate conversion data between clock sources and use the conversion data to perform time domain conversion on the time data of sensor measurement results. In at least one embodiment, a set of related timestamps is sampled from a clock source (such as a time stamp counter (TSC) clock source and a precision time protocol (PTP) hardware clock (PHC) clock source). The set of related timestamps can be used to calculate conversion data, such as an offset and / or a rate of change of the clock source. The offset and / or the rate of change can be used to convert the timestamp to a reference time domain. In at least one embodiment, the sampled clock source is frequency locked and the conversion is performed without using a rate of change. For example, a running average of the offset can be used to perform the conversion. The converted timestamp and the corresponding sensor measurement result (e.g., as a sensor measurement result stream with the converted timestamp) can be provided to one or more applications for performing one or more operations of the machine, such as sensing and / or control operations.

[0019] In at least one embodiment, the reference time domain is a system time domain corresponding to a system clock source. The system time source can be synchronized with one of the sampled clock sources (e.g., a PHC clock source). In at least one embodiment, in order to initialize the clock source for time domain conversion, the system can determine whether network time is available. If network time is not available, the system time clock source can be updated to reflect a persistent clock source, such as a real-time clock (RTC) clock source. If network time is available, both the system clock source and the persistent clock source can be updated to reflect network time. The sampling clock source to be kept synchronized with the system time clock source can be updated to reflect the system time clock source. One or more of the other clock sources used for sampling (e.g., a TSC clock source) can then be locked to the updated clock source. In at least one embodiment, initialization is performed as part of a boot sequence of a computing platform or in response to a boot sequence of a computing platform.

[0020] The systems and methods described herein may be used for a variety of purposes, including, by way of example and not limitation, for machine control, machine motion, machine driving, synthetic data generation, model training, perception, augmented reality, virtual reality, mixed reality, robotics, security and surveillance, autonomous or semi-autonomous machine applications, deep learning, environment simulation, object or actor simulation and / or digital twins, data center processing, conversational AI, light transport simulation (e.g., ray tracing, path tracing, etc.), collaborative content creation of 3D assets, cloud computing, generative AI, (big) language models, and / or any other suitable application.

[0021] The disclosed embodiments may be included in a variety of different systems, such as automotive systems (e.g., control systems for autonomous or semi-autonomous machines, perception systems for autonomous or semi-autonomous machines), systems implemented using robots, aerial systems, medical systems, boating systems, smart area monitoring systems, systems for performing deep learning operations, systems for performing simulation operations, systems for performing digital twin operations, systems implemented using edge devices, systems including one or more virtual machines (VMs), systems for performing synthetic data generation operations, systems implemented at least in part in a data center, systems for performing conversational AI operations, systems for performing light transport simulations, systems for performing collaborative content creation of 3D assets, systems implemented at least in part using cloud computing resources, systems for performing generative AI operations, systems implementing or for performing operations using a large language model (LLM), and / or other types of systems.

[0022] refer to Figure 1 , Figure 1 is an example of a time synchronization system 100 according to some embodiments of the present disclosure. It should be understood that this and other arrangements described herein are set forth by way of example only. Other arrangements and elements (e.g., machines, interfaces, functions, orders, function groupings, etc.) may be used in addition to or in place of the arrangements and elements shown, and some elements may be omitted entirely. Further, many of the elements described herein are functional entities that may be implemented as discrete or distributed components or in combination with other components, and in any suitable combination and location. The various functions described herein as being performed by an entity may be performed by hardware, firmware, and / or software. For example, the various functions may be implemented by a processor executing instructions stored in a memory. In some embodiments, the systems, methods, and processes described herein may be implemented using FIG. 6A to FIG. 6D An exemplary autonomous or semi-autonomous vehicle 600, Figure 7 The exemplary computing device 700 and / or Figure 8 The exemplary data center 800 may perform similar components, features and / or functions.

[0023] Time synchronization system 100 may include, among other additional or alternative components, a computing platform 102 and one or more sensors, such as one or more sensors 104A, one or more sensors 104B, and one or more sensors 104C (which may be referred to as "sensors 104"). Computing platform 102 may include user space 106, kernel space 108, and system or hardware space 110, among other or alternative components.

[0024] User space 106 may include (among other or alternative components) one or more applications (such as one or more applications 112), one or more sensor drivers (such as one or more sensor drivers 114A, one or more sensor drivers 114B, and one or more sensor drivers 114C (which may be referred to as "sensors 114")), and one or more converters (such as one or more converters 116). In addition to additional or alternative components, kernel space 108 may include one or more sensor drivers (such as one or more sensor drivers 118A and one or more sensor drivers 118B (which may be referred to as "sensors 118")), one or more clock managers (such as one or more clock managers 120B and one or more clock managers 120C), one or more offset analyzers (such as one or more clock samplers 122), and one or more clock sources (such as one or more clock sources 124C). The system or hardware space 110 may include, in addition to additional or alternative components, one or more clock managers (such as one or more clock managers 120A), one or more clock sources (such as one or more clock sources 124A), and one or more interfaces (such as one or more interfaces 130A, one or more interfaces 130B, and one or more interfaces 130C (which may be referred to as "interfaces 130"). In at least one embodiment, one or more of the sensors may include one or more clock sources, such as one or more clock sources 124B included in one or more sensors 104B.

[0025] As an overview, the sensor 104 may be configured to provide sensor measurements to the computing platform 102 using the interface 130. A clock manager, such as clock manager 120A, 120B, or 120C (which may be referred to as “clock manager 120”), may be configured to provide time data indicating timestamps of the sensor measurements, where the time data may be referenced to different clock sources, such as clock sources 124A, 124B, or 124C (which may be referred to as “clock sources 124”). The clock sampler 122 may be configured to sample multiple clock sources to generate a set of related samples, such as a timestamp referenced to clock source 124A and a corresponding timestamp referenced to clock source 124B. The converter 116 may be configured to calculate conversion data between one or more clock sources 124, such as clock source 124A and clock source 124B, using a set of related samples, such as a set of related timestamps sampled using the clock sampler 122.

[0026] The sensor driver 118, if present, may provide an interface between the sensor 104, the kernel space 108, and / or the user space 106. Further, the sensor driver 114, if present, may provide an interface between the sensor 104, the kernel space 108, and / or the application 112. In the example shown, the sensor driver 114 may be configured to provide a timestamp of the sensor measurement result to the converter 116 and receive corresponding conversion data. The sensor driver 114 may use the conversion data to convert and / or transform the timestamp to a reference time domain. Further, the sensor driver 114 may provide the sensor measurement result and the timestamp corresponding to the reference time domain to the application 112. The application 112 may use the sensor measurement result and the timestamp for different purposes, such as for performing perception and / or control operations of the machine. In other examples, the sensor driver 118 may perform at least some of the functions of the sensor driver 114. For example, the sensor driver 118 may be configured to provide a timestamp to the converter 116 and / or receive corresponding conversion data.

[0027] The sensor 104 may be configured to generate sensor data. In one or more embodiments, the sensor may include at least one of: one or more physical sensors in a physical environment or one or more virtual sensors in a simulated environment. For example, the one or more sensors may correspond to a physical or simulated version of the vehicle 600 or another machine and / or robot as described herein.

[0028] Sensor data from sensors 104 may include, but is not limited to, sensor data from any sensor of vehicle 600 (and / or other vehicles or objects, such as, in some examples, robotic devices, VR systems, AR systems, etc.). FIG. 6A to FIG. 6C, the sensor data may include, but is not limited to, data generated by: a global navigation satellite system (GNSS) sensor 658 (e.g., one or more global positioning system sensors, one or more differential GPS (DGPS), etc.), one or more RADAR sensors 660, one or more ultrasonic sensors 662, one or more LIDAR sensors 664, one or more inertial measurement unit (IMU) sensors 666 (e.g., one or more accelerometers, one or more gyroscopes, one or more magnetic compasses, one or more magnetometers, etc.), one or more microphones 696, one or more stereo cameras 668, one or more wide-angle cameras 670 (e.g., fisheye cameras), one or more infrared cameras 672, one or more surround cameras 674 (e.g., 360-degree cameras), one or more long-range and / or mid-range cameras 698, one or more speed sensors 644 (e.g., for measuring the speed of the vehicle 600 and / or the distance traveled), and / or other sensor types.

[0029] In some examples, the sensor data may include sensor data generated using one or more front-facing sensors, side-view sensors, and / or rear-view sensors. The sensor data may be useful for computing platform 102 (e.g., using application 112) to identify, detect, classify, and / or track the movement of objects around vehicle 600 within an environment. In embodiments, any number of sensors may be used to incorporate multiple fields of view (e.g., Figure 6B The sensor data or a portion of the sensor data may refer to the unprocessed sensor data, the preprocessed sensor data, or a combination thereof.

[0030] The sensor data may include image data representing an image, image data representing a video (e.g., a snapshot of a video), data representing a sensor field of a sensor (e.g., a depth map of a LIDAR sensor, a value map of an ultrasonic sensor, etc.), and / or data representing measurements of a sensor. Where the sensor data includes image data, any type of image data format may be used, such as, for example but not limited to, compressed images such as Joint Photographic Experts Group (JPEG) or Luma / Chrominance (YUV) formats, compressed images such as frames derived from compressed video formats such as H.264 / Advanced Video Coding (AVC) or H.265 / High Efficiency Video Coding (HEVC), raw images such as derived from Red Clear Blue (RCCB), Red Clear (RCCC), or other types of imaging sensors, and / or other formats. Furthermore, in some examples, the sensor data may be used within computing platform 102 without any preprocessing (e.g., in a raw or captured format), while in other examples, the sensor data may undergo preprocessing (e.g., noise balancing, demosaicing, scaling, cropping, enhancement, white balancing, tone curve adjustment, etc., such as using a sensor data preprocessor (not shown)).

[0031] In the case where the sensor data includes IMU data, the IMU data can capture various sensed physical characteristics of the environment and / or motion-related information. For example, the IMU data can indicate acceleration (e.g., linear acceleration), rotation rate (e.g., angular velocity) and / or magnetic field strength (e.g., for compass orientation) along multiple axes. In one or more embodiments, the IMU data indicates the movement, orientation and / or spatial positioning of the vehicle 600. As an example and not limitation, the IMU data can be in the form of raw measurements, including three-axis accelerometer readings, three-axis gyroscope readings, and / or three-axis magnetometer readings. In addition or alternatively, at least some of the IMU data may undergo preprocessing steps such as noise filtering, calibration, sensor fusion algorithms (combining accelerometer, gyroscope and magnetometer data) and / or bias compensation. Preprocessing can enhance the accuracy, stability and / or reliability of the IMU data, thereby enabling more accurate motion tracking, navigation and orientation estimation using the computing platform 102.

[0032] In at least one embodiment, sensor 104 may be configured to provide sensor measurements to computing platform 102 using interface 130. Sensor measurements may refer to values ​​and / or portions of sensor data obtained from sensor 104 as a result of detecting and / or quantifying a physical and / or environmental phenomenon. In at least one embodiment, the values ​​and / or portions of sensor data may correspond to a particular point in time and / or time period, representing a corresponding detection or quantification of a physical and / or environmental characteristic. Where a sensor measurement corresponds to one or more values, the values ​​may be generated from one or more corresponding portions of sensor data using sensor 104 and / or other components (such as components of computing platform 102).

[0033] The interface 130 may be configured to facilitate communication and interaction between the sensors 104 and the computing platform 102. Although the sensors 104 are shown as being external to the computing platform 102, one or more of the sensors 104 may be included in the computing platform 102. By way of example and not limitation, the interface 130 is configured to receive data from the sensors 104, such as data representing sensor measurements. In one or more embodiments, the interface 130 may be configured to perform signal conditioning, provide protocol support, implement control and configuration, implement synchronization, and / or provide power to the sensors 104.

[0034] Non-limiting examples of interface 130 include one or more of any combination of: a general purpose input / output (GPIO) interface (e.g., for an IMU), a controller area network (CAN) interface (e.g., for a robotic and / or autonomous vehicle platform), an Ethernet interface (e.g., for a LIDAR sensor), or a video interface (VI) (e.g., for a camera).

[0035] In at least one embodiment, one or more timestamps may be assigned to and / or associated with one or more sensor measurements, wherein the one or more timestamps may indicate and / or correspond to one or more specific points in time and / or one or more time periods of the one or more sensor measurements. In at least one embodiment, the sensor measurements and / or timestamps may correspond to a measurement time, one or more sampling rates, and / or one or more organizations as time series data. The measurement time may indicate a specific moment at which a sensor captured a portion of data, thereby providing a time reference for the sensor measurements. The sampling rate may indicate the frequency at which portions of sensor data are captured, and may affect the temporal resolution and frequency of sensor measurements.

[0036] The timestamps may be associated with the sensor measurements using the corresponding clock manager 120. The clock manager 120 may associate time data indicating and / or representing one or more timestamps corresponding to the one or more sensor measurements. The time data of the clock manager 120 may be referenced to the corresponding clock source 124. For example, time data generated using the clock manager 120A may be referenced to the clock source 124A, time data generated using the clock manager 120B may be referenced to the clock source 124B, and time data generated using the clock manager 120C may be referenced to the clock source 124C.

[0037] like Figure 1 As shown, clock source 124 may include any combination of hardware clock sources or software clock sources. For example, clock source 124C is a software clock source, such as a system time clock source in kernel space 108. As a further example, clock sources 124A and 124B are hardware clock sources. By way of example and not limitation, clock source 124A may include a timestamp counter (TSC) clock source, and clock source 124B may include a pulse per second hardware clock (PHC) clock source.

[0038] The TSC clock source can be used to measure the passage of time at a fine-grained level. The TSC clock source can be implemented using a high-resolution hardware-based counter that increments at a substantially constant rate for precise timing measurements. In at least one embodiment, the TSC clock source is implemented using a register that accumulates the time increments at each clock system since the TSC clock source was reset. The PHC clock source can be used to measure the passage of time by generating a pulse signal once per second or other time increments. The PHC clock source can be implemented as a hardware component that generates a precise pulse signal synchronized with Coordinated Universal Time (UTC) or another reference time standard.

[0039] Although specific examples of clock sources 124 are provided, any combination of clock sources may be used. Examples of clock sources 124 include a software clock source, a hardware clock source, a high frequency oscillator clock source, a programmable interval timer (PIT) clock source, a high resolution timer (HIT) clock source, an atomic clock source, a phase locked loop (PLL) clock source, or a processor clock source.

[0040] like Figure 1As shown in FIG. 1 , the location of clock source 124 may vary. For example, a clock source (such as clock source 124B) may be external to computing platform 102, such as clock source 124B, or internal to computing platform 102. Further, the clock source may be included in user space 106 (not shown), kernel space 108 (e.g., clock source 124C), or system or hardware space 110 (e.g., clock source 124A). Further, the corresponding clock manager 120 may be included in any suitable space or environment, examples of which are shown in FIG. Figure 1 Shown in.

[0041] The time data provided by the clock manager 120 may vary, for example, based on the type of clock source and / or design requirements or selections. For example, in one or more embodiments, the clock manager 120 may generate the time data representing the timestamp, or another component (such as the sensor driver 118, the sensor driver 114, or other components) may be used, at least in part, to generate the timestamp from the time data.

[0042] By way of example, where the clock source 124A includes a TSC clock source, the time data may include a data-ready TSC. The data-ready TSC may represent one or more specific values ​​from the TSC clock source. The sensor driver 114A may use the data-ready TSC received with the corresponding sensor measurement to generate a timestamp for the sensor measurement.

[0043] As a further example, where the clock source 124B includes a PHC clock source, the clock manager 120B can use the pulse signal from the PHC clock source as a reference point to calculate a Precision Time Protocol (PTP) timestamp for the sensor measurement results. In at least one embodiment, the sensor driver 118 and the clock manager 120B are implemented using a Linux PTP stack. The PTP timestamp can be provided to the sensor driver 114B along with the sensor measurement results.

[0044] As an additional example, where the clock source 124C includes a system time clock source (a reference for measuring time within an operating system), the clock manager 120C may respond to a request for system time with a corresponding system time timestamp. In the example shown, the timestamp may be requested by the sensor driver 114C, and another component may initiate the request. By way of example and not limitation, the sensor driver 114C may receive one or more sensor measurements (e.g., CAN data) and request a corresponding system time timestamp from the clock manager 120C.

[0045] Clock sampler 122 and converter 116 can be used to convert or translate time data of sensor measurements referenced to different clock sources into a reference or common time domain. The reference time domain can provide application 112 with a comprehensive and coherent understanding of the environment by accurately capturing the relative timing between different sensor events.

[0046] As described herein, clock sampler 122 may be configured to sample multiple clock sources to generate a set of related samples, such as a timestamp referenced to clock source 124A and a corresponding timestamp referenced to clock source 124B. For example, clock sampler 122 may sample multiple clock sources simultaneously or concurrently to generate a set of related samples (e.g., TSC timestamps and PTP timestamps). The set of related samples may be generated on demand, periodically, and / or using a sampling rate.

[0047] The one or more clock sources sampled by the clock sampler 122 may be frequency locked or may be free running. In the example shown, the clock source 124A is frequency locked to the clock source 124B. The frequency locking may be hardware-based and / or software-based. For example, a hardware-based frequency locker 140 is shown. The frequency locking may simplify the calculations performed by the converter 116 by reducing or eliminating drift between the clock sources and increase the accuracy of the converted timestamps.

[0048] In at least one embodiment, the frequency locker 140 is implemented using a digital PLL with a state machine, for example, using feedback to compare the phase and frequency of a reference signal with the clock signal to adjust the frequency of the clock signal to match the reference signal. In at least one embodiment, the clock source 124B (e.g., a PHC clock source) is used as the reference signal. As a further example, frequency locking can be performed using a frequency synthesizer and / or digital signal processing techniques.

[0049] See now Figure 2 , Figure 2 2 is an example of a diagram 200 of a set of related timestamps having a set of timestamps corresponding to sensor measurements according to some embodiments of the present disclosure. The set of related timestamps may be sampled using clock sampler 122 as described herein. In the illustrated example, the set of related timestamps includes timestamp 210A, timestamp 210B, timestamp 210C, and timestamp 210D (which may be referred to as “timestamp 210”) and timestamp 212A, timestamp 212B, timestamp 212C, and timestamp 212D (which may be referred to as “timestamp 212”). Timestamp 210 may be referenced to clock source 124B, and timestamp 212 may be referenced to clock source 124A. Figure 2A set of related timestamps including timestamp 210A and timestamp 212A, a set of related timestamps including timestamp 210B and timestamp 212B, a set of related timestamps including timestamp 210C and timestamp 212C, and a set of related timestamps including timestamp 210D and timestamp 212D are shown. In diagram 200, the timestamp value may represent the value of the timestamp, and the timestamp index may represent a time value relative to sampling or concurrent measurements performed using clock sampler 122 (e.g., at a sampling rate).

[0050] As described herein, converter 116 may be configured to calculate conversion data between one or more clock sources 124 using a set of related samples from clock sampler 122. The conversion data may represent, for example, any information used to convert one or more timestamps, such as timestamp 222 corresponding to clock source 124A, into a reference time domain. For example, the reference time domain may correspond to clock source 124B and / or clock source 124C, where timestamp 222 corresponds to timestamp 220 converted into the reference time domain.

[0051] The conversion of timestamps may be performed using an offset of the timestamps and may correspond to one or more differences in offsets between sets of one or more related timestamps and / or one or more rates of change between sets of related timestamps. Figure 2 The difference (or offset) 228 between timestamp 210A and timestamp 212A in the set of related timestamps is indicated. Figure 2 Also indicated is a rate of change 230 of timestamp 210 and a rate of change 232 of timestamp 212. In at least one embodiment, converter 116 calculates one or more of a difference and / or a rate of change between one or more timestamps and uses the difference and / or the rate of change to convert the timestamps. In at least one embodiment, converter 116 calculates the offset without calculating the rate of change. For example, in the case where clock sources 124A and 124B are frequency locked, a rate of change may not be required to perform the conversion.

[0052] By way of example and not limitation, the timestamp PTP referenced to clock source 124B may be related to the timestamp index t according to equation (1):

[0053] PTP[t]=c*t+d, Equation (1)

[0054] Where c may refer to the rate of change 230, and d may refer to the y-intercept or offset corresponding to the timestamp 210. Similarly, the timestamp TSC referenced to the clock source 124A may be related to the timestamp index t according to equation (2):

[0055] TSC[t]=a*t+b, Equation (2)

[0056] Where a may refer to the rate of change 232 , and b may refer to the y-intercept or offset corresponding to the timestamp 212 .

[0057] Therefore, in at least one embodiment, the converter 116 may convert the TSC timestamp t TSC Convert to PTP timestamp:

[0058] PTP[t TSC ]=c*(t TSC -b) / a+d. Equation (3)

[0059] As described herein, in the case where clock sources 124A and 124B are frequency locked, a rate of change may not be required to perform the conversion. For example, using frequency locking, converter 116 may operate under the simplifying assumption that a~=c and clock sources 124A and 124B are constantly offset from each other (e.g., where "-b+d" represents the offset between clock sources 124A and 124B). More generally, the relationship between a and c may be defined as Where k may be a predefined constant that does not need to be calculated from a set of related samples. In at least one embodiment, converter 116 may calculate the offset between clock sources 124A and 124B as a running average between a set of related timestamps.

[0060] Although described with respect to clock sources 124A and 124B Figure 2 , but converter 116 may use similar methods to convert other clock sources, such as clock source 124C, to the reference time domain. Further, although clock source 124B (e.g., PHC clock source) is described as being used as the reference time domain, the reference time domain may be different. In at least one embodiment, converter 116 need not convert the timestamp of clock source 124C to the reference time domain. For example, Figure 1 As shown, clock source 124C may be synchronized (eg, continuously) with clock source 124B. Thus, in the case where clock source 124C is a system time clock source, the reference time domain may correspond to the system time.

[0061] In at least one embodiment, to synchronize clock source 124C with clock source 124B, clock manager 120C may perform one or more step changes on a counter of clock source 124C using clock source 124B and / or may perform one or more frequency adjustments on clock source 124C. In at least one embodiment, the step changes may be performed only when the service is started (e.g., at boot time), and the frequency adjustments may be performed subsequently (e.g., at runtime).

[0062] In at least one embodiment, the sensor driver 114 provides the time data and / or the corresponding time stamp to the converter 116 for conversion or translation to a reference time domain (e.g., according to Figure 2 ). For example, in response to receiving the time data and the corresponding sensor measurement results, the sensor driver 114 may provide the timestamp and / or time data to the converter 116. The converter 116 may convert the timestamp and / or time data to a reference time domain using the corresponding converted data, and send the converted data back to the sensor driver 114. The sensor driver 114 may then provide the converted data and the corresponding sensor measurement results to one or more of the applications 112 using communications 132A, 132B, or 132C (which may be referred to as "communications 132"). As an example and not limitation, each of the communications 132 may include sensor measurements and corresponding timestamps referenced to the system time (or a different reference time domain). Therefore, in at least one embodiment, one or more applications 112 may receive a timestamp referenced to a common time domain regardless of the initial clock source used to associate the time data with the sensor measurement.

[0063] In an example where there are multiple potential initial time domains for the timestamp, the converter 116 can determine the time domain to which the timestamp is referenced and apply the conversion data corresponding to the determined time domain. The time domain can be determined by the converter 116, for example, using an identifier or indicator of the sensor driver 114 and / or the time domain. The identifier or indicator (e.g., with the timestamp) can be received in a message from the sensor driver 114. In at least one embodiment, the sensor driver 114 can provide the timestamp to the converter 116 when the sensor driver 114 receives the time data. In at least one embodiment, the sensor driver 114 receives the time data and sensor measurements in one or more time data streams from the sensor 104. In at least one embodiment, the converter 116 performs a time domain conversion on the time data stream and the corresponding sensor measurements from the sensor 104 to the application 112.

[0064] In at least one embodiment, the converter 116 performs the conversion using current conversion data, such as a current offset and / or rate of change value (e.g., a running average) calculated from a set of related time samples. In at least one embodiment, the converter 116 may determine which conversion data to use to perform the conversion. For example, the conversion data applied may depend on the time domain to which the timestamp is referenced and / or the timestamp index or order associated with the timestamp. As an example, in the case where the clock source is free running, the converter 116 may look up the corresponding rate of change of the clock source. However, in the case where the clock source is frequency locked, the rate of change may not be required.

[0065] According to the disclosed embodiments, Figure 1The examples provided indicate the flexibility of configuring the computing platform 102. Although certain functions can be described with respect to specific components, the functions can be implemented at least in part using different or additional components. For example, functions described as being performed in user space 106, kernel space 108, or system or hardware space 110 can be performed at least in part using any combination of user space, kernel space, and system space. Further, the functions of one or more sensor drivers 118 or 114 may not be required, or may be integrated into one or more different components. As a further example, at least some of the clock sampler 122, converter 116, and / or its functions can be provided in the same or different user space 106, kernel space 108, or system or hardware space 110. Further, at least some of the functions can be at least partially integrated into one or more of the sensor driver 114, sensor driver 118, and / or application 112. As an example, one or more of the sensor drivers 114 may include a converter 116 for performing a time domain conversion on time data received by the sensor driver 114 and / or received from one or more other sensor drivers 114, sensor driver 118, and / or interface 130. In at least one embodiment, the converter 116 provides the converted data to the requesting sensor driver 114, and the sensor driver 114 performs the conversion. While sensor measurements have been described, the disclosed methods may be more generally applicable to other forms of time stamped data where the time data is referenced to different clock sources (e.g., network logs, network server logs, etc.).

[0066] As described herein, one or more applications 112 can use sensor measurements and timestamps for various purposes, such as for performing perception and / or control operations of one or more machines. Applications 112 can include games, video streaming applications, machine control applications, machine motion applications, machine drive applications, synthetic data generation applications, model training applications, perception applications, augmented reality applications, virtual reality applications, mixed reality applications, robotics applications, security and surveillance applications, autonomous or semi-autonomous machine applications, deep learning applications, environmental simulation applications, data center processing applications, generative AI applications, applications using (large) language models, conversational AI applications, light transport simulation applications (e.g., ray tracing, path tracing, etc.), collaborative content creation applications for 3D assets, digital twin system applications, cloud computing applications, mobile applications, computer applications, console applications, tablet applications, robotics applications, autonomous vehicle applications, and / or another type of application or service.

[0067] See now Figure 3 , Figure 4 and Figure 5, each block of methods 300, 400, 500, and other methods described herein includes a computing process that can be performed using any combination of hardware, firmware, and / or software. For example, the various functions can be implemented by a processor executing instructions stored in a memory. The method can also be implemented as computer-usable instructions stored on a computer storage medium. To name a few, the method can be provided by a stand-alone application, a service, or a hosted service (standalone or in combination with other hosted services), or a plug-in to another product. In addition, by way of example, with respect to Figure 1 The methods are described with reference to the time synchronization system 100. However, the methods may additionally or alternatively be performed by any one system or any combination of systems, including but not limited to those described herein.

[0068] Figure 3 3 is a flow chart illustrating a method 300 for converting a timestamp to a reference time domain based on receiving a set of correlated timestamps according to some embodiments of the present disclosure. At block B302, the method 300 includes receiving a set of one or more sampled correlated timestamps. For example, the converter 116 may receive a set of one or more correlated timestamps sampled using the clock sampler 122. The set of correlated timestamps may include one or more timestamps referenced to the clock source 124A and one or more timestamps referenced to the clock source 124B.

[0069] At block B304, method 300 includes calculating one or more offsets between clock sources. For example, converter 116 may use a set of related timestamps of one or more samples to calculate the offset between clock source 124A and clock source 124B (e.g., based on Figure 2 )'s one or more offsets (e.g., and one or more rates of change).

[0070] At block B306, the method 300 includes converting one or more timestamps to a reference time domain. For example, the converter 116 may convert one or more timestamps of one or more sensor measurements (e.g., received from the sensor driver 114) to a reference time domain using one or more offsets (e.g., and one or more rates of change).

[0071] At block B308 , the method 300 includes performing one or more operations of the machine. For example, the application 112 may perform one or more operations of the vehicle 600 (or a different machine) using one or more sensor measurements and one or more timestamps converted to a reference time domain.

[0072] Figure 44 is a flow chart illustrating a method 400 for converting time data to a reference time domain based on correlated samples of clock sources according to some embodiments of the present disclosure. At block B402, the method 400 includes: sampling multiple clock sources to generate one or more correlated time stamp sets. For example, the clock sampler 122 may sample the clock sources 124A and 124B to generate one or more correlated sample sets of the clock sources 124A and 124B.

[0073] At block B404, method 400 includes calculating one or more offsets between the clock sources. For example, converter 116 may calculate one or more offsets (eg, and one or more rates of change) between clock sources 124A and 124B using one or more sets of correlated samples.

[0074] At block B406 , the method 400 includes converting the time data to a reference time domain. For example, the converter 116 may convert the time data of the one or more sensor measurements to a reference time domain using one or more offsets (eg, and one or more rates of change).

[0075] At block B408 , the method 400 includes performing one or more operations of the machine. For example, the application 112 may perform one or more operations of the vehicle 600 (or a different machine) using one or more sensor measurements and the time data converted to a reference time domain.

[0076] Figure 5 1 is a flow chart illustrating a method 500 for initializing a time synchronization system according to some embodiments of the present disclosure. In at least one embodiment, the method 500 may be performed to initialize the time synchronization system 100 to perform a time domain conversion. In at least one embodiment, the method 500 may be performed as part of a boot sequence of the computing platform 102 and / or in response to a boot sequence of the computing platform 102. In at least one embodiment, during normal operation of the computing platform 102, network time is not used to determine timestamps of sensor measurements of the application 112.

[0077] At block B502 , the method 500 includes determining whether network time is available. For example, the one or more clock managers 120 may determine whether network time is available to the computing platform 102 .

[0078] At block B504, if it is determined that the network time is not available, a persistent clock source may be used to update the first clock source. For example, one or more clock managers 120 may use a persistent clock source 150 (such as a real-time clock (RTC) clock source of the computing platform 102) to update the clock source 124C (e.g., a system clock source). The persistent clock source 150 may use a power source such as a battery, a backup power source, an uninterruptible power supply (UPS), a capacitor, a backup power source, etc., so that the persistent clock source 150 can continue to keep time when the main power source is turned off or otherwise unavailable.

[0079] At block B506, if it is determined that network time is available, the first clock source and the persistent clock source may be updated using the network time. For example, the one or more clock managers 120 may update the clock source 124C and the persistent clock source 150 to reflect the network time.

[0080] At block B508, method 500 includes updating a second clock source using the first clock source.For example, one or more clock managers 120 may update clock source 124B (eg, a PHC clock source) using clock source 124C (eg, a system clock source).

[0081] At block B510, the method 500 includes locking the third clock source to the second clock source. For example, the one or more clock managers 120 may frequency lock the clock source 124A (e.g., TSC clock source) to the clock source 124B (e.g., PHC clock source). The clock sampler 122 may sample the clock sources 124A and 124B for time domain conversion based at least on the frequency lock.

[0082] Example Autonomous Vehicle

[0083] Fig. 6Ais an illustration of an exemplary autonomous vehicle 600 according to some embodiments of the present disclosure. Autonomous vehicle 600 (or referred to herein as "vehicle 600") may include, but is not limited to, a passenger vehicle such as a car, a truck, a bus, a first response vehicle, a shuttle, an electric or motorized bicycle, a motorcycle, a fire truck, a police car, an ambulance, a boat, a construction vehicle, an underwater vehicle, a robotic vehicle, a drone, an airplane, a vehicle coupled to a trailer (e.g., a semi-tractor-trailer truck for hauling cargo), and / or other types of vehicles (e.g., vehicles that are unmanned and / or accommodate one or more passengers). Autonomous vehicles are generally described in terms of automation levels, as defined by the National Highway Traffic Safety Administration (NHTSA) of the U.S. Department of Transportation, and the Society of Automotive Engineers (SAE) "Classification and Definitions of Terms Related to Driving Automation Systems for Road Motor Vehicles" (Standard No.: J3016-201806, published on June 15, 2018, Standard No.: J3016-201609, published on September 30, 2016, and previous and future versions of this standard). The vehicle 600 may implement functions according to one or more of Levels 3 to 5 of the autonomous driving levels. The vehicle 600 may be capable of having functionality that complies with one or more of Levels 1 to 5 of the autonomous driving levels. For example, according to an embodiment, the vehicle 600 may have driver assistance (Level 1), partial automation (Level 2), conditional automation (Level 3), high automation (Level 4), and / or full automation (Level 5). The term “autonomy” as used herein may include any and / or all types of autonomy of a vehicle 600 or other machine, such as fully autonomous, highly autonomous, conditionally autonomous, partially autonomous, providing assisted autonomy, semi-autonomous, primarily autonomous, or other designations.

[0084] The vehicle 600 may include a chassis, a body, wheels (e.g., 2, 4, 6, 8, 18, etc.), tires, axles, and other components of the vehicle. The vehicle 600 may include a propulsion system 650, such as an internal combustion engine, a hybrid power plant, an all-electric engine, and / or other propulsion system types. The propulsion system 650 may be connected to a drive train of the vehicle 600, which may include a transmission, to achieve propulsion of the vehicle 600. The propulsion system 650 may be controlled in response to receiving a signal from a throttle / accelerator 652.

[0085] When propulsion system 650 is in operation (e.g., when the vehicle is in motion), a steering system 654 including a steering wheel may be used to guide vehicle 600 (e.g., along a desired path or route). Steering system 654 may receive signals from steering actuator 656. For fully automated (Level 5) functionality, a steering wheel may be optional.

[0086] Brake sensor system 646 may be used to operate vehicle brakes in response to signals received from brake actuator 648 and / or brake sensors.

[0087] The one or more controllers 636 may include one or more system on chip (SoC) 604 ( Figure 6C ) and / or one or more GPUs, may provide signals (e.g., representing commands) to one or more components and / or systems of the vehicle 600. For example, the one or more controllers may send signals to operate vehicle brakes through one or more brake actuators 648, operate the steering system 654 through one or more steering actuators 656, and operate the propulsion system 650 through one or more throttles / accelerators 652. The one or more controllers 636 may include one or more on-board (e.g., integrated) computing devices (e.g., supercomputers) that process sensor signals and output operating commands (e.g., signals representing commands) to enable autonomous driving and / or assist a human driver in driving the vehicle 600. The one or more controllers 636 may include a first controller 636 for autonomous driving functions, a second controller 636 for functional safety functions, a third controller 636 for artificial intelligence functions (e.g., computer vision), a fourth controller 636 for infotainment functions, a fifth controller 636 for redundancy in emergency situations, and / or other controllers. In some examples, a single controller 636 may handle two or more of the above functions, two or more controllers 636 may handle a single function, and / or any combination thereof.

[0088] The one or more controllers 636 may provide signals for controlling one or more components and / or systems of the vehicle 600 in response to sensor data (eg, sensor inputs) received from one or more sensors. Sensor data may be received from, for example, but not limited to, one or more global navigation satellite system (“GNSS”) sensors 658 (e.g., one or more global positioning system sensors), one or more radar sensors 660, one or more ultrasonic sensors 662, one or more lidar sensors 664, one or more inertial measurement unit (IMU) sensors 666 (e.g., one or more accelerometers, one or more gyroscopes, one or more magnetic compasses, magnetometers, etc.), one or more microphones 696, one or more stereo cameras 668, one or more wide-angle cameras 670 (e.g., fisheye cameras), one or more infrared cameras 672, one or more surround cameras 674 (e.g., 360 degree cameras), one or more long-range and / or medium frequency cameras 698, one or more speed sensors 644 (e.g., for measuring the speed of vehicle 600), one or more vibration sensors 642, one or more steering sensors 640, one or more brake sensors (e.g., as part of brake sensor system 646), and / or other sensor types.

[0089] One or more of the controllers 636 may receive input (e.g., represented by input data) from the instrument cluster 632 of the vehicle 600 and provide output (e.g., represented by output data, display data, etc.) via a human machine interface (HMI) display 634, an audio annunciator, a speaker, etc. and / or via other components of the vehicle 600. The output may include information such as vehicle speed, velocity, time, map data (e.g., Figure 6C The HMI display 634 may include information such as a high-definition (“HD”) map 622 of the vehicle 600 ), location data (e.g., the location of the vehicle 600 , such as a location on a map), directions, locations of other vehicles (e.g., an occupancy grid), and information about objects and object states sensed by one or more controllers 636 . For example, the HMI display 634 may display information about the presence of one or more objects (e.g., street signs, warning signs, traffic light changes, etc.), and / or information about driving maneuvers that the vehicle has performed, is performing, or will perform (e.g., change lanes now, take exit 34B in two miles, etc.).

[0090] The vehicle 600 also includes a network interface 624 that can communicate via one or more networks using one or more wireless antennas 626 and / or a modem. For example, the network interface 624 can be capable of communicating via Long Term Evolution (“LTE”), Wideband Code Division Multiple Access (“WCDMA”), Universal Mobile Telecommunications System (“UMTS”), Global System for Mobile Communications (“GSM”), IMT-CDMA Multi-Carrier (“CDMA2000”), etc. The one or more wireless antennas 626 can also use one or more local area networks (e.g., Bluetooth, Bluetooth Low Energy (“LE”), Z-wave, ZigBee, etc. and / or low power wide area networks (LPWANs), such as LoRaWAN, SigFox, etc.) to enable communication between objects in the environment (e.g., vehicles, mobile devices, etc.).

[0091] Figure 6B According to some embodiments of the present disclosure Fig. 6A 600. The cameras and respective fields of view are an example embodiment and are not intended to be limiting. For example, additional and / or alternative cameras may be included and / or the cameras may be located at different locations on the vehicle 600.

[0092] The camera type of the camera may include, but is not limited to, a digital camera, which may be applicable to components and / or systems of the vehicle 600. One or more cameras may operate at automotive safety integrity level (ASIL) B and / or other ASILs. According to an embodiment, the camera type may have any image capture rate, such as 60 frames per second (fps), 120 frames, 240 frames, etc. The camera may use a rolling shutter, a global shutter, another type of shutter, or a combination thereof. In some examples, the color filter array may include a red transparent (RCCC) color filter array, a red transparent blue (RCCB) color filter array, a red, blue, green transparent (RBGC) color filter array, a Foveon X3 color filter array, a Bayer sensor (RGGB) color filter array, a monochrome sensor color filter array, and / or other types of color filter arrays. In some embodiments, a clear pixel camera, such as a camera with an RCCC, RCCB, and / or RBGC color filter array, may be used in an effort to improve light sensitivity.

[0093] In some examples, one or more cameras can be used to perform advanced driver assistance system (ADAS) functions (e.g., as part of a redundant or fail-safe design). For example, a multifunctional single camera can be installed to provide functions such as lane departure warning, traffic sign assistance, and intelligent headlight control. One or more cameras (e.g., all cameras) can record and provide image data (e.g., video) simultaneously.

[0094] One or more cameras may be mounted in a mounting assembly, such as a custom designed (three-dimensional ("3D") printed) assembly to cut out stray light and in-vehicle reflections (e.g., dashboard reflections off of windshield mirrors) that may interfere with the camera's ability to capture image data. With respect to the wing mirror mounting assembly, the wing mirror assembly may be custom 3D printed so that the camera mounting plate matches the shape of the wing mirror. In some examples, one or more cameras may be integrated into the wing mirror. For side view cameras, one or more cameras may also be integrated into the four pillars at each corner of the cabin.

[0095] A camera (e.g., a front-facing camera) having a field of view that includes a portion of the environment in front of the vehicle 600 can be used for a surround view to help identify the forward path and obstacles, as well as assist in providing information critical to generating an occupancy grid and / or determining a preferred vehicle path with the help of one or more controllers 636 and / or a controlling SOC. A front-facing camera can be used to perform many of the same ADAS functions as a lidar, including emergency braking, pedestrian detection, and collision avoidance. A forward-facing camera can also be used for ADAS functions and systems, including lane departure warning ("LDW"), automatic cruise control ("ACC"), and / or other functions, such as traffic sign recognition.

[0096] A variety of cameras may be used in the front-facing configuration, including, for example, a monocular camera platform including a complementary metal oxide semiconductor ("CMOS") color imager. Another example may be a wide-angle camera 670 that may be used to sense objects (e.g., pedestrians, crossing traffic, or bicycles) that enter the field of view from the periphery. Although Figure 6B Only one wide-angle camera is shown in FIG6 , but there may be any number (including zero) of wide-angle cameras 670 on vehicle 600. In addition, any number of long-range cameras 698 (e.g., a long-angle stereo camera pair) can be used for depth-based object detection, especially for objects for which a neural network has not yet been trained. One or more long-range cameras 698 can also be used for object detection and classification and basic target tracking.

[0097] Any number of stereo cameras 668 may also be included in the front configuration. In at least one embodiment, one or more stereo cameras 668 may include an integrated control unit including an expandable processing unit that can provide programmable logic ("FPGA") and a multi-core microprocessor with an integrated controller area network ("CAN") or Ethernet interface on a single chip. The unit can be used to generate a 3D map of the vehicle environment, including distance estimates for all points in the image. One or more alternative stereo cameras 668 may include a compact stereo vision sensor that may include two camera lenses (one on the left and one on the right) and an image processing chip that can measure the distance from the vehicle to the target object and use the generated information (e.g., metadata) to activate automatic emergency braking and lane departure warning functions. In addition to the stereo cameras described herein, or alternatively, other types of stereo cameras 668 may be used.

[0098] Cameras with a field of view that includes portions of the surroundings to the sides of the vehicle 600 (e.g., side view cameras) can be used for surround views, providing information for creating and updating occupancy grids and generating side collision warnings. For example, one or more surround cameras 674 (e.g., Figure 6B Four surround cameras 674 (shown) may be positioned on the vehicle 600. The one or more surround cameras 674 may include one or more wide angle cameras 670, one or more fisheye cameras, one or more 360 ​​degree cameras, etc. For example, four fisheye cameras may be located at the front, rear, and sides of the vehicle. In an alternative arrangement, the vehicle may use three surround cameras 674 (e.g., left, right, and rear), and may utilize one or more other cameras (e.g., a front-facing camera) as a fourth surround view camera.

[0099] A camera having a field of view that includes a portion of the environment behind the vehicle 600 (e.g., a rear view camera) can be used for parking assistance, surround view, rear-end collision warning, and creating and updating an occupancy grid. A variety of cameras can be used, including but not limited to cameras that are also suitable as front-facing cameras (e.g., one or more long-range and / or mid-range cameras 698, one or more stereo cameras 668, one or more infrared cameras 672, etc.), as described herein.

[0100] Figure 6C According to some embodiments of the present disclosure Fig. 6ABlock diagram of an exemplary system architecture of an exemplary autonomous vehicle 600. It should be understood that this arrangement and other arrangements described herein are set forth only as examples. In addition to the arrangements and elements shown, other arrangements and elements (e.g., machines, interfaces, functions, sequences, functional groupings, etc.) may be used, or other arrangements and elements may be used in place of the arrangements and elements shown, and some elements may be omitted entirely. In addition, many of the elements described herein are functional entities that may be implemented as discrete or distributed components, or in combination with other components, and may be implemented in any suitable combination and location. The various functions described herein as being performed by an entity may be performed by hardware, firmware, and / or software. For example, the various functions may be performed by a processor executing instructions stored in a memory.

[0101] Figure 6C Each component, feature, and system of vehicle 600 is connected via bus 602. Bus 602 may include a controller area network (CAN) data interface (also referred to herein as a "CAN bus"). CAN can be a network within vehicle 600 that helps control various features and functions of vehicle 600, such as the drive of brakes, acceleration, braking, steering, windshield wipers, etc. The CAN bus can be configured to have dozens or even hundreds of nodes, each with its own unique identifier (e.g., CAN ID). The CAN bus can be read to find steering wheel angle, ground speed, engine speed per minute (RPM), button position, and / or other vehicle status indicator lights. The CAN bus can comply with ASIL B standards.

[0102] Although bus 602 is described herein as a CAN bus, this is not intended to be limiting. For example, in addition to or from the CAN bus, FlexRay and / or Ethernet can also be used. In addition, although a single line is used to represent bus 602, this is not intended to be limiting. For example, there can be any number of buses 602, which may include one or more CAN buses, one or more FlexRay buses, one or more Ethernet buses, and / or one or more other types of buses using different protocols. In some examples, two or more buses 602 can be used to perform different functions, and / or can be used for redundancy. For example, a first bus 602 can be used for collision avoidance functions, and a second bus 602 can be used for drive control. In any example, each bus 602 can communicate with any component of the vehicle 600, and two or more buses 602 can communicate with the same component. In some examples, each SoC 604, each controller 636, and / or each computer in the vehicle can access the same input data (e.g., input from sensors of the vehicle 600), and can be connected to a common bus, such as a CAN bus.

[0103] The vehicle 600 may include one or more controllers 636, as described herein with respect to Fig. 6A The controller 636 can be used for various functions. One or more controllers 636 can be coupled to any of the various other components and systems of the vehicle 600, and can be used to control the vehicle 600, the artificial intelligence of the vehicle 600, the infotainment of the vehicle 600, etc.

[0104] The vehicle 600 may include one or more systems on a chip (SoC) 604. The SoC 604 may include one or more CPUs 606, one or more GPUs 608, one or more processors 610, one or more caches 612, one or more accelerators 614, one or more data stores 616, and / or other components and features not shown. The one or more SoCs 604 may be used to control the vehicle 600 in various platforms and systems. For example, the one or more SoCs 604 may be combined with an HD map 622 in a system (e.g., a system of the vehicle 600), and the HD map 622 may be downloaded from one or more servers (e.g., Fig.6D server 678) to obtain map refreshes and / or updates.

[0105] One or more CPUs 606 may include a CPU cluster or CPU complex (or referred to herein as a "CCPLEX"). One or more CPUs 606 may include multiple cores and / or L2 caches. For example, in some embodiments, one or more CPUs 606 may include eight cores in a coherent multiprocessor configuration. In some embodiments, one or more CPUs 606 may include four dual-core clusters, each with a dedicated L2 cache (e.g., a 2MB L2 cache). One or more CPUs 606 (e.g., CCPLEX) may be configured to support simultaneous cluster operations so that any combination of CPU 606 clusters is active at any given time.

[0106] One or more CPUs 606 may implement power management capabilities including one or more of the following features: individual hardware blocks may be automatically clock gated when idle to save dynamic power; each core clock may be gated when the core is not actively executing instructions due to executing WFI / WFE instructions; each core may be independently power gated; each core cluster may be independently clock gated when all cores are clock gated or power gated; and / or each core cluster may be independently power gated when all cores are power gated. One or more CPUs 606 may further implement an enhanced algorithm for managing power states, where allowed power states and expected wakeup times are specified, and hardware / microcode determines the optimal power state to enter for the core, cluster, and CCPLEX. The processing core may support a simplified power state entry sequence in software and offload work to microcode.

[0107] One or more GPUs 608 may include an integrated GPU (or referred to herein as an "iGPU"). GPU 608 may be programmable and may be efficient for parallel workloads. In some examples, one or more GPUs 608 may use an enhanced tensor instruction set. One or more GPUs 608 may include one or more stream microprocessors, each of which may include a level 1 cache (e.g., a level 1 cache with at least 96KB storage capacity), and two or more stream microprocessors may share a level 2 cache (e.g., a level 2 cache with 512KB storage capacity). In some embodiments, one or more GPUs 608 may include at least eight stream microprocessors. One or more GPUs 608 may use one or more computing application programming interfaces (APIs). In addition, one or more GPUs 608 may use one or more parallel computing platforms and / or programming models (e.g., NVIDIA's CUDA).

[0108] One or more GPUs 608 may be power optimized to achieve optimal performance in automotive and embedded use cases. For example, one or more GPUs 608 may be manufactured on fin field effect transistors (FinFETs). However, this is not intended to be limiting, and one or more GPUs 608 may be manufactured using other semiconductor manufacturing processes. Each streaming microprocessor may incorporate multiple mixed precision processing cores that are divided into multiple blocks. For example, but not limited to, 64 PF32 cores and 32 PF64 cores may be divided into four processing blocks. In such an example, 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two mixed precision NVIDIA tensor cores for deep learning matrix algorithms, L0 instruction caches, warp schedulers, dispatch units, and / or 64KB register files may be allocated to each processing block. In addition, the streaming microprocessor may include independent parallel integer and floating point data paths to provide efficient execution of workloads through mixed calculations and addressing calculations. The streaming microprocessor may include independent thread scheduling capabilities to achieve finer-grained synchronization and collaboration between parallel threads. A streaming microprocessor may include a combined L1 data cache and shared memory unit to increase performance while simplifying programming.

[0109] One or more GPUs 608 may include high bandwidth memory (HBM) and / or a 16GB HBM2 memory subsystem to provide about 900GB / sec peak memory bandwidth in some examples. In some examples, synchronous graphics random access memory (SGRAM), such as fifth generation graphics double data rate synchronous random access memory (GDDR5), is used in addition to or alternatively from the HBM memory.

[0110] The fifth generation GPU 608 may include unified memory technology, which includes access counters to allow more accurate migration of memory pages to the processor that most frequently accesses them, thereby improving the efficiency of sharing memory ranges between processors. In some examples, address translation service (ATS) support may be used to allow one or more GPUs 608 to directly access one or more CPU 606 page tables. In such an example, when one or more GPU 608 memory management units (MMUs) experience a miss, an address translation request may be sent to one or more CPUs 606. In response, one or more CPUs 606 may look up the virtual to physical mapping of the address in its page table and send the translation back to one or more GPUs 608. Therefore, unified memory technology may allow a single unified virtual address space for the memory of both one or more CPUs 606 and one or more GPUs 608, thereby simplifying one or more GPU 608 programming and porting applications to one or more GPUs 608.

[0111] In addition, one or more GPUs 608 may include access counters that can track how often one or more GPUs 608 access the memory of other processors. The access counters can help ensure that memory pages are moved to the physical memory of the processor that accesses the page most frequently.

[0112] One or more SoCs 604 may include any number of caches 612, including the caches 612 described herein. For example, one or more caches 612 may include an L3 cache available to one or more CPUs 606 and one or more GPUs 608 (e.g., connecting both one or more CPUs 606 and one or more GPUs 608). Cache 612 may include a write-back cache that can track the state of a line, such as by using a cache coherence protocol (e.g., MEI, MESI, MSI, etc.). Although smaller cache sizes may be used, according to an embodiment, the L3 cache may include 4MB or more.

[0113] One or more SoCs 604 may include one or more arithmetic logic units (ALUs) that may be used to perform processing associated with various tasks or operations of the vehicle 600, such as processing a DNN. Additionally, one or more SoCs 604 may include one or more floating point units (FPUs) or other math coprocessor or digital coprocessor types for performing mathematical operations within the system. For example, one or more SoCs 604 may include one or more FPUs integrated as execution units within the CPU 606 and / or GPU 608.

[0114] One or more SoCs 604 may include one or more accelerators 614 (e.g., hardware accelerators, software accelerators, or a combination thereof). For example, one or more SoCs 604 may include a hardware acceleration cluster that may include optimized hardware accelerators and / or large on-chip memory. Large on-chip memory (e.g., 4MB of SRAM) can enable the hardware acceleration cluster to accelerate neural networks and other calculations. The hardware acceleration cluster can be used to supplement one or more GPUs 608 and unload some tasks of one or more GPUs 608 (e.g., freeing up more cycles of one or more GPUs 608 to perform other tasks). For example, one or more accelerators 614 can be used for target workloads that are stable enough to be suitable for acceleration (e.g., perception, convolutional neural networks (CNNs), etc.). The term "CNN" used herein may include all types of CNNs, including regional or regional convolutional neural networks (RCNNs) and fast RCNNs (e.g., for target detection).

[0115] One or more accelerators 614 (e.g., a hardware acceleration cluster) may include one or more deep learning accelerators (DLAs). One or more DLAs may include one or more tensor processing units (TPUs) that may be configured to provide an additional 10 trillion operations per second for deep learning applications and reasoning. A TPU may be an accelerator configured to perform image processing functions (e.g., for CNN, RCNN, etc.) and optimized for them. One or more DLAs may also be optimized for specific neural network types and floating point operations and reasoning. The design of one or more DLAs may provide higher per-millimeter performance than a general-purpose GPU, and greatly exceed the performance of a CPU. One or more TPUs may perform multiple functions, including single-instance convolution functions, for example, supporting INT8, INT16, and FP16 data types for features and weights, and post-processor functions.

[0116] One or more DLAs may quickly and efficiently execute neural networks, particularly CNNs, on processed or unprocessed data for any of a variety of functions, including but not limited to: a CNN for object recognition and detection using data from a camera sensor; a CNN for distance estimation using data from a camera sensor; a CNN for emergency vehicle detection and identification and detection using microphone data; a CNN for facial recognition and vehicle owner identification using data from a camera sensor; and / or a CNN for safety and / or security-related events.

[0117] One or more DLAs can perform any function of one or more GPUs 608, for example, by using an inference accelerator, the designer can perform any function for one or more DLAs or one or more GPUs 608. For example, the designer can focus the processing of CNNs and floating point operations on one or more DLAs and leave other functions to one or more GPUs 608 and / or one or more other accelerators 614.

[0118] One or more accelerators 614 (e.g., a hardware acceleration cluster) may include a programmable vision accelerator (PVA), which may also be referred to herein as a computer vision accelerator. One or more PVAs may be designed and configured to accelerate computer vision algorithms for advanced driver assistance systems (ADAS), autonomous driving, and / or augmented reality (AR) and / or virtual reality (VR) applications. One or more PVAs may provide a balance between performance and flexibility. For example, each PVA may include, for example, but not limited to, any number of reduced instruction set computer (RISC) cores, direct memory access (DMA), and / or any number of vector processors.

[0119] The RISC core may interact with an image sensor (e.g., an image sensor of any camera described herein), one or more image signal processors, and the like. Each RISC core may include any number of memories. The RISC core may use any of a variety of protocols, depending on the embodiment. In some examples, the RISC core may execute a real-time operating system (RTOS). The RISC core may be implemented using one or more integrated circuit devices, application specific integrated circuits (ASICs), and / or memory devices. For example, the RISC core may include an instruction cache and / or a tightly coupled RAM.

[0120] The DMA may enable the PVA component to access system memory independently of the one or more CPUs 606. The DMA may support any functionality for optimizing the PVA, including, but not limited to, supporting multi-dimensional addressing and / or circular addressing. In some examples, the DMA may support addressing in up to six or more dimensions, which may include block width, block height, block depth, horizontal block stepping, vertical block stepping, and / or depth stepping.

[0121] A vector processor may be a programmable processor designed to efficiently and flexibly execute programming of computer vision algorithms and provide signal processing capabilities. In some examples, the PVA may include a PVA core and two vector processing subsystem partitions. The PVA core may include a processor subsystem, one or more DMA engines (e.g., two DMA engines), and / or other peripherals. The vector processing subsystem may operate as the main processing engine of the PVA and may include a vector processing unit (VPU), an instruction cache, and / or a vector memory (e.g., VMEM). The VPU core may include a digital signal processor, such as a single instruction, multiple data (SIMD), a very long instruction word (VLIW) digital signal processor. The combination of SIMD and VLIW can improve throughput and speed.

[0122] Each vector processor may include an instruction cache and may be coupled to a dedicated memory. As a result, in some examples, each vector processor may be configured to execute independently of the other vector processors. In other examples, the vector processors included in a particular PVA may be configured to employ data parallelism. For example, in some embodiments, multiple vector processors included in a single PVA may execute the same computer vision algorithm on different regions of an image. In other examples, the vector processors included in a particular PVA may execute different computer vision algorithms simultaneously on the same image, or even execute different algorithms on sequence images or portions of images. Among other things, any number of PVAs may be included in a hardware acceleration cluster, and any number of vector processors may be included in each PVA. In addition, the PVA may include additional error correction code (ECC) memory to enhance overall system security.

[0123] One or more accelerators 614 (e.g., a hardware acceleration cluster) may include a computer vision network on-chip and SRAM to provide high bandwidth, low latency SRAM for one or more accelerators 614. In some examples, the on-chip memory may include at least 4MB of SRAM, including, but not limited to, eight field-configurable memory blocks, accessible by the PVA and DLA. Each pair of memory blocks may include an advanced peripheral bus (APB) interface, configuration circuits, controllers, and multiplexers. Any type of memory may be used. The PVA and DLA may access the memory via a trunk that provides high-speed memory access to the PVA and DLA. The trunk may include an on-chip computer vision network that interconnects the PVA and DLA to the memory (e.g., using APB).

[0124] The on-chip computer vision network may include an interface that determines that both the PVA and DLA provide ready and valid signals before transmitting any control signals / addresses / data. Such an interface may provide independent phases and independent channels for transmitting control signals / addresses / data, as well as burst communication for continuous data transmission. Such an interface may comply with ISO26262 or IEC 61508 standards, although other standards and protocols may also be used.

[0125] In some examples, one or more SoCs 604 may include a real-time ray tracing hardware accelerator, as described in U.S. Patent Application No. 16 / 101,232 filed on August 10, 2018. The real-time ray tracing hardware accelerator may be used to quickly and efficiently determine the position and range of objects (e.g., within a world model), generate real-time visual simulations for radar signal interpretation, sound propagation synthesis and / or analysis, sonar system simulations, general wave propagation simulations, comparisons with LiDAR data for positioning and / or other functions and / or other uses. In some embodiments, one or more tree traversal units (TTUs) may be used to perform one or more ray tracing related operations.

[0126] One or more accelerators 614 (e.g., a cluster of hardware accelerators) have a wide range of uses in autonomous driving. PVA may be a programmable vision accelerator that can be used in key processing stages of ADA and autonomous vehicles. The capabilities of PVA are well suited for algorithmic domains that require predictable processing with low power consumption and low latency. In other words, PVA performs well on semi-intensive or regular intensive computations, even on small data sets, which require predictable runtimes with low latency and low power consumption. Therefore, in the context of autonomous vehicle platforms, PVA is designed to run classic computer vision algorithms because they are very efficient at object detection and integer math operations.

[0127] For example, according to one embodiment of the present technology, PVA is used to perform computer stereo vision. In some examples, a semi-global matching based algorithm can be used, although this is not intended to be limiting. Many applications of Level 3-5 autonomous driving require instant motion estimation / stereo matching (e.g., motion structure, pedestrian recognition, lane detection, etc.). PVA can perform computer stereo vision functions on input from two monocular cameras.

[0128] In some examples, PVA can be used to perform dense optical flow. Processed radar is provided based on processing raw radar data (e.g., using a 4D Fast Fourier Transform). In other examples, PVA is used for time-of-flight depth processing, e.g., by processing raw time-of-flight data to provide processed time-of-flight data.

[0129] DLA can be used to run any type of network to enhance control and driving safety, for example, including a neural network that outputs a confidence measure for each target detection. Such a confidence value can be interpreted as a probability, or provide a relative "weight" of each detection relative to other detections. This confidence value enables the system to further decide which detections should be considered true positive detections rather than false positive detections. For example, the system can set a threshold for confidence and only consider detections that exceed the threshold as true positive detections. In an automatic emergency braking (AEB) system, a false positive detection will cause the vehicle to automatically perform emergency braking, which is obviously undesirable. Therefore, only the most reliable detections should be considered as triggers for AEB. DLA can run a neural network to regress confidence values. The neural network can take at least some subset of parameters as its input, such as bounding box size, obtained ground plane estimation (e.g., from another subsystem), inertial measurement unit (IMU) sensor 666 output related to the vehicle 600 orientation and distance, and three-dimensional position estimation of objects obtained from neural networks and / or other sensors (e.g., lidar sensor 664 or radar sensor 660).

[0130] One or more SoCs 604 may include one or more data stores 616 (e.g., memory). Data store 616 may be on-chip memory of SoC 604 that may store neural networks to be executed on the GPU and / or DLA. In some examples, the capacity of data store 616 may be large enough to store multiple neural network instances for redundancy and safety. Data store 612 may include a L2 or L3 cache 612. As described herein, references to one or more data stores 616 may include references to memory associated with a PVA, DLA, and / or one or more other accelerators 614.

[0131] One or more SoCs 604 may include one or more processors 610 (e.g., embedded processors). The processor 610 may include a boot and power management processor, which may be a dedicated processor and subsystem for handling boot power and management functions and related security implementations. The boot and power management processor may be part of the boot sequence of one or more SoCs 604 and may provide runtime power management services. The boot power and management processor may provide clock and voltage programming, system low power state transition assistance, management of SoC 604 thermal sensors and temperature sensors, and / or management of SoC 604 power states. Each temperature sensor may be implemented as a ring oscillator whose output frequency is proportional to the temperature, and one or more SoCs 604 may use the ring oscillator to detect the temperature of one or more CPUs 606, one or more GPUs 608, and / or one or more accelerators 614. If it is determined that the temperature exceeds a threshold, the boot and power management processor may enter a temperature fault routine and place one or more SoCs 604 in a low power state and / or place the vehicle 600 in a driver safety parking mode (e.g., parking the vehicle 600 safely).

[0132] The one or more processors 610 may also include a set of embedded processors that can serve as an audio processing engine. The audio processing engine may be an audio subsystem that is capable of full hardware support for multi-channel audio through multiple interfaces and a wide and flexible audio I / O interface. In some examples, the audio processing engine is a dedicated processor core of a digital signal processor with dedicated RAM.

[0133] One or more processors 610 may also include an always-on processor engine that may provide the necessary hardware functionality to support low-power sensor management and wake-up use cases. The always-on processor engine may include a processor core, tightly coupled RAM, supporting peripherals (e.g., timers and interrupt controllers), various I / O controller peripherals, and routing logic.

[0134] One or more processors 610 may also include a safety cluster engine that includes a dedicated processor subsystem for handling safety management for automotive applications. The safety cluster engine may include two or more processor cores, tightly coupled RAM, supporting peripherals (e.g., timers, interrupt controllers, etc.), and / or routing logic. In safety mode, two or more cores may operate in lockstep mode and operate as a single core with comparison logic to detect any differences between their operations.

[0135] The one or more processors 610 may also include a real-time camera engine, which may include a dedicated processor subsystem for handling real-time camera management.

[0136] The one or more processors 610 may also include a high dynamic range signal processor, which may include an image signal processor, which is a hardware engine that is part of the camera processing pipeline.

[0137] One or more processors 610 may include a video image synthesizer, which may be a processing block (e.g., implemented on a microprocessor) that implements video post-processing functions required by the video playback application to generate the final image of the player window. The video image synthesizer may perform lens distortion correction on one or more wide-angle cameras 670, one or more surround cameras 674, and / or in-cabin monitoring camera sensors. The in-cabin monitoring camera sensors are preferably monitored by a neural network running on another instance of the advanced SoC that is configured to recognize in-cabin events and respond accordingly. The in-cabin system may perform lip reading to activate cellular service and make calls, dictate emails, change vehicle destinations, activate or change the vehicle's infotainment system and settings, or provide voice-activated web surfing. Certain features are only available to the driver when the vehicle is operating in automatic mode and are otherwise disabled.

[0138] The video image synthesizer may include enhanced temporal noise reduction for both spatial and temporal noise reduction. For example, in the case of motion in the video, the noise reduction appropriately weights the spatial information, thereby reducing the weight of information provided by adjacent frames. In the case where an image or portion of an image does not include motion, the temporal noise reduction performed by the video image synthesizer may use information from a previous image to reduce noise in the current image.

[0139] The video image compositor may also be configured to perform stereoscopic rectification on the input stereoscopic footage frames. The video image compositor may also be used for user interface composition when the operating system desktop is in use and does not require the GPU 608 to continuously render new surfaces. Even when one or more GPUs 608 are powered on and active in performing 3D rendering, the video image compositor may be used to offload one or more GPUs 608 to improve performance and responsiveness.

[0140] One or more SoCs 604 may also include a mobile industry processor interface (MIPI) camera serial interface for receiving video and input from a camera, a high-speed interface, and / or a video input block that may be used for a camera and related pixel input functions. One or more SoCs 604 may also include one or more input / output controllers that may be controlled by software and may be used to receive I / O signals that are not assigned a specific role.

[0141] One or more SoCs 604 may also include a wide range of peripheral interfaces to enable communication with peripherals, audio codecs, power management, and / or other devices. One or more SoCs 604 may be used to process data from cameras (e.g., via Gigabit multimedia serial links and Ethernet connections), sensors (e.g., one or more lidar sensors 664, one or more radar sensors 660, etc., which may be connected via Ethernet), data from bus 602 (e.g., speed of vehicle 600, steering wheel position, etc.), data from one or more GNSS sensors 658 (e.g., connected via Ethernet or CAN bus). One or more SoCs 604 may also include a dedicated high-performance mass storage controller, which may include its own DMA engine and may be used to free one or more CPUs 606 from routine data management tasks.

[0142] One or more SoC 604 can be an end-to-end platform with a flexible architecture that spans automation levels 3-5, thereby providing a comprehensive functional safety architecture that leverages and effectively uses computer vision and ADAS technologies to achieve diversity and redundancy, providing a platform for flexible and reliable driver software stacks and deep learning tools. Compared with traditional systems, one or more SoC 604 can be faster, more reliable, and even more energy-efficient and space-saving. For example, when one or more accelerators 614 are combined with one or more CPUs 606, one or more GPUs 608, and one or more data stores 616, a fast and efficient platform can be provided for level 3-5 autonomous vehicles.

[0143] As a result, the technology provides capabilities and functionality that are not possible with traditional systems. For example, computer vision algorithms can be executed on a CPU, which can be configured using a high-level programming language (such as the C programming language) to perform a wide variety of processing algorithms on a wide variety of visual data. However, CPUs often fail to meet the performance requirements of many computer vision applications, such as those related to execution time and power consumption. In particular, many CPUs are unable to execute complex object detection algorithms in real time, which is a requirement for in-vehicle ADAS applications and a requirement for practical Level 3-5 autonomous vehicles.

[0144] Compared to conventional systems, by providing a CPU complex, a GPU complex, and a hardware acceleration cluster, the techniques described herein allow for multiple neural networks to be executed simultaneously and / or sequentially, and for the results to be combined together to achieve Level 3-5 autonomous driving capabilities. For example, a CNN executed on a DLA or dGPU (e.g., one or more GPUs 620) may include text and word recognition, allowing the supercomputer to read and understand traffic signs, including signs for which the neural network has not been specifically trained. The DLA may also include a neural network capable of recognizing, interpreting, and providing semantic understanding of the symbols, and passing that semantic understanding to a path planning module running on the CPU complex.

[0145] As another example, multiple neural networks may be run simultaneously, such as may be required for Level 3, 4, or 5 driving. For example, a warning sign consisting of "WARNING: FLASHING LIGHTS INDICATE ICE CONDITIONS" and electric lights may be interpreted by multiple neural networks independently or in concert. The sign itself may be recognized as a traffic sign by a first deployed neural network (e.g., a trained neural network), and the text "FLASHING LIGHTS INDICATE ICE CONDITIONS" may be interpreted by a second deployed neural network, which, when detected, notifies the vehicle routing software (preferably executing on a CPU complex) that an icing condition exists. The flashing lights may be recognized by operating a third deployed neural network over multiple frames, notifying the vehicle routing software of the presence of the flashing lights. All three neural networks may be run simultaneously, such as within a DLA and / or on one or more GPUs 608.

[0146] In some examples, a CNN for facial recognition and owner recognition can use data from the camera sensor to identify the presence of an authorized driver and / or owner of the vehicle 600. The always-on sensor processing engine can be used to unlock the vehicle when the owner approaches the driver's door and turns on the lights, and, in a safety mode, disable the vehicle when the owner leaves the vehicle. In this way, one or more SoCs 604 provide anti-theft and / or carjacking protection.

[0147] In another example, a CNN for emergency vehicle detection and identification can use data from microphone 696 to detect and identify emergency vehicle sirens. Unlike conventional systems that use general classifiers to detect sirens and manually extract features, one or more SoC(s) 604 use CNNs to classify environmental and urban sounds, as well as classify visual data. In a preferred embodiment, the CNN running on the DLA is trained to identify the relative closing speeds of emergency vehicles (e.g., by using the Doppler effect). The CNN can also be trained to identify emergency vehicles specific to the area in which the vehicle is operating, as identified by one or more GNSS sensors 658. Thus, for example, when operating in Europe, the CNN will seek to detect European sirens, and when in the United States, the CNN will seek to identify only North American sirens. Once an emergency vehicle is detected, a control program can be used to execute an emergency vehicle safety routine with the help of ultrasonic sensors 662 to slow the vehicle, pull over, stop the vehicle, and / or idle the vehicle until one or more emergency vehicles pass.

[0148] The vehicle may include one or more CPUs 618 (e.g., one or more discrete CPUs or one or more dCPUs) that may be coupled to one or more SoCs 604 via a high-speed interconnect (e.g., PCIE). For example, one or more CPUs 618 may include an X86 processor. CPU 618 may be used to perform any of a variety of functions, including arbitrating potentially inconsistent results between ADAS sensors and SoC 604, and / or monitoring the status and health of one or more controllers 636 and / or infotainment SoC 630.

[0149] The vehicle 600 may include one or more GPUs 620 (e.g., one or more discrete GPUs or one or more dGPUs) that may be coupled to the SoC 604 via a high-speed interconnect (e.g., NVIDIA's NVLINK). The one or more GPUs 620 may provide additional artificial intelligence functionality, such as by executing redundant and / or different neural networks, and may be used to train and / or update the neural network based on input (e.g., sensor data) from sensors of the vehicle 600.

[0150] The vehicle 600 may also include a network interface 624, which may include one or more wireless antennas 626 (e.g., one or more wireless antennas for different communication protocols, such as a cellular antenna, a Bluetooth antenna, etc.). The network interface 624 may be used to enable wireless connections to the cloud (e.g., to one or more servers 678 and / or other network devices), to other vehicles, and / or to computing devices (e.g., a passenger's client device) via the Internet. In order to communicate with other vehicles, a direct link may be established between the two vehicles and / or an indirect link may be established (e.g., via a network and the Internet). A vehicle-to-vehicle communication link may be used to provide a direct link. The vehicle-to-vehicle communication link may provide the vehicle 600 with information about vehicles in the vicinity of the vehicle 600 (e.g., vehicles in front of, to the side of, and / or behind the vehicle 600). This functionality may be part of the cooperative adaptive cruise control functionality of the vehicle 600.

[0151] The network interface 624 may include a SoC that provides modulation and demodulation functions and enables one or more controllers 636 to communicate over a wireless network. The network interface 624 may include a radio frequency front end for up-conversion from baseband to radio frequency and down-conversion from radio frequency to baseband. Frequency conversion can be performed by well-known processes, and / or can be performed using a superheterodyne process. In some examples, the radio frequency front end function can be provided by a separate chip. The network interface may include a wireless function for communicating via LTE, WCDMA, UMTS, GSM, CDMA2000, Bluetooth, Bluetooth LE, Wi-Fi, Z-Wave, ZigBee, LoRaWAN, and / or other wireless protocols.

[0152] The vehicle 600 may further include one or more data stores 628, which may include off-chip (e.g., off-SoC). The data store 628 may include one or more storage elements, including RAM, SRAM, DRAM, VRAM, flash memory, hard disk, and / or other components and / or devices that can store at least one bit of data.

[0153] The vehicle 600 may also include one or more GNSS sensors 658. One or more GNSS sensors 658 (e.g., GPS, assisted GPS sensors, differential GPS (DGPS) sensors, etc.) are used to assist in mapping, perception, occupancy grid generation, and / or path planning functions. Any number of GNSS sensors 658 may be used, including, for example, but not limited to, GPS using a USB connector with an Ethernet to serial (RS-232) bridge.

[0154] The vehicle 600 may also include one or more radar sensors 660. The vehicle 600 may use one or more radar sensors 660 for remote vehicle detection even in darkness and / or inclement weather conditions. The radar functional safety level may be ASIL B. The one or more radar sensors 660 may be controlled and access target tracking data using CAN and / or bus 602 (e.g., to transmit data generated by the one or more radar sensors 660), and in some examples, access raw data by accessing Ethernet. A variety of radar sensor types may be used. For example, but not limited to, one or more radar sensors 660 may be suitable for front, rear, and side radar use. In some examples, a pulse Doppler radar sensor is used.

[0155] One or more radar sensors 660 may include different configurations, such as long-range with a narrow field of view, short-range with a wide field of view, short-range side coverage, etc. In some examples, long-range radar can be used for adaptive cruise control functions. Long-range radar systems can provide a wide field of view achieved through two or more independent scans, for example, within a range of 250 meters. One or more radar sensors 660 can help distinguish between static and moving objects and can be used by ADAS systems for emergency brake assistance and forward collision warnings. Long-range radar sensors may include monostatic multimode radars with multiple (e.g., six or more) fixed radar antennas and high-speed CAN and FlexRay interfaces. In an example with six antennas, the central four antennas can create a focused beam pattern designed to record the 600 environment around the vehicle at higher speeds with minimal traffic interference in adjacent lanes. The additional two antennas can expand the field of view, making it possible to quickly detect vehicles entering or leaving the vehicle's 600 lane.

[0156] For example, a medium-range radar system may include a range of up to 660 meters (front) or 80 meters (rear) and a field of view of up to 42 degrees (front) or 650 degrees (rear). A short-range radar system may include, but is not limited to, radar sensors designed to be mounted on either end of the rear bumper. When mounted on either end of the rear bumper, such radar sensor systems may produce two beams that continuously monitor blind spots behind and beside the vehicle.

[0157] Short-range radar systems may be used in ADAS systems for blind spot detection and / or lane change assistance.

[0158] The vehicle 600 may also include one or more ultrasonic sensors 662. One or more ultrasonic sensors 662 may be located at the front, rear, and / or sides of the vehicle 600 and may be used for parking assistance and / or creating and updating an occupancy grid. A variety of ultrasonic sensors 662 may be used, and different ultrasonic sensors 662 may be used for different detection ranges (e.g., 2.5 m, 4 m). One or more ultrasonic sensors 662 may operate at a functional safety level of ASIL B.

[0159] The vehicle 600 may include one or more lidar sensors 664. The one or more lidar sensors 664 may be used for object and pedestrian detection, emergency braking, collision avoidance, and / or other functions. The functional safety level of the one or more lidar sensors 664 may be ASIL B. In some examples, the vehicle 600 may include multiple lidar sensors 664 (e.g., two, four, six, etc.) that may use Ethernet (e.g., provide data to a Gigabit Ethernet switch).

[0160] In some examples, one or more lidar sensors 664 may be able to provide a list of objects and their distances in a 360-degree field of view. One or more commercial lidar sensors 664 have an advertised range of approximately 600m, an accuracy of 2cm-3cm, and support, for example, a 600Mbps Ethernet connection. In some examples, one or more non-protruding lidar sensors 664 may be used. In this example of the present invention, one or more lidar sensors 664 may be implemented as a small device that can be embedded in the front, rear, side, and / or corner of the vehicle 600. In this example of the present invention, one or more lidar sensors 664 may provide a horizontal field of view of up to 120 degrees and a vertical field of view of 35 degrees, with a range of 200m even for low reflectivity objects. The front-mounted one or more lidar sensors 664 may be configured with a horizontal field of view between 45 and 135 degrees.

[0161] In some examples, lidar technology, such as 3D flash lidar, can also be used. 3D flash lidar uses laser flash as a transmission source to illuminate about 200 meters around the vehicle. The flash lidar device includes a receiver that records the laser pulse transmission time and the reflected light on each pixel, and each pixel corresponds to the range from the vehicle to the object. Flash lidar can generate a highly accurate, distortion-free image of the environment with each laser flash. In some examples, four flash lidar sensors can be deployed, one on each side of the vehicle 600. Available 3D flash lidar systems include solid-state 3D staring array lidar cameras, with no moving parts except the fan (e.g., non-scanning lidar devices). The flash lidar device can use 5 nanosecond Class I (eye-safe) laser pulses per frame and can capture 3D distance point clouds and reflected lasers in the form of co-registered intensity data. By using flash lidar, and because flash lidar is a solid-state device with no moving parts, one or more lidar sensors 664 can be less susceptible to motion blur, vibration and / or shock.

[0162] The vehicle may also include one or more IMU sensors 666. In some examples, one or more IMU sensors 666 may be located at the center of the rear axle of the vehicle 600. One or more IMU sensors 666 may include, for example, but not limited to, one or more accelerometers, one or more magnetometers, one or more gyroscopes, one or more magnetic compasses, and / or other sensor types. In some examples, such as in a six-axis application, one or more IMU sensors 666 may include an accelerometer and a gyroscope, and in a nine-axis application, one or more IMU sensors 666 may include an accelerometer, a gyroscope, and a magnetometer.

[0163] In some embodiments, one or more IMU sensors 666 may be implemented as a miniature, high-performance GPS-aided inertial navigation system (GPS / INS) that combines micro-electromechanical systems (MEMS) inertial sensors, high-sensitivity GPS receivers, and advanced Kalman filter algorithms to provide estimates of position, velocity, and attitude. Thus, in some examples, one or more IMU sensors 666 may enable the vehicle 600 to estimate heading without input from a magnetic sensor by directly observing and correlating velocity changes from GPS to one or more IMU sensors 666. In some examples, one or more IMU sensors 666 and one or more GNSS sensors 658 may be combined in a single integrated unit.

[0164] The vehicle may include one or more microphones 696 positioned within and / or around the vehicle 600. The one or more microphones 696 may be used for emergency vehicle detection and identification, among other things.

[0165] The vehicle may also include any number of camera types, including one or more stereo cameras 668, one or more wide-angle cameras 670, one or more infrared cameras 672, one or more surround cameras 674, one or more long-range and / or mid-range cameras 698, and / or other camera types. The cameras may be used to capture image data of the entire periphery of the vehicle 600. The type of camera used depends on the embodiment and requirements of the vehicle 600, and any combination of camera types may be used to provide the necessary coverage around the vehicle 600. In addition, depending on the embodiment, the number of cameras may be different. For example, the vehicle may include six cameras, seven cameras, ten cameras, twelve cameras, and / or other numbers of cameras. As an example, the cameras may support, but are not limited to, Gigabit Multimedia Serial Link (GMSL) and / or Gigabit Ethernet. This document will refer to Fig. 6A and Figure 6B Describe each camera in more detail.

[0166] The vehicle 600 may also include one or more vibration sensors 642. One or more vibration sensors 642 may measure vibrations of vehicle components, such as axles. For example, changes in vibrations may indicate changes in the road surface. In another example, when two or more vibration sensors 642 are used, the difference between the vibrations may be used to determine friction or slippage of the road surface (e.g., when the vibration difference is between a powered drive shaft and a free-spinning shaft).

[0167] The vehicle 600 may include an ADAS system 638. In some examples, the ADAS system 638 may include a SoC. The ADAS system 638 may include automatic / adaptive / auto cruise control (ACC), cooperative adaptive cruise control (CACC), forward collision warning (FCW), automatic emergency braking (AEB), lane departure warning (LDW), lane keeping assist (LKA), blind spot warning (BSW), rear cross traffic warning (RCTW), collision warning system (CWS), lane centering (LC), and / or other features and functions.

[0168] The ACC system may use one or more radar sensors 660, one or more lidar sensors 664, and / or one or more cameras. The ACC system may include longitudinal ACC and / or lateral ACC. Longitudinal ACC monitors and controls the distance to the vehicle directly in front of the vehicle 600 and automatically adjusts the vehicle speed to maintain a safe distance from the vehicle in front. Lateral ACC performs distance keeping and suggests that the vehicle 600 change lanes when necessary. Lateral ACC is related to other ADAS applications, such as LCA and CWS.

[0169] CACC uses information from other vehicles, which can be received indirectly from other vehicles via a network interface 624 and / or one or more wireless antennas 626, via a wireless link, or via a network connection (e.g., via the Internet). A direct link can be provided by a vehicle-to-vehicle (V2V) communication link, while an indirect link can be an infrastructure-to-vehicle (I2V) communication link. In general, the V2V communication concept provides information about the vehicle in front (e.g., the vehicle directly in front of the vehicle 600 and in the same lane), while the I2V communication concept provides information about the traffic ahead. The CACC system may include one or both of the I2V and V2V information sources. Taking into account the vehicle information in front of the vehicle 600, CACC may be more reliable and has the potential to improve the smoothness of traffic flow and reduce congestion on the road.

[0170] The FCW system is designed to alert the driver to hazards so that the driver can take corrective action. The FCW system uses a forward-facing camera and / or one or more radar sensors 660 coupled to a dedicated processor, DSP, FPGA and / or ASIC, which is electrically coupled to driver feedback, such as a display, speaker and / or vibration component. The FCW system can provide warnings such as sound, visual warnings, vibrations and / or rapid brake pulses.

[0171] The AEB system detects an impending forward collision with another vehicle or other object, and if the driver does not take corrective action within specified time or distance parameters, the AEB system may automatically apply the brakes. The AEB system may use one or more front-facing cameras and / or one or more radar sensors 660 coupled to a dedicated processor, DSP, FPGA and / or ASIC. When the AEB system detects a hazard, it typically first alerts the driver to take corrective action to avoid the collision. If the driver does not take corrective action, the AEB system may automatically apply the brakes to prevent or at least mitigate the effects of the anticipated collision. The AEB system may include technologies such as dynamic brake support and / or collision approach braking.

[0172] The LDW system provides visual, audible, and / or tactile warnings, such as steering wheel or seat vibrations, to alert the driver when the vehicle 600 crosses a lane marking. The LDW system does not activate when the driver indicates an intention to leave the lane by activating a turn signal. The LDW system may use a front-facing camera coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback, such as a display, speaker, and / or vibration assembly.

[0173] The LKA system is a variation of the LDW system. If the vehicle 600 begins to leave the lane, the LKA system provides steering input or braking to correct the vehicle 600.

[0174] The BSW system detects and warns the driver of vehicles within the automobile's blind spot. The BSW system may provide visual, audible, and / or tactile alerts to indicate that a merge or lane change is unsafe. The system may provide additional warnings when the driver uses a turn signal. The BSW system may use a rear-facing camera and / or radar sensor 660 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback, such as a display, speaker, and / or vibration component.

[0175] The RCTW system may provide visual, audible, and / or tactile notifications when an object outside the range of the rear camera is detected while the vehicle 600 is in reverse. Some RCTW systems include AEB to ensure that the vehicle brakes are applied to avoid a collision. The RCTW system may use one or more rear-facing radar sensors 660 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback, such as a display, speaker, and / or vibration assembly.

[0176] Conventional ADAS systems may be prone to false positive results, which may be annoying and distracting to the driver, but generally do not have catastrophic consequences because the ADAS system alerts the driver and allows the driver to decide whether a safe condition actually exists and take appropriate action. However, in the autonomous vehicle 600, in the event of conflicting results, the vehicle 600 itself must decide whether to listen to the results from the main computer or the auxiliary computer (e.g., the first controller 636 or the second controller 636). For example, in some embodiments, the ADAS system 638 can be a backup and / or auxiliary computer for providing perception information to the backup computer module. The backup computer rationality monitor can run redundant different software on hardware components to detect failures in perception and dynamic driving tasks. The output from the ADAS system 638 can be provided to the monitoring MCU. If the outputs of the main computer and the auxiliary computer conflict, the monitoring MCU must determine how to reconcile the conflict to ensure safe operation.

[0177] In some examples, the primary computer may be configured to provide a confidence score to the monitoring MCU indicating the primary computer's confidence in the selected result. If the confidence score exceeds a threshold, the monitoring MCU may follow the direction of the primary computer regardless of whether the secondary computer provides conflicting or inconsistent results. If the confidence score does not meet the threshold and the primary and secondary computers indicate different results (e.g., conflict), the monitoring MCU may arbitrate between the computers to determine the appropriate result.

[0178] The monitoring MCU may be configured to run one or more neural networks that have been trained and configured to determine conditions under which the auxiliary computer provides a false alarm based on the outputs of the primary computer and the auxiliary computer. Thus, the one or more neural networks in the monitoring MCU may learn when the output of the auxiliary computer is credible and when it is not credible. For example, when the auxiliary computer is a radar-based FCW system, the one or more neural networks in the monitoring MCU may learn when the FCW system identifies a metal object that is not actually dangerous, such as a drain grate or manhole cover that triggers an alarm. Similarly, when the auxiliary computer is a camera-based LDW system, the neural network in the monitoring MCU may learn to override the LDW when a bicycle or pedestrian is present and a lane departure is actually the safest maneuver. In an embodiment including one or more neural networks running on the monitoring MCU, the monitoring MCU may include at least one of a DLA or a GPU suitable for running one or more neural networks with associated memory. In a preferred embodiment, the monitoring MCU may include and / or be included as a component of the SoC 604.

[0179] In other examples, the ADAS system 638 may include an auxiliary computer that uses traditional computer vision rules to perform ADAS functions. Thus, the auxiliary computer can use classic computer vision rules (if-then), and the presence of one or more neural networks in the monitoring MCU can improve reliability, safety, and performance. For example, diverse implementations and intentional non-identification make the entire system more fault-tolerant, especially to failures caused by software (or software-hardware interface) functions. For example, if there is a software defect or error in the software running on the main computer, and different software code running on the auxiliary computer provides the same overall result, the monitoring MCU can have greater confidence in the correctness of the overall result and that the software or hardware defect on the main computer did not cause a significant error.

[0180] In some examples, the output of the ADAS system 638 may be fed into the perception block of the host computer and / or the dynamic drive task block of the host computer. For example, if the ADAS system 638 indicates a forward collision warning due to an object directly ahead, the perception block may use that information in identifying the object. In other examples, as described herein, the secondary computer may have its own trained neural network, thereby reducing the risk of false positives.

[0181] The vehicle 600 may also include an infotainment SoC 630 (e.g., an in-vehicle infotainment system (IVI)). Although shown and described as an SoC, the infotainment system may not be a SoC and may include two or more discrete components. The infotainment SoC 630 may include a combination of hardware and software that can be used to provide audio (e.g., music, personal digital assistant, navigation instructions, news, radio, etc.), video (e.g., TV, movies, streaming, etc.), phone (e.g., hands-free calling), network connectivity (e.g., LTE, Wi-Fi, etc.), and / or provide information services to the vehicle 600 (e.g., navigation system, rear parking assist, radio data system, vehicle-related information such as fuel level, total distance traveled, brake fuel level, engine oil level, door open / closed, air filter information, etc.). For example, the infotainment SoC 630 can be a radio, a disk player, a navigation system, a video player, USB and Bluetooth connectivity, an onboard computer, in-car entertainment, Wi-Fi, steering wheel audio controls, hands-free voice control, a head-up display (HUD), an HMI display 634, a telematics device, a control panel (e.g., for controlling and / or interacting with various components, features, and / or systems), and / or other components. The infotainment SoC 630 can also be used to provide information (e.g., visual and / or auditory) to a vehicle user, such as information from an ADAS system 638, autonomous driving information, such as planned vehicle maneuvers, trajectories, surrounding environment information (e.g., intersection information, vehicle information, road information, etc.), and / or other information.

[0182] The infotainment SoC 630 may include GPU functionality. The infotainment SoC 630 may communicate with other devices, systems, and / or components of the vehicle 600 via a bus 602 (e.g., a CAN bus, Ethernet, etc.). In some examples, the infotainment SoC 630 may be coupled to a monitoring MCU so that the GPU of the infotainment system may perform some self-driving functions in the event of a failure of one or more main controllers 636 (e.g., a main computer and / or backup computer of the vehicle 600). In such an example, the infotainment SoC 630 may place the vehicle 600 in a driver-to-safety parking mode, as described herein.

[0183] The vehicle 600 may also include an instrument cluster 632 (e.g., a digital instrument panel, an electronic instrument cluster, a digital instrument cluster, etc.). The instrument cluster 632 may include a controller and / or a supercomputer (e.g., a discrete controller or a supercomputer). The instrument cluster 632 may include a set of instruments, such as a speedometer, a fuel level, an oil pressure, a tachometer, an odometer, a turn indicator, a shift position indicator, one or more seat belt warning lights, one or more parking brake warning lights, one or more engine fault lights, airbag (SRS) system information, lighting control, safety system control, navigation information, etc. In some examples, information may be displayed and / or shared between the infotainment SoC 630 and the instrument cluster 632. In other words, the instrument cluster 632 may be included as part of the infotainment SoC 630, and vice versa.

[0184] Fig.6D According to some embodiments of the present disclosure, one or more cloud-based servers and Fig. 6A 600. System diagram of communication between exemplary autonomous vehicles 600. System 676 may include one or more servers 678, one or more networks 690, and vehicles, including vehicle 600. One or more servers 678 may include multiple GPUs 684 (a) -684 (H) (collectively referred to as GPUs 684), PCIe switches 682 (a) -682 (H) (collectively referred to as PCIe switches 682), and / or CPUs 680 (A) -680 (B) (collectively referred to herein as CPUs 680). GPUs 684, CPUs 680, and PCIe switches may be interconnected via high-speed interconnects, such as, but not limited to, NVLink interfaces 688 and / or PCIE connections 686 developed by NVIDIA. In some examples, GPUs 684 are connected via NVLink and / or NV switch SoCs, and GPUs 684 and PCIe switches 682 are connected via PCIe interconnects. Although eight GPUs 684, two CPUs 680, and two PCIe switches are illustrated, this is not intended to be limiting. Depending on the embodiment, each of the one or more servers 678 may include any number of GPUs 684, CPUs 680, and / or PCIe switches. For example, one or more servers 678 may each include eight, sixteen, thirty-two, and / or more gpus 684.

[0185] One or more servers 678 may receive image data representing an image from a vehicle via one or more networks 690 that shows unexpected or changing road conditions, such as recently initiated road work. One or more servers 678 may send neural networks 692, updated neural networks 692, and / or map information 694 to the vehicle via one or more networks 690, including information about traffic and road conditions. Updates to map information 694 may include updates to HD map 622, such as information about construction sites, potholes, detours, flooding, and / or other obstacles. In some examples, neural network 692, updated neural network 692, and / or map information 694 may be derived from new training and / or experience represented in data received from any number of vehicles in the environment, and / or based on training performed at a data center (e.g., using one or more servers 678 and / or other servers).

[0186] One or more servers 678 can be used to train a machine learning model (e.g., a neural network) based on training data. The training data can be generated by the vehicle, and / or can be generated in simulation (e.g., using a game engine). In some examples, the training data is labeled (e.g., neural networks benefit from supervised learning) and / or undergoes other preprocessing, while in other examples, the training data is not labeled and / or preprocessed (e.g., neural networks do not require supervised learning). Training can be performed according to any one or more classes of machine learning techniques, including but not limited to: supervised training, semi-supervised training, unsupervised training, self-learning, reinforcement learning, joint learning, transfer learning, feature learning (including principal component and cluster analysis), multilinear subspace learning, manifold learning, representation learning (including alternate dictionary learning), rule-based machine learning, anomaly detection, and any variant or combination. Once the machine learning model is trained, the machine learning model can be used by the vehicle (e.g., transmitted to the vehicle 690 via one or more networks, and / or the machine learning model can be used by one or more servers 678 to remotely monitor the vehicle).

[0187] In some examples, one or more servers 678 may receive data from the vehicle and apply the data to the latest real-time neural network for real-time intelligent reasoning. One or more servers 678 may include a deep learning supercomputer and / or a dedicated AI computer powered by a GPU 684, such as the DGX and DGX Station machines developed by NVIDIA. However, in some examples, one or more servers 678 may include a deep learning infrastructure in a data center that uses only CPU power.

[0188] The deep learning infrastructure of one or more servers 678 can perform rapid real-time inference and can use this capability to assess and verify the health of the processor, software, and / or associated hardware in the vehicle 600. For example, the deep learning infrastructure can receive periodic updates from the vehicle 600, such as a sequence of images and / or objects that the vehicle 600 has located in the sequence of images (e.g., through computer vision and / or other machine learning object classification techniques). The deep learning infrastructure can run its own neural network to identify objects and compare them to the objects identified by the vehicle 600, and if the results do not match and the infrastructure concludes that the AI ​​in the vehicle 600 has failed, the one or more servers 678 can send a signal to the vehicle 600, instructing the fail-safe computer of the vehicle 600 to assume control, notify passengers, and complete a safe parking maneuver.

[0189] For inference, one or more servers 678 may include one or more GPUs 684 and one or more programmable inference accelerators (e.g., NVIDIA's TensorRT). The combination of GPU-powered servers and inference acceleration may enable real-time responses. In other examples, such as where performance is less critical, servers powered by CPUs, FPGAs, and other processors may be used for inference.

[0190] Example computing device

[0191] Figure 7 700 is a block diagram of an example computing device 700 suitable for implementing some embodiments of the present disclosure. The computing device 700 may include an interconnect system 702 that directly or indirectly couples the following devices: a memory 704, one or more central processing units (CPUs) 706, one or more graphics processing units (GPUs) 708, a communication interface 710, an input / output (I / O) port 712, an input / output component 714, a power supply 716, one or more presentation components 718 (e.g., a display), and one or more logic units 720. In at least one embodiment, the one or more computing devices 700 may include one or more virtual machines (VMs), and / or any of their components may include virtual components (e.g., virtual hardware components). For non-limiting examples, the one or more GPUs 708 may include one or more vGPUs, the one or more CPUs 706 may include one or more vCPUs, and / or the one or more logic units 720 may include one or more virtual logic units. Thus, one or more computing devices 700 may include discrete components (eg, a complete GPU dedicated to computing device 700 ), virtual components (eg, a portion of a GPU dedicated to computing device 700 ), or a combination thereof.

[0192] although Figure 7The various modules in are shown as being connected with lines through the interconnection system 702, but this is not intended to be limiting and is only for clarity. For example, in some embodiments, a presentation component 718 such as a display device can be considered an I / O component 714 (e.g., if the display is a touch screen). As another example, the CPU 706 and / or the GPU 708 can include a memory (e.g., the memory 704 can also represent a storage device in addition to the memory of the GPU 708, the CPU 706, and / or other components). In other words, Figure 7 The computing devices in the description are illustrative only. No distinction is made between "workstations," "servers," "laptops," "desktops," "tablets," "client devices," "mobile devices," "handheld devices," "game consoles," "electronic control units (ECUs)," "virtual reality systems," and / or other device or system types, as in Figure 7 as contemplated within the scope of computing devices.

[0193] The interconnection system 702 may represent one or more links or buses, such as an address bus, a data bus, a control bus, or a combination thereof. The interconnection system 702 may include one or more bus or link types, such as an industry standard architecture (ISA) bus, an extended industry standard architecture (EISA) bus, a video electronics standard association (VESA) bus, a peripheral component interconnect (PCI) bus, a peripheral component interconnect pass-through (PCIE) bus, and / or other types of buses or links. In some embodiments, there is a direct connection between components. For example, the CPU 706 may be directly connected to the memory 704. In addition, the CPU 706 may be directly connected to the GPU 708. In the case where there is a direct connection or a point-to-point connection between components, the interconnection system 702 may include a PCIe link for performing the connection. In these examples, the PCI bus does not need to be included in the computing device 700.

[0194] Memory 704 may include any of a variety of computer-readable media. Computer-readable media may be any available media that can be accessed by computing device 700. Computer-readable media may include volatile and non-volatile media and removable and non-removable media. By way of example and not limitation, computer-readable media may include computer storage media and communication media.

[0195] Computer storage media may include volatile and nonvolatile media and / or removable and non-removable media implemented in any method or technology for storing information, such as computer-readable instructions, data structures, program modules, and / or other data types. For example, memory 704 may store computer-readable instructions (e.g., instructions representing one or more programs and / or one or more program elements), such as an operating system. Computer storage media may include, but are not limited to, RAM, ROM, EEPROM, flash memory or other storage technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by computing device 700. As used herein, computer storage media itself does not include signals.

[0196] Computer storage media may carry computer readable instructions, data structures, program modules, and / or other data types contained in a modulated data signal (e.g., a carrier wave or other transport mechanism), and include any information delivery media. The term "modulated data signal" may refer to a signal that has one or more of its characteristics set or changed in a manner that encodes the information in the signal. By way of example and not limitation, computer storage media may include wired media, such as a wired network or direct wired connection, and wireless media, such as acoustic, RF, infrared, and other wireless media. Any combination of the above should also be included within the scope of computer readable media.

[0197] One or more CPUs 706 may be configured to execute at least some computer-readable instructions to control one or more components of the computing device 700 to perform one or more methods and / or processes described herein. One or more CPUs 706 may each include one or more cores (e.g., one, two, four, eight, twenty-eight, seventy-two, etc.) capable of processing multiple software threads simultaneously. One or more CPUs 706 may include any type of processor, and may include different types of processors (e.g., processors with fewer cores for mobile devices and processors with more cores for servers) according to the type of computing device 700 implemented. For example, depending on the type of computing device 700, the processor may be an Advanced RISC Machine (ARM) processor implemented using Reduced Instruction Set Computing (RISC) or an x86 processor implemented using Complex Instruction Set Computing (CISC). In addition to one or more microprocessors or supplementary coprocessors (e.g., math coprocessors), the computing device 700 may also include one or more cpu 706.

[0198] In addition to one or more CPUs 706, or selected from one or more CPUs 706, one or more GPUs 708 can be configured to execute at least some computer-readable instructions to control one or more components of the computing device 700 to perform one or more methods and / or processes described herein. One or more GPUs 708 can be integrated GPUs (e.g., with one or more CPUs 706 and / or one or more GPUs 708 can be discrete GPUs). In an embodiment, one or more GPUs 708 can be coprocessors of one or more CPUs 706. The computing device 700 can use one or more GPUs 708 to render graphics (e.g., 3D graphics) or perform general-purpose computing. For example, one or more GPUs 708 can be used for general-purpose computing on a GPU (GPGPU). One or more GPUs 708 can include hundreds or thousands of cores that can process hundreds or thousands of software threads simultaneously. One or more GPUs 708 may generate pixel data for outputting an image in response to a rendering command (e.g., a rendering command received from one or more CPUs 706 via a host interface). One or more GPUs 708 may include graphics memory, such as display memory, for storing pixel data or any other suitable data, such as GPGPU data. The display memory may be included as part of the memory 704. One or more GPUs 708 may include two or more GPUs operating in parallel (e.g., via a link). The link may connect the GPUs directly (e.g., using NVLINK) or connect the GPUs through a switch (e.g., using NVSwitch). When combined together, each GPU 708 may generate pixel data or GPGPU data for different parts of the output or different outputs (e.g., a first GPU for a first image and a second GPU for a second image). Each GPU may include its own memory or may share memory with other GPUs.

[0199] In addition to or selected from one or more CPUs 706 and / or one or more GPUs 708, one or more logic units 720 may be configured to execute at least some computer-readable instructions to control one or more components of the computing device 700 to perform one or more methods and / or processes described herein. In an embodiment, one or more CPUs 706, one or more GPUs 708, and / or one or more logic units 720 may discretely or jointly perform any combination of methods, processes, and / or portions thereof. One or more of the logic units 720 may be a part of and / or integrated into one or more of the CPUs 706 and / or GPUs 708 and / or one or more of the logic units 720 may be a discrete component or otherwise located outside of one or more CPUs 706 and / or GPUs 708, and one or more logic units 720 may be a coprocessor of one or more CPUs 706 and / or GPUs 708.

[0200] Examples of one or more logic units 720 include one or more processing cores and / or components thereof, such as a data processing unit (DPU), a tensor core (TC), a tensor processing unit (TPU), a pixel vision core (PVC), a vision processing unit (VPU), a graphics processing cluster (GPC), a texture processing cluster (TPC), a streaming multiprocessor (SM), a tree traversal unit (TTU), an artificial intelligence accelerator (AIA), a deep learning accelerator (DLA), an arithmetic logic unit (ALU), an application specific integrated circuit (ASIC), a floating point unit (FPU), an input / output (I / O) element, a peripheral component interconnect (PCI) or a peripheral component interconnect express (PCIe) element, and / or the like.

[0201] The communication interface 710 may include one or more receivers, transmitters, and / or transceivers that enable the computing device 700 to communicate with other computing devices via an electronic communication network including wired and / or wireless communications. The communication interface 710 may include components and functions to support communication via any of a number of different networks, such as wireless networks (e.g., Wi-Fi, Z-Wave, Bluetooth, Bluetooth LE, ZigBee, etc.), wired networks (e.g., communicating via Ethernet or InfiniBand), low-power wide area networks (e.g., LoRaWAN, SigFox, etc.), and / or the Internet. In one or more embodiments, the one or more logic units 720 and / or the communication interface 710 may include one or more data processing units (DPUs) for transmitting data received via a network and / or via the interconnect system 702 directly to one or more GPUs 708 (e.g., their memory).

[0202] The I / O port 712 may enable the computing device 700 to be logically coupled to other devices, including an I / O component 714, one or more presentation components 718, and / or other components, some of which may be built-in (e.g., integrated into) the computing device 700. Illustrative I / O components 714 include microphones, mice, keyboards, joysticks, game pads, game controllers, satellite dishes, scanners, printers, wireless devices, and the like. The I / O component 714 may provide a natural user interface (NUI) that processes air gestures, voice, or other physiological inputs generated by a user. In some cases, the input may be transmitted to an appropriate network element for further processing. The NUI may implement any combination of voice recognition, stylus recognition, facial recognition, biometrics, gesture recognition on and near the screen, air gestures, head and eye tracking, and touch recognition associated with the display of the computing device 700 (described in more detail below). The computing device 700 may include a depth camera, such as a stereo camera system, an infrared camera system, an RGB camera system, touch screen technology, and combinations of these, for gesture detection and recognition. Additionally, computing device 700 may include an accelerometer or gyroscope capable of detecting motion (e.g., as part of an inertial measurement unit (IMU)). In some examples, the output of the accelerometer or gyroscope may be used by computing device 700 to render immersive augmented reality or virtual reality.

[0203] The power supply 716 may include a hardwired power supply, a battery power supply, or a combination thereof. The power supply 716 may provide power to the computing device 700 to enable the components of the computing device 700 to operate.

[0204] The one or more presentation components 718 may include a display (e.g., a display, a touch screen, a television screen, a head-up display (HUD), other display types, or combinations thereof), speakers, and / or other presentation components. The one or more presentation components 718 may receive data from other components (e.g., one or more GPUs 708, one or more CPUs 706, a DPU, etc.) and output data (e.g., as images, video, sound, etc.).

[0205] Sample Data Center

[0206] Figure 8 An example data center 800 is shown that can be used in at least one embodiment of the present disclosure. The data center 800 can include a data center infrastructure layer 810, a framework layer 820, a software layer 830, and / or an application layer 840.

[0207] like Figure 8 As shown, the data center infrastructure layer 810 may include a resource coordinator 812, group computing resources 814, and node computing resources ("node CRs") 816 (1)-816 (N), where "N" represents any integer. In at least one embodiment, the node CRs 816 (1)-816 (N) may include, but are not limited to, any number of central processing units (CPUs) or other processors (including DPUs, accelerators, field programmable gate arrays (FPGAs), graphics processors or graphics processing units (GPUs), etc.), storage devices (e.g., dynamic read-only memories), in some embodiments, storage devices (e.g., solid-state or disk drives), network input / output (NW I / O) devices, network switches, virtual machines (VMs), power modules and / or cooling modules, etc., and one or more of the node CRs 816 (1)-816 (N) may correspond to a server having one or more of the above computing resources. Furthermore, in some embodiments, node CRs 816(1)-8161(N) may include one or more virtual components, such as vGPUs, vCPUs, and / or the like, and / or one or more of node CRs 816(1)-816(N) may correspond to virtual machines (VMs).

[0208] In at least one embodiment, the grouped computing resources 814 may include separate groups of node CRs 816 located in one or more racks (not shown), or multiple racks located in data centers at different geographical locations (also not shown). The separate groups of node CRs 816 in the grouped computing resources 814 may include grouped computing, network, memory or storage resources, which may be configured or allocated to support one or more workloads. In at least one embodiment, multiple node CRs 816 including CPUs, GPUs, DPUs and / or other processors may be grouped in one or more racks to provide computing resources to support one or more workloads. One or more racks may also include any number of power modules, cooling modules and / or network switches in any combination.

[0209] Resource coordinator 812 may configure or otherwise control one or more node CRs 816(1)-816(N) and / or grouped computing resources 814. In at least one embodiment, resource coordinator 812 may comprise a software design infrastructure (SDI) management entity for data center 800. Resource coordinator 812 may comprise hardware, software, or some combination thereof.

[0210] In at least one embodiment, Figure 8 As shown, the framework layer 820 may include a job scheduler 833, a configuration manager 834, a resource manager 836, and / or a distributed file system 838. The framework layer 820 may include a framework that supports software 832 of the software layer 830 and / or one or more applications 842 of the application layer 840. The software 832 or one or more applications 842 may include web-based service software or applications, such as services provided by Amazon Web Services, Google Cloud, and Microsoft Azure. The framework layer 820 may be, but is not limited to, a free open source software web application framework, such as Apache SparkTM (hereinafter referred to as "Spark"), which can utilize the distributed file system 838 for large-scale data processing (e.g., "big data"). In at least one embodiment, the job scheduler 833 may include a Spark driver to facilitate the scheduling of workloads supported by various layers of the data center 800. The configuration manager 834 may configure different layers, such as the software layer 830 and the framework layer 820, including Spark and the distributed file system 838, to support large-scale data processing. The resource manager 836 may be capable of managing cluster or group computing resources mapped to or allocated to support the distributed file system 838 and the job scheduler 833. In at least one embodiment, the cluster or group computing resources may include group computing resources 814 at the data center infrastructure layer 810. The resource manager 836 may coordinate with the resource coordinator 812 to manage these mapped or allocated computing resources.

[0211] In at least one embodiment, software 832 included in software layer 830 may include software used by node CRs 816(1)-816(N), group computing resources 814, and / or at least a portion of a distributed file system 838 of framework layer 820. The one or more software may include, but are not limited to, Internet web page search software, email virus scanning software, database software, and streaming video content software.

[0212] In at least one embodiment, the applications 842 included in the application layer 840 may include one or more types of applications used by the node CRs 816(1)-816(N), the grouped computing resources 814, and / or at least a portion of the distributed file system 838 of the framework layer 820, but are not limited to any number of genomics applications, perceptual computing, and machine learning applications, including training or inference software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), and / or other machine learning applications used in conjunction with one or more embodiments.

[0213] In at least one embodiment, any of the configuration manager 834, resource manager 836, and resource coordinator 812 can implement any number and type of self-modification actions based on any number and type of data acquired in any technically feasible manner. The self-modification actions can save the data center operator of the data center 800 from making potentially erroneous configuration decisions and potentially avoid underutilized and / or underperforming portions of the data center.

[0214] According to one or more embodiments described herein, data center 800 may include tools, services, software, or other resources for training one or more machine learning models or predicting or inferring information using one or more machine learning models. For example, one or more machine learning models may be trained by calculating weight parameters according to a neural network architecture using the software and / or computing resources described above with respect to data center 800. In at least one embodiment, a trained or deployed machine learning model corresponding to one or more neural networks may be used to infer or predict information using the resources described above with respect to data center 800 using weight parameters calculated using one or more training techniques (such as, but not limited to, the training techniques described herein).

[0215] In at least one embodiment, the data center 800 can use a CPU, an application-specific integrated circuit (ASIC), a GPU, an FPGA, and / or other hardware (or corresponding virtual computing resources) to perform training and / or inference using the above resources. In addition, one or more of the above software and / or hardware resources can be configured as a service to allow users to train or perform information reasoning, such as image recognition, speech recognition, or other artificial intelligence services.

[0216] Example network environment

[0217] A network environment suitable for implementing embodiments of the present disclosure may include one or more client devices, servers, network attached storage (NAS), other backend devices, and / or other device types. The client devices, servers, and / or other device types (e.g., each device) may be configured to communicate with the client device, server, or other device types. Figure 7 The data center 800 may be implemented on one or more instances of one or more computing devices 700 - for example, each device may include similar components, features and / or functions of the computing device 700. In addition, backend devices (servers, NAS, etc.) may be included as part of the data center 800, examples of which are referred to herein. Figure 8 Describe in more detail.

[0218] The components of the network environment can communicate with each other through one or more networks that are wired, wireless, or both. The network may include multiple networks, or a network of networks. For example, the network may include one or more wide area networks (WANs), one or more local area networks (LANs), one or more public networks (e.g., the Internet and / or a public switched telephone network (PSTN)), and / or one or more private networks. In the case where the network includes a wireless telecommunications network, components such as base stations, communication towers, or even access points (as well as other components) may provide wireless connections.

[0219] Compatible network environments may include one or more peer-to-peer network environments, in which case the server may not be included in the network environment, and one or more client-server network environments, in which case one or more servers may be included in the network environment. In a peer-to-peer network environment, the functionality described herein with respect to the server may be implemented on any number of client devices.

[0220] In at least one embodiment, the network environment may include one or more cloud-based network environments, distributed computing environments, combinations thereof, and the like. A cloud-based network environment may include a framework layer, a job scheduler, a resource manager, and a distributed file system implemented on one or more servers, which may include one or more core network servers and / or edge servers. The framework layer may include a framework for software supporting the software layer and / or one or more applications of the application layer. The software or one or more applications may include web-based service software or applications, respectively. In an embodiment, one or more client devices may use web-based service software or applications (e.g., by accessing the service software and / or applications via one or more application programming interfaces (APIs)). The framework layer may be, but is not limited to, a free, open source software web application framework, for example, a distributed file system may be used for large-scale data processing (e.g., "big data").

[0221] A cloud-based network environment may provide cloud computing and / or cloud storage that performs any combination of the computing and / or data storage functions (or one or more portions thereof) described herein. Any of these various functions may be distributed to multiple locations from a central or core server (e.g., a server in one or more data centers), which may be distributed in a state, a region, a country, the world, etc. If the connection to a user (e.g., a client device) is relatively close to one or more edge servers, one or more core servers may assign at least a portion of the functions to one or more edge servers. A cloud-based network environment may be private (e.g., limited to a single organization), public (e.g., available to many organizations), and / or a combination thereof (e.g., a hybrid cloud environment).

[0222] One or more client devices may include the Figure 7 At least some of the components, features, and functionality of one or more of the example computing devices 700 are described. By way of example and not limitation, a client device may be embodied as a personal computer (PC), a laptop computer, a mobile device, a smartphone, a tablet computer, a smart watch, a wearable computer, a personal digital assistant (PDA), an MP3 player, a virtual reality headset, a global positioning system (GPS) or device, a video player, a camera, a surveillance device or system, a vehicle, a boat, an aircraft, a virtual machine, a drone, a robot, a handheld communication device, a hospital device, a gaming device or system, an entertainment system, a vehicle computer system, an embedded system controller, a remote control, an appliance, a consumer electronic device, a workstation, an edge device, any combination of the depicted devices, or any other suitable device.

[0223] The present disclosure may be described in the general context of computer code or machine usable instructions, including computer executable instructions, such as program modules, executed by a computer or other machine (such as a personal data assistant or other handheld device). Typically, program modules include routines, programs, objects, components, data structures, etc., which refer to code that performs a specific task or implements a specific abstract data type. The present disclosure may be implemented in a variety of system configurations, including handheld devices, consumer electronics, general-purpose computers, more specialized computing devices, etc. The present disclosure may also be implemented in a distributed computing environment, where tasks are performed by remote processing devices linked through a communication network.

[0224] As used herein, the description of "and / or" with respect to two or more elements should be interpreted as referring to only one element or a combination of elements. For example, "element A, element B, and / or element C" may include only element A, element B, element C, element A and element B, element A and element C, element B and element C, or element A, element B, and element C. In addition, "at least one of element A or element B" may include at least one of element A, at least one of element B, or at least one of element A and at least one of element B. In addition, "at least one of element A and element B" may include at least one of element A, at least one of element B, or at least one of element A and at least one of element B.

[0225] In order to satisfy statutory requirements, the subject matter of the present disclosure is described in detail herein. However, the description itself is not intended to limit the scope of the present disclosure. On the contrary, the inventors have contemplated that the claimed subject matter may also be embodied in other ways, including different steps or combinations of steps similar to the steps described in this document, as well as other existing or future technologies. In addition, although the terms "step" and / or "block" may be used herein to imply different elements of the method employed, the terms should not be interpreted as implying any particular order between the various steps disclosed herein unless the order of the various steps is explicitly described.

Claims

1. A method comprising: receiving a set of correlated time stamps for one or more samples, the set of correlated time stamps comprising one or more first time stamps referenced to one or more first clock sources and one or more second time stamps referenced to one or more second clock sources; calculating one or more offsets between the one or more first clock sources and the one or more second clock sources using the set of correlated time stamps for the one or more samples; converting one or more timestamps of one or more sensor measurements to a reference time domain using the one or more offsets; as well as One or more operations of a machine are performed using the one or more time stamps measured by the one or more sensors and converted to the reference time domain.

2. The method of claim 1, further comprising: The one or more first clock sources are frequency locked to the one or more second clock sources, wherein a set of correlated time stamps for the one or more samples is generated based at least on the frequency lock.

3. The method of claim 1 , wherein calculating the one or more offsets comprises: One or more differences between the correlated timestamps within the set of correlated timestamps for at least one sample of the set of correlated timestamps for the one or more samples are calculated.

4. The method of claim 1 , wherein the set of related timestamps for the one or more samples comprises a set of related timestamps for a plurality of samples, and the converting is based at least on calculating one or more rates of change of the one or more first clock sources and the one or more second clock sources using the set of related timestamps for the plurality of samples.

5. The method of claim 1, wherein the one or more first clock sources include a time stamp counter (TSC) clock source, the one or more second clock sources include a pulse per second hardware clock (PHC) clock source, and the reference time domain includes a system time domain. 6 . The method of claim 1 , wherein the converting is responsive to receiving the one or more timestamps from one or more sensor drivers corresponding to the one or more sensor measurements.

7. The method of claim 1, further comprising: The one or more first clock sources and the one or more second clock sources are synchronized using one or more real time hardware clock (RTC) clock sources based at least on a boot sequence corresponding to the machine.

8. A system comprising: One or more processing units configured to perform operations including: One or more operations of a machine are performed based at least on one or more sensor measurements and one or more timestamps converted to a reference time domain, the one or more timestamps converted using one or more offsets between a plurality of clock sources, the one or more offsets calculated using a set of one or more related samples of the plurality of clock sources.

9. The system of claim 8, wherein the set of one or more correlated samples is generated based at least on frequency locking the plurality of clock sources.

10. The system of claim 8, wherein the one or more offsets are calculated based at least on calculating one or more differences between the correlated samples within at least one of the one or more sets of correlated samples.

11. The system of claim 8, wherein the set of one or more related samples comprises a set of related timestamps for a plurality of samples, and the converting is based at least on calculating one or more rates of change of the plurality of clock sources using the set of related timestamps for the plurality of samples.

12. The system of claim 8, wherein the plurality of clock sources include a time stamp counter (TSC) clock source and a pulse per second hardware clock (PHC) clock source.

13. The system of claim 8, wherein the one or more time stamps are converted in response to receiving the one or more time stamps from one or more sensor drivers corresponding to the one or more sensor measurements.

14. The system of claim 8, wherein the system is included in at least one of the following: control systems for autonomous or semi-autonomous machines; Perception systems for autonomous or semi-autonomous machines; A system for performing simulation operations; Systems for performing digital twin operations; A system for performing light transport simulations; A system for performing collaborative content creation of 3D assets; Systems for performing deep learning operations; Systems implemented using edge devices; Systems implemented using robots; Systems for performing generative AI operations; A system for performing operations using a large language model; Systems for performing conversational AI operations; Systems for generating synthetic data; a system for presenting at least one of virtual reality content, augmented reality content, or mixed reality content; A system combining one or more virtual machines VM; A system implemented at least in part in a data center; or A system implemented at least in part using cloud computing resources.

15. A processor, comprising: One or more circuits: sampling a plurality of clock sources to generate a set of one or more related samples of the plurality of clock sources; calculating one or more offsets between the plurality of clock sources using the set of one or more correlation samples; converting time data for one or more sensor measurements to a reference time domain using the one or more offsets; as well as One or more operations of a machine are performed using the one or more sensor measurements and the time data converted to the reference time domain.

16. The processor of claim 15, wherein the set of one or more correlated samples is generated based at least on frequency locking the plurality of clock sources.

17. The processor of claim 15, wherein the calculating is based at least on calculating one or more differences between the correlated samples within at least one of the sets of one or more correlated samples.

18. The processor of claim 15, wherein the set of one or more related samples comprises a set of related timestamps for a plurality of samples, and the converting is based at least on calculating one or more rates of change of the plurality of clock sources using the set of related timestamps for the plurality of samples.

19. The processor of claim 15, wherein the plurality of clock sources include a time stamp counter (TSC) clock source and a pulse per second hardware clock (PHC) clock source.

20. The processor of claim 15, wherein the processor is included in at least one of: control systems for autonomous or semi-autonomous machines; Perception systems for autonomous or semi-autonomous machines; A system for performing simulation operations; Systems for performing digital twin operations; A system for performing light transport simulations; A system for performing collaborative content creation of 3D assets; Systems for performing generative AI operations; A system for performing operations using a large language model; Systems for performing deep learning operations; Systems implemented using edge devices; Systems implemented using robots; Systems for performing conversational AI operations; Systems for generating synthetic data; a system for presenting at least one of virtual reality content, augmented reality content, or mixed reality content; A system combining one or more virtual machines VM; A system implemented at least in part in a data center; or A system implemented at least in part using cloud computing resources.

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