A mask pattern optimization method, computer device, readable storage medium and program product

Abstract

The present application relates to the field of chip design, in particular to a mask layout optimization method, computer equipment, readable storage medium and program product, the mask layout optimization method provides a neural network model comprising a mask layout generation module and a lithography simulation module, the mask layout generation module outputs the corresponding mask layout based on the input original design layout, the lithography simulation module simulates the corresponding simulation lithography pattern according to the mask layout, the loss function is constructed through the corresponding relationship between the simulation lithography pattern and the original design layout, the parameters in the neural network model are adjusted by the loss function, the mask layout output by the mask layout generation module is iteratively optimized, and the accuracy of the obtained mask layout is improved;At the same time, the model can accurately obtain graphic information, so that even if a low-resolution original design layout is used, a better optimization result can be obtained, and the accuracy of the mask layout output based on the original design layout is ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip design, in particular to a mask layout optimization method, a computer device, a readable storage medium and a program product. BACKGROUND

[0002] Inverse Lithography Technology (ILT) is an advanced lithography technique used in chip design and manufacturing. It aims to improve the resolution and accuracy in the lithography process, so as to realize more complex patterns on the chip. Unlike the traditional method of using a regular mask, ILT calculates an optimized mask pattern to better control the propagation and interference of light, so as to realize the required pattern more accurately on the silicon wafer.

[0003] ILT is usually used to process high-resolution images, especially in modern semiconductor manufacturing, where feature sizes are very small. Therefore, the input image needs to have sufficient resolution to capture subtle features and complex patterns.

[0004] ILT needs high-quality input image data to perform effective mask optimization and pattern reconstruction by considering the propagation characteristics of light.

[0005] In modern semiconductor processes, for high-end designs, whether using ILT or other technologies, the quality and resolution of the input image are usually given priority to ensure that the subsequent lithography process can accurately achieve the design goal. However, higher resolution input images require a lot of computing resources and time to generate mask layouts using ILT, while lower resolution input images result in lower accuracy of the final mask layout. SUMMARY

[0006] To solve the problem of insufficient accuracy of the optimization result of the existing mask layout optimization technology, the present application provides a mask layout optimization method, which comprises the following steps:

[0007] A neural network model is provided, which includes a mask layout generation module and a lithography simulation module. An original design layout containing a plurality of design patterns is provided, and the original design layout is input into the mask layout generation module to output a corresponding mask layout. The lithography simulation module simulates a corresponding simulation lithography pattern according to the mask layout;

[0008] An assignment graph corresponding to the original design layout is provided, and the assignment of the corresponding pixel grid point is defined based on the area ratio of the design pattern in the original design layout in the assignment graph.

[0009] define the assignment of the pixel grid points on the assignment graph and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern to construct a loss function;

[0010] adjust the parameters in the neural network model by the loss function, so as to iteratively optimize the mask pattern graph output by the mask pattern graph generation module; and output the mask pattern graph corresponding to the simulated lithography pattern obtained after iteration as the optimized mask pattern graph.

[0011] Preferably, defining the assignment of the pixel grid points on the assignment graph and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern comprises:

[0012] mapping the original design layout to the assignment graph, in each pixel grid point of the assignment graph, when the design pattern in the original design layout occupies more than half of the area of the pixel grid point, and the center of the pixel grid point in the assignment graph is located within the mapped design pattern, the pixel grid point is assigned as 1; when the design pattern occupies less than half of the area of the pixel grid point, and the center of the pixel grid point in the assignment graph is located outside the mapped design pattern, the pixel grid point is assigned as 0; when the assignment of the pixel grid point is 1 or 0, one of them represents that the pixel grid point has a design pattern, and the other represents that the pixel grid point has no design pattern, and the binary graph of the design pattern is defined as the assignment graph; and constructing the loss function according to the binary graph of the design pattern and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern.

[0013] Preferably, a gray threshold is set, and the pixel grid point whose value is 1 and whose gray value in the corresponding simulated lithography pattern is less than the gray threshold is taken as a first bad point.

[0014] The pixel grid point whose value is 0 and whose gray value in the corresponding simulated lithography pattern is greater than the gray threshold is taken as a second bad point.

[0015] In the loss function, the error of the gray values of the first and second bad points and the preset gray threshold is calculated, and the parameters in the neural network model are adjusted according to the loss function to reduce the error of the bad points.

[0016] Preferably, assuming that the simulated lithography pattern obtained by the lithography simulation module is D, and the assignment graph of the corresponding original design layout is B, the gray threshold is set as τ, and the loss function is defined as:

[0017]

[0018] wherein i, j represent the coordinates of D ij and B ij in B, D, otherwise refers to the remaining pixel grid points except the bad points in the simulated lithography pattern.

[0019] Preferably, the definition of the assignment of the pixel grid points on the assignment graph and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern comprises:

[0020] The original design layout is mapped to the assignment graph, and in each pixel grid point of the assignment graph, the ratio of the design pattern in the original design layout to the area of the pixel grid point is taken as the target floating point value of the pixel grid point, and the floating point graph of the design pattern is constructed by the target floating point values of the pixel grid points as the assignment graph; and the loss function is constructed according to the floating point graph of the design pattern and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern.

[0021] Preferably, the first floating point value, the second floating point value and the third floating point value are set, the first floating point value is greater than the second floating point value, and the second floating point value is greater than the third floating point value;

[0022] The gray scale threshold and the deviation threshold are set at the same time, the pixel grid point whose target floating point value is greater than the second floating point value and whose gray scale value in the corresponding simulated lithography pattern is less than the gray scale threshold is taken as the third bad point;

[0023] The pixel grid point whose target floating point value is less than the second floating point value and whose gray scale value in the corresponding simulated lithography pattern is greater than the gray scale threshold is taken as the fourth bad point;

[0024] The pixel grid point whose target floating point value is greater than the first floating point value and whose gray scale value in the corresponding simulated lithography pattern is less than the sum of the gray scale threshold and the deviation threshold is taken as the fifth bad point;

[0025] The pixel grid point whose target floating point value is less than the third floating point value and whose gray scale value in the corresponding simulated lithography pattern is greater than the difference between the gray scale threshold and the deviation threshold is taken as the sixth bad point;

[0026] The errors of the gray scale values of the third bad point and the gray scale threshold, the errors of the gray scale values of the fourth bad point and the gray scale threshold, the errors of the gray scale values of the fifth bad point and the sum of the gray scale threshold and the deviation threshold, and the errors of the gray scale values of the sixth bad point and the difference between the gray scale threshold and the deviation threshold are calculated in the loss function, and the parameters in the neural network model are adjusted according to the loss function to reduce the errors.

[0027] Preferably, it is assumed that the simulated lithography pattern obtained by the lithography simulation module is D, the floating point graph of the original design layout is F, the gray scale threshold τ and the deviation threshold σ are set, and the loss function is defined as:

[0028]

[0029] Wherein, i, j represent D ij and F ijThe coordinate positions in B and F, otherwise, refer to the remaining pixel points in the simulated lithography pattern except for the bad points.

[0030] To solve the above technical problems, the present application further provides a computer device, which comprises a storage, a processor and a computer program stored in the storage, and the processor executes the computer program to realize the steps of the mask layout optimization method.

[0031] To solve the above technical problems, the present application further provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to realize the steps of the mask layout optimization method.

[0032] To solve the above technical problems, the present application further provides a computer program product, which comprises a computer program / instruction, and the computer program / instruction is executed by a processor to realize the steps of the mask layout optimization method.

[0033] Compared with the prior art, the mask layout optimization method, the computer device, the readable storage medium and the program product have the following advantages:

[0034] 1、The neural network model provided by the present application comprises a mask layout generation module and a lithography simulation module, the mask layout generation module outputs a corresponding mask layout based on an input original design layout, and the mask layout can be quickly obtained through the mask layout generation module; meanwhile, the lithography simulation module simulates a corresponding simulated lithography pattern according to the mask layout, takes the simulated lithography pattern as supervision information of the mask layout generation module, constructs a loss function through the corresponding relationship between the simulated lithography pattern and the original design layout, adjusts parameters in the neural network model through the loss function, takes the simulated lithography pattern as a dynamic benchmark for iterative element judgment, iteratively optimizes the mask layout output by the mask layout generation module, so that the optimized mask layout meets the lithography requirement, the precision of the output mask layout is higher, that is, the simulated lithography pattern obtained through lithography of the mask layout is closer to the design pattern, and the accuracy of the obtained mask layout is improved.

[0035] Meanwhile, the loss function is constructed based on the values of the pixel grid points on the value map of the original design layout and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern, the value of the corresponding pixel grid point on the value map is defined according to the area ratio of the design pattern in the original design layout in the corresponding pixel grid point on the value map, the original design layout is valued, so that the design pattern in the original design layout can be more accurately represented, the model can accurately obtain the pattern information, so that even if the original design layout with low resolution is used, better optimization results can be obtained, the accuracy of the mask pattern output based on the original design layout is ensured, and meanwhile, the calculation resources consumed by the model can be reduced in the low-resolution environment, and the working efficiency of the model is improved.

[0036] 2、The original design layout is mapped to the value map, in each pixel grid point of the value map, when the design pattern in the original design layout occupies more than half of the area of the pixel grid point, the pixel grid point is valued as 1; when the design pattern occupies less than half of the area of the pixel grid point, the pixel grid point is valued as 0; when the value of the pixel grid point is 1 or 0, one of them represents that the pixel grid point exists the design pattern, and the other represents that the pixel grid point does not exist the design pattern, and the binary image of the design pattern is defined as the value map; the loss function is constructed according to the binary image of the design pattern and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern; compared with the color or grayscale image, the data amount is greatly reduced, the storage and processing efficiency is higher, and the operation speed of processing the binary image is usually faster than that of processing the color or grayscale image, because each pixel grid point only needs to consider two states, the complexity of the loss function constructed by the binary image is reduced, and the adjustment and optimization efficiency of the loss function on the mask pattern generation module is improved.

[0037] 3、The center of the pixel grid point in the value map of the application is located in the mapped design pattern, and when the design pattern in the original design layout occupies more than half of the area of the pixel grid point, the pixel grid point is valued as 1; the center of the pixel grid point in the value map is located outside the mapped design pattern, and when the design pattern occupies less than half of the area of the pixel grid point, the pixel grid point is valued as 0; whether the center of the pixel grid point is located in the design pattern is taken as the judgment premise of the value, the center point of the pixel grid point is not in the design pattern, the isolated noise points can be quickly judged and removed, so that the quality and accuracy of the binary image are improved, whether the center point is in the design pattern can ensure that the generated mask pattern matches the lithography process requirement, so that the mask pattern is prevented from being too large or too small, and errors in the manufacturing process are prevented.

[0038] 4、The gray scale threshold is further set in the present application, the pixel point with a value of 1 and the gray scale value of the pixel point in the corresponding simulation lithography pattern being less than the gray scale threshold is taken as a first bad point, the pixel point with a value of 0 and the gray scale value of the pixel point in the corresponding simulation lithography pattern being greater than the gray scale threshold is taken as a second bad point, the design pattern in the original design layout is accurately represented by using the assignment graph, so that the model can accurately obtain the pattern information, and then the difference between the simulation lithography pattern and the design pattern, i.e. the first bad point and the second bad point, can be quickly and accurately obtained by using the assignment graph, and then the error of the gray scale values of the first bad point and the second bad point and the preset gray scale threshold is calculated in the loss function, the parameters in the neural network model are adjusted according to the loss function to reduce the error of the bad points, and the pixel points that need to be optimized and adjusted are further represented in the loss function, the data operation amount is reduced, and the optimization efficiency is improved.

[0039] 5、The reticle pattern generation module is set as a reticle pattern generation model, and the lithography simulation module is set as a lithography simulation model; the lithography simulation model is connected with the reticle pattern generation model, the simulation lithography pattern is generated according to the reticle pattern generated by the reticle pattern generation model, and the loss function constructed according to the assignment graph of the simulation lithography pattern and the original design layout is used as supervision information to guide the reticle pattern generation model to generate an optimized reticle pattern, and by setting the reticle pattern generation module and the lithography simulation module as a complete model, different types of reticle pattern generation modules and lithography simulation modules can be adjusted according to different use requirements, and the two can be independently operated to realize their respective functions and can be linked to optimize the output results.

[0040] 6、The present application maps the original design layout to the assignment graph, in each pixel point of the assignment graph, the ratio of the design pattern in the original design layout to the area of the pixel point is taken as the target floating point value of the pixel point, and the floating point graph of the design pattern is constructed as the assignment graph through the target floating point values of the pixel points; the loss function is constructed according to the corresponding relationship between the floating point graph of the design pattern and the corresponding pixel points on the simulation lithography pattern, compared with the binary graph form of the assignment graph, the floating point graph constructed by the area ratio is more accurate in representing the design pattern, and the optimization accuracy of the reticle pattern is further improved.

[0041] 7、The present application further sets the gray scale threshold and the deviation threshold, and divides the floating point value into intervals, so as to further limit the corresponding relationship between the floating point graph of the design pattern and the corresponding pixel points on the simulation lithography pattern in the loss function, and specifically define the bad points in the pixel points that need to be supervised in the loss function, thereby reducing the original required data calculation amount and improving the guiding optimization efficiency of the loss function on the reticle pattern generation module.

[0042] 8. The application further provides a computer device, comprising a storage, a processor and a computer program stored in the storage, wherein the processor executes the computer program to realize the steps of the mask layout optimization method, and has the same beneficial effects as the mask layout optimization method, which will not be repeated here.

[0043] 9. The application further provides a computer readable storage medium, which stores a computer program, wherein the computer program is executed to realize the mask layout optimization method, and has the same beneficial effects as the mask layout optimization method, which will not be repeated here.

[0044] 10. The application further provides a computer program product, which stores a computer program, wherein the computer program product comprises computer programs / instructions, and the computer programs / instructions are executed by the processor to realize the steps of the mask layout optimization method, and have the same beneficial effects as the mask layout optimization method, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only some embodiments of the application, and for those skilled in the art, other drawings can be obtained without creative labor based on these drawings.

[0046] Figure 1 is a step flow chart of a mask optimization method provided by the first embodiment of the application.

[0047] Figure 2 is an example diagram of an assignment graph in a mask optimization method provided by the first embodiment of the application.

[0048] Figure 3 is a computer device structure schematic diagram provided by the second embodiment of the application.

[0049] Figure 4 is a computer readable storage medium structure schematic diagram provided by the third embodiment of the application.

[0050] Figure 5 is a computer program product structure schematic diagram provided by the fourth embodiment of the application.

[0051] Explanation of figure mark:

[0052] 10, computer device; 20, computer readable storage medium; 30, computer program product. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solutions and advantages of the present application clearer and more apparent, the present application will be further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application and not to limit the present application.

[0054] To solve the problem of insufficient accuracy of the optimization result of the existing mask pattern optimization technology, please refer to Figure 1 The present application provides a mask pattern optimization method, which comprises the following steps:

[0055] S1: providing a neural network model, the neural network model comprising a mask pattern generation module and a lithography simulation module, providing an original design layout comprising a plurality of design patterns, inputting the original design layout into the mask pattern generation module to output a corresponding mask pattern, and the lithography simulation module simulating a corresponding simulation lithography pattern according to the mask pattern;

[0056] S2: providing an assignment graph corresponding to the original design layout, defining the assignment of the corresponding pixel grid point based on the area ratio of the design pattern in the original design layout in the corresponding pixel grid point in the assignment graph;

[0057] S3: defining the assignment of the pixel grid point on the assignment graph and the corresponding relationship of the corresponding pixel grid point on the simulation lithography pattern to construct a loss function;

[0058] S4: adjusting the parameters in the neural network model with the loss function, thereby iteratively optimizing the mask pattern output by the mask pattern generation module; and outputting the mask pattern corresponding to the simulation lithography pattern obtained after iteration as the optimized mask pattern.

[0059] The neural network model provided by the present application can quickly obtain a mask pattern through the mask pattern generation module, and the lithography simulation module can simulate a corresponding simulation lithography pattern according to the mask pattern. The simulation lithography pattern is used as the supervision information of the mask pattern generation module, the loss function is constructed through the corresponding relationship between the simulation lithography pattern and the original design layout, the parameters in the neural network model are adjusted with the loss function, the simulation lithography pattern is used as the dynamic benchmark for iterative element judgment, the mask pattern output by the mask pattern generation module is iteratively optimized, so that the optimized mask pattern meets the lithography requirements, the precision of the output mask pattern is higher, i.e. the simulation lithography pattern obtained by lithography through the mask pattern is closer to the design pattern, and the accuracy of the obtained mask pattern is improved.

[0060] Meanwhile, the loss function is constructed based on the assignment of the pixel grid points on the assignment map of the original design layout and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern. The assignment of the corresponding pixel grid points is defined according to the area proportion of the design pattern in the original design layout in the corresponding pixel grid points of the assignment map. By assigning the original design layout, the design pattern in the original design layout is more accurately represented, so that the model can accurately obtain the pattern information, so that even if a low-resolution original design layout is used, a better optimization result can be obtained, ensuring the accuracy of the mask layout output based on the original design layout, while reducing the computing resources consumed by the model in a low-resolution environment, improving the working efficiency of the model.

[0061] It should be noted that in modern semiconductor processes, for high-end designs, whether using inverse lithography technology or other technologies, the quality and resolution of the input image are usually given priority to ensure that the subsequent lithography process can accurately achieve the design goal. However, higher-resolution input images require a lot of computing resources / computing time for the mask layout generated by inverse lithography technology.

[0062] Specifically, inverse lithography technology (ILT) is an advanced lithography technology used in chip design and manufacturing. It aims to improve the resolution and accuracy of the lithography process to achieve more complex patterns on the chip. Unlike traditional methods that use regular masks, inverse lithography technology calculates an optimized mask pattern to better control the propagation and interference of light, thereby more accurately implementing the required pattern on the silicon wafer. ILT is usually used to process high-resolution images, especially in modern semiconductor manufacturing where feature sizes are very small. Therefore, the input image needs to have sufficient resolution to capture subtle features and complex patterns.

[0063] Understandably, the mask layout generation module is trained based on historical design patterns and mask layouts corresponding to the historical design patterns.

[0064] Specifically, the design pattern and the mask layout corresponding to the design pattern optimized by the inverse lithography technology are provided, and the mask layout generation module is trained by the design pattern and the corresponding mask layout, so that the mask layout generation module can output the corresponding mask layout optimized by the inverse lithography technology according to the input design pattern.

[0065] ILT technology aims to provide higher resolution and smaller feature size for complex patterns, suitable for the manufacture of high-density integrated circuits. It can generally generate more effective mask patterns to improve the overall quality of the finished product, but ILT technology usually requires more computing resources and design cycles, and the mask pattern generation module can quickly obtain the ILT technology optimized mask pattern with higher precision after deep training learning.

[0066] It can be understood that ILT technology needs high-quality input image data by comprehensively considering the propagation characteristics of light for effective mask optimization and pattern reconstruction, but higher resolution input image will make the mask pattern generated by ILT technology consume a lot of computing resources / computing time. The original design layout containing several design patterns is represented in a low resolution scenario in the present application, and the resolution of the original design layout is less than the resolution required by ILT technology. In the present application, the assignment graph enables the model to accurately obtain pattern information, and the loss function plays a guiding and supervising role in the optimization process of the mask pattern generation module, so that better optimization results can be obtained even with low-resolution original design layout. The low-resolution original design layout also reduces the computing time required by the model, improving the working efficiency of the model.

[0067] It can be understood that in step S2, the assignment of the pixel grid points on the assignment graph and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern are defined, including:

[0068] The original design layout is mapped to the assignment graph. In each pixel grid point of the assignment graph, when the design pattern in the original design layout occupies more than half of the area of the pixel grid point, the pixel grid point is assigned a value of 1; when the design pattern occupies less than half of the area of the pixel grid point, the pixel grid point is assigned a value of 0; when the pixel grid point is assigned a value of 1 or 0, one of them represents that the pixel grid point has a design pattern, and the other represents that the pixel grid point has no design pattern, and a binary image of the design pattern is defined as the assignment graph; a loss function is constructed according to the binary image of the design pattern and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern.

[0069] When constructing the loss function according to the binary image of the design pattern and the corresponding relationship of the corresponding pixel grid points on the simulated lithography pattern, the binary Figure 1 Generally, two states are used to represent patterns, which greatly reduces the data volume compared to color or grayscale images, and has higher storage and processing efficiency. The operation speed of processing binary images is usually faster than that of processing color or grayscale images, because each pixel grid point only needs to consider two states, which reduces the complexity of the loss function constructed by the binary image and improves the adjustment and optimization efficiency of the loss function on the mask pattern generation module.

[0070] Further, in step S2, the center of a pixel grid point in the assignment graph is located within the mapped design pattern, and the design pattern in the original design layout occupies more than half of the area of the pixel grid point, the pixel grid point is assigned a value of 1, indicating that the pixel grid point has a design pattern;

[0071] The center of a pixel grid point in the assignment graph is located outside the mapped design pattern, and the design pattern occupies less than half of the area of the pixel grid point, the pixel grid point is assigned a value of 0, indicating that the pixel grid point does not have a design pattern.

[0072] Taking whether the center of a pixel grid point is located within the design pattern as the judgment premise of assignment, if the center of a pixel grid point is not within the design pattern, the isolated noise points can be quickly judged and removed, thereby improving the quality and accuracy of the binary graph. By judging whether the center of a pixel grid point is within the design pattern, it can be ensured that the generated mask layout matches the requirements of the photolithography process, thereby preventing the mask layout from being too large or too small, which leads to errors in the manufacturing process.

[0073] Specifically, referring to Figure 2 , first, we can define a bitmap representing the design pattern in the original design layout in a low-resolution scenario. Bitmap is a format used to store images, and is commonly used to represent pixel information of an image. It stores the color or grayscale value of each pixel in the form of a matrix. For example, Figure 2 , as shown in the left graph a, the orange polygon represents a circuit in which the design pattern is mapped into a bitmap; and the blue 6*6 grid represents a 6-pixel*6-pixel bitmap, which will record the information representing the design pattern. Each blue dot represents the center position of each pixel.

[0074] Then define the value of the pixel grid point in the bitmap to obtain the corresponding assignment graph: when the center of a pixel is located within the orange polygon, and the orange part within the pixel grid point occupies more than 1 / 2 of the area, the pixel is assigned a value of 1; when the center of a pixel is located outside the orange polygon, and the blue part within the pixel grid point occupies more than 1 / 2 of the area, the pixel is assigned a value of 0; other pixels are assigned a value of -2, indicating that the situation is complex; in summary, the assignment graph corresponding to the original design layout is shown in Figure 2 , as shown in the right graph b.

[0075] Further, in step S3, a loss function is defined based on the above assignment graph. Assuming that the simulation lithography pattern obtained by the photolithography simulation module is D, and the assignment graph corresponding to the original design layout is B. Set a grayscale threshold τ, and the pixel grid point with a value of 1 and a grayscale value less than the grayscale threshold in the corresponding simulation lithography pattern as the first bad point;

[0076] a pixel grid point whose value is 0 and whose gray value in the corresponding simulation lithography pattern is greater than the gray threshold value as a second bad point;

[0077] In the loss function, the error of the gray values of the first bad point and the second bad point and the preset gray threshold value is calculated, and the parameters in the neural network model are adjusted according to the loss function to reduce the error of the bad points.

[0078] Specifically, the loss function is defined as:

[0079]

[0080] where i, j represent D ij and B ij The coordinate position in B, D, otherwise refers to the case other than the above two lines, which does not cause loss and error.

[0081] By using the assignment graph to accurately represent the design patterns in the original design layout, the model can accurately obtain the pattern information, and then the differences between the simulation lithography pattern and the design pattern, i.e. the first bad point and the second bad point, can be quickly and accurately obtained through the assignment graph. Then, in the loss function, the error of the gray values of the first bad point and the second bad point and the preset gray threshold value is calculated, and the parameters in the neural network model are adjusted according to the loss function to reduce the error of the bad points. Further, the pixel grid points that need to be optimized and adjusted are represented in the loss function, the data operation amount is reduced, and the optimization efficiency is improved.

[0082] Understandably, the mask layout generation module is set as a mask layout generation model, and the lithography simulation module is set as a lithography simulation model; the lithography simulation model connects the mask layout generation model, generates a simulation lithography pattern according to the mask layout output by the mask layout generation model, and uses the loss function constructed according to the simulation lithography pattern and the assignment graph of the original design layout as supervision information to guide the mask layout generation model to generate an optimized mask layout.

[0083] The lithography simulation model generates a simulation lithography pattern according to the mask layout output by the mask layout generation model, and inputs the simulation lithography pattern into the mask layout generation model. The simulation lithography pattern is used as supervision information to guide the mask layout generation model to generate an optimized mask layout. By setting the mask layout generation module and the lithography simulation module as a complete model, different types of mask layout generation modules and lithography simulation modules can be adjusted according to different use requirements, and the two can be independently operated to realize their respective functions, and can be linked to optimize the output results.

[0084] Optionally, in step S3, defining the assignment of the pixel grid point on the assignment graph and the corresponding relationship of the corresponding pixel grid point on the simulation lithography pattern can further include:

[0085] The original design layout is mapped to the assignment graph, and in each pixel grid point of the assignment graph, the ratio of the design pattern in the original design layout to the area of the pixel grid point is taken as the target floating point value of the pixel grid point, and a floating point pattern of the design pattern is constructed as the assignment graph through the target floating point values of the pixel grid points; and a loss function is constructed according to the floating point pattern of the design pattern and the corresponding relationship of the corresponding pixel grid points on the simulation lithography pattern.

[0086] Compared with the assignment graph in the form of a binary pattern, the floating point pattern constructed by the area ratio is more accurate in representing the design pattern, and the optimization accuracy of the mask layout is further improved.

[0087] Specifically, a first floating point value, a second floating point value and a third floating point value are set, the first floating point value is greater than the second floating point value, and the second floating point value is greater than the third floating point value;

[0088] A gray threshold and a deviation threshold are set at the same time, the pixel grid point whose target floating point value is greater than the second floating point value and whose gray value in the corresponding simulation lithography pattern is less than the gray threshold is taken as a third bad point;

[0089] The pixel grid point whose target floating point value is less than the second floating point value and whose gray value in the corresponding simulation lithography pattern is greater than the gray threshold is taken as a fourth bad point;

[0090] The pixel grid point whose target floating point value is greater than the first floating point value and whose gray value in the corresponding simulation lithography pattern is less than the sum of the gray threshold and the deviation threshold is taken as a fifth bad point;

[0091] The pixel grid point whose target floating point value is less than the third floating point value and whose gray value in the corresponding simulation lithography pattern is greater than the difference between the gray threshold and the deviation threshold is taken as a sixth bad point;

[0092] In the loss function, the errors of the gray values of the third bad point and the gray threshold, the errors of the gray values of the fourth bad point and the gray threshold, the errors of the gray values of the fifth bad point and the sum of the gray threshold and the deviation threshold, and the errors of the gray values of the sixth bad point and the difference between the gray threshold and the deviation threshold are calculated respectively, and the parameters in the neural network model are adjusted according to the loss function to reduce the errors.

[0093] Suppose that the simulation lithography pattern obtained by the lithography simulation module is D, the floating point pattern of the original design layout is F, the gray threshold is τ and the deviation threshold is σ, and the loss function is defined as:

[0094]

[0095] The present application further limits the correspondence between the floating-point graph of the design pattern and the corresponding pixel points on the simulated lithography pattern in the loss function by setting the gray threshold and the deviation threshold and dividing the interval of the floating-point value, and specifically defines the bad points in the pixel points that need to be supervised in the loss function, thereby reducing the originally required data calculation amount and improving the guiding optimization efficiency of the mask pattern generation module by the loss function.

[0096] To sum up, the neural network model provided by the first embodiment of the present application comprises a mask pattern generation module and a lithography simulation module. The mask pattern generation module outputs a corresponding mask pattern based on an input original design layout. The mask pattern can be quickly obtained through the mask pattern generation module. Meanwhile, the lithography simulation module simulates a corresponding simulated lithography pattern according to the mask pattern. The simulated lithography pattern is used as supervision information of the mask pattern generation module. A loss function is constructed through the correspondence between the simulated lithography pattern and the original design layout. The parameters in the neural network model are adjusted by the loss function. The simulated lithography pattern is used as a dynamic benchmark for iterative element judgment. The mask pattern output by the mask pattern generation module is iteratively optimized, so that the optimized mask pattern meets the lithography requirement, and the precision of the output mask pattern is higher, that is, the simulated lithography pattern obtained by lithography through the mask pattern is closer to the design pattern, and the accuracy of the obtained mask pattern is improved. The loss function can more accurately represent the design pattern in the original design layout, so that the model can accurately obtain the pattern information, thereby obtaining a better optimization result even if a low-resolution original design layout is used, ensuring the precision of the mask pattern output based on the original design layout, and solving the problem that reducing the resolution of the original design layout can reduce the required time for model calculation but also reduces the precision of the model output mask pattern.

[0097] To solve the above technical problems, please refer to Figure 3 The second embodiment of the present application also provides a computer device 10, which comprises a storage, a processor and a computer program stored on the storage. The processor executes the computer program to realize the steps of the above-mentioned mask pattern optimization method, and has the same beneficial effects as the above-mentioned mask pattern optimization method, which will not be repeated here.

[0098] To solve the above technical problems, please refer to Figure 4 The third embodiment of the present application also provides a computer readable storage medium 20, which stores a computer program. When the computer program is executed by a processor, the steps of the above-mentioned mask pattern optimization method are realized, and have the same beneficial effects as the above-mentioned mask pattern optimization method, which will not be repeated here.

[0099] To solve the above technical problems, please refer to Figure 5The fourth embodiment of the present application also provides a computer program product 30, which comprises computer programs / instructions, and the computer programs / instructions, when executed by a processor, implement the steps of the mask layout optimization method described above, and have the same beneficial effects as the mask layout optimization method described above, which will not be described herein.

[0100] It can be understood that, according to the embodiments disclosed in the present application, the processes described above with reference to the flowcharts can be implemented as a computer software program. For example, the embodiments of the present disclosure include a computer program product comprising a computer program carried on a computer readable medium, the computer program comprising program code for executing the method shown in the flowchart. In such embodiments, the computer program can be downloaded and installed from a network by a communication part, and / or installed from a detachable medium. When the computer program is executed by a central processing unit (CPU), the above-mentioned functions defined in the method of the present application are executed. It should be noted that the computer readable medium described in the present application can be a computer readable signal medium or a computer readable storage medium or any combination of the two. The computer readable storage medium includes, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any combination of the above. More specific examples of computer readable storage media can include, but are not limited to, an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, the computer readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device or apparatus. In the present application, the computer readable signal medium can include a data signal carried in a baseband or as a part of a carrier wave, which carries the computer readable program code. Such a propagated data signal can take many forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. The computer readable signal medium can also be any computer readable medium that is not a computer readable storage medium and that can transmit, propagate or transport a program for use by or in connection with an instruction execution system, device or apparatus. The program code contained on the computer readable medium can be transmitted by any suitable medium, including but not limited to wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0101] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0102] In the embodiments provided in the present application, it should be understood that "B corresponding to A" means that B is associated with A, and B can be determined according to A. However, it should also be understood that the determination of B according to A does not mean that B is determined only according to A, but B can also be determined according to A and / or other information.

[0103] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in any suitable manner in one or more embodiments. Those skilled in the art should also know that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to the present application.

[0104] In various embodiments of the present application, it should be understood that the size of the sequence number of each process described above does not mean the inevitable sequence of execution order, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0105] The computer program product can have a signal including the computer program. The computer program product can have a computer-readable storage medium including the computer program. The computer program product can have a data stream including the computer program. The computer program product can have a computer-readable storage medium including the data stream. The computer program product can have a computer-readable storage medium including the computer program which, when executed by a computer, is able to carry out the method according to the present application.

[0106] The above discloses a mask plate optimization method, a computer device, a readable storage medium and a program product in embodiments of the present application in detail. The principles and implementation manners of the present application are described by applying specific examples in the present article. The above embodiment description is only used to help understand the method of the present application and its core idea. Meanwhile, for the general skilled in the art, the specific implementation manners and application ranges will be changed according to the idea of the present application. In conclusion, the content of the present description should not be understood as the limitation of the present application. Any modification, equivalent replacement, improvement and the like within the principles of the present application should be included in the protection scope of the present application.

Claims

1. A mask layout optimization method, characterized in that, The method comprises the following steps: providing a neural network model, the neural network model comprising a mask pattern generation module and a lithography simulation module, providing an original design layout comprising a plurality of design patterns, inputting the original design layout into the mask pattern generation module to output a corresponding mask pattern, and simulating a corresponding simulation lithography pattern according to the mask pattern by the lithography simulation module; providing an assignment graph corresponding to the original design layout, and defining an assignment of a pixel grid point in the assignment graph based on an area ratio of a design pattern in the original design layout in the pixel grid point in the assignment graph; defining a corresponding relationship between the assignment of the pixel grid point in the assignment graph and a corresponding pixel grid point in the simulation lithography pattern to construct a loss function; adjusting parameters in the neural network model by using the loss function, thereby iteratively optimizing the mask pattern output by the mask pattern generation module; outputting the mask pattern corresponding to the simulation lithography pattern obtained after the iteration as an optimized mask pattern.

2. The mask pattern optimization method of claim 1, wherein, The method further comprises the following steps: mapping the original design layout onto the assignment graph, and in each pixel grid point of the assignment graph, when a design pattern in the original design layout occupies more than half of the area of the pixel grid point and the center of the pixel grid point in the assignment graph is located within the mapped design pattern, assigning the pixel grid point a value of 1; when the design pattern occupies less than half of the area of the pixel grid point and the center of the pixel grid point in the assignment graph is located outside the mapped design pattern, assigning the pixel grid point a value of 0; when the value of the pixel grid point is 1 or 0, one of them represents that the pixel grid point contains a design pattern, and the other represents that the pixel grid point does not contain a design pattern, and a binary graph of the design pattern is defined as the assignment graph; and constructing the loss function according to the binary graph of the design pattern and the corresponding relationship between the pixel grid points in the simulation lithography pattern.

3. The method of claim 2, wherein, The method further comprises the following steps: setting a gray threshold, and taking a pixel grid point whose value is 1 and whose gray value in the corresponding simulation lithography pattern is less than the gray threshold as a first bad point; taking a pixel grid point whose value is 0 and whose gray value in the corresponding simulation lithography pattern is greater than the gray threshold as a second bad point; calculating errors between the gray values of the first and second bad points and a preset gray threshold in the loss function, and adjusting the parameters in the neural network model according to the loss function to reduce the errors of the bad points.

4. The mask pattern optimization method according to claim 3, wherein: assuming that the simulation lithography pattern obtained by the lithography simulation module is D, the assignment graph corresponding to the original design layout is B, and the gray threshold is τ, the loss function is defined as: where i, j represent D ij and B ij The coordinate position in B, D, otherwise refers to the remaining pixel points in the simulation lithography pattern except for the bad points.

5. The method of claim 1, wherein The method further comprises the following steps: mapping the original design layout onto the assignment graph, and in each pixel grid point of the assignment graph, taking a ratio of the design pattern in the original design layout to the area of the pixel grid point as a target floating-point value of the pixel grid point, constructing a floating-point graph of the design pattern by using the target floating-point values of the pixel grid points as the assignment graph, and constructing the loss function according to the floating-point graph of the design pattern and the corresponding relationship between the pixel grid points in the simulation lithography pattern.

6. The method of claim 5, wherein, The method further comprises the following steps: A first floating point value, a second floating point value and a third floating point value are set, the first floating point value is greater than the second floating point value, and the second floating point value is greater than the third floating point value; A gray threshold and a deviation threshold are set, and a pixel point whose target floating point value is greater than the second floating point value and whose gray value in the corresponding simulated lithography pattern is less than the gray threshold is regarded as a third bad point; A pixel point whose target floating point value is less than the second floating point value and whose gray value in the corresponding simulated lithography pattern is greater than the gray threshold is regarded as a fourth bad point; A pixel point whose target floating point value is greater than the first floating point value and whose gray value in the corresponding simulated lithography pattern is less than the sum of the gray threshold and the deviation threshold is regarded as a fifth bad point; A pixel point whose target floating point value is less than the third floating point value and whose gray value in the corresponding simulated lithography pattern is greater than the difference between the gray threshold and the deviation threshold is regarded as a sixth bad point; Errors of the gray values of the third bad points and the gray threshold, errors of the gray values of the fourth bad points and the gray threshold, errors of the gray values of the fifth bad points and the sum of the gray threshold and the deviation threshold, and errors of the gray values of the sixth bad points and the difference between the gray threshold and the deviation threshold are calculated in the loss function, and parameters in the neural network model are adjusted according to the loss function to reduce the errors.

7. The mask pattern optimization method of claim 6, wherein: assuming that a simulated lithography pattern obtained by a lithography simulation module is D, a floating point pattern of an original design layout is F, a gray threshold is τ, and a deviation threshold is σ, a loss function is defined as: where i, j represent D ij and F ij The coordinate position in B, F, otherwise refers to the remaining pixel points in the simulation lithography pattern except for the bad points.

8. A computer device comprising a storage, a processor and a computer program stored on the storage, characterized in that The processor executes the computer program to implement the steps of the mask pattern optimization method of any one of claims 1-7.

9. A computer readable storage medium having stored thereon a computer program, characterized in that The computer program is executed by the processor to implement the steps of the mask pattern optimization method of any one of claims 1-7.

10. A computer program product comprising computer programs / instructions, characterized in that The computer program / instruction is executed by the processor to implement the steps of the mask pattern optimization method of any one of claims 1-7.

Images