Light emitting element, display device including the same, and method for manufacturing the display device

Abstract

A light emitting element includes: a first end surface and a second end surface opposite to each other; a first semiconductor layer disposed on a side surface of the first end surface; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and an electrode layer disposed on a side surface of the second end surface and disposed on the second semiconductor layer. The first semiconductor layer includes a first feature, a second feature disposed on the first feature and adjacent to the active layer, and a third feature disposed between the first feature and the second feature. A width of the first member is different from a width of the second member, and the third member has a varying width depending on the length position.

Description

Technical Field

[0001] The present invention relates to a light emitting element, a display device including the light emitting element, and a method of manufacturing the display device including the light emitting element. Background Art

[0002] Recently, as interest in information display increases, research and development of display devices have been ongoing. Summary of the invention

[0003] Technical issues

[0004] The embodiment provides a light emitting element improving light emission efficiency, a display device including the light emitting element, and a method of manufacturing the display device including the light emitting element.

[0005] However, the embodiments of the disclosure are not limited to the embodiments set forth herein. The above and other embodiments will become more apparent to those skilled in the art to which the disclosure pertains by referring to the detailed description of the disclosure given below.

[0006] Technical Solution

[0007] In an embodiment, the light emitting element may include: a first end surface and a second end surface, opposite to each other; a first semiconductor layer, arranged at the first end surface; an active layer, arranged on the first semiconductor layer; a second semiconductor layer, arranged on the active layer; and an electrode layer, arranged on the second semiconductor layer and at the second end surface, wherein the first semiconductor layer may include a first component, a second component arranged on the first component and adjacent to the active layer, and a third component arranged between the first component and the second component, the width of the first component and the width of the second component may be different from each other, and the third component may have different widths at different length positions.

[0008] Each of the first and second parts of the first semiconductor layer may have a cylindrical shape. A width of the second part may be greater than a width of the first part.

[0009] The width of the third component may increase as approaching the second component from the first component.

[0010] The third member of the first semiconductor layer may have a frustoconical shape.

[0011] The side surface of the third component may have a slope at an angle with respect to the first end surface of the light emitting element.

[0012] The angle may be in the range of about 120 degrees or more.

[0013] Each of the active layer, the second semiconductor layer, and the electrode layer may have a cylindrical shape.

[0014] A width of the active layer, a width of the second semiconductor layer, a width of the electrode layer, and a width of the second portion of the first semiconductor layer may be substantially the same as one another.

[0015] The light emitting element may further include: a reflective layer surrounding a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer.

[0016] The reflective layer may include a reflective metallic material.

[0017] The light emitting element may further include: an insulating film surrounding a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer.

[0018] The insulating film may expose a first end surface of the light emitting element which is a lower surface of the first semiconductor layer, and may expose a second end surface of the light emitting element which is an upper surface of the electrode layer.

[0019] In an embodiment, a display device may include: a pixel, including: a first electrode; a second electrode; and a light-emitting element, including a first end surface electrically connected to the first electrode and a second end surface electrically connected to the second electrode, wherein the light-emitting element may include: a first semiconductor layer, arranged at the first end surface; an active layer, arranged on the first semiconductor layer; a second semiconductor layer, arranged on the active layer; and an electrode layer, arranged on the second semiconductor layer and at the second end surface, wherein the first semiconductor layer may include: a first component; a second component, arranged on the first component and adjacent to the active layer; and a third component, arranged between the first component and the second component, the width of the first component and the width of the second component may be different from each other, and the third component may have different widths at different length positions.

[0020] Each of the first part and the second part may have a cylindrical shape. A width of the second part may be greater than a width of the first part.

[0021] The width of the third component may increase as approaching the second component from the first component.

[0022] In an embodiment, a method for manufacturing a light-emitting element may include the following steps: forming a pattern mask on a first substrate; sequentially forming a first semiconductor layer, an active layer, a second semiconductor layer and an electrode layer on the first substrate on which the pattern mask is formed; sequentially forming a mask layer and an etching pattern layer on the electrode layer; forming a first light-emitting stack component by patterning at least a portion of each of the first semiconductor layer, the active layer, the second semiconductor layer and the electrode layer in a direction from the electrode layer toward the first semiconductor layer through a first etching process using the mask layer and the etching pattern layer; separating the first light-emitting stack component from the first substrate; forming a second light-emitting stack component by patterning the side surface of the first semiconductor layer, the side surface of the active layer, the side surface of the second semiconductor layer and the side surface of the electrode layer in a direction from the first semiconductor layer toward the electrode layer through a second etching process in which at least a portion of the first light-emitting stack component is patterned; and attaching the second light-emitting stack component to a second substrate.

[0023] The forming of the second light emitting stack member may include etching the first semiconductor layer so that at least a portion of the first semiconductor layer may have different widths at different length positions.

[0024] The method may further include forming a reflective layer on a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer of the second light emitting stack member.

[0025] The method may further include forming an insulating film on a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer of the second light emitting stack member.

[0026] The first etching process may be a dry etching process, and the second etching process may be a wet etching process.

[0027] Beneficial Effects

[0028] According to an embodiment, the light emitting element may have different widths relative to the region and / or component. For example, the first semiconductor layer included in the light emitting element may include a first component, a second component, and a third component between the first component and the second component, and the third component may have an inverted truncated cone shape.

[0029] The side surface of the third component may have a certain angle relative to the surface corresponding to the end of the light emitting element (e.g., the upper surface and / or the lower surface), so that the light generated from the active layer included in the light emitting element can be guided in the light emission direction. Therefore, the light emission efficiency of the light emitting element can be improved.

[0030] However, the effects of the present invention are not limited to the above-described effects and can be extended in various ways without departing from the spirit and scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a schematic perspective view showing a light emitting element according to the embodiment.

[0032] Figure 2 is a schematic cross-sectional view showing a light emitting element.

[0033] Figure 3a is a schematic diagram showing the light emission efficiency of a light emitting element according to a comparative example.

[0034] Figure 3b It is shown Figure 2 Schematic diagram of the light emission efficiency of the light emitting element shown in .

[0035] Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 , Fig.12 , Fig.13 , Fig.14 and Fig.15 is a schematic cross-sectional view illustrating a method of manufacturing a light emitting element according to an embodiment.

[0036] Fig.16 is a schematic plan view showing a display device according to an embodiment.

[0037] Fig.17 It is along Fig.16 A schematic cross-sectional view taken along line II' shown in FIG. DETAILED DESCRIPTION

[0038] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words as non-limiting examples of the device or method disclosed herein. However, it is apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments need not be exclusive, nor need they be limited to disclosure. For example, the specific shape, configuration, and characteristics of an embodiment may be used or implemented in another embodiment.

[0039] Unless otherwise specified, the illustrated embodiments are understood to provide features of the invention. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the invention.

[0040] The use of cross hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Thus, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the shown elements and / or any other characteristics, attributes, properties, etc. of the element. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the embodiments can be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0041] When an element, such as a layer, is referred to as being "on," "connected to," or "bonded to" another element or layer, the element may be directly on, directly connected to, or directly bonded to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly bonded to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements. In addition, the DR1 axis, the DR2 axis, and the DR3 axis are not limited to the three axes of a rectangular coordinate system (such as the X-axis, the Y-axis, and the Z-axis) and may be interpreted in a broader sense. For example, the DR1 axis, the DR2 axis, and the DR3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. In addition, the X-axis, the Y-axis, and the Z-axis are not limited to the three axes of a rectangular coordinate system (such as the x-axis, the y-axis, and the z-axis) and may be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of A and B" may be interpreted as meaning only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one of the group consisting of X, Y, and Z" may be interpreted as any combination of only X, only Y, only Z, or two or more of X, Y, and Z. As used herein, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items.

[0042] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the disclosed teachings, the first element discussed below may be referred to as the second element.

[0043] For descriptive purposes, spatially relative terms such as "under," "below," "below," "down," "above," "up," "above," "higher," "side" (e.g., as in "sidewall"), etc., may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. In addition to the orientation depicted in the accompanying drawings, the spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the accompanying drawings is turned over, an element described as "under" or "beneath" other elements or features would subsequently be oriented as "above" the other elements or features. Thus, the term "under" can encompass both above and below orientations. In addition, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0044] The terms used here are for the purpose of describing specific embodiments, rather than being intended to be limiting. As used here, unless the context clearly indicates otherwise, the singular "one", "one (kind / person)" and "the (described)" are intended to also include plural forms. In addition, when the term "include" and its variants and / or "comprising" and its variants are used in this specification, it is explained that there are stated features, integral bodies, steps, operations, elements, components and / or their groups, but it is not excluded that there are or add one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It is also noted that, as used here, the terms "substantially (substantially)", "about (approximately)" and other similar terms are used as approximate terms rather than degree terms, and so, for explaining the measured values, calculated values ​​and / or the inherent deviations of the provided values ​​that those of ordinary skill in the art will recognize.

[0045] Various embodiments are described herein with reference to cross-sectional views and / or exploded views as schematic illustrations of embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are anticipated. Therefore, the embodiments disclosed herein should not necessarily be interpreted as being limited to the specific illustrated shapes of the regions, but rather include shape deviations due to, for example, manufacturing. In this way, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such, are not necessarily intended to be limiting.

[0046] Hereinafter, the embodiments will be described in more detail with reference to the accompanying drawings. Throughout the accompanying drawings, the same reference numerals are given to the same elements, and their repeated description will be omitted.

[0047] Figure 1 is a schematic perspective view showing a light emitting element according to the embodiment. Figure 2 is a schematic cross-sectional view showing a light emitting element. Figure 3a is a schematic diagram showing the light emission efficiency of a light emitting element according to a comparative example. Figure 3b It is shown Figure 2 Schematic diagram of the light emission efficiency of the light emitting element shown in .

[0048] Reference Figure 1 and Figure 2 , the light emitting element LD may include a first semiconductor layer 11, an active layer 12, a second semiconductor layer 13, and an electrode layer 14 sequentially disposed and / or stacked along a direction (e.g., a length H direction or a thickness direction). In an embodiment, the light emitting element LD may further include at least another semiconductor layer (e.g., at least another semiconductor layer disposed on a top surface (e.g., an upper surface) and / or a bottom surface (e.g., a lower surface) of the active layer 12).

[0049] The light emitting element LD may have a size ranging from nanometer to micrometer. For example, the light emitting element LD may have diameters D1 and D2 (or a width of a cross section) and / or a length H ranging from nanometer to micrometer.

[0050] However, this is merely illustrative, and the structure, shape, size, and / or type of the light emitting element LD may be changed in some embodiments. For example, the structure, shape, size, and / or type of the light emitting element LD may be changed differently depending on the design conditions of the light emitting device using the light emitting element LD, the light emitting characteristics to be ensured, and the like.

[0051] In the embodiment, the light emitting element LD may be provided in a form in which the light emitting element LD has a rod shape. In the description of the embodiment, the rod shape may include various forms of rod-like shapes or strip-like shapes (including cylindrical shapes, polygonal cylindrical shapes, truncated cone shapes, truncated polygonal pyramid shapes, etc.), and the shape of the cross section of the rod shape is not limited. In the embodiment, the length H of the light emitting element LD may be greater than the diameters D1 and D2 (or the width of the cross section) of the light emitting element LD.

[0052] The light emitting element LD may include a first end portion EP1 and a second end portion EP2 facing each other. For example, the light emitting element LD may include a first end portion EP1 and a second end portion EP2 located at ends (e.g., opposite ends) thereof along the length H direction (or thickness direction). The first end portion EP1 of the light emitting element LD may include a first end surface S1 (e.g., a lower surface) and / or a peripheral region thereof of the light emitting element LD. The second end portion EP2 of the light emitting element LD may include a second end surface S2 (e.g., an upper surface) and / or a peripheral region thereof of the light emitting element LD. The first end surface S1 and the second end surface S2 may be opposite to each other and may face each other.

[0053] For the convenience of description, hereinafter, the surface corresponding to the first end EP1 is defined as the first end surface S1 (e.g., the lower surface) of the light emitting element LD, and the surface corresponding to the second end EP2 is defined as the second end surface S2 (e.g., the upper surface) of the light emitting element LD.

[0054] In an embodiment, the light emitting element LD may have different widths relative to its regions and / or components. For example, the diameter of the first end surface S1 of the light emitting element LD corresponding to the first end EP1 (e.g., the first diameter D1) and the diameter of the second end surface of the light emitting element LD corresponding to the second end EP2 (e.g., the second diameter D2) may be different from each other. For example, the second diameter D2 may be greater than the first diameter D1. For example, the area of ​​the second end surface S2 (e.g., the upper surface) of the light emitting element LD corresponding to the second end EP2 may be greater than the area of ​​the first end surface S1 (e.g., the lower surface) of the light emitting element LD corresponding to the first end EP1.

[0055] For example, the middle region and / or middle portion between the first end EP1 and the second end EP2 of the light emitting element LD may have a truncated cone shape. For example, the middle region and / or middle portion of the light emitting element LD may have a diameter and a cross section that become larger (or increase) as they become closer to the top thereof. For example, the middle region and / or middle portion of the light emitting element LD may have an inverted truncated cone shape. The light emission efficiency of the light emitting element LD may be improved according to the shape (or form) of the light emitting element LD. Figure 3a and Figure 3b The light emission efficiency according to the shape (or form) of the light emitting element LD is described in more detail.

[0056] In an embodiment, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14 may be sequentially arranged in a direction from the first end EP1 to the second end EP2 of the light emitting element LD. For example, the first semiconductor layer 11 may be arranged at the first end EP1 of the light emitting element LD, and the electrode layer 14 may be arranged at the second end EP2 of the light emitting element LD. However, this is merely illustrative, and embodiments are not limited thereto. For example, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14 may be sequentially arranged in a direction from the second end EP2 to the first end EP1 of the light emitting element LD.

[0057] The first semiconductor layer 11 may include a first conductive type semiconductor layer including a first conductive type dopant. For example, the first semiconductor layer 11 may include an N type semiconductor layer including an N type dopant.

[0058] In an embodiment, the first semiconductor layer 11 may include a nitride semiconductor material or a phosphide semiconductor material. In an example, the first semiconductor layer 11 may include a nitride semiconductor material (including at least one material among GaN, AlGaN, InGaN, AlInGaN, AlN and InN) or a phosphide semiconductor material (including at least one material among GaP, GaInP, AlGaP, AlGaInP, AlP and InP). In an embodiment, the first semiconductor layer 11 may include an N-type dopant such as Si, Ge or Sn. However, this is merely illustrative, and the material of the first semiconductor layer 11 is not limited thereto. For example, the first semiconductor layer 11 may be formed of various materials.

[0059] The active layer 12 (or light emitting layer) may be disposed on the first semiconductor layer 11. The active layer 12 may include a single quantum well structure or a multi-quantum well structure. When a voltage as a threshold voltage or higher is applied to an end (e.g., an opposite end) of the light emitting element LD, light may be emitted when electron-hole pairs are combined in the active layer 12. In some embodiments, the position of the active layer 12 may be changed differently depending on the type of the light emitting element LD.

[0060] In an embodiment, the active layer 12 may emit light having a visible light band (e.g., light having a wavelength of about 400 nm to about 900 nm). For example, the active layer 12 may emit blue light having a wavelength in the range of about 450 nm to about 480 nm, green light having a wavelength in the range of about 480 nm to about 500 nm, or red light having a wavelength in the range of about 620 nm to about 750 nm. However, this is merely illustrative. For example, the color and / or wavelength band of light generated in the active layer 12 may be changed differently.

[0061] In an embodiment, the active layer 12 may include a nitride semiconductor material or a phosphide semiconductor material. In an example, the active layer 12 may include a nitride semiconductor material (including at least one material among GaN, AlGaN, InGaN, InGaAlN, AlN, InN, and AlInN) or a phosphide semiconductor material (including at least one material among GaP, GaInP, AlGaP, AlGaInP, AlP, and InP). However, this is merely illustrative, and the material of the active layer 12 is not limited thereto. For example, the active layer 12 may be formed of various materials.

[0062] In an embodiment, the active layer 12 may include an element related to the color (or wavelength band) of light, and the color of light generated in the active layer 12 may be controlled by adjusting the content and / or component ratio of the element. In an embodiment, the active layer 12 may be formed as a multilayer having a structure in which GaN layers and InGaN layers are alternately and / or repeatedly stacked, and emits light of a specific color according to the content and / or component ratio of indium (In) included in the InGaN layer. Therefore, a light emitting element LD of a specific color may be manufactured by adjusting the content and / or component ratio of indium (In) included in the active layer 12.

[0063] The second semiconductor layer 13 may be disposed on the active layer 12. The second semiconductor layer 13 may include a second conductive type semiconductor layer including a second conductive type dopant. For example, the second semiconductor layer 13 may be a P type semiconductor layer including a P type dopant.

[0064] In an embodiment, the second semiconductor layer 13 may include a nitride semiconductor material or a phosphide semiconductor material. In an example, the second semiconductor layer 13 may include a nitride semiconductor material (including at least one material among GaN, AlGaN, InGaN, AlInGaN, AlN and InN) or a phosphide semiconductor material (including at least one material among GaP, GaInP, AlGaP, AlGaInP, AlP and InP). In an embodiment, the second semiconductor layer 13 may include a P-type dopant such as Mg. However, this is merely illustrative, and the material of the second semiconductor layer 13 is not limited thereto. For example, the second semiconductor layer 13 may be formed of various materials.

[0065] In an embodiment, the first semiconductor layer 11 and the second semiconductor layer 13 may include the same semiconductor material and may include dopants of different conductivity types. In another example, the first semiconductor layer 11 and the second semiconductor layer 13 may include different semiconductor materials and may include dopants of different conductivity types.

[0066] In an embodiment, the first semiconductor layer 11 and the second semiconductor layer 13 may have different lengths (or different thicknesses) in the length H direction of the light emitting element LD. In an example, along the length H direction of the light emitting element LD, the first semiconductor layer 11 may have a length (or thickness) that is longer (or thicker) than the length (or thickness) of the second semiconductor layer 13. Therefore, the active layer 12 may be disposed closer to the second end EP2 (e.g., the P-type end) than the first end EP1 (e.g., the N-type end).

[0067] The electrode layer 14 may be disposed on the second semiconductor layer 13. For example, the electrode layer 14 may be formed (e.g., directly formed) on the second semiconductor layer 13 to contact a surface (e.g., an upper surface) of the second semiconductor layer 13. In an embodiment, the electrode layer 14 and the second semiconductor layer 13 may have widths and / or surface areas corresponding to each other at a junction therebetween. For example, the electrode layer 14 and the second semiconductor layer 13 may have the same width and / or the same surface area at a junction therebetween, and have portions having substantially the same shape.

[0068] The electrode layer 14 may form an electrode for protecting the second semiconductor layer 13 and smoothly connecting the second semiconductor layer 13 to a certain electrode or a certain line, etc. For example, the electrode layer 14 may be an ohmic contact electrode or a Schottky contact electrode.

[0069] In an embodiment, the electrode layer 14 may include a metal or a metal oxide. In an example, the electrode layer 14 may be made of a metal such as chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), or copper (Cu), any oxide or alloy thereof, a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), or indium oxide (In 2 O 3 )) etc. or a mixture thereof. However, this is merely illustrative, and the material of the electrode layer 14 is not limited thereto. For example, the electrode layer 14 may be formed of various conductive materials.

[0070] In an embodiment, the electrode layer 14 may be substantially transparent. Therefore, light generated in the light emitting element LD may be emitted from the second end portion EP2 of the light emitting element LD while being transmitted through the electrode layer 14.

[0071] In an embodiment, the light emitting element LD may further include a reflective layer RML formed on a surface thereof. For example, the reflective layer RML may surround the side surfaces of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14. The reflective layer RML may be formed on the surface of the light emitting element LD to surround at least the outer circumferential surface of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14.

[0072] In an embodiment, the reflective layer RML may be a reflective electrode layer including a reflective material (e.g., a reflective metal material). For example, the reflective layer RML may include at least one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, and Cu. For example, the reflective layer RML may be formed of an alloy, nitride, oxide, etc. including at least one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, and Cu, and these may be used alone or in combination. In addition, the reflective layer RML may have a multilayer structure.

[0073] As described above, by forming the reflective layer RML on the surface of the light emitting element LD according to the embodiment, the light generated inside the light emitting element LD (e.g., the active layer 12) can be reflected by the reflective layer RML. Therefore, the light generated in the light emitting element LD may not leak to the side surface of the light emitting element LD, but may be emitted in the light emission direction (e.g., emitted to the second end EP2 of the light emitting element LD). Therefore, the light emission efficiency of the light emitting element LD can be further improved.

[0074] In an embodiment, the light emitting element LD may further include an insulating film INF formed on a surface thereof. For example, the insulating film INF may be provided to surround the side surfaces of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14, and may surround the reflective layer RML on an outer surface of the reflective layer RML.

[0075] When the insulating film INF is formed on the surface of the light emitting element LD, a short circuit defect through the light emitting element LD can be prevented. Therefore, the electrical stability of the light emitting element LD can be ensured. When the insulating film INF is formed on the surface of the light emitting element LD, the surface defects of the light emitting element LD can be minimized, thereby improving the life and efficiency of the light emitting element LD.

[0076] The insulating film INF may include an insulating material. For example, the insulating film INF may include silicon oxide (SiO x )(For example, SiO 2 ), silicon nitride (SiN x )(For example, Si 3 N 4 ), aluminum oxide (Al x O y )(For example, Al 2 O 3 ), titanium oxide (Ti x O y )(For example, TiO2 ) and hafnium oxide (HfO x ) or another insulating material other than these.

[0077] The insulating film INF may be formed as a single layer or a multi-layer. In an example, the insulating film INF may be formed as a double layer.

[0078] The insulating film INF may expose the first semiconductor layer 11 and the electrode layer 14 at the first end EP1 and the second end EP2 of the light emitting element LD, respectively. For example, the insulating film INF may not be formed on the second end surface S2 of the light emitting element LD, and therefore, the upper surface (or the second end surface S2) of the electrode layer 14 may be exposed at the second end EP2 of the light emitting element LD. Therefore, the electrode layer 14 may be connected to at least one electrode, at least one line and / or at least one conductive pattern, so that the driving power and / or signal is applied to the second end EP2 of the light emitting element LD. In addition, the insulating film INF may not be formed on the first end surface S1 of the light emitting element LD, and therefore, the lower surface (or the first end surface S1) of the first semiconductor layer 11 may be exposed at the first end EP1 of the light emitting element LD. Therefore, the first semiconductor layer 11 may be connected to at least one electrode, at least one line and / or at least one conductive pattern, so that the driving power and / or signal is applied to the first end EP1 of the light emitting element LD.

[0079] In an embodiment, the first semiconductor layer 11 may have different widths with respect to its regions and / or parts. For example, the first semiconductor layer 11 may have a small width and a small cross-sectional area in a region away from the active layer 12 compared to a region close to the active layer 12.

[0080] For example, the first semiconductor layer 11 may include a first component 11_1 adjacent to the first end portion EP1 , a second component 11_2 adjacent to the active layer 12 (or the second end portion EP2 ), and a third component 11_3 disposed between the first component 11_1 and the second component 11_2 .

[0081] In an embodiment, the first component 11_1 and the second component 11_2 of the first semiconductor layer 11 may have a cylindrical shape, and the width and / or cross-sectional area of ​​the second component 11_2 may be greater than the width and / or cross-sectional area of ​​the first component 11_1. For example, the first component 11_1 of the first semiconductor layer 11 may have an etching rate greater than that of the second component 11_2.

[0082] For example, the third component 11_3 of the first semiconductor layer 11 corresponding to the middle region or middle portion may have a truncated cone shape. The third component 11_3 of the first semiconductor layer 11 may have different diameters (or widths) along the length H direction. For example, as it becomes closer to its top along the length H direction (for example, as it becomes closer to the second component 11_2 from the first component 11_1), the diameter (or width) and cross-sectional area of ​​the third component 11_3 of the first semiconductor layer 11 may become larger (or increase). In the example, the third component 11_3 of the first semiconductor layer 11 may have an inverted truncated cone shape whose cross-sectional area increases along the length H direction.

[0083] Corresponding to the shape of the third component 11_3 of the first semiconductor layer 11, the side surface of the third component 11_3 of the first semiconductor layer 11 (or the line defined by the side surface) may have a slope inclined at a certain range of angle θ relative to the first end surface S1 (or the lower surface of the light emitting element LD) and / or the second end surface S2 (or the upper surface of the light emitting element LD). For example, the side surface of the third component 11_3 of the first semiconductor layer 11 may have a slope of an angle θ in the range of about 120 degrees or more relative to the first end surface S1 and / or the second end surface S2.

[0084] As described above, the side surface of the third component 11_3 of the first semiconductor layer 11 has a slope inclined at a certain angle θ relative to the first end surface S1 and / or the second end surface S2, so that the light generated in the light emitting element LD (for example, the light generated in the active layer 12) can be guided in the light emission direction (for example, the direction of the second end EP2 of the light emitting element LD from which light is emitted).

[0085] For example, further reference Figure 3a and Figure 3b , Figure 3a , a light emitting element LD_C according to a comparative example and the advancing directions (or transmission directions) of lights L1_C and L2_C generated from the light emitting element LD_C are shown in FIG. Figure 3b 2 shows the light emitting element LD according to the embodiment and the advancing directions (or transmission directions) of the lights L1 and L2 generated from the light emitting element LD.

[0086] First, refer to Figure 3a, the light emitting element LD_C according to the comparative example may include a first semiconductor layer 11_C, an active layer 12_C, a second semiconductor layer 13_C, and an electrode layer 14_C sequentially arranged in a direction (e.g., a length direction or a thickness direction). In addition, the light emitting element LD_C according to the comparative example may further include an insulating film INF_C formed on the surface of the light emitting element LD_C to surround the outer circumferential surface of the first semiconductor layer 11_C, the active layer 12_C, the second semiconductor layer 13_C, and the electrode layer 14_C.

[0087] The light emitting element LD_C according to the comparative example may have a cylindrical shape. For example, each of the first semiconductor layer 11_C, the active layer 12_C, the second semiconductor layer 13_C, and the electrode layer 14_C of the light emitting element LD_C may have a cylindrical shape having the same cross-sectional area along the length direction.

[0088] At least a portion of the first light L1_C among the lights L1_C and L2_C generated from the active layer 12_C of the light emitting element LD_C according to the comparative example, which advances (or transmits) in the light emission direction of the light emitting element LD_C (e.g., the direction facing the second end portion EP2_C as the upper direction), may be reflected from the side surface (e.g., the insulating film INF_C) of the light emitting element LD_C to advance (or transmit) in the light emission direction of the light emitting element LD_C. For example, while transmitting through the side surface (e.g., the insulating film INF_C) of the light emitting element LD_C, at least a portion of the first light L1_C may advance (or transmit) in the light emission direction.

[0089] For example, at least a portion of the second light L2_C that advances (or transmits) in the opposite direction opposite to the light emission direction of the light emitting element LD_C (for example, the direction facing the first end portion EP1_C as the lower direction) among the lights L1_C and L2_C generated from the active layer 12_C of the light emitting element LD_C according to the comparative example may be reflected from the side surface (for example, the insulating film INF_C) of the light emitting element LD_C to advance (or transmit) in the opposite direction of the light emission direction of the light emitting element LD_C. For example, while being transmitted through the side surface (for example, the insulating film INF_C) of the light emitting element LD_C, at least a portion of the second light L2_C may advance (or transmit) in the opposite direction of the light emission direction.

[0090] As described above, since the light emitting element LD_C according to the comparative example has a cylindrical shape, the light (e.g., the second light L2_C) that advances (or transmits) in the opposite direction of the light emission direction among the light L1_C and L2_C generated in the active layer 12_C is not changed to advance (or transmit) in the light emission direction, but only advances (or transmits) in the opposite direction of the light emission direction. Therefore, in the case of the light emitting element LD_C according to the comparative example, the light emission efficiency of the light emitting element LD_C may be deteriorated due to the loss of light generated in the active layer 12_C.

[0091] Reference Figure 3b , the light emitting element according to the embodiment may include as shown in reference Figure 1 and Figure 2 The first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 are described. In addition, the light emitting element LD may further include a reflective layer RML and an insulating film INF.

[0092] In the embodiments, as shown in Figure 1 and Figure 2 As described, the light emitting element LD may have different widths with respect to regions and / or components. For example, the diameter of the first end surface S1 corresponding to the first end EP1 of the light emitting element LD (e.g., the first diameter D1) and the diameter of the second end surface S2 corresponding to the second end EP2 of the light emitting element LD (e.g., the second diameter D2) may be different from each other, and the middle region and / or middle portion between the first end EP1 and the second end EP2 of the light emitting element LD may have a truncated cone shape (e.g., an inverted truncated cone shape).

[0093] The first light L1 among the lights L1 and L2 generated from the active layer 12 of the light emitting element LD that advances (or is transmitted) in the light emission direction of the light emitting element LD (for example, the direction toward the second end portion EP2 as the upward direction) may be reflected from the side surface of the light emitting element LD (for example, the reflective layer RML) to advance (or be transmitted) in the light emission direction of the light emitting element LD.

[0094] For example, second light L2 among the lights L1 and L2 generated from the active layer 12 of the light emitting element LD that advances (or is transmitted) in the direction opposite to the light emission direction of the light emitting element LD (for example, the direction facing the first end EP1 as the downward direction) can be reflected from the side surface of the light emitting element LD (for example, the reflective layer RML), so that the advancing direction (or transmission direction) of the second light L2 can be changed to the light emission direction (for example, the direction facing the second end EP2 as the upward direction).

[0095] For example, the second light L2 generated from the active layer 12 may be reflected at the side surface PRH of the third component 11_3 having an inverted truncated cone shape in the first semiconductor layer 11 of the light emitting element LD, so that the advancing direction (or transmission direction) of the second light L2 may be changed. Figure 1 and Figure 2 As described, the side surface PRH of the third component 11_3 of the first semiconductor layer 11 has a slope inclined at an angle θ in a certain range relative to the first end surface S1 (or the lower surface of the light emitting element LD) and / or the second end surface S2 (or the upper surface of the light emitting element LD), and therefore, the second light L2 generated from the active layer 12 to advance (or be transmitted) in a direction facing the first end EP1 (for example, the opposite direction of the light emission direction) can be reflected from the side surface PRH of the third component 11_3 of the first semiconductor layer 11, so that the advancing direction (or transmission direction) of the second light L2 can be changed to the light emission direction (for example, the direction facing the second end EP2 as the upper direction).

[0096] As described above, since the light emitting element LD according to the embodiment includes a shape having different widths relative to the region and / or the component, the light L1 and L2 generated in the active layer 12 can advance (or transmit) in the light emission direction of the light emitting element LD (for example, the direction facing the second end portion EP2 as the upper direction). Therefore, the loss of light generated in the light emitting element LD can be minimized (for example, removed), so that the light emission efficiency of the light emitting element LD can be improved.

[0097] Since the light emitting element LD according to the embodiment includes the reflective layer RML, some of the light L1 and L2 generated in the active layer 12 are not transmitted from the side surface of the light emitting element LD, but most of the light L1 and L2 can be reflected from the reflective layer RML, so that the light can advance (or be transmitted) in the light emission direction of the light emitting element LD without leaking to the side surface of the light emitting element LD. Therefore, the light emission efficiency of the light emitting element LD can be further improved.

[0098] Return to reference Figure 1 and Figure 2, each of the reflective layer RML and the insulating film INF may have a surface profile (or surface shape) corresponding to the side surface shape of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14 (or extending along the side surface shape of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14). For example, each of the reflective layer RML and the insulating film INF may have a surface profile (or surface shape) corresponding to the side surface shape of the first component 11_1, the second component 11_2, and the third component 11_3 of the first semiconductor layer 11. In an example, each of the reflective layer RML and the insulating film INF may have a curvature or slope corresponding to the side surface shape of the first component 11_1, the second component 11_2, and the third component 11_3 of the first semiconductor layer 11 (or extending along the side surface shape of the first component 11_1, the second component 11_2, and the third component 11_3 of the first semiconductor layer 11).

[0099] The light emitting device including the above-mentioned light emitting element LD can be used for various types of devices (including display devices, etc.) that require a light source. For example, the light emitting element LD can be provided in each pixel of the display panel and used as the light source of each pixel. However, the application field of the light emitting element LD is not limited to the above-mentioned example. For example, the light emitting element LD can be used for other types of devices (such as lighting devices) that require a light source.

[0100] In the following, reference will be made to Figures 4 to 15 A method of manufacturing a light emitting element according to an embodiment is described in detail.

[0101] Figures 4 to 15 is a schematic cross-sectional view showing a method of manufacturing a light emitting element according to an embodiment. Figures 4 to 15 Sequentially shows the manufacturing process according to Figure 1 and Figure 2 The method of the light emitting element LD of the embodiment shown in Figures 4 to 15 , an embodiment is shown in which a plurality of light emitting elements LD are manufactured on one second substrate BP (or backplane).

[0102] First, refer to Figure 1 , Figure 2 and Figure 4 In the method according to the embodiment, a first substrate SB (or growth substrate) may be prepared (or formed).

[0103] The first substrate SB may be a substrate, a wafer, or the like for manufacturing an epitaxial growth process (or epitaxy) suitable for a semiconductor. For example, the first substrate SB may be a substrate including a material such as silicon (Si), sapphire, SiC, GaN, GaAs, or ZnO. For example, the first substrate SB may be a substrate of various kinds and / or a substrate made of various materials. In the case where the epitaxial growth process for manufacturing the light-emitting element LD is smoothly performed, the type or material of the first substrate SB is not limited. After the first substrate SB is used as a substrate for the epitaxial growth process for manufacturing the light-emitting element LD, the first substrate SB may be finally separated from the light-emitting element LD.

[0104] In an embodiment, in a method according to an embodiment, a pattern mask PM may be disposed (or formed) on the first substrate SB. The pattern mask PM may include a first semiconductor layer 11 (see FIG. 1 ) to be subsequently formed on the first substrate SB. Figure 6 ) pattern corresponding to (or overlapping) openings.

[0105] The pattern mask PM may include silicon oxide (SiO x )(For example, SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ) or another insulating material. After the pattern mask PM is used to manufacture the light emitting element LD, the pattern mask PM may be finally separated from the light emitting element LD together with the first substrate SB.

[0106] Reference Figure 5 In the method according to the embodiment, a sacrificial layer BF may be disposed (or formed) on the first substrate SB. In the embodiment, a sacrificial layer BF may be disposed (or formed) on the first substrate SB in the opening of the pattern mask PM.

[0107] In an embodiment, a sacrificial layer BF may be formed on the first substrate SB by an epitaxial growth process, and the sacrificial layer BF is finally separated from the light emitting element LD. The sacrificial layer BF may be disposed between the light emitting element LD and the first substrate SB in the process of manufacturing the light emitting element LD, so that the light emitting element LD and the first substrate SB are physically separated from each other.

[0108] In an embodiment, the sacrificial layer BF may include an intrinsic semiconductor layer not doped with impurities, and the sacrificial layer BF and the first semiconductor layer 11 may include the same semiconductor material (see Figure 6). In an embodiment, the sacrificial layer BF may include a plurality of semiconductor layers. One of the plurality of semiconductor layers may be an intrinsic semiconductor layer. Another of the plurality of semiconductor layers may be a semiconductor layer doped to include a first conductive type dopant or a second conductive type dopant, and stains between the first substrate SB and the first semiconductor layer 11 may be reduced.

[0109] Reference Figure 6 In the method according to the embodiment, the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 may be sequentially disposed (or formed) on the first substrate SB. For example, in the method according to the embodiment, the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 may be sequentially formed on the first substrate SB on which the sacrificial layer BF is formed by an epitaxial growth process.

[0110] The first semiconductor layer 11 may be formed by Figure 1 and Figure 2 The first semiconductor layer 11 may be formed of the material of the first semiconductor layer 11 described in the embodiment shown in FIG. 1 or another semiconductor material. The first semiconductor layer 11 may be doped to include an N-type dopant such as Si, Ge, or Sn.

[0111] The first semiconductor layer 11 may be formed by an epitaxial growth process using a process technique such as metal organic vapor phase epitaxy (MOVPE), metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), liquid phase epitaxy (LPE), or vapor phase epitaxy (VPE). However, this is merely illustrative, and the method of forming the first semiconductor layer 11 is not limited thereto.

[0112] In an embodiment, a portion of the first semiconductor layer 11 may be disposed (or formed) in the opening of the pattern mask PM on the first substrate SB. The portion of the first semiconductor layer 11 disposed (or formed) in the opening of the pattern mask PM may include reference Figure 1 and Figure 2 A first component 11_1 of a first semiconductor layer 11 is described.

[0113] The active layer 12 may be formed by Figure 1 and Figure 2 The active layer 12 may be formed of a material of the active layer 12 described in the embodiment shown in , or another semiconductor material. In an embodiment, the active layer 12 may be formed by an epitaxial growth process using a process technology such as MOVPE, MOCVD, MBE, LPE, or VPE. However, this is merely illustrative, and the method of forming the active layer 12 is not limited thereto.

[0114] The second semiconductor layer 13 may be formed by Figure 1 and Figure 2The second semiconductor layer 13 may be formed of a material of the second semiconductor layer 13 described in the embodiment shown in or another semiconductor material. The second semiconductor layer 13 may be doped to include a P-type dopant such as Mg. In an embodiment, the second semiconductor layer 13 may be formed by an epitaxial growth process using a process technology such as MOVPE, MOCVD, MBE, LPE, or VPE. However, this is merely illustrative, and the method of forming the second semiconductor layer 13 is not limited thereto.

[0115] Reference Figure 7 In the method according to the embodiment, the electrode layer 14 may be disposed (or formed) on the second semiconductor layer 13. For example, the electrode layer 14 may be formed (e.g., entirely formed) on a surface (e.g., upper surface) of the first substrate SB on which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 are sequentially disposed (or formed).

[0116] In an embodiment, the electrode layer 14 may be formed by Figure 1 and Figure 2 The electrode layer 14 may be formed of the material described in the embodiment shown in FIG. 1 or another conductive material.

[0117] Reference Figures 8 to 10 In the method according to the embodiment, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 can be etched in a direction substantially perpendicular to the first substrate SB, thereby patterning a multilayer first stacking structure (also referred to as a “first light-emitting stacking component” or a “first light-emitting core”) including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14.

[0118] In an embodiment, in the method according to the embodiment, the light emitting element LD may be preliminarily patterned by a patterning process using nanoimprint lithography technology, photolithography technology, etc. For example, in the method according to the embodiment, the light emitting element LD may be preliminarily patterned by nanoimprint lithography technology.

[0119] For example, in the method according to the embodiment, in Figure 8 After forming a mask layer MK on the electrode layer 14 shown in FIG. Fig. 9 An etching pattern layer PT (e.g., a nano pattern) is formed on the mask layer MK shown in FIG. Subsequently, in the method according to the embodiment, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14 can be etched in a specific form by an etching process using the mask layer MK and the etching pattern layer PT, thereby forming (or producing) a first stacked structure (or a first light-emitting stacked member or a first light-emitting core).

[0120] For example, in the method according to the embodiment, Fig.10As shown in the figure, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 can be etched in the vertical direction by performing a dry etching process (or a first etching process) using a mask layer MK and an etching pattern layer PT, so that a first stacked structure including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 can be formed (or generated).

[0121] In an embodiment, for the purpose of selective dry etching for each layer and / or each film performed in a subsequent process, the mask layer MK may include at least two mask layers formed of different materials. For example, the mask layer MK may include a first mask layer (e.g., a first hard mask layer) formed on the electrode layer 14 and including an insulating material and a second mask layer (e.g., a second hard mask layer) formed on the first mask layer and including a conductive material. However, this is merely illustrative, and embodiments are not limited thereto.

[0122] The etching pattern layers PT may be disposed on the mask layer MK to be spaced apart from each other. The etching pattern layers PT may be formed with a shape, size, and / or distance corresponding to the light emitting element LD to pattern each of the light emitting elements LD on the first substrate SB. For example, the etching pattern layers PT may have a shape and diameter corresponding to the light emitting element LD to be manufactured (e.g., refer to Figure 1 and Figure 2 The etch pattern layers PT may have a shape or size corresponding to the second diameter D2 at the second end portion EP2 of the light emitting element LD described above, and the etch pattern layers PT may be spaced apart from each other at a distance to such an extent that the light emitting elements LD may be easily separated from each other.

[0123] The etch pattern layer PT may include a polymer or another material. In an embodiment, the etch pattern layer PT may include a nanoimprint resin and be formed by a nanoimprint lithography process technology.

[0124] In an embodiment, in the method according to the embodiment, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14 may be preliminarily etched by a stepwise dry etching process using the etching pattern layer PT. For example, in the method according to the embodiment, after the mask layer MK is first etched by using the etching pattern layer PT, the electrode layer 14, the second semiconductor layer 13, the active layer 12, and the first semiconductor layer 11 may be continuously etched. In an embodiment, the electrode layer 14, the second semiconductor layer 13, the active layer 12, and the first semiconductor layer 11 may be etched in a direction substantially perpendicular to the first substrate SB by a dry etching process to have a Fig.10 The approximate rod shape shown in Fig.10As shown in FIG. 1 , after the dry etching process is completed for the electrode layer 14 , the second semiconductor layer 13 , the active layer 12 , and the first semiconductor layer 11 , the mask layer MK and the etching pattern layer PT may be removed.

[0125] Reference Fig.11 and Fig.12 In the method according to the embodiment, the first stacked structure including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14, and the sacrificial layer BF may be separated from the first substrate SB. For example, in the method according to the embodiment, the first stacked structure including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the electrode layer 14, and the sacrificial layer BF may be separated by using a transfer substrate TST. For example, the transfer substrate TST may include a stretchable material in some embodiments, and also include an adhesive layer for attaching the first stacked structure (e.g., the electrode layer 14) thereto.

[0126] In an embodiment, in a method according to an embodiment, the sacrificial layer BF may be separated from the first substrate SB by an electro-etching process and / or a chemical etching process or another process. For example, the sacrificial layer BF and the first substrate SB may be separated from each other by a laser lift-off (LLO) process. However, this is merely illustrative. In some embodiments, the sacrificial layer BF and the first substrate SB may be separated from each other by a chemical lift-off (CLO) process.

[0127] Reference Fig.13 In the method according to the embodiment, the first stacked structure including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 and the sacrificial layer BF may be separated from each other. In the embodiment, the sacrificial layer BF may be separated from the first stacked structure by an electric etching process and / or a chemical etching process or another process. For example, the sacrificial layer BF may be separated from the first stacked structure by an etch-back process using different etching rates.

[0128] Then, in the method according to the embodiment, the Fig.13 The additional etching process shown in FIG. 1 forms (or generates) a second stack structure by etching each of the preliminarily etched first stack structures in a specific shape.

[0129] For example, in the method according to the embodiment, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 may be etched by an additional etching process such as a wet etching process (or a second etching process), thereby forming (or generating) a multilayer second stacked structure (also referred to as a "second light-emitting stacked member" or a "second light-emitting core") including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14. For example, in the method according to the embodiment, the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 may be continuously etched by a wet etching process. The second stacked structure may form a light-emitting stacked member (or a light-emitting core) of the light-emitting element LD according to the embodiment.

[0130] In an embodiment, Fig.13 As shown in , the second stacked structure (or second light-emitting stacked member or second light-emitting core) including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 patterned by the additional etching process may have different widths with respect to regions and / or portions. For example, as shown in FIG. Figure 1 and Figure 2 As described, the middle region and / or middle portion between the ends (eg, opposite ends) of the second stack structure of the light emitting stack structure of the light emitting element LD may have a truncated cone shape.

[0131] Reference Fig.14 In the method according to the embodiment, the second stacked structure (or second light emitting stacked member or second light emitting core) including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 may be attached to the second substrate BP (or backplane). For example, the second stacked structure (or second light emitting stacked member or second light emitting core) including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14 may be attached to the second substrate BP by a bonding process or the like.

[0132] For example, after a light emitting stack component (or light emitting core) of the light emitting element LD according to the embodiment is formed on a separate growth substrate (e.g., a first substrate SB) and partially patterned (e.g., patterned by a dry etching process), the light emitting stack component (or light emitting core) of the light emitting element LD according to the embodiment can be separated from the growth substrate to be transferred through a transfer substrate TST, and patterned (e.g., patterned by a wet etching process) into a specific shape to be attached to a backplane (e.g., a second substrate BP).

[0133] Reference Fig.15In the method according to the embodiment, a reflective layer RML may be provided (or formed) on the side surface of the second stacked structure (or second light emitting stacked member or second light emitting core) including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the electrode layer 14, and an insulating film INF may be provided (or formed) on the reflective layer RML. The reflective layer RML may be composed of Figure 1 and Figure 2 The insulating film INF may be formed of the material described in the embodiment shown in FIG. Figure 1 and Figure 2 , or another conductive material as described in the embodiments shown in . For example, the insulating film INF can be formed by an atomic layer deposition (ALD) process, a sol-gel process, a chemical deposition process (e.g., plasma enhanced chemical vapor deposition (PECVD)), etc. However, this is merely illustrative, and the embodiments are not limited thereto. For example, the insulating film INF can be formed on the surface (e.g., upper surface) of the electrode layer 14, and the insulating film INF can be removed by a separate process (e.g., etching process). Therefore, the electrode layer 14 can be exposed at the surface (e.g., upper surface) of the light-emitting stack member (or light-emitting core) of each light-emitting element LD.

[0134] Fig.16 is a schematic plan view showing a display device according to an embodiment.

[0135] exist Fig.16 In the present invention, a display device (eg, a display panel PNL formed in the display device) will be shown as using a reference Figure 1 and Figure 2 The light emitting element LD according to the embodiment is described as an example of an electronic device of a light source.

[0136] exist Fig.16 , the structure of the display panel PNL will be illustrated based on the display area DA. However, in some embodiments, at least one driving circuit (e.g., at least one of a scan driver and a data driver), a line and / or a pad (also referred to as a "pad" or "pad") may be further disposed in the display panel PNL.

[0137] Reference Fig.16 The display panel PNL may include a substrate SUB and a pixel PXL disposed on the substrate SUB. The pixel PXL may be formed in plurality on the substrate SUB.

[0138] The substrate SUB may be used to form a base member of the display panel PNL, and may be a rigid substrate or a flexible substrate or a rigid film or a flexible film.

[0139] The display panel PNL and the substrate SUB for forming the display panel PNL may include a display area DA for displaying an image and a non-display area NDA except the display area DA.

[0140] The pixel PXL may be disposed in the display area DA. The pixel PXL may include a light emitting element LD. Various lines, pads, and / or built-in circuits connected to the pixel PXL in the display area DA may be disposed in the non-display area NDA. In some embodiments, the pixel PXL may be arranged in the display area DA in various structures and / or in various ways.

[0141] In some embodiments, two or more pixels PXL emitting light of different colors may be arranged (or formed) in the display area DA. In an example, the pixel PXL may include a first pixel PXL1 emitting light of a first color, a second pixel PXL2 emitting light of a second color, and a third pixel PXL3 emitting light of a third color. At least one first pixel PXL1, at least one second pixel PXL2, and at least one third pixel PXL3 disposed adjacent to each other may form a pixel unit capable of emitting light of various colors. For example, each of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may be a sub-pixel emitting light of a certain color. In some embodiments, the first pixel PXL1 may be a red pixel to emit red light, the second pixel PXL2 may be a green pixel to emit green light, and the third pixel PXL3 may be a blue pixel to emit blue light. However, the embodiment is not limited thereto.

[0142] In an embodiment, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may have a light-emitting element of a first color, a light-emitting element of a second color, and a light-emitting element of a third color as a light source to emit light of a first color, light of a second color, and light of a third color, respectively. In another example, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may have a light-emitting element that emits light of the same color, and may include a color conversion layer and / or a color filter of different colors disposed on each light-emitting element to emit light of a first color, light of a second color, and light of a third color, respectively. However, the color, type, and / or quantity of the pixel PXL of each pixel unit are not limited. For example, the color of the light emitted by each pixel PXL may be changed differently.

[0143] The pixel PXL may include at least one light source driven by a specific control signal (e.g., a scan signal and a data signal) and / or a specific power supply (e.g., a first power supply and a second power supply). In an embodiment, each pixel PXL may be formed as an active pixel. However, the type, structure and / or driving method of the pixel PXL applied to the display device are not limited. For example, various structures and / or driving methods may be used to form each pixel PXL as a pixel of a passive light-emitting display device or an active light-emitting display device.

[0144] Fig.17 It is along Fig.16 A schematic cross-sectional view taken along line II' shown in FIG. Fig.17 In the figure, it is schematically shown Fig.16 2 . The structure of the pixel PXL included in the display panel PNL shown in FIG.

[0145] Reference Figure 1 , Figure 2 , Fig.16 and Fig.17 , the pixel PXL may include a substrate SUB, a pixel circuit layer PCL and a display element layer DPL.

[0146] The substrate SUB may be a rigid substrate or a flexible substrate. In an example, the substrate SUB may include a rigid material or a flexible material. In an example, the flexible material may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. However, this is merely illustrative, and the material included in the substrate SUB is not limited thereto.

[0147] The pixel circuit layer PCL may be disposed on the substrate SUB. The pixel circuit layer PCL may include a buffer layer BFL, a transistor T, a gate insulating layer GI, a first interlayer insulating layer ILD1, a second interlayer insulating layer ILD2, a contact hole CH, and an insulating layer INS.

[0148] The buffer layer BFL may be disposed on the substrate SUB. The buffer layer BFL may prevent impurities from diffusing (or penetrating) from the outside. The buffer layer BFL may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and such as aluminum oxide (AlO x ) is at least one of the metal oxides.

[0149] The transistor T may be a thin film transistor. In an example, the transistor T may be a driving transistor among thin film transistors. The transistor T may include a semiconductor layer SCL, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0150] The semiconductor layer SCL may be disposed on the buffer layer BFL. The semiconductor layer SCL may include at least one of polycrystalline silicon, amorphous silicon, and an oxide semiconductor.

[0151] The semiconductor layer SCL may include a first contact region contacting the source electrode SE and a second contact region contacting the drain electrode DE.

[0152] The first contact region and the second contact region may correspond to the semiconductor pattern layer doped with impurities. The region between the first contact region and the second contact region may be a channel region. The channel region may correspond to the intrinsic semiconductor pattern layer not doped with impurities.

[0153] The gate insulating layer GI may be formed on the semiconductor layer SCL. The gate insulating layer GI may include an inorganic material. In an example, the gate insulating layer GI may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ). In some embodiments, the gate insulating layer GI may include an organic material.

[0154] The gate electrode GE may be disposed on the gate insulating layer GI. The position of the gate electrode GE may correspond to the position of the channel region of the semiconductor layer SCL. For example, the gate electrode GE may be disposed on the channel region of the semiconductor layer SCL with the gate insulating layer GI disposed therebetween.

[0155] The first interlayer insulating layer ILD1 may be disposed on the gate electrode GE. Similar to the gate insulating layer GI, the first interlayer insulating layer ILD1 may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ) at least one of.

[0156] The source electrode SE and the drain electrode DE may be disposed on the first interlayer insulating layer ILD1. The source electrode SE may contact the first contact region of the semiconductor layer SCL by penetrating the gate insulating layer GI and the first interlayer insulating layer ILD1, and the drain electrode DE may contact the second contact region of the semiconductor layer SCL by penetrating the gate insulating layer GI and the first interlayer insulating layer ILD1.

[0157] The second interlayer insulating layer ILD2 may be disposed on the source electrode SE and the drain electrode DE. Similar to the first interlayer insulating layer ILD1 and the gate insulating layer GI, the second interlayer insulating layer ILD2 may include an inorganic material. The inorganic material may include at least one of the materials exemplified by the materials of the first interlayer insulating layer ILD1 and the gate insulating layer GI (e.g., silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x )). In some embodiments, the second interlayer insulating layer ILD2 may include an organic material.

[0158] The insulating layer INS may have a form including an organic insulating layer, an inorganic insulating layer, or an organic insulating layer provided on an inorganic insulating layer.

[0159] The insulating layer INS may include a contact hole CH connected (eg, electrically connected) to a region of the drain electrode DE.

[0160] The display element layer DPL may be disposed on the pixel circuit layer PCL. The display element layer DPL may include a pixel electrode PE, a light emitting element LD, a connection electrode CE, a protection layer PVX, and an encapsulation layer ENC.

[0161] The pixel electrode PE (or the first electrode) may be disposed on the insulating layer INS. The pixel electrode PE may be an anode electrode. The pixel electrode PE may include at least a conductive material. In an example, the pixel electrode PE may include copper (Cu), gold (Au), silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or any mixture thereof, as well as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium oxide (In 2 O 3 ). However, the embodiment is not limited thereto.

[0162] At least a portion of the connection electrode CE (or the second electrode) may be disposed on the protective layer PVX, and at least another portion of the connection electrode CE may be connected (e.g., electrically connected) to the end of the light emitting element LD. The connection electrode CE may be formed in a plate shape on the display area DA, but the embodiment is not limited thereto. The connection electrode CE may include a transparent conductive material (or transparent conductive substance) of a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium-doped zinc oxide (GZO), zinc tin oxide (ZTO), gallium tin oxide (GTO), and fluorine-doped tin oxide (FTO). In some embodiments, the connection electrode CE may include a transparent conductive material (or transparent conductive substance) such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag).

[0163] An electrical signal flowing along the third direction DR3 may be provided between the pixel electrode PE and the connection electrode CE. When the electrical signal is provided, the light emitting element LD may emit light. For example, the electrical signal may flow in the light emitting element LD in a direction from the first end EP1 to the second end EP2 or in a direction from the second end EP2 to the first end EP1. The direction along which the electrical signal flows may be perpendicular to the periphery of the substrate SUB.

[0164] The polarity of the pixel electrode PE and the polarity of the connection electrode CE may be different from each other. In the case where the pixel electrode PE is a cathode electrode, the connection electrode CE may be an anode electrode. In the case where the pixel electrode PE is an anode electrode, the connection electrode CE may be a cathode electrode. Hereinafter, a case where the pixel electrode PE is an anode electrode and the connection electrode CE is a cathode electrode is described.

[0165] The pixel electrode PE and the connection electrode CE may be spaced apart from each other. The pixel electrode PE may be connected (eg, electrically connected) to the contact hole CH to provide an electrical signal provided from the transistor T to the light emitting element LD.

[0166] In the case of providing an electrical signal, the light emitting element LD may emit light. The light emitting element LD may emit light along a third direction DR3. The light emitting element LD may be arranged on the pixel electrode PE. The light emitting element LD may be arranged so that the first end EP1 may face the pixel electrode PE. The light emitting element LD may be arranged so that the second end EP2 of the light emitting element LD may face the connecting electrode CE. The first end EP1 of the light emitting element LD may be connected (e.g., electrically connected) to the pixel electrode PE, and the second end EP2 of the light emitting element LD may be connected (e.g., electrically connected) to the connecting electrode CE. For example, the first semiconductor layer 11 of the light emitting element LD may be connected (e.g., electrically connected) to the pixel electrode PE, and the second semiconductor layer 13 (or electrode layer 14) of the light emitting element LD may be connected (e.g., electrically connected) to the connecting electrode CE.

[0167] At least a portion of the first end surface S1 (e.g., lower surface) of the light emitting element LD may be in contact with (e.g., physically in contact with) the pixel electrode PE. At least a portion of the second end surface S2 (e.g., upper surface) of the light emitting element LD may be in contact with (e.g., physically in contact with) the connection electrode CE.

[0168] The area of ​​the light emitting element LD in contact with the pixel electrode PE may be smaller than the area of ​​the light emitting element LD in contact with the connection electrode CE. For example, the first end surface S1 of the light emitting element LD may be connected to the pixel electrode PE so that a certain contact area may be formed. The second end surface S2 of the light emitting element LD may be connected to the connection electrode CE so that a contact area greater than a certain contact area may be formed.

[0169] The protective layer PVX may surround the light emitting element LD. The protective layer PVX may remove the step difference caused by the light emitting element LD, etc. The protective layer PVX may include an organic insulating material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, or benzocyclobutene (BCB). However, the embodiment is not limited thereto.

[0170] The encapsulation layer ENC may be disposed on the connection electrode CE. The encapsulation layer ENC may be disposed at an outer portion of the display element layer DPL, thereby flattening a single component. The encapsulation layer ENC may include an organic material or an inorganic material, but is not limited to a specific material.

[0171] According to an embodiment, the light emitting element LD may have different widths (e.g., diameters D1 and D2) relative to regions and / or components. For example, the first semiconductor layer 11 included in the light emitting element LD may include a first component 11_1, a second component 11_2, and a third component 11_3 between the first component 11_1 and the second component 11_2, and the third component 11_3 may have an inverted truncated cone shape.

[0172] The side surface of the third component 11_3 may have a certain angle with respect to the surface (e.g., the upper surface and / or the lower surface) corresponding to the end (e.g., the opposite end) of the light emitting element LD, so that the light generated from the active layer included in the light emitting element LD can be guided in the light emission direction. Therefore, the light emission efficiency of the light emitting element LD can be improved.

[0173] In summarizing the detailed description, it will be appreciated by those skilled in the art that many changes and modifications may be made to the embodiments without departing substantially from the principles and spirit and scope of the disclosure. Therefore, the disclosed embodiments are used in a general and descriptive sense only and not for the purpose of limitation.

Claims

1. A light-emitting element, wherein the light-emitting element include: a first end surface and a second end surface, facing each other; A first semiconductor layer, disposed at the first end surface; An active layer, disposed on the first semiconductor layer; A second semiconductor layer is disposed on the active layer; as well as an electrode layer, disposed on the second semiconductor layer and at the second end surface, wherein: The first semiconductor layer includes a first component, a second component disposed on the first component and adjacent to the active layer, and a third component disposed between the first component and the second component. A width of the first component and a width of the second component are different from each other, and The third component has different widths at different length positions.

2. The light emitting element according to claim 1, in, Each of the first part and the second part of the first semiconductor layer has a cylindrical shape, and The width of the second component is greater than the width of the first component.

3. The light-emitting element according to claim 2, in, The width of the third component of the first semiconductor layer increases as approaching the second component from the first component.

4. The light emitting element according to claim 3, in, The third portion of the first semiconductor layer has a frustoconical shape.

5. The light emitting element according to claim 3, in, A side surface of the third component has a slope of an angle relative to the first end surface of the light emitting element.

6. The light emitting element according to claim 5, in, The angle is in the range of about 120 degrees or more.

7. The light emitting element according to claim 2, in, Each of the active layer, the second semiconductor layer, and the electrode layer has a cylindrical shape.

8. The light-emitting element according to claim 7, in, A width of the active layer, a width of the second semiconductor layer, a width of the electrode layer, and the width of the second portion of the first semiconductor layer are substantially the same as one another.

9. The light-emitting element according to claim 1, further comprising: include: A reflective layer surrounds a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer.

10. The light emitting element according to claim 9, in, The reflective layer includes a reflective metal material.

11. The light-emitting element according to claim 1, further comprising: include: An insulating film surrounds a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer.

12. The light emitting element according to claim 11, in, The insulating film exposes the first end surface of the light emitting element which is a lower surface of the first semiconductor layer, and exposes the second end surface of the light emitting element which is an upper surface of the electrode layer.

13. A display device, the display device include: Pixels, including: a first electrode; a second electrode; and A light emitting element comprising a first end surface electrically connected to the first electrode and a second end surface electrically connected to the second electrode, wherein: The light emitting element includes: a first semiconductor layer disposed at the first end surface; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and an electrode layer disposed on the second semiconductor layer and disposed at the second end surface. The first semiconductor layer includes: a first component; a second component disposed on the first component and adjacent to the active layer; and a third component disposed between the first component and the second component. A width of the first component and a width of the second component are different from each other, and The third component has different widths at different length positions.

14. The display device according to claim 13, in, Each of the first part and the second part of the first semiconductor layer has a cylindrical shape, and The width of the second component is greater than the width of the first component.

15. The display device according to claim 14, in, The width of the third component of the first semiconductor layer increases as approaching the second component from the first component.

16. A method for manufacturing a light-emitting element, the method comprising: The following steps are involved: forming a pattern mask on the first substrate; sequentially forming a first semiconductor layer, an active layer, a second semiconductor layer, and an electrode layer on the first substrate on which the pattern mask is formed; sequentially forming a mask layer and an etching pattern layer on the electrode layer; forming a first light emitting stacked member by patterning at least a portion of each of the first semiconductor layer, the active layer, the second semiconductor layer, and the electrode layer in a direction from the electrode layer toward the first semiconductor layer through a first etching process using the mask layer and the etching pattern layer; separating the first light-emitting stacked component from the first substrate; forming a second light emitting stack member by patterning a side surface of the first semiconductor layer, a side surface of the active layer, a side surface of the second semiconductor layer, and a side surface of the electrode layer in a direction from the first semiconductor layer to the electrode layer through a second etching process that patterns at least a portion of the first light emitting stack member; as well as The second light emitting stacked structure is attached to a second substrate.

17. The method of claim 16, in, The step of forming the second light emitting stacked member includes etching the first semiconductor layer so that at least a portion of the first semiconductor layer has different widths at different length positions.

18. The method of claim 16, further comprising: include: A reflective layer is formed on the side surface of the first semiconductor layer, the side surface of the active layer, the side surface of the second semiconductor layer, and the side surface of the electrode layer of the second light emitting stack member.

19. The method of claim 16, further comprising: include: An insulating film is formed on the side surface of the first semiconductor layer, the side surface of the active layer, the side surface of the second semiconductor layer, and the side surface of the electrode layer of the second light emitting stack member.

20. The method of claim 16, in, The first etching process is a dry etching process, and The second etching process is a wet etching process.

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