Iris comparison method and comparison equipment
By parallel comparison of iris features on the graphics processor, the performance problem that traditional central processors cannot efficiently handle a large number of iris features is solved, and fast and efficient iris feature comparison is achieved, improving the performance and user experience of the system.
Patent Information
- Application Number
- CN202411238270.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-04
- Publication Date
- 2024-12-24
AI Technical Summary
Traditional iris recognition programs run in a central processor and cannot efficiently complete the comparison of large amounts of iris feature, resulting in poor performance, especially when comparing iris feature in millions or tens of millions.
Design a method to load iris feature data into the video memory of the graphics processor, and compare it in parallel through the multi-core architecture of the graphics processor, and use the data processing unit to compare the iris features in the data packet to be detected to generate a comparison. scores and store the results through the central processor.
Through the parallel computing power of the graphics processor, the efficiency of iris feature alignment is significantly improved, the performance bottlenecks when a large number of iris feature alignment is adapted to the performance bottlenecks, and the stability and user experience of the system are improved.
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Figure CN119181129A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of biometrics, and in particular to a method and device for implementing iris matching. Background Art
[0002] Iris recognition is a method of identifying people based on the iris in the eye. It is widely used in security equipment (such as access control) and places with high confidentiality requirements. The structure of the human eye is composed of sclera, iris, pupil, lens, retina and other parts. The iris is a circular part located between the black pupil and the white sclera, which contains many interlaced spots, filaments, crowns, stripes, crypts and other detailed features. Moreover, after the iris is formed during the fetal development stage, it will remain unchanged throughout the life course. These characteristics determine the uniqueness of the iris characteristics, and also determine the uniqueness of identity recognition. Therefore, the iris characteristics of the eye can be used as the object of identity recognition for each person.
[0003] Traditional iris recognition programs run in the central processing unit (CPU), relying on the computing power of the CPU to compare iris features. However, when the number of iris features to be compared is large (such as millions or tens of millions), the performance of iris feature comparison becomes particularly important. When using the CPU for comparison, it is limited by the CPU architecture (SIMD) and the number of CPU cores, and cannot efficiently complete the comparison work, thus affecting the user experience. The graphics processing unit (GPU) has powerful parallel computing capabilities. The multi-core architecture (SIMT) of the GPU enables the GPU to process multiple sets of iris feature data simultaneously, which is very suitable for parallel comparison of iris features.
[0004] Therefore, it is necessary to design an iris matching method that can perform iris feature matching on GPU to solve the problem that the performance of CPU cannot meet the low efficiency when matching a large number of iris features. Summary of the invention
[0005] In view of this, it is necessary to provide an iris comparison method and a comparison device for comparing iris features using a graphics processor to solve the above problems.
[0006] The embodiment of the present application provides a method for implementing iris comparison, including:
[0007] S01: Load the p collected iris feature data into the iris comparison device and pack them into n features per pack, obtain m data packets to be detected and load the data packets to be detected into the video memory of the graphics processor;
[0008] S02 evenly distributes the iris feature data in one of the data processing packages to g data processing units;
[0009] S03 simultaneously drives g data processing units to compare the iris features in the data packet to be detected, and obtains a comparison score;
[0010] S04 repeats step S02 and step S03 until all m data packets to be detected are detected.
[0011] In at least one embodiment of the present application, the specific steps of step S01 include:
[0012] S011 evenly distributes p iris feature data into m data groups;
[0013] S012: Flatten the n iris feature data in the data group into continuous memory storage to obtain a data packet to be detected.
[0014] In at least one embodiment of the present application, before step S01, the method further includes the following steps:
[0015] S05: Calculate the number n of features in each data packet to be detected according to the number Y of the graphic processors in the iris comparison device.
[0016] In at least one embodiment of the present application, the specific steps of step S05 are:
[0017] S051: Calculate the number u of the to-be-detected data packets that need to be packaged according to the number Y of the graphic processors in the iris comparison device, where u=Y=m;
[0018] S052 calculates the number of features n in each packet of data to be detected according to the number of iris feature data p collected and the number of data packets to be detected u that need to be packaged.
[0019] In at least one embodiment of the present application, the specific steps of step S03 include:
[0020] S031 sets the number a of the iris feature data that a calculation group needs to calculate and the number c of threads that the data processing unit needs to compare one iris feature data;
[0021] S032 the data processing unit distributes the n iris feature data to b calculation groups;
[0022] S033 simultaneously starts b computing groups to compare the iris feature data in parallel, each computing group compares a pieces of the iris feature data in parallel, so as to complete the comparison of n pieces of the iris feature data;
[0023] S034 generates a comparison score based on the comparison result of the iris features.
[0024] In at least one embodiment of the present application, step S04 further includes the following steps:
[0025] S06: Copy the comparison score to the central processor of the iris processing device for storage.
[0026] In at least one embodiment of the present application, a graphics processor includes a plurality of data processing units.
[0027] In at least one embodiment of the present application, a central processing unit stores a computer program.
[0028] In at least one embodiment of the present application, an iris comparison device includes a central processing unit and a graphics processing unit.
[0029] The iris matching method and matching device provided above use a graphics processing unit (GPU) to match iris features, and utilize the parallel computing capability of the graphics processing unit that is superior to that of the central processing unit (CPU) to simultaneously match multiple groups of iris features in parallel, thereby quickly processing a large number of iris features to adapt to the problem that the traditional matching method using the CPU for iris matching is time-consuming when the number of iris features to be matched is large (such as millions or tens of millions). BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 A flowchart of an iris matching method;
[0031] Figure 2 is a flowchart of the detailed steps of step S01;
[0032] Figure 3 is a flowchart of the detailed steps of step S03;
[0033] Figure 4 is a flowchart of the detailed steps of step S05;
[0034] Figure 5 is a structural block diagram of a graphics processor;
[0035] Figure 6 This is a structural block diagram of the iris comparison device;
[0036] Figure 7 A flow chart showing the allocation of iris feature data in a packet to be detected to g stream processors.
[0037] Main component symbols
[0038] 100, iris comparison device; 200, graphics processor; 201, data processing unit; 300, central processing unit; 400, iris data features; 500, data packet to be detected. DETAILED DESCRIPTION
[0039] The embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.
[0040] It should be noted that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a central component at the same time. When a component is considered to be "located on" another component, it may be directly located on the other component or there may be a central component at the same time. The terms "top", "bottom", "upper", "lower", "left", "right", "front", "back", and similar expressions used herein are for illustrative purposes only.
[0041] The embodiment of the present application provides a method for implementing iris comparison, including:
[0042] S01: Load the p collected iris feature data into the iris comparison device and pack them into n features per pack, obtain m data packets to be detected and load the data packets to be detected into the video memory of the graphics processor;
[0043] S02 evenly distributes the iris feature data in one of the data processing packages to g data processing units;
[0044] S03 simultaneously drives g data processing units to compare the iris features in the data packet to be detected, and obtains a comparison score;
[0045] S04 repeats step S02 and step S03 until all m data packets to be detected are detected. The iris matching method and matching device provided above use a graphics processing unit (GPU) to match iris features, and use the parallel computing capability of the graphics processing unit that is superior to that of the central processing unit (CPU) to simultaneously match multiple groups of iris features in parallel, thereby quickly processing a large number of iris features, so as to adapt to the problem that the traditional iris matching method using the CPU for iris matching is time-consuming when the number of iris features to be matched is large (such as millions or tens of millions).
[0046] Some embodiments of the present application are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.
[0047] See also Figure 1-Figure 7 , an embodiment of the present application provides a method for implementing iris comparison, comprising:
[0048] S01 loads the collected p iris feature data 400 into the iris comparison device and packages them into n features per package to obtain m data packets 500 to be detected and loads the data packets 500 to be detected into the video memory of the graphics processor 200 .
[0049] S02 evenly distributes the iris feature data 400 in one data processing package to g data processing units 201 .
[0050] S03 drives g data processing units 201 simultaneously to compare the iris features in the data packet 500 to be detected, and obtains a comparison score.
[0051] S04 repeats step S02 and step S03 until all the m data packets 500 to be detected are detected.
[0052] Specifically, step S01 loads the p collected iris feature data 400 into the iris comparison device and packages them according to n features per package, obtains m data packets 500 to be detected and loads the data packets 500 to be detected into the video memory of the graphics processor 200. The main function of this step is to group and package a large amount of collected iris feature data 400, and load these packaged data packets into the video memory of the graphics processor 200 for subsequent parallel processing. Through the packaging process, data can be effectively managed and allocated, making the subsequent comparison process more efficient. By packaging and loading the data into the video memory, the parallel computing capability of the graphics processor 200 can be fully utilized, thereby greatly improving the data processing efficiency. The packaged data can be quickly called and processed, reducing data transmission and loading time. In addition, this method helps to avoid data confusion or repeated processing when processing a large amount of iris feature data 400. Step S02 distributes the iris feature data 400 in one of the data processing packages to g data processing units 201 on average. The "data processing unit 201" is the most basic computing module in the graphics processor 200 (GPU) or other parallel computing hardware. They are the core components for performing specific computing tasks. Understanding the detailed working principle of the "data processing unit 201" is very important for mastering the parallel computing capability, efficiency optimization and application of the graphics processor 200 in specific tasks (such as iris matching, etc.). The data processing unit 201 usually refers to the computing core inside the GPU, which is the smallest functional unit for performing parallel tasks. In different GPU architectures, the data processing unit 201 has different names. For example, in NVIDIA GPU, the data processing unit 201 is usually called a CUDA core. In AMD's GPU architecture, it is called a stream processor. Each data processing unit 201 performs basic instructions such as floating-point calculations, integer operations and logical operations. Multiple data processing units 201 form a computing group (such as Warp or Wavefront) to jointly perform the assigned tasks. The data processing unit 201 is the core of the parallel computing capability of the graphics processor 200. The powerful performance of the GPU comes from its ability to process a large number of data processing units 201 in parallel at the same time. Unlike the few cores of the central processing unit 300 (CPU), the GPU has a large number of data processing units 201 and can execute hundreds or even thousands of threads at the same time. The data processing unit 201 implements parallel task processing by executing the instruction set of the SIMT architecture (single instruction multiple threads). Multiple data processing units 201 execute the same instruction set at the same time, but act on different data sets. The data processing unit 201 is designed to support multiple concurrent threads, and each thread can execute instructions independently. For a large computing task, the GPU will split it into small tasks, and each task is assigned to a thread for processing.The function of this step is to reasonably distribute the packaged iris feature data 400 to multiple data processing units 201, so that each processing unit can process a certain amount of data in a balanced manner, thereby realizing parallel processing. By evenly distributing the data to multiple processing units, the computing power of each processing unit can be fully utilized to avoid overloading or idleness of some units. This can significantly improve the data processing efficiency, especially in the scenario of large-scale data comparison, and can reduce the overall processing time. Step S03 drives g data processing units 201 to compare the iris features in the data packet 500 to be detected at the same time, and obtains a comparison score. In this step, multiple data processing units 201 run simultaneously, compare the iris feature data 400 received respectively, and output a comparison score. This process is the core part of parallel processing and is directly related to the comparison efficiency and accuracy. Since multiple processing units compare at the same time, the comparison time can be greatly shortened, especially when processing a large amount of data, the advantage is more obvious. At the same time, through parallel processing, the accuracy and stability of the comparison can also be improved, and the error that may be generated by a single processing unit due to excessive load can be reduced. Step S04 repeats step S02 and step S03 until all m data packets 500 to be detected are detected. The function of this step is to ensure that all packaged data can be completely processed by cyclically executing data allocation and comparison. This step ensures the integrity of the entire iris comparison process and the continuous operation of the system. Through cyclic processing, it can be ensured that even in the face of a large number of data packets 500 to be detected, the comparison task of all data can be completed efficiently and smoothly. This method not only improves processing efficiency, but also reduces interruptions or delays in the comparison process, and improves system stability and user experience.
[0053] Further, first, a large amount of iris feature data 400 (p pieces) is collected through the iris scanning device, and these data are loaded into the iris comparison device 100. In the device, these data are packaged according to n features per package to form m data packets 500 to be detected. Subsequently, these data packets are loaded into the video memory of the graphics processor 200 and are ready for processing. In the video memory, the iris feature data 400 in the m data packets 500 to be detected are distributed to the g data processing units 201 in the graphics processor 200. This distribution is uniform, ensuring that each processing unit can receive the same amount of feature data. Subsequently, the g data processing units 201 run simultaneously, compare the iris feature data 400 they receive, and output a comparison score. This process is parallel, and multiple processing units work simultaneously, which greatly improves the comparison speed. When one data packet is processed, the system automatically enters the processing of the next data packet, and repeats the distribution and comparison process until all m data packets are processed.
[0054] In a specific example, the specific steps of step S01 include:
[0055] S011 evenly distributes the p iris feature data 400 into m data groups;
[0056] S012: Flatten the n iris feature data 400 in the data group into continuous memory storage to obtain a data packet 500 to be detected.
[0057] Specifically, step S011 evenly distributes p iris feature data 400 into m data groups. The purpose of this step is to evenly divide the total number of p iris feature data 400 into m data groups. The number of data in each data group is fixed (n feature data), and these data groups will be processed independently in subsequent steps. By grouping a large number of iris feature data 400, the processing flow can be simplified so that the data volume of each data group is suitable for the computing power of the parallel processing unit. This can not only effectively utilize system resources, but also ensure the efficiency of data processing. After the data is divided into multiple groups, each data group can be processed in parallel by different data processing units 201, which greatly improves the processing efficiency of the entire system. By evenly distributing the data, it can be ensured that the data volume of each data group is roughly the same, thereby avoiding overload or idleness of some processing units and further improving the overall performance of the system. The n iris feature data 400 in the data group are tiled into continuous memory storage to obtain a data packet 500 to be detected. In this step, the grouped n iris feature data 400 will be tiled (i.e., linearly arranged) in the memory and stored as a continuous memory block. This continuous memory block is the "data packet to be detected 500". Flattening and storing the data in the form of continuous memory can simplify the data access operation of the processor or data processing unit 201. Continuous memory storage helps to reduce memory access latency and can make full use of the cache mechanism to improve data access efficiency.
[0058] In a specific example, before step S01, the method further includes the following steps:
[0059] S05 Calculate the number n of features in each to-be-detected data packet 500 according to the number Y of the graphic processors 200 in the iris comparison device 100 .
[0060] Specifically, step S05 is a preparatory step before executing S01, and its main purpose is to calculate the number of features in each data packet 500 to be detected according to the number Y of graphics processors 200 (GPU) in the iris comparison device 100. This is a very critical step because it directly affects the efficiency and resource utilization of the subsequent comparison process. When performing iris feature comparison, multiple data processing units 201 will process different data packets at the same time. In order to fully utilize the parallel computing capability of the graphics processor 200, it is necessary to reasonably allocate the number of features contained in each data packet to ensure that each processing unit can operate at full capacity. By calculating the number of features, the number of iris features that should be contained in each data packet 500 to be detected can be determined, so that the balance of data distribution can be ensured and the processing efficiency can be improved. The size of the number of features determines the processing granularity of each data packet. If the granularity is too large, some processing units may be overloaded and unable to be completed within the expected time; if the granularity is too small, the performance of the processing unit may not be fully utilized. Therefore, reasonable determination is the key. The calculation calculated by this step can optimize the workload of each graphics processor 200, avoid resource waste, and ensure that each data processing unit 201 can operate efficiently. As the system scale expands or the number of graphics processors 200 increases, the data calculated in this step can dynamically adapt to different system configurations to ensure the scalability and flexibility of the system. When the number of graphics processors 200 is increased or decreased, the system can automatically adjust the data packet size by recalculating to adapt to the new hardware configuration.
[0061] In a specific example, the specific steps of step S05 are:
[0062] S051: Calculate the number u of the to-be-detected data packets 500 that need to be packaged according to the number Y of the graphic processors 200 in the iris comparison device 100, where u=Y=m;
[0063] S052 calculates the number n of features in each packet of data 500 to be detected according to the number p of the collected iris feature data 400 and the number u of the data packets 500 to be detected that need to be packaged.
[0064] Specifically, the specific steps S051 and S052 of step S05 are intended to reasonably allocate the number u of data packets 500 to be detected and the number n of features in each data packet according to the number Y of graphics processors 200 (GPUs) in the iris comparison device 100 and the number p of collected iris feature data 400, so as to maximize the processing efficiency of the device. The number u of data packets 500 to be detected is calculated to ensure that the number u of data packets 500 to be detected matches the number Y of graphics processors 200, so that each graphics processor 200 can be evenly allocated to a data packet for processing, thereby making full use of the parallel computing capability of the GPU. In the formula u=Y=m, u represents the number of data packets 500 to be detected, Y represents the number of graphics processors 200, and m represents the total number of data packets. This step ensures that each GPU processes one data packet by setting u=Y=m. By setting u to the value of Y, the balanced distribution of the system load is ensured, and some GPUs are prevented from processing multiple data packets or being idle, thereby improving the processing efficiency and the stability of the system. By reasonably allocating the number of data packets, it is ensured that all GPUs work at the same time and reduce the idle time. Reasonable matching of the number of GPUs and the number of data packets can give full play to the parallel processing capabilities of the GPU and improve the matching speed. The purpose of calculating the number of features n in each packet of data to be detected 500 is to calculate the number of features n that should be included in each data packet based on the total amount of iris feature data 400 p and the number of data packets u, so as to ensure that the processing task volume of each data packet is relatively balanced. The formula is n = p / u, where n represents the number of features in each data packet, p represents the total amount of iris feature data 400, and u is the number of data packets 500 to be detected (i.e., the value of Y).
[0065] In a specific example, the specific steps of step S03 include:
[0066] S031 sets the number a of the iris feature data 400 that a calculation group needs to calculate and the number c of threads that the data processing unit 201 needs to compare one iris feature data 400;
[0067] S032 the data processing unit 201 distributes the n iris feature data 400 to b calculation groups;
[0068] S033: simultaneously start b computing groups to compare the iris feature data 400 in parallel, each computing group compares a pieces of the iris feature data 400 in parallel, so as to complete the comparison of n pieces of the iris feature data 400;
[0069] S034 generates a comparison score based on the comparison result of the iris features.
[0070] Specifically, in the patent solution for iris recognition, the specific steps of step S03 design an efficient parallel computing method, using multiple data processing units 201 in the graphics processor 200 (GPU), and optimizing the comparison process through reasonable task division and thread management. The following is a detailed explanation of the specific role and beneficial effects of each feature, as well as the operation process and possible application scenarios. S031 sets the number a of the iris feature data 400 that a computing group needs to calculate and the number c of threads required for the data processing unit 201 to compare one iris feature data 400. In this step, the system first sets the number a of iris feature data 400 that each computing group (i.e., a task set executed in parallel by multiple threads) needs to process according to the computing resources of the GPU and the computing power of each data processing unit 201, and determines the number c of threads required for each data processing unit 201 when comparing one iris feature. By reasonably setting a and c, the load of the GPU can be balanced, so that all threads and computing resources are fully utilized, avoiding resource waste or overload, and can be flexibly adjusted according to the complexity of the task and the amount of data. The system dynamically allocates the task amount a of each computing group according to the number of features in the current data packet and the capacity of the GPU, and allocates the appropriate number of threads to complete a specific comparison task. This setting allows full use of the parallel computing power of the GPU and improves the comparison efficiency. It is suitable for scenarios where a large number of iris features need to be compared, especially for occasions with high real-time requirements, such as airport security, border inspection, and access control systems. Reasonable task settings can significantly reduce the comparison time and improve the system response speed. S032 The data processing unit 201 allocates n iris feature data 400 to b computing groups. This step allocates n iris feature data 400 to be processed to b computing groups. Each computing group consists of multiple threads and is responsible for processing a specific number of feature data. By allocating data to multiple computing groups, the system can take advantage of the multi-threading advantage of the GPU, allowing multiple computing groups to work in parallel at the same time and maximize the use of hardware resources. This can reduce processing time and improve overall computing efficiency. After the data is loaded into the GPU, the system divides the n iris feature data 400 into several blocks, each of which is allocated to a computing group. In this way, multiple computing groups can start computing at the same time without resource competition or waiting, ensuring efficient parallelism of the entire computing process. S033 simultaneously starts b computing groups to compare the iris feature data 400 in parallel, and each computing group compares a iris feature data 400 in parallel to complete the comparison of n iris feature data 400. This step starts all computing groups so that they can perform the comparison task at the same time, and each computing group processes its own assigned a iris feature data 400. Starting multiple computing groups in parallel can make full use of the parallel processing advantages of the GPU, thereby greatly speeding up the comparison process.This design greatly shortens the processing time and improves the overall efficiency of the system, especially when a large amount of data is processed in parallel. Once the allocation is completed, all computing groups start at the same time, and each performs iris feature comparison on the specific data they are responsible for, using the parallel computing units of the GPU (such as CUDA cores) to process tasks simultaneously. Each group works independently and does not interfere with each other. S034 generates a comparison score based on the comparison results of the iris features. This step generates a comparison score based on the comparison results, which indicates the degree of match between the iris features to be detected and the features stored in the database. After the comparison score is generated, the system can determine whether the recognition is successful based on the set threshold, thereby automatically completing the identity authentication. This method is not only fast, but also ensures the accuracy of the results. After the computing group completes the iris comparison, the system collects all the comparison results and generates the corresponding comparison score. The system can sort or filter by the comparison score to further optimize the recognition process.
[0071] In a specific example, step S04 further includes the following steps:
[0072] S06: Copy the comparison score to the central processor 300 of the iris processing device for storage.
[0073] Specifically, in step S03, the iris features are compared by the data processing unit 201 to generate a comparison score. The comparison score indicates the similarity between the input iris features and the reference iris features stored in the system. The comparison score is the basis for the iris recognition system to finally determine whether there is a match. A higher comparison score means that the input iris features are highly matched with the reference iris features, and a lower score indicates a low degree of match. The GPU is mainly responsible for large-scale parallel computing, such as the comparison process of iris features, while the CPU is responsible for logic control, data management and further processing. Transferring the comparison score to the CPU enables the CPU to continue processing the data, such as comparing the results with a predetermined threshold, updating a database or triggering a system response. By transferring the comparison score generated by the GPU to the CPU, the system can integrate all the comparison results together and centrally manage them by the CPU. This is crucial for subsequent data analysis, report generation and system decision-making. During the transfer process, the system needs to manage the data transfer between the GPU memory and the CPU memory. This may involve the use of technologies such as DMA (direct memory access) to ensure that data is quickly and efficiently transferred from the GPU video memory to the CPU memory. During the transfer process, it is crucial to ensure the integrity and consistency of the comparison score data. Any data transmission error may lead to inaccurate recognition results. Therefore, the system may use a verification mechanism to verify the correctness of data transmission when transferring.
[0074] In a specific example, a graphics processor 200 includes a plurality of data processing units 201 .
[0075] Specifically, the graphics processor 200 (GPU), i.e., the graphics processing unit, is an electronic circuit specially designed for processing graphics and image data. Compared with the traditional central processing unit 300 (CPU), the GPU has more powerful parallel processing capabilities and is suitable for processing a large number of similar computing tasks. The original design of the GPU is to process graphics rendering tasks, and its architecture is specially optimized for parallel computing capabilities. The graphics processor 200 is composed of multiple data processing units 201 (commonly referred to as CUDA cores or stream processors), which can perform computing tasks at the same time. Therefore, the computing power of the graphics processor 200 depends largely on its internal parallel architecture. The multi-core design of the GPU allows it to process multiple data packets at the same time, greatly improving the computing efficiency. The graphics processor 200 can process multiple tasks at a time, which is very suitable for workloads that require parallel computing, such as a large number of feature matching in iris comparison. Compared with the single-thread or small number of thread execution of the CPU, the GPU can run thousands or even more concurrent threads at the same time, greatly improving the processing speed. The data processing unit 201 is the core module in the graphics processor 200 that actually performs computing tasks. These units work together to perform the computing tasks assigned by the graphics processor 200. In the iris matching system, these units are responsible for processing the parallel matching tasks of iris features. Each data processing unit 201 is a small computing core in the graphics processor 200, usually called a stream processor (StreamingProcessor) or a CUDA core (in NVIDIA GPU). Multiple data processing units 201 can process different computing tasks at the same time. The graphics processor 200 adopts a single instruction multiple thread (SIMT) architecture, which means that all data processing units 201 can execute the same instruction set at the same time, but operate on different data. It is very suitable for tasks such as iris matching that require processing multiple input data at the same time. The tasks in the graphics processor 200 will be divided into multiple thread groups (Warp or Block), and the tasks in each thread group will be assigned to multiple data processing units 201 for execution. The data processing unit 201 processes the assigned tasks in parallel and realizes high-speed data calculation through multi-thread scheduling at the hardware level. Through the parallel work of these units, the GPU can quickly and batch complete the comparison between iris features and generate comparison scores.
[0076] In one embodiment, a central processing unit 300 stores a computer program.
[0077] Specifically, the central processing unit 300 (CPU), or central processing unit, is the core component of a computer system and is responsible for interpreting and executing instructions in most computer programs. It is the "command center" of the entire system, and enables the operation of programs by controlling and managing other hardware components. The CPU executes instructions in an instruction set that defines the basic operations that the CPU can perform, such as arithmetic operations, logical operations, data transfer, and control flow operations. The CPU typically contains multiple levels of cache (such as L1, L2, and L3 cache) to speed up data access, and also has the ability to access main memory (RAM). Programs and data are temporarily stored in these caches and memory for processing by the CPU. A computer program is a code consisting of a series of instructions for performing a specific task. Programs are usually stored in binary form in a storage medium (such as a hard disk, solid-state drive, ROM, RAM, etc.) and executed under the control of the CPU.
[0078] In a specific example, an iris comparison device includes a central processing unit 300 and a graphics processing unit 200. When the central processing unit 300 executes the computer program, the iris comparison device implements the steps in the iris comparison method.
[0079] Specifically, this technical feature describes a device specially designed for iris recognition and matching, which includes a central processing unit 300 (CPU) and a graphics processing unit 200 (GPU). It emphasizes the collaborative work of the CPU and GPU, especially how to achieve the various steps of iris matching through the cooperation of the two when the CPU executes the stored computer program. Central processing unit 300 (CPU): As the core control unit of the device, it is responsible for coordinating and managing all aspects of the entire iris matching process. It executes the computer program stored in the device, controls the graphics processing unit 200 according to the program instructions, processes data, manages task allocation, and stores and transmits the final matching results. The graphics processing unit 200 (GPU) is responsible for processing a large amount of iris image data. The GPU has a powerful parallel processing capability and can efficiently handle the feature extraction and matching tasks of iris images. Through the collaborative work of the CPU and GPU, the device completes the entire process from iris image acquisition, feature extraction, to the final matching and result output. The CPU is responsible for scheduling and managing the computing tasks of the GPU to ensure the efficiency and accuracy of the matching process. The CPU executes the instructions in the computer program and manages and schedules the entire matching process, including data loading, feature extraction, matching execution, and result processing. The CPU is responsible for interpreting and executing the computer program stored in its memory and controlling the work of other hardware units according to the program instructions, such as starting the GPU for iris feature matching.
[0080] The above is only an implementation method of the present application. It should be pointed out that a person skilled in the art can make improvements without departing from the inventive concept of the present application, but these improvements are within the scope of protection of the present application.
Claims
1. A method for implementing iris comparison, characterized in that: include: S01: Load the p collected iris feature data into the iris comparison device and pack them into n features per pack, obtain m data packets to be detected and load the data packets to be detected into the video memory of the graphics processor; S02 evenly distributes the iris feature data in one data processing package to g data processing units; S03 simultaneously drives g data processing units to compare the iris features in the data packet to be detected, and obtains a comparison score; S04 repeats step S02 and step S03 until all m data packets to be detected are detected.
2. The method for realizing iris comparison according to claim 1, characterized in that: The specific steps of step S01 include: S011 evenly distribute the p pieces of iris feature data into m data groups; S012: Flatten the n iris feature data in the data group into continuous memory storage to obtain a data packet to be detected.
3. The method for implementing iris comparison according to claim 1, characterized in that: Before step S01, the method further includes the following steps: S05: Calculate the number n of features in each data packet to be detected according to the number Y of the graphic processors in the iris comparison device.
4. The method for realizing iris comparison according to claim 3, characterized in that: The specific steps of step S05 are: S051: Calculate the number u of the to-be-detected data packets that need to be packaged according to the number Y of the graphic processors in the iris comparison device, where u=Y=m; S052 calculates the number of features n in each packet of data to be detected according to the number p of the collected iris feature data and the number u of the data packets to be detected that need to be packaged.
5. The method for implementing iris comparison according to claim 1, characterized in that: The specific steps of step S03 include: S031 sets the number a of the iris feature data that a calculation group needs to calculate and the number c of threads that the data processing unit needs to compare one iris feature data; S032 the data processing unit distributes the n iris feature data to b calculation groups; S033: simultaneously start b computing groups to compare the iris feature data in parallel, each computing group to compare a pieces of iris feature data in parallel, so as to complete the comparison of n pieces of iris feature data; S034 generates a comparison score based on the comparison result of the iris features.
6. The method for implementing iris comparison according to claim 1, characterized in that: The step S04 further includes the following steps: S06: Copy the comparison score to the central processor of the iris processing device for storage.
7. A graphics processor, comprising a plurality of data processing units, characterized in that: The graphics processor is suitable for use in the steps of the method according to any one of claims 1 to 6.
8. A central processing unit storing a computer program, characterized in that: When the central processing unit executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.
9. An iris comparison device, comprising a central processing unit and a graphics processing unit according to any one of claims 1 to 6, characterized in that: When the central processing unit executes the computer program, the iris comparison device implements the steps of the method according to any one of claims 1 to 6.
