Connecting block and power device having the same

Abstract

The present invention provides a connection block and a power device having the same, wherein the connection block has a conductive connection portion and an interconnection portion, wherein the interconnection portion includes a plurality of interconnection units, wherein the conductive connection portion and the interconnection portion are arranged at intervals along a first direction, and the plurality of interconnection units are arranged at intervals along a second direction, and an angle is formed between the first direction and the second direction. The technical solution provided by the present application can solve the problem that the power device in the related art cannot meet the use requirements.

Description

Technical Field

[0001] The present invention relates to the technical field of power devices, and in particular to a connection block and a power device having the same. Background Art

[0002] Power devices are devices used in the field of power electronics to control and convert electrical energy. They are used to perform power conversion functions such as rectification, inversion, chopping, and frequency conversion. They are widely used in power management, motor drive, solar inverter, power system, energy storage and other fields.

[0003] In related technologies, in order to achieve the purpose of passing a large current through a single device, it is usually necessary to use multiple chips in parallel. The internal electrical interconnection of traditional power devices generally adopts metal wire bonding, represented by thick aluminum wire or thick copper wire ultrasonic bonding technology. The interconnection between the chip and the copper layer, as well as the interconnection of multiple parallel chips, is achieved through metal wire bonding.

[0004] However, the use of metal wire bonding has the following disadvantages: due to the small cross-sectional area and limited chip surface bonding area, the current carrying capacity of the metal wire is difficult to meet the requirements of high-power chips; the bonding strength between the metal wire and the chip is relatively low, and the difference in thermal expansion coefficient is large, so it is easy to age and fall off under the temperature shock caused by the turning on and off of the high-power chip; the low heat dissipation capacity of the metal wire makes the power semiconductor module have only single-sided heat dissipation capability, which is not conducive to application in high-temperature environments. Summary of the invention

[0005] The present invention provides a connection block and a power device having the same, so as to solve the problem that the power device in the related art cannot meet the use requirements.

[0006] According to one aspect of the present invention, a connection block of a power device is provided, the connection block having a conductive connection portion and an interconnection portion, the interconnection portion comprising a plurality of interconnection units, the conductive connection portion and the interconnection portion are arranged at intervals along a first direction, the plurality of interconnection units are arranged at intervals along a second direction, and an angle is formed between the first direction and the second direction.

[0007] Furthermore, the connecting block has a first dividing groove, which passes through the lower surface of the connecting block, extends along the second direction and passes through two oppositely arranged side walls of the connecting block, and the conductive connecting part and the plurality of interconnection units are respectively located on both sides of the first dividing groove.

[0008] Furthermore, the groove wall of the first dividing groove includes a first arc segment and a first straight segment connected to one end of the first arc segment, and the lower end of the first straight segment is arranged to intersect with the multiple interconnected units.

[0009] Furthermore, the groove wall of the first dividing groove also includes a second straight segment, the second straight segment is connected to the other end of the first arc segment, and the lower end of the second straight segment is arranged to intersect with the conductive connecting portion.

[0010] Furthermore, the first straight segment and the second straight segment are both vertical segments.

[0011] Further, the distance between the highest point of the first arc segment and the upper surface of the connecting block is L1, the distance between the lower surface of the conductive connecting portion of the connecting block and the upper surface of the connecting block is H1, and H1 / L1 is between 2.2 and 3.2.

[0012] Furthermore, the vertical height h1 of the first straight section is between 0.4 mm and 0.6 mm.

[0013] Furthermore, the ratio between the width B1 of the first dividing groove and the width B2 of the connecting block is between 0.3 and 0.5.

[0014] Furthermore, the connecting block has a plurality of second dividing grooves, which pass through the lower surface of the connecting block. The plurality of second dividing grooves are arranged at intervals along the second direction, each second dividing groove is located between two adjacent interconnected units, and the second dividing grooves extend along the first direction. One end of each second dividing groove is connected to the first dividing groove, and the other end of each second dividing groove passes through the side wall of the connecting block.

[0015] Furthermore, the groove wall of the second dividing groove includes a second arc segment and a third straight segment and a fourth straight segment connected to both ends of the second arc segment, and the lower end of the third straight segment and the lower end of the fourth straight segment are respectively intersected with the interconnection unit.

[0016] Further, the distance between the highest point of the second arc segment and the upper surface of the connecting block is L2, the height between the lower surface of the interconnection unit and the upper surface of the connecting block is H2, and L2 / H2 is between 0.4 and 0.55.

[0017] Furthermore, the vertical height of the third straight segment and the vertical height of the fourth straight segment are both h2, and h2 is between 0.25 mm and 0.35 mm.

[0018] Further, a ratio between a width B3 of the second separation groove and a width B4 of the interconnection unit is between 1.2 and 1.8.

[0019] Further, a lower surface of the interconnection unit is higher than a lower surface of the conductive connection portion.

[0020] Further, the top surface of the connecting block is a plane; and / or the connecting block is a copper block.

[0021] According to another aspect of the present invention, a power device is provided, comprising: a substrate having a first conductive surface and a second conductive surface spaced apart; a plurality of chips disposed on the substrate, wherein drains of the plurality of chips are conductively connected to the first conductive surface; a connecting block disposed on the substrate, wherein a conductive connecting portion of the connecting block is electrically connected to the second conductive surface, and a plurality of interconnection units of the connecting block are conductively connected to sources of the plurality of chips one by one, respectively, and the connecting block is the connecting block provided above.

[0022] According to another aspect of the present invention, a power device is provided, comprising: a liner, the upper surface of the liner having a first conductive layer, a second conductive layer and a third conductive layer arranged at intervals, the second conductive layer being located between the first conductive layer and the third conductive layer; a chip assembly, comprising a plurality of first chips and a plurality of second chips, the drain of each first chip being conductively connected to the second conductive layer, and the drain of each second chip being conductively connected to the third conductive layer; a connecting block, the conductive connecting portion of the connecting block being electrically connected to the first conductive layer, a plurality of interconnection units being conductively connected to the sources of the plurality of first chips in a one-to-one correspondence, the connecting block being the connecting block provided above; and an interconnection member, the second conductive layer being conductively connected to the sources of the plurality of second chips via the interconnection member.

[0023] By applying the technical solution of the present invention, the connection block of the power device has a conductive connection part and an interconnection part. When in use, the multiple interconnection units of the interconnection part are electrically connected to the source electrodes of multiple chips one by one, and the conductive connection part is electrically connected to the conductive layer on the upper surface of the liner, so that the chip and the liner are electrically connected, and the heat of the chip is transferred to the conductive layer. In addition, compared with the metal wire bonding connection method, the conductive connection part and the interconnection unit have a larger flow area, which can withstand large currents to meet the current requirements of high-power chips, and the conductive connection part and the conductive layer, and the interconnection unit and the source electrode of the chip have a larger connection area, which improves the connection strength between the interconnection interfaces and reduces the aging and shedding caused by the temperature shock caused by the chip switching. At the same time, the connection block is used to conduct the heat generated by the chip to the conductive layer by utilizing its larger volume, thereby improving the heat conduction capacity, making the temperature more uniform everywhere, accelerating the heat dissipation of the chip, and utilizing the exposed surfaces of the connection block for heat dissipation, thereby reducing the temperature inside the power device, and further reducing the aging and shedding caused by the temperature shock caused by the chip switching. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0025] Figure 1 A schematic diagram showing the structure of a connection block of a power device provided in an embodiment of the present invention is shown;

[0026] Figure 2 Another structural schematic diagram of a connection block of a power device provided according to an embodiment of the present invention is shown;

[0027] Figure 3 A bottom view of a connection block of a power device provided according to an embodiment of the present invention is shown;

[0028] Figure 4 A left side view of a connection block of a power device provided according to an embodiment of the present invention is shown;

[0029] Figure 5 A front view of a connection block of a power device provided according to an embodiment of the present invention is shown;

[0030] Figure 6 Another left side view of the connection block of the power device provided according to the embodiment of the present invention is shown;

[0031] Figure 7 Another front view of a connection block of a power device provided according to an embodiment of the present invention is shown;

[0032] Figure 8 A schematic diagram of the structure of a power device provided in an embodiment of the present invention is shown;

[0033] Fig. 9 Another schematic structural diagram of a power device provided according to an embodiment of the present invention is shown;

[0034] Fig.10 An assembly diagram of a first liner of a power device provided in an embodiment of the present invention is shown;

[0035] Fig.11 An assembly diagram of a second liner of a power device provided in an embodiment of the present invention is shown;

[0036] Fig.12 A schematic diagram showing the structure of a connection board of a power device provided in an embodiment of the present invention is shown;

[0037] Fig.13 A packaging diagram of a power device provided according to an embodiment of the present invention is shown.

[0038] The above drawings include the following reference numerals:

[0039] 10. Liner; 11. First conductive layer; 111. First source conductive layer; 112. Second source conductive layer; 12. Second conductive layer; 121. First conductive area; 122. Second conductive area; 123. Avoidance hollow area; 124. First intermediate conductive layer; 125. Second intermediate conductive layer; 13. Third conductive layer; 131. First drain conductive layer; 132. Second drain conductive layer; 14. First gate conductive layer; 15. First auxiliary source conductive layer; 16. Resistor conductive layer; 17. Second gate conductive layer; 18. Second auxiliary source conductive layer; 191. First liner; 192. Second liner;

[0040] 20. chip assembly; 21. first chip; 22. second chip;

[0041] 30. Connecting block; 31. Conductive connecting portion; 32. Interconnecting unit; 33. First dividing groove; 331. First arc segment; 332. First straight segment; 333. Second straight segment; 34. Second dividing groove; 341. Second arc segment; 342. Third straight segment; 343. Fourth straight segment;

[0042] 40. Interconnecting components;

[0043] 50. Resistance;

[0044] 60, power terminal; 61, first power terminal; 62, second power terminal; 63, third power terminal;

[0045] 70, connecting plate; 71, first flat plate; 72, curved plate; 73, second flat plate;

[0046] 80. packaging shell; 81. housing; 82. cover plate;

[0047] L1, the distance between the highest point of the first arc segment and the upper surface of the connecting block;

[0048] H1, the distance between the lower surface of the conductive connection portion of the connection block and the upper surface of the connection block;

[0049] h1, the vertical height of the first straight section; B1, the width of the first dividing groove; B2, the width of the connecting block;

[0050] L2, the distance between the highest point of the second arc segment and the upper surface of the connecting block;

[0051] H2, the height between the lower surface of the interconnection unit and the upper surface of the connection block;

[0052] h2, the vertical height of the third straight segment; B3, the width of the second dividing groove; B4, the width of the interconnected unit. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] like Figures 1 to 7 As shown, an embodiment of the present invention provides a connection block of a power device, wherein the connection block 30 has a conductive connection portion 31 and an interconnection portion, wherein the interconnection portion includes a plurality of interconnection units 32, the conductive connection portion 31 and the interconnection portion are spaced apart along a first direction, and the plurality of interconnection units 32 are spaced apart along a second direction, and an angle is formed between the first direction and the second direction.

[0055] By applying the technical solution of the present invention, the connection block 30 of the power device has a conductive connection part 31 and an interconnection part. When in use, the multiple interconnection units 32 of the interconnection part are electrically connected to the source electrodes of multiple chips one by one, and the conductive connection part 31 is electrically connected to the conductive layer on the upper surface of the liner, so that the chip and the liner are electrically connected, and the heat of the chip is transferred to the conductive layer. In addition, compared with the metal wire bonding connection method, the conductive connection part 31 and the interconnection unit 32 of the connection block 30 have a larger flow area, which can withstand large currents to meet the current requirements of high-power chips, and the conductive connection part 31 and the conductive layer, and the interconnection unit 32 and the source electrode of the chip have a large connection area, which improves the connection strength between the interconnection interfaces and reduces aging and shedding caused by temperature shock caused by the switching of the chip. At the same time, the connecting block 30 is used to conduct the heat generated by the chip to the conductive layer by utilizing its larger volume, thereby improving the heat conduction capacity, making the temperature more uniform everywhere, accelerating the heat dissipation of the chip, and utilizing the exposed surfaces of the connecting block 30 for heat dissipation, thereby reducing the temperature inside the power device and further reducing aging and falling off caused by temperature shock caused by the chip being turned on and off.

[0056] It should be noted that the plurality of interconnection units 32 can be separately arranged and connected to the conductive connection part 31 to form an interconnection part. In this embodiment, the plurality of interconnection units 32 are connected to form an interconnection part, which can make the connection block 30 have greater mechanical strength and heat dissipation area.

[0057] In the related technology, some new power semiconductor modules use copper clips or copper strips to replace metal wire bonding to achieve internal electrical interconnection. They are usually connected to the chip and the liner surface by pressure welding or sintering, and have higher current carrying capacity and heat dissipation capacity than metal wires. However, this technology still has the following disadvantages: copper clips are usually made of thinner copper sheets, with low mechanical strength, easy to deform under pressure or temperature, and difficult to weld or sinter; in order to ensure the consistency of welding or sintering quality of all connection surfaces, copper clips have high requirements for cutting, stamping, bending and other manufacturing process precision, and high design and manufacturing costs; the increase in the number of parallel and series power chips will greatly increase the copper clip manufacturing precision requirements and welding or sintering process difficulty, making copper clips difficult to apply to multi-chip module packaging; in order to ensure the processing performance of copper clips, their thickness is usually small, and the current carrying capacity and heat dissipation capacity are still difficult to meet the requirements of high-power chips.

[0058] By using the connection block 30 provided in this embodiment, while increasing the flow area, improving the current carrying capacity, and enhancing the heat dissipation capacity, the connection block 30 can use a sintering or welding process to achieve the connection of the interconnection interface. Moreover, when using the sintering process, since the upper surface of the connection block 30 is a planar structure, it is beneficial for the pressure head to pressurize and heat the upper surface of the connection block 30.

[0059] Furthermore, due to the use of the connection block 30 of this embodiment, multiple chips can be connected to the conductive layer of the substrate to form an electrical loop, thereby achieving higher packaging efficiency.

[0060] like Figure 2 and Figure 3 As shown, the connection block 30 has a first dividing groove 33, the first dividing groove 33 passes through the lower surface of the connection block 30, the first dividing groove 33 extends along the second direction and passes through two oppositely arranged side walls of the connection block 30, and the conductive connection part 31 and the plurality of interconnection units 32 are respectively located on both sides of the first dividing groove 33. The connection block 30 is divided into the conductive connection part 31 and the interconnection part by the first dividing groove 33, so that the connection block 30 has the advantages of simple structure and easy processing while ensuring the integrity of the connection block 30.

[0061] In this embodiment, by dividing the connection block 30 in the form of grooves, the integrity of the connection block 30 can be ensured, and the connection strength of the interconnection interface can be improved while ensuring the mechanical strength.

[0062] like Figure 6As shown, the groove wall of the first dividing groove 33 includes a first arc segment 331 and a first straight segment 332 connected to one end of the first arc segment 331, and the lower end of the first straight segment 332 is arranged to intersect with the plurality of interconnection units 32. The first straight segment 332 can be used to quickly increase the distance between the lower end of the first arc segment 331 and the conductive layer of the liner, thereby enhancing the insulation performance between the connecting block 30 and the conductive layer of the liner.

[0063] In other embodiments, the groove wall of the first dividing groove 33 may be directly set to a straight segment structure. Compared with the first arc segment 331 of this embodiment, the first arc segment 331 can make the connecting block 30 have greater mechanical strength.

[0064] like Figure 6 As shown, the groove wall of the first dividing groove 33 further includes a second straight segment 333, the second straight segment 333 is connected to the other end of the first arc segment 331, and the lower end of the second straight segment 333 is arranged to intersect with the conductive connecting portion 31. By providing the second straight segment 333, the first straight segment 332 and the second straight segment 333 can be processed at the same time, which has the advantage of easy processing.

[0065] In this embodiment, the first straight section 332 and the second straight section 333 have the same height.

[0066] like Figure 6 As shown, the first straight section 332 and the second straight section 333 are both vertical sections. The use of vertical sections has the advantage of being easy to process and can quickly increase the height of the first dividing groove 33 to quickly increase the distance between the lower end of the first arc section 331 and the conductive layer of the liner.

[0067] In other embodiments, both the first straight section 332 and the second straight section 333 may be configured as inclined structures.

[0068] like Figure 4 As shown, the distance between the highest point of the first arc segment 331 and the upper surface of the connection block 30 is L1, the distance between the lower surface of the conductive connection portion 31 of the connection block 30 and the upper surface of the connection block 30 is H1, and H1 / L1 is between 2.2 and 3.2. The above ratio range can make the connection block 30 have sufficient mechanical strength to improve the stability of the connection block 30 during the pressurization operation, and can ensure that there is a sufficient distance between the first arc segment 331 and the conductive layer of the liner.

[0069] Among them, L1 / H1 can be 2.2, 2.5, 2.7, 2.9, 3, 3.2 and any value between 2.2 and 3.2.

[0070] like Figure 4As shown, the vertical height h1 of the first straight segment 332 is between 0.4 mm and 0.6 mm. With the above size range, the lower end of the first arc segment 331 can have a sufficient distance from the conductive layer of the liner.

[0071] The vertical height h1 of the first straight segment 332 may be 0.4 mm, 0.5 mm, 0.6 mm, or any value between 0.4 mm and 0.6 mm.

[0072] As shown in FIG4 , the ratio between the width B1 of the first separation groove 33 and the width B2 of the connection block 30 is between 0.3 and 0.5. With the above ratio range, it is possible to ensure that the conductive connection portion 31 and the conductive layer of the liner, and the interconnection unit 32 and the upper surface of the chip have sufficient connection areas while ensuring the mechanical strength of the connection block 30.

[0073] The ratio of the width B1 of the first dividing groove 33 to the width B2 of the connecting block 30 may be 0.3, 0.4, 0.5, or any value between 0.3 and 0.5.

[0074] like Figure 7 As shown, the connection block 30 has a plurality of second dividing grooves 34, which penetrate the lower surface of the connection block 30, are arranged at intervals along the second direction, and each second dividing groove 34 is located between two adjacent interconnection units 32. The second dividing grooves 34 extend along the first direction, and one end of each second dividing groove 34 is connected to the first dividing groove 33, and the other end of each second dividing groove 34 penetrates the side wall of the connection block 30. The interconnection part of the connection block 30 is divided into a plurality of interconnection units 32 by the second dividing grooves 34, so that the connection block 30 has the advantages of simple structure and easy processing while ensuring the integrity of the connection block 30.

[0075] like Figure 7 As shown, the groove wall of the second dividing groove 34 includes a second arc segment 341 and a third straight segment 342 and a fourth straight segment 343 connected to both ends of the second arc segment 341, and the lower ends of the third straight segment 342 and the fourth straight segment 343 are respectively arranged to intersect with the interconnection unit 32. The second dividing groove 34 adopting the above structure has the advantages of simple structure and easy processing.

[0076] In this embodiment, the third straight segment 342 and the fourth straight segment 343 can quickly increase the distance between the lower end of the second arc segment 341 and the upper surface of the chip, thereby ensuring a sufficient distance between the second separation groove 34 and the conductive layer of the liner.

[0077] Of course, the groove wall of the second dividing groove 34 may also include only the second arc segment 341 , and the lower end of the second arc segment 341 is respectively arranged to intersect with two adjacent interconnection units 32 .

[0078] It should be noted that, during the sintering process, in order to make the force between the upper surface of the chip and the conductive layer of the lining reasonable so as to avoid excessive force on one side and damage to the chip or the lining, a plurality of arched grooves can be arranged on the conductive connection part 31 during the pressurization operation. The arched grooves are connected with the adjacent second dividing grooves 34 and pass through the side wall of the connecting block 30 away from the second dividing grooves 34, so that each arched groove coincides with the axis of the adjacent second dividing groove 34, and the size of the arched groove is set according to the degree of pressure that the conductive connection part 31 and the interconnection unit 32 are subjected to.

[0079] like Figure 5 As shown, the distance between the highest point of the second arc segment 341 and the upper surface of the connection block 30 is L2, the height between the lower surface of the interconnection unit 32 and the upper surface of the connection block 30 is H2, and L2 / H2 is between 0.4 and 0.55. By adopting the above ratio range, the connection block 30 can have sufficient mechanical strength to improve the stability of the connection block 30 during the pressurization operation, and can ensure that there is a sufficient distance between the second separation groove 34 and the conductive layer of the liner.

[0080] Among them, L2 / H2 can be 0.4, 0.43, 0.46, 0.48, 0.5, 0.52, 0.55 and any value between 0.4 and 0.55.

[0081] In this embodiment, the top of the first dividing groove 33 and the top of the second dividing groove 34 are located at the same height.

[0082] like Figure 5 As shown, the vertical height of the third straight segment 342 and the vertical height of the fourth straight segment 343 are both h2, and h2 is between 0.25 mm and 0.35 mm. With the above size range, the lower end of the second arc segment 341 can have a sufficient distance from the conductive layer of the liner.

[0083] Among them, h2 can be 0.25mm, 0.27mm, 0.3mm, 0.33mm, 0.35mm, and any value between 0.25mm and 0.35mm.

[0084] like Figure 5 As shown, the ratio between the width B3 of the second separation groove 34 and the width B4 of the interconnection unit 32 is between 1.2 and 1.8. With the above ratio range, the second separation groove 34 and the interconnection unit 32 have appropriate sizes, and the connection block 30 has sufficient connection strength while ensuring the connection area between the interconnection unit 32 and the chip.

[0085] The ratio of the width B3 of the second dividing groove 34 to the width B4 of the interconnection unit 32 may be 1.2, 1.4, 1.5, 1.6, 1.8, or any value between 1.2 and 1.8.

[0086] like Figure 6 As shown, the lower surface of the interconnection unit 32 is higher than the lower surface of the conductive connection portion 31. The above structure can be adapted to the upper surface of the chip and the conductive layer of the liner, so that the upper surface of the connection block 30 remains horizontal.

[0087] like Figure 6 As shown, the top surface of the connection block 30 is a plane, and a planar structure is adopted, which can facilitate the pressurization operation when the connection block 30 is connected by a sintering process.

[0088] In this embodiment, the connecting block 30 is a copper block, which has the advantages of good thermal conductivity, electrical conductivity and ductility.

[0089] Another embodiment of the present invention provides a power device, which includes a backing plate 10, a plurality of chips, and a connection block 30. The backing plate has a first conductive surface and a second conductive surface arranged at intervals; the plurality of chips are arranged on the backing plate 10, and the drain electrodes of the plurality of chips are all conductively connected to the first conductive surface; the connection block 30 is arranged on the backing plate 10, the conductive connection portion 31 of the connection block 30 is electrically connected to the second conductive surface, and the plurality of interconnection units 32 of the connection block 30 are conductively connected to the source electrodes of the plurality of chips in a one-to-one correspondence, respectively, and the connection block 30 is the connection block provided above. With the power device, the plurality of interconnection units 32 of the interconnection portion are electrically connected to the source electrodes of the plurality of chips in a one-to-one correspondence, and the conductive connection portion 31 is electrically connected to the second conductive surface on the upper surface of the backing plate, so that the chip can be electrically connected to the backing plate 10, and the heat of the chip can be transferred to the conductive layer. Moreover, compared with the metal wire bonding connection method, the connection block 30 is adopted, and the conductive connection part 31 and the interconnection unit 32 have a larger flow area, which can withstand large currents to meet the current requirements of high-power chips, and the conductive connection part 31 and the conductive layer, and the interconnection unit 32 and the source of the chip have a larger connection area, which improves the connection strength between the interconnection interfaces and reduces the aging and shedding caused by the temperature shock caused by the chip switching. At the same time, the connection block 30 is adopted, and its larger volume is used to conduct the heat generated by the chip to the conductive layer, which improves the heat conduction capacity, makes the temperature more uniform everywhere, accelerates the heat dissipation of the chip, and uses the exposed surfaces of the connection block 30 for heat dissipation, which reduces the temperature inside the power device and further reduces the aging and shedding caused by the temperature shock caused by the chip switching.

[0090] like Figures 8 to 13As shown, another embodiment of the present invention provides a power device, which includes a liner 10, a chip assembly 20, a connecting block 30, and an interconnection member 40. The upper surface of the liner 10 has a first conductive layer 11, a second conductive layer 12, and a third conductive layer 13 arranged at intervals, and the second conductive layer 12 is located between the first conductive layer 11 and the third conductive layer 13; the chip assembly 20 includes a plurality of first chips 21 and a plurality of second chips 22, the drain of each first chip 21 is conductively connected to the second conductive layer 12, and the drain of each second chip 22 is conductively connected to the third conductive layer 13; the conductive connecting portion 31 of the connecting block 30 is electrically connected to the first conductive layer 11, and the plurality of interconnection units 32 are conductively connected to the source of the plurality of first chips 21 one by one, and the connecting block 30 is The connecting block provided above; the second conductive layer 12 is conductively connected to the source electrodes of multiple second chips 22 through the interconnection component 40; wherein the second conductive layer 12 includes a first conductive area 121, a second conductive area 122 and an avoidance hollow area 123 located between the first conductive area 121 and the second conductive area 122, multiple first chips 21 are located in the first conductive area 121, the interconnection component 40 is connected to the second conductive area 122, and the upper surface of the liner 10 is also provided with a first gate conductive layer 14 and a first auxiliary source conductive layer 15, the first gate conductive layer 14 and the first auxiliary source conductive layer 15 are located in the avoidance hollow area 123, the first gate conductive layer 14 is connected to the gate of the first chip 21, and the first auxiliary source conductive layer 15 is connected to the auxiliary source of the first chip 21. By using this power device, compared with the metal wire bonding connection method, the connection block 30 is used, and the conductive connection part 31 and the interconnection unit 32 have a larger flow area, which can withstand large currents to meet the current requirements of the high-power first chip 21, and the conductive connection part 31 and the conductive layer, and the interconnection unit 32 and the source of the first chip 21 have a larger connection area, which improves the connection strength between the interconnection interfaces and reduces the aging and shedding caused by the temperature shock caused by the switching of the first chip 21. At the same time, the connection block 30 is used to conduct the heat generated by the first chip 21 to the conductive layer by utilizing its larger volume, thereby improving the heat conduction capacity, making the temperature more uniform everywhere, accelerating the heat dissipation of the first chip 21, and utilizing the exposed surfaces of the connection block 30 for heat dissipation, thereby reducing the temperature inside the power device, and further reducing the aging and shedding caused by the temperature shock caused by the switching of the first chip 21.

[0091] In this embodiment, the current flows through the second conductive layer 12, the drain of the first chip 21, the source of the first chip 21, the interconnection unit 32 of the connecting block 30, the conductive connection part 31 of the connecting block 30, and the first conductive layer 11 to form a first bridge arm commutation return flow, and the current flows through the third conductive layer 13, the drain of the second chip 22, the source of the second chip 22, the interconnection component 40, and the second conductive layer 12 to form a second bridge arm commutation loop. Since the source electrodes of the multiple first chips 21 and the first conductive layer 11 are electrically connected via the connecting block 30, and the source electrodes of the multiple second chips 22 and the second conductive layer 12 are electrically connected via the interconnection member 40, the conductive connection portion 31 and the multiple interconnection units 32 are arranged on the connecting block 30 and are an integrated structure, the heat of the multiple first chips 21 can be conducted to the first conductive layer 11 through the connecting block 30, and the heat of the multiple first chips 21 can be conducted to each other through the connecting block 30. On the one hand, the junction temperatures of the multiple first chips 21 are made consistent, and on the other hand, the first conductive layer 11 and the second conductive layer 12 can be used to increase the heat dissipation area of ​​the first chip 21, thereby reducing the thermal resistance of the power device.

[0092] Moreover, compared with the bonding wire connection method, the connection block 30 can form a current balancing effect, so that the current at the source of the plurality of first chips 21 is equal, thereby making the entire power device better achieve current balancing. At the same time, the connection block 30 can increase the upper limit of the current, simplify the welding process, and increase reliability.

[0093] It should be noted that the interconnection component 40 may be one component or multiple components, and each second chip 22 corresponds to one interconnection component 40 connected to the first conductive layer 11 .

[0094] In this embodiment, the connection block 30 and the interconnection member 40 have the same structure. The interconnection member 40 can transfer the heat of the plurality of second chips 22 to each other, so that the junction temperature of the plurality of second chips 22 is consistent, and the third conductive layer 13 and the second conductive layer 12 can be used to increase the heat dissipation area of ​​the second chip 22, thereby reducing the thermal resistance of the power device. At the same time, current balancing can be achieved, the upper limit of the current can be increased, the welding process can be simplified, and the reliability can be increased.

[0095] The plurality of first chips 21 form a first chipset, and each first chipset can be electrically connected to the first conductive layer 11 by using the connecting block 30. Similarly, the plurality of second chips 22 form a second chipset, and each second chipset can be electrically connected to the second conductive layer 12 by using the interconnection member 40.

[0096] Moreover, by arranging both the first gate conductive layer 14 and the first auxiliary source conductive layer 15 in the avoidance hollow area 123 formed by the second conductive layer 12, the connection distance between the first gate conductive layer 14 and the gate of the first chip 21 and the connection distance between the first auxiliary source conductive layer 15 and the auxiliary source of the first chip 21 can be reduced, which is beneficial to reduce the length of the bonding wire and facilitate connection.

[0097] In this embodiment, by arranging the first conductive area 121 and the second conductive area 122 on both sides of the avoiding hollow area 123, the first conductive area 121 is arranged close to the first conductive layer 11 and the second conductive area 122 is arranged close to the third conductive layer 13, which is beneficial to the interconnection between the first chip 21 and the first conductive layer 11, and the interconnection between the second chip 22 and the second conductive area 122.

[0098] like Fig.10 and Fig.11 As shown, the power device further includes a plurality of resistors 50, a resistor conductive layer 16 is further provided on the upper surface of the liner 10, there are a plurality of first gate conductive layers 14, and the plurality of first gate conductive layers 14 are respectively and electrically connected to the gates of the plurality of first chips 21 in a one-to-one correspondence, and the two pins of each resistor 50 are respectively electrically connected to the resistor conductive layer 16 and the corresponding first gate conductive layer 14. By using the resistor conductive layer 16 to connect the resistor 50 in series in the driving circuit, the resistor 50 can be used to eliminate gate oscillation, reduce the power loss of the first chip 21, and improve the switching speed of the power device.

[0099] In this embodiment, the current flows through the resistor conductive layer 16 , the resistor 50 , the first gate conductive layer 14 , the gate of the first chip 21 , the source of the first chip 21 , and the first auxiliary source conductive layer 15 to form a driving circuit.

[0100] like Fig.10 As shown, the plurality of first chips 21 are arranged along the length direction of the second conductive layer 12, and the length direction of the avoidance hollow area 123 is parallel to the length direction of the second conductive layer 12. With the above arrangement, the length direction of the second conductive layer 12 can be fully utilized to set the avoidance hollow area 123.

[0101] In this embodiment, the first gate conductive layer 14, the first auxiliary source conductive layer 15, and the resistor conductive layer 16 are all strip structures, and a plurality of first gate conductive layers 14 are arranged along the length direction of the second conductive layer 12. The length direction of the hollow area 123 is fully utilized to improve space utilization.

[0102] The power device further includes a first gate terminal and a first auxiliary source terminal, the first gate terminal is electrically connected to the resistive conductive layer 16, and the first auxiliary source terminal is electrically connected to the first auxiliary source conductive layer 15. The first gate terminal and the first auxiliary source terminal are located on a side of the first conductive layer 11 away from the second conductive layer 12.

[0103] Specifically, the width of the second conductive area 122 is smaller than the width of the first conductive layer 11. With the above arrangement, the area of ​​the first conductive layer 11 can be larger than the area of ​​the second conductive area 122. When heat is conducted, the upper surface of the second chip 22 can be dissipated through the entire second conductive layer 12, and the upper surface of the first chip 21 can be dissipated through the first conductive layer 11, thereby making the heat on the upper surface of the first chip 21 and the upper surface of the second chip 22 more balanced.

[0104] like Fig.10 and Fig.11 As shown, the upper surface of the liner 10 is also provided with a second gate conductive layer 17 and a second auxiliary source conductive layer 18, the second gate conductive layer 17 is connected to the gate of the second chip 22, the second auxiliary source conductive layer 18 is connected to the auxiliary source of the second chip 22, and the second gate conductive layer 17 and the second auxiliary source conductive layer 18 are both located on the side of the third conductive layer 13 away from the second conductive layer 12. With the above structure, the distance between the second gate conductive layer 17 and the gate of the second chip 22 can be reduced, and the distance between the second auxiliary source conductive layer 18 and the auxiliary source of the second chip 22 can be reduced, which is conducive to reducing the length of the bonding wire and facilitating connection.

[0105] In this embodiment, a resistor is also connected in series to the driving circuit of the second chip 22 .

[0106] The power device further includes a second gate terminal and a second auxiliary source terminal, the second gate terminal is electrically connected to the resistance conductive layer corresponding to the second chip 22, and the second auxiliary source terminal is electrically connected to the second auxiliary source conductive layer corresponding to the second chip 22. The second gate terminal and the second auxiliary source terminal are located on a side of the third conductive layer 13 away from the second conductive layer 12.

[0107] like Fig.10 As shown, the resistor conductive layer 16 is located between the plurality of first gate conductive layers 14 and the first auxiliary source conductive layer 15. With the above structure, the resistor 50 can be connected between the first gate conductive layer 14 and the resistor conductive layer 16.

[0108] like Figure 8As shown, the power device further includes a power terminal 60, which includes a first power terminal 61, a second power terminal 62 and a third power terminal 63. The first power terminal 61 is connected to the first terminal connection plate, the second power terminal 62 is connected to the second terminal connection plate, and the third power terminal 63 is connected to the third terminal connection plate. With the above structure, by using the first terminal connection plate provided at the end of the power device to connect the corresponding power terminals, the second terminal connection plate and the third terminal connection plate are connected to each other, the internal space of the power device is fully utilized, and the space utilization rate is improved.

[0109] In this embodiment, the first power terminal 61 is a DC-terminal, the second power terminal 62 is an AC terminal, and the third power terminal 63 is a DC+terminal.

[0110] like Fig.10 and Fig.11 As shown, the liner 10 includes a first liner 191 and a second liner 192 arranged at intervals, the first conductive layer 11 includes a first source conductive layer 111 and a second source conductive layer 112 connected to each other, the first source conductive layer 111 and the second source conductive layer 112 are respectively electrically connected to the source of the corresponding first chip 21, the second conductive layer 12 includes a first intermediate conductive layer 124 and a second intermediate conductive layer 125 connected to each other, a plurality of first intermediate conductive layers 124 and a second intermediate conductive layer 125 are respectively electrically connected to the drain of the corresponding first chip 21, the first intermediate conductive layer 124 and The second intermediate conductive layer 125 is respectively conductively connected to the source of the corresponding second chip 22, the third conductive layer 13 includes a first drain conductive layer 131 and a second drain conductive layer 132 connected to each other, the first drain conductive layer 131 and the second drain conductive layer 132 are respectively conductively connected to the drain of the corresponding second chip 22, the first source conductive layer 111, the first intermediate conductive layer 124 and the first drain conductive layer 131 are arranged on the first liner 191, and the second source conductive layer 112, the second intermediate conductive layer 125 and the second drain conductive layer 132 are arranged on the second liner 192. By setting the liner 10 as the first liner 191 and the second liner 192, when welding the first chip 21 and the second chip 22 to the conductive layer, and welding the connecting block 30 and the interconnection member 40 to the conductive layer, when the same heat is conducted, the deformation of the liner can be reduced by setting the first liner 191 and the second liner 192, thereby reducing the interlayer stress generated at the interconnection interface and improving the stability of the power device.

[0111] Among them, the first liner 191 and the second liner 192 are both copper-clad ceramic substrates, which are three-layer structures, with the upper and lower layers being conductor layers and the middle layer being a ceramic substrate. The upper conductor layer is a conductive layer, forming a topological structure of the circuit. The ceramic substrate of the middle layer plays an insulating and heat-conducting role. The lower copper foil is generally connected to the housing through a thermal interface material to play a heat-conducting role.

[0112] The ceramic substrate of the middle layer can generally be made of ceramic materials such as alumina, aluminum nitride, alumina doped with zirconium oxide, and silicon nitride. Alumina has excellent mechanical strength and chemical corrosion resistance, and is suitable for applications with high durability requirements. Zirconia is known for its outstanding toughness and high temperature resistance, and performs well in high temperature and high stress environments. Aluminum nitride has high thermal conductivity and low expansion coefficient, can effectively dissipate heat, and is suitable for high-power electronic devices. Silicon carbide not only has high hardness and high wear resistance, but also can remain stable at extremely high temperatures, making it very popular in high-temperature electronic devices and high-frequency applications. The diversity and excellent properties of these ceramic materials provide a wide range of choices and significant performance improvements for the design and application of silicon carbide devices.

[0113] In this embodiment, the first intermediate conductive layer 124 and the second intermediate conductive layer 125 are both provided with a plurality of first chips 21, which is equivalent to a first chip group being provided on each of the first intermediate conductive layer 124 and the second intermediate conductive layer 125, and the first drain conductive layer 131 and the second drain conductive layer 132 are both provided with a plurality of second chips 22, which is equivalent to a second chip group being provided on each of the first drain conductive layer 131 and the second drain conductive layer 132. Moreover, each first chip group is electrically connected to the first source conductive layer 111 and the second source conductive layer 112 through the connecting block 30, and each second chip group is electrically connected to the first intermediate conductive layer 124 and the second intermediate conductive layer 125 through the interconnection member 40.

[0114] Among them, the first conductive area 121 is divided into two parts, which are respectively arranged in the first intermediate conductive layer 124 and the second intermediate conductive layer 125; the second conductive area 122 is divided into two parts, which are respectively arranged in the first intermediate conductive layer 124 and the second intermediate conductive layer 125; the first intermediate conductive layer 124 and the second intermediate conductive layer 125 are both provided with an avoidance hollow area 123.

[0115] like Fig. 9 As shown, the power device further includes a connection plate 70, the connection plate 70 having a first connection surface and a second connection surface, the first connection surface being electrically connected to the first source conductive layer 111 or the first intermediate conductive layer 124 or the first drain conductive layer 131, and the second connection surface being electrically connected to the second source conductive layer 112 or the second intermediate conductive layer 125 or the second drain conductive layer 132. Using the connection plate 70 to connect different conductive layers has the advantages of simple structure and easy assembly.

[0116] like Fig.12As shown, the connecting plate 70 includes a first flat plate 71, an arc plate 72 and a second flat plate 73 connected in sequence, the first connecting surface is the lower surface of the first flat plate 71, and the second connecting surface is the lower surface of the second flat plate 73. The connecting plate 70 with the above structure has the advantages of simple structure and easy processing.

[0117] like Fig.13 As shown, the power device further includes a packaging shell 80, which includes a shell 81 and a cover plate 82 covering the shell 81, a liner 10 is arranged on the upper surface of the shell 81, and the chip assembly 20 and the interconnection member are both located in the shell 81. The packaging shell can be used to protect the components inside the power device to form a complete packaging structure.

[0118] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0119] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present invention. Meanwhile, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0120] In the description of the present invention, it is necessary to understand that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the devices or elements referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of the present invention. The directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0121] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0122] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0123] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A connection block for a power device, characterized in that: The connection block (30) comprises a conductive connection portion (31) and an interconnection portion, the interconnection portion comprises a plurality of interconnection units (32), the conductive connection portion (31) and the interconnection portion are arranged at intervals along a first direction, the plurality of interconnection units (32) are arranged at intervals along a second direction, and an angle is formed between the first direction and the second direction; The connecting block (30) has a first dividing groove (33), the first dividing groove (33) passes through the lower surface of the connecting block (30), the first dividing groove (33) extends along the second direction and passes through two oppositely arranged side walls of the connecting block (30), the conductive connecting portion (31) and the plurality of interconnection units (32) are respectively located on both sides of the first dividing groove (33); The connecting block (30) has a plurality of second dividing grooves (34), the second dividing grooves (34) passing through the lower surface of the connecting block (30), the plurality of second dividing grooves (34) being arranged at intervals along the second direction, each second dividing groove (34) being located between two adjacent interconnecting units (32), the second dividing grooves (34) extending along the first direction, one end of each second dividing groove (34) being connected to the first dividing groove (33), and the other end of each second dividing groove (34) passing through the side wall of the connecting block (30).

2. The connection block according to claim 1, characterized in that: The groove wall of the first dividing groove (33) comprises a first arc segment (331) and a first straight segment (332) connected to one end of the first arc segment (331), and the lower end of the first straight segment (332) is arranged to intersect with the plurality of interconnected units (32).

3. The connection block according to claim 2, characterized in that: The groove wall of the first dividing groove (33) further comprises a second straight segment (333), the second straight segment (333) being connected to the other end of the first arc segment (331), and the lower end of the second straight segment (333) being arranged to intersect with the conductive connecting portion (31).

4. The connection block according to claim 3, characterized in that: The first straight section (332) and the second straight section (333) are both vertical sections.

5. The connection block according to claim 2, characterized in that: The distance between the highest point of the first arc segment (331) and the upper surface of the connection block (30) is L1, the distance between the lower surface of the conductive connection portion (31) of the connection block (30) and the upper surface of the connection block (30) is H1, and H1 / L1 is between 2.2 and 3.

2.

6. The connection block according to claim 2, characterized in that: The vertical height h1 of the first straight segment (332) is between 0.4 mm and 0.6 mm.

7. The connection block according to claim 1, characterized in that: The ratio between the width B1 of the first dividing groove (33) and the width B2 of the connecting block (30) is between 0.3 and 0.

5.

8. The connection block according to claim 1, characterized in that: The groove wall of the second dividing groove (34) comprises a second arc segment (341) and a third straight segment (342) and a fourth straight segment (343) connected at both ends of the second arc segment (341), and the lower end of the third straight segment (342) and the lower end of the fourth straight segment (343) are respectively arranged to intersect with the interconnection unit (32).

9. The connection block according to claim 8, characterized in that The distance between the highest point of the second arc segment (341) and the upper surface of the connection block (30) is L2, the height between the lower surface of the interconnection unit (32) and the upper surface of the connection block (30) is H2, and L2 / H2 is between 0.4 and 0.

55.

10. The connection block according to claim 8, characterized in that The vertical height of the third straight segment (342) and the vertical height of the fourth straight segment (343) are both h2, and h2 is between 0.25 mm and 0.35 mm.

11. The connection block according to claim 1, characterized in that: The ratio between the width B3 of the second separation groove (34) and the width B4 of the interconnection unit (32) is between 1.2 and 1.

8.

12. The connection block according to claim 1, characterized in that The lower surface of the interconnection unit (32) is higher than the lower surface of the conductive connection portion (31).

13. The connection block according to claim 1, characterized in that The top surface of the connecting block (30) is a plane; and / or, The connecting block (30) is a copper block.

14. A power device, characterized in that: The power device comprises: A liner (10) having a first conductive surface and a second conductive surface arranged at an interval; A plurality of chips are arranged on the liner (10), and the drain electrodes of the plurality of chips are all conductively connected to the first conductive surface; A connection block (30) is arranged on the backing plate (10), the conductive connection portion (31) of the connection block (30) is electrically connected to the second conductive surface, and the plurality of interconnection units (32) of the connection block (30) are respectively and electrically connected to the source electrodes of the plurality of chips in a one-to-one correspondence, and the connection block (30) is the connection block according to any one of claims 1 to 13.

15. A power device, characterized in that: The power device comprises: A lining plate (10), wherein the upper surface of the lining plate (10) comprises a first conductive layer (11), a second conductive layer (12) and a third conductive layer (13) which are arranged at intervals, and the second conductive layer (12) is located between the first conductive layer (11) and the third conductive layer (13); A chip assembly (20), comprising a plurality of first chips (21) and a plurality of second chips (22), wherein the drain electrode of each of the first chips (21) is conductively connected to the second conductive layer (12), and the drain electrode of each of the second chips (22) is conductively connected to the third conductive layer (13); A connection block (30), wherein the conductive connection portion (31) of the connection block (30) is electrically connected to the first conductive layer (11), and the plurality of interconnection units (32) are conductively connected to the source electrodes of the plurality of first chips (21) in a one-to-one correspondence, and the connection block (30) is the connection block according to any one of claims 1 to 13; An interconnection component (40), wherein the second conductive layer (12) and the source electrodes of the plurality of second chips (22) are conductively connected via the interconnection component (40).

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