Fault detection method and device, equipment and medium
By setting the counting period, attenuation ratio and threshold for fault jitter detection in the storage device, the misjudgment and misjudgment problems in the fault detection of electronic components are solved, and the stability and reliability of the storage system are improved.
Patent Information
- Application Number
- CN202411110604.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-13
- Publication Date
- 2024-12-27
AI Technical Summary
In storage devices, fault detection of electronic components is difficult to distinguish between fault jitter caused by other components, resulting in misjudgment and misjudgment problems.
By setting the counting cycle, attenuation ratio and fault jitter number threshold for fault jitter detection, the target components in the storage system are detected for fault jitter, adjust the number of fault jitters in each counting cycle, and determine that the target components have a fault when the threshold is exceeded. Prevent misjudgment and misjudgment.
It effectively reduces the misjudgment of unexpected faults, and avoids the misjudgment of real faults, reduces the failure replacement rate and operating costs, and ensures the stability and reliability of the storage system.
Smart Images
Figure CN119201519A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of storage systems, and in particular to a fault detection method, device, equipment and medium. Background Art
[0002] In the era of cloud computing, storage devices are developing rapidly, and both software functions and storage performance are becoming more and more powerful. Powerful software functions and storage performance rely on the integration and cooperation of many hardware. Since storage devices integrate a large number of electronic components, storage devices may age or experience abnormal high temperatures after long-term operation. Therefore, it is essential to detect hardware failures at the software level to prevent serious impact on customer data when hardware fails unexpectedly.
[0003] However, in the actual operation of storage devices, there are many situations that cause electronic components to malfunction. Among them, the malfunction of electronic components may be caused not only by their own failures, but also by unexpected events such as fault jitter caused by the failure of other electronic components. In this case, it may cause misjudgment of electronic component failure. Summary of the invention
[0004] In view of this, embodiments of the present application provide a fault detection method, apparatus, device, and medium to overcome the above-mentioned problems or at least partially solve the above-mentioned problems.
[0005] A first aspect of an embodiment of the present application provides a fault detection method, the method comprising:
[0006] For different types of target components in the storage system, set the fault jitter detection counting cycle, attenuation ratio and fault jitter number threshold;
[0007] Performing fault jitter detection on the target component, and counting the number of fault jitters of the target component in at least one counting cycle, wherein the number of fault jitters at the beginning of a single counting cycle is determined according to the number of fault jitters at the end of a previous counting cycle and an attenuation ratio;
[0008] When the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, it is determined that the target component has a fault.
[0009] Optionally, the performing fault jitter detection on the target component and counting the number of fault jitters of the target component within at least one counting cycle includes:
[0010] At the beginning of each counting cycle, the number of fault jitters at the beginning of the counting cycle is calculated according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component;
[0011] In each of the counting cycles, when a fault jitter is detected, the number of fault jitters in the counting cycle is updated.
[0012] Optionally, at the beginning of each counting cycle, the number of fault jitters at the beginning of the counting cycle is calculated according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component, including:
[0013] When the counting cycle is the first counting cycle, determining that the number of fault jitters at the beginning of the counting cycle is zero;
[0014] When the counting cycle is not the first counting cycle, the number of fault jitters at the end of the previous counting cycle is attenuated according to the attenuation ratio of the target component, and the attenuated result is used as the number of fault jitters at the beginning of the counting cycle.
[0015] Optionally, the method further comprises:
[0016] When the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, the counting of the number of fault jitters of the target component ends;
[0017] When the number of fault jitters in the current counting cycle does not exceed the fault jitter number threshold, the counting of the number of fault jitters in the next counting cycle continues.
[0018] Optionally, the method further comprises:
[0019] Before performing fault jitter detection on the target component, setting a corresponding fault jitter event and fault jitter event processing logic for each type of target component;
[0020] In the case where a fault jitter event is detected in the target component, it is determined that a fault jitter occurs in the target component, and the target component having the fault jitter event is processed according to the fault jitter event processing logic, and an alarm is issued for the fault jitter event.
[0021] Optionally, the processing of the target component having the fault jitter event according to the fault jitter event processing logic and issuing an alarm for the fault jitter event includes:
[0022] When the target component where the fault jitter event occurs is a power supply, an alarm of an abnormal power supply fault jitter event is issued to replace the power supply and troubleshoot the mainboard fault;
[0023] When the target component of the fault jitter event is an electronic component in the mainboard, an alarm of an abnormal fault jitter event of the controller is reported to replace the controller;
[0024] When the target component where the fault jitter event occurs is a network card, the network port is closed, and an alarm of an abnormal fault jitter event of the network card is issued, so as to replace the network card;
[0025] When the target component where the fault jitter event occurs is a hard disk port, the hard disk port is closed, and an alarm of the abnormal fault jitter event of the hard disk port is reported to replace the hard disk;
[0026] Among them, whether the hard disk port has fault jitter is determined based on the target bit error number of data transmission output by the hard disk port. The calculation formula for the target bit error number of data transmission output by the hard disk port is: target bit error number = current bit error number / 2+(current bit error number-bit error number at the previous sampling time). The bit error number is used to determine whether the hard disk port has fault jitter. The target bit error number is the value of the bit error number used for fault jitter detection each time. The current bit error number is the bit error number sampled when performing fault jitter detection. The bit error number at the previous sampling time is the bit error number sampled when performing fault jitter detection last time.
[0027] Optionally, the number of fault jitters of the target component is the number of faults or the number of repairs after the faults, and the method further includes:
[0028] When the target component has automatic repair logic, determining the number of fault jitters of the target component as the number of post-fault repairs;
[0029] When the target component does not have automatic repair logic, the number of fault jitters of the target component is determined as the number of faults.
[0030] A second aspect of an embodiment of the present application provides a fault detection device, the device comprising:
[0031] A setting module, used to set the counting cycle, attenuation ratio and fault jitter number threshold of fault jitter detection for different types of target components in the storage system;
[0032] A fault jitter detection module, used to perform fault jitter detection on the target component and count the number of fault jitters of the target component in at least one counting cycle, wherein the number of fault jitters at the beginning of a single counting cycle is determined based on the number of fault jitters at the end of the previous counting cycle and the attenuation ratio;
[0033] The determination module is used to determine that the target component has a fault when the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold.
[0034] A third aspect of an embodiment of the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the fault detection method as described in the first aspect.
[0035] A fourth aspect of an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the fault detection method as described in the first aspect is implemented.
[0036] Beneficial effects of this application:
[0037] The embodiments of the present application provide a fault detection method, apparatus, device and medium, including: setting a fault jitter detection counting cycle, an attenuation ratio and a fault jitter number threshold for different types of target components in a storage system; performing fault jitter detection on the target component, and counting the fault jitter number of the target component within at least one counting cycle, wherein the fault jitter number at the beginning of a single counting cycle is determined based on the fault jitter number and the attenuation ratio at the end of the previous counting cycle; when the fault jitter number in the current counting cycle exceeds the fault jitter number threshold, determining that the target component is faulty.
[0038] Through the technical solution of the present application, it is possible to set counting cycles, attenuation ratios and fault jitter number thresholds for fault jitter detection on target components of different types, and perform fault jitter detection on the target components. The fault jitter number of each counting cycle can be adjusted based on the attenuation ratio of the fault jitter number at the end of the previous counting cycle, and when the fault jitter number in the current counting cycle exceeds the preset fault jitter number threshold, it is determined that the target component has a fault, thereby being able to perform anti-jitter processing on accidental abnormal jitters of the target component to reduce the misjudgment of unexpected faults. At the same time, it can also avoid missed judgments when a real fault occurs. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application.
[0040] In order to more clearly illustrate the technical solution of the present application, the drawings required for use in the description of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0041] Figure 1It is a flowchart of a fault detection method provided by an embodiment of the present application;
[0042] Figure 2 is a flowchart of another fault detection method provided by an embodiment;
[0043] Figure 3 It is a schematic diagram of a flow chart of updating the number of fault jitter detections in another fault detection method provided by an embodiment;
[0044] Figure 4 is a structural schematic diagram of a fault detection device provided by an embodiment of the present application;
[0045] Figure 5 It is a schematic diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION
[0046] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application may be combined with each other.
[0047] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0048] During the actual operation of each storage device in the storage system, there are many situations that may cause abnormalities in electronic components, such as:
[0049] 1. The ambient temperature or dust in the air can cause temporary abnormalities in electronic components;
[0050] 2. Transmission errors due to transmission distance or signal quality during data transmission;
[0051] 3. The failure of an electronic component may cause failures in other electronic components. For example, a short circuit caused by the failure of an electronic component on the mainboard may cause an overcurrent failure in the power supply. Therefore, anti-shake processing is required for hardware abnormality detection. However, if an electronic component fails repeatedly within a unit time, the customer needs to be notified to perform component maintenance to prevent more serious consequences.
[0052] Figure 1 is a flowchart of a fault detection method provided by an embodiment of the present application. Figure 2 FIG. 1 is a flow chart of another fault detection method provided by an embodiment. Figure 1 As shown, an embodiment of the present application provides a fault detection method, the method comprising:
[0053] Step S101, setting a count period, attenuation ratio and fault jitter number threshold for fault jitter detection for different types of target components in the storage system;
[0054] Step S102, performing fault jitter detection on the target component, and counting the number of fault jitters of the target component in at least one counting cycle, wherein the number of fault jitters at the beginning of a single counting cycle is determined according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio;
[0055] Step S103: When the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, it is determined that the target component is faulty.
[0056] First, if Figure 2 As shown, in step S101, the target component is a FRU (Field-Replace-Unit), for example, a hard disk, a fan, a network card, a power supply, etc. The failure frequency, failure cause, and failure condition of different types of target components are all different. Therefore, it is necessary to set a counting cycle, an attenuation ratio, and a fault jitter number threshold for performing fault jitter detection on the target component for different types of target components, that is, the counting cycle, the attenuation ratio, and the fault jitter number threshold are fault anti-jitter parameters for performing fault jitter detection on the target component. For example: the counting cycle is 24 hours, and the attenuation ratio is 50%, indicating that at each new counting cycle, the fault jitter number at the end of the previous counting cycle is attenuated to 50% of the original number, and the fault jitter number threshold is 10 times. If the fault jitter number exceeds the fault jitter number threshold, an alarm needs to be reported.
[0057] The counting cycle refers to the time period for continuously calculating the number of fault jitters. When the next time period comes, the number of fault jitters needs to be updated.
[0058] The selection of the counting cycle needs to be set according to the actual requirements of the storage system and the characteristics of the target component.
[0059] The decay ratio refers to the weight used to calculate the number of fault jitters from one counting cycle to the next counting cycle.
[0060] The attenuation ratio of different types of target components can be set according to factors such as the aging degree of the target components, the usage environment of the storage device (such as temperature, humidity, electromagnetic interference, etc.), historical failure data (such as the time distribution, frequency and mode of historical failures of the same type of target components, etc.), storage system stability requirements, resource limitations (such as computing power, storage space, real-time processing capabilities, etc.), etc.
[0061] The fault jitter count threshold means that when the fault jitter count of a target component exceeds the fault jitter count threshold, it is considered that the target component may be faulty.
[0062] The fault chattering number thresholds for different types of target components can be set based on the following factors:
[0063] Equipment characteristics: The type, manufacturing quality, and age of the target component will affect the frequency and severity of its failures. For example, some older products may have a higher failure rate, so a lower threshold for the number of failure jitters may be required to quickly identify problems.
[0064] Business requirements: Different businesses have different requirements for system stability. For critical business systems, the tolerance may be low, and a lower threshold for fault jitter may need to be set to ensure rapid response and prevent failures; for non-critical businesses, a higher threshold may be set to avoid frequent false alarms and unnecessary maintenance activities.
[0065] Historical failure data: By analyzing the historical failure data of the target component, we can understand the frequency and pattern of failures of the target component under specific conditions. Based on this data, a threshold can be set so that when the number of failure jitters with similar patterns occurs, we can be alerted and take preventive measures.
[0066] Environmental factors: The environmental conditions (such as temperature, humidity, electromagnetic interference, etc.) of the target component may also affect the failure rate. In certain environments, the target component may be more prone to failure, so a lower threshold for the number of failure jitters may need to be set under these environmental conditions.
[0067] System tolerance: In addition to the frequency of failures, the storage system's tolerance for specific types of failures also needs to be considered. For example, for certain types of failures (such as read and write errors), a stricter threshold for the number of failure jitters may be required to ensure the integrity and consistency of data in the storage system.
[0068] Cost and efficiency: When setting the threshold, you also need to consider the cost of maintenance and repair. Too low a threshold may lead to frequent false alarms and unnecessary maintenance work, which increases the operating cost of the storage system. Therefore, you need to weigh the risk and cost to find a suitable threshold for the number of fault jitters.
[0069] Safety requirements: In safety-sensitive systems, a lower threshold for the number of fault jitters may need to be set to ensure that any failure that may affect safety can be detected and measures taken in a timely manner.
[0070] Fault jitter refers to brief, random performance degradation or abnormal behavior of a device during normal operation, which may be caused by aging of the target component, electrical interference, or other hardware failures.
[0071] During the setting process, a software-level fault anti-jitter device can be set for different types of target components. Each fault anti-jitter device includes a fault jitter timer and a fault jitter counter. The fault jitter timer is used to time the fault jitter detection time to determine whether the fault jitter detection time exceeds the counting period. The fault jitter counter is used to count the number of fault jitters to determine whether the number of fault jitters exceeds the fault jitter number threshold.
[0072] Optionally, in the following embodiments, the fault anti-shake device may further include a fault shake event and a fault shake event processing logic.
[0073] Further, in step S102, during the operation of the storage system, different types of target components will be continuously monitored and detected for fault jitters. During this process, a fault jitter inspection process of at least one counting cycle will be carried out, and the number of fault jitters of the target component will be counted in each counting cycle. The initial value of the number of fault jitters at the beginning of each counting cycle is determined based on the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component.
[0074] Finally, in step S103, when it is determined that the number of fault jitters in the current counting cycle exceeds a preset threshold of the number of fault jitters, it is determined that the target component has failed, is about to fail, or is very likely to fail, and there is a need for active alarm.
[0075] Through the above embodiments, it is possible to set counting cycles, attenuation ratios, and fault jitter number thresholds for fault jitter detection on target components of different types, and perform fault jitter detection on the target components. The fault jitter number of each counting cycle can be adjusted based on the attenuation ratio of the fault jitter number at the end of the previous counting cycle, and when the fault jitter number in the current counting cycle exceeds the preset fault jitter number threshold, it is determined that the target component has a fault, thereby being able to perform anti-jitter processing on accidental abnormal jitters of the target component to reduce misjudgment of unexpected faults. At the same time, it can also avoid missed judgments when a real fault occurs.
[0076] Furthermore, by performing attenuation in each counting cycle, the number of notifications of fault jitter can be reduced, the fault replacement rate of the target component can be reduced, and thus the cost can be reduced. At the same time, the real fault of the target component will not be missed.
[0077] Optionally, a fault anti-shake device can be set for each software or each hardware fault jitter situation. Each fault anti-shake device runs independently without interfering with each other, and can perform anti-shake processing on multiple faults at the same time. There are differences in the characteristics of software and hardware. Most hardware faults cannot be repaired and can only be processed by replacing the hardware. Therefore, the anti-shake logic of the fault anti-shake device needs to report the registered fault jitter event, and the fault diffusion prevention processing can be performed according to the fault characteristics of different software and hardware. Software faults can be repaired by restarting the system. The software here can be firmware (such as a baseboard management controller), so internal repair logic can be added to the software fault anti-shake device as needed.
[0078] Optionally, the step S102 includes:
[0079] Step S102-1, at the beginning of each counting cycle, according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component, calculate the number of fault jitters at the beginning of the counting cycle;
[0080] Step S102-2: in each counting cycle, when a fault jitter is detected, the number of fault jitters in the counting cycle is updated.
[0081] Figure 3 FIG. 1 is a flow chart of updating the number of fault jitter detections in another fault detection method provided by an embodiment. Figure 3 shown.
[0082] Specifically, in one embodiment, in step S102-1, at the beginning of each counting cycle, the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component are first obtained, and the number of fault jitters at the beginning of the counting cycle is calculated based on the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component.
[0083] In step S102-2, in each counting cycle, when a fault jitter is detected, the number of fault jitters in the counting cycle is updated, and at the same time, the timestamp of each time the fault jitter occurs is recorded, and the timestamp is data used for subsequent analysis of the fault jitter.
[0084] For example, the number of fault jitters at the end of the previous counting cycle is 6 times, and the fault jitter threshold is 10 times. The number of fault jitters at the beginning of the counting cycle determined according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component is 3 times. Therefore, within the counting cycle, counting starts from 3 times, and each time a fault jitter is detected, 3 times is updated.
[0085] Optionally, different calculation methods may be selected for the calculation process of the number of fault jitters.
[0086] Calculation method 1: Fcurrent=α*Fprevious, where Fcurrent is the number of fault jitters at the beginning of each counting cycle, Fprevious is the number of fault jitters at the end of the previous counting cycle, and α is the attenuation ratio, 0≤α≤1.
[0087] In calculation method 1, the attenuation ratio α is a preset fixed value and remains unchanged in each counting cycle.
[0088] Calculation method 2: Fcurrent = α(n)*Fprevious, α(n) = α(0)+β*n,
[0089] After calculating α(n), it is necessary to use the formula: α(n)=min(max(α(0)+β*n,0),1) to ensure that 0≤α(n)≤1.
[0090] In calculation method 2, the attenuation ratio α(0) is a preset attenuation ratio. The calculation process of the attenuation ratio within each counting cycle introduces a time factor. n represents the number of counting cycles, and β is a parameter obtained by fitting historical fault data, 0≤β≤1. As a result, in the process of fault jitter detection, as the counting cycle increases, the overall number of fault jitters increases. Therefore, it is necessary to avoid missed faults. By designing the attenuation amplitude of the fault jitter number to decrease with the increase of the counting cycle, the fault jitter number can quickly approach the fault jitter number threshold when the number of counting cycles increases, thereby improving the efficiency of fault judgment of the target component when the number of counting cycles increases.
[0091] Through the above-mentioned embodiments, the number of fault jitters in the next counting cycle can be determined each time according to the number of fault jitters and the attenuation ratio in the previous counting cycle, so as to make full use of the information of the number of fault jitters in the historical counting cycles, instead of counting the number of fault jitters from 0 in each counting cycle, thereby reducing the misjudgment of unexpected faults and avoiding missed judgments when a real fault occurs.
[0092] Optionally, at the beginning of each counting cycle, the number of fault jitters at the beginning of the counting cycle is calculated according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component, including:
[0093] When the counting cycle is the first counting cycle, determining that the number of fault jitters at the beginning of the counting cycle is zero;
[0094] When the counting cycle is not the first counting cycle, the number of fault jitters at the end of the previous counting cycle is attenuated according to the attenuation ratio of the target component, and the attenuated result is used as the number of fault jitters at the beginning of the counting cycle.
[0095] Specifically, Figure 2 As shown, in one embodiment, the number of fault jitters at the beginning of each counting cycle is determined based on the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component. When the latest counting cycle is the first counting cycle, since there is no previous counting cycle, the number of fault jitters at the beginning of the latest counting cycle is zero; when the latest counting cycle is not the first counting cycle, there is a previous counting cycle, so it is necessary to attenuate the number of fault jitters at the end of the previous counting cycle according to the attenuation ratio of the target component, and the attenuated result is a value that is less than the number of fault jitters at the end of the previous counting cycle and is not zero, and the attenuated result is used as the number of fault jitters at the beginning of the latest counting cycle.
[0096] Through the above embodiment, the initial values of the fault jitter times of other counting cycles except the first counting cycle can be related to the fault jitter times at the end of the previous counting cycle. Therefore, in the process of fault jitter detection, the accuracy of fault jitter detection is guaranteed by combining the historical fault jitter detection data, instead of starting the counting from zero for each counting cycle. This attenuation method can reduce the misjudgment of unexpected faults and avoid missed judgment when a real fault occurs.
[0097] Optionally, the method further comprises:
[0098] When the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, the counting of the number of fault jitters of the target component ends;
[0099] When the number of fault jitters in the current counting cycle does not exceed the fault jitter number threshold, the counting of the number of fault jitters in the next counting cycle continues.
[0100] Specifically, in one embodiment, when the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, the counting of the fault jitter number of the target component is ended, and further processing and alarm mechanism are awaited; when the number of fault jitters in the current counting cycle does not exceed the fault jitter number threshold, the counting of the fault jitter number of the next counting cycle is continued, so as to continuously track the fault condition of the target component.
[0101] The above embodiments help to monitor and control fault conditions in real time, and take necessary measures in time to ensure the stability and reliability of the target component.
[0102] Optionally, the method further comprises:
[0103] Before performing fault jitter detection on the target component, setting a corresponding fault jitter event and fault jitter event processing logic for each type of target component;
[0104] In the case where a fault jitter event is detected in the target component, it is determined that a fault jitter occurs in the target component, and the target component having the fault jitter event is processed according to the fault jitter event processing logic, and an alarm is issued for the fault jitter event.
[0105] Specifically, Figure 2 As shown, in one embodiment, before performing fault jitter detection on a target component, a corresponding fault jitter event needs to be set for each type of target component. A fault jitter event refers to a fault jitter phenomenon corresponding to the target component. The fault jitter event processing logic sets a corresponding processing logic for the fault jitter event of each target component. These processing logics are used to perform corresponding processing after detecting a fault jitter event of a target component to ensure the stability and reliability of the storage system.
[0106] like Figure 2 As shown, the fault anti-shake device may further include a fault shake event and a fault shake event processing logic.
[0107] Specifically, before fault detection is performed on the target component, a fault jitter event and corresponding fault jitter event processing logic need to be set for each type of target component. Once a fault jitter event occurs in the target component, the storage system will process it according to the preset fault jitter event processing logic and issue an alarm to notify relevant personnel. Such fault jitter event processing logic and alarm mechanism help improve the stability and reliability of the storage system and timely discover and solve potential problems.
[0108] Furthermore, the design combining the counting cycle and the attenuation ratio can reduce the false alarm of the fault jitter event of the target component and the missed alarm when a real fault occurs.
[0109] Optionally, the processing of the target component having the fault jitter event according to the fault jitter event processing logic and issuing an alarm for the fault jitter event includes:
[0110] When the target component where the fault jitter event occurs is a power supply, an alarm of an abnormal power supply fault jitter event is issued to replace the power supply and troubleshoot the mainboard fault;
[0111] When the target component of the fault jitter event is an electronic component in the mainboard, an alarm of an abnormal fault jitter event of the controller is reported to replace the controller;
[0112] When the target component where the fault jitter event occurs is a network card, the network port is closed, and an alarm of an abnormal fault jitter event of the network card is issued, so as to replace the network card;
[0113] When the target component where the fault jitter event occurs is a hard disk port, the hard disk port is closed, and an alarm of the abnormal fault jitter event of the hard disk port is reported to replace the hard disk;
[0114] Among them, whether the hard disk port has fault jitter is determined based on the target bit error number of data transmission output by the hard disk port. The calculation formula for the target bit error number of data transmission output by the hard disk port is: target bit error number = current bit error number / 2+(current bit error number-bit error number at the previous sampling time). The bit error number is used to determine whether the hard disk port has fault jitter. The target bit error number is the value of the bit error number used for fault jitter detection each time. The current bit error number is the bit error number sampled when performing fault jitter detection. The bit error number at the previous sampling time is the bit error number sampled when performing fault jitter detection last time.
[0115] Specifically, in an embodiment, different target components having fault jitter events can be processed according to different fault jitter event processing logics, and different alarms can be issued for different fault jitter events.
[0116] When the target component is a power supply, the fault jitter event is an abnormal power supply jitter event. At this time, an alarm of an abnormal power supply fault jitter event will be issued, and in the alarm information it is recommended to replace the power supply and check whether there is a fault in the mainboard.
[0117] When the target component is an electronic component in the mainboard, the fault jitter event is an abnormal controller jitter event. At this time, an alarm for the abnormal controller fault jitter event will be issued, and it is recommended to replace the corresponding electronic components and controller in the alarm information.
[0118] When the target component is the network card in the mainboard, the fault jitter event is an abnormal network card jitter event. At this time, an alarm for the abnormal network card fault jitter event will be issued, and the network port of the network card will be closed. It is also recommended to replace the network card in the alarm information.
[0119] When the target component is a hard disk port, the fault jitter event is an abnormal hard disk port jitter event, the hard disk port is closed, and an alarm of the abnormal hard disk port fault jitter event is reported, and it is recommended to replace the hard disk in the alarm information.
[0120] The fault jitter event of the hard disk port is determined based on the bit error number of the data transmitted by the hard disk port. The formula for calculating the bit error number is: target bit error number = current bit error number / 2+(current bit error number-bit error number at the last sampling time), the target bit error number is the value of the bit error number used for fault jitter detection each time, the current bit error number is the bit error number sampled when performing fault jitter detection, and the bit error number at the last sampling time is the bit error number sampled when performing fault jitter detection last time.
[0121] By monitoring the number of bit errors, it is possible to determine whether a fault jitter event occurs at the hard disk port, thereby taking corresponding fault jitter event processing measures in a timely manner.
[0122] Optionally, the number of fault jitters of the target component is the number of faults or the number of repairs after the faults, and the method further includes:
[0123] When the target component has automatic repair logic, determining the number of fault jitters of the target component as the number of post-fault repairs;
[0124] When the target component does not have automatic repair logic, the number of fault jitters of the target component is determined as the number of faults.
[0125] Specifically, in one embodiment, the number of fault jitters of a target component may refer to the total number of times the component fails, or the number of times the component is successfully repaired after the failure occurs, depending on whether the target component has automatic repair logic.
[0126] When the target component has automatic repair logic: If the target component has automatic repair function, then the number of fault jitter is defined as the number of successful repairs after the failure. In other words, this number will increase every time a failure occurs and is automatically repaired.
[0127] When the target component does not have automatic repair logic: If the target component does not have automatic repair capabilities, the number of fault jitters is defined as the total number of faults. Each fault, whether repaired or not, increases this count.
[0128] Through the above embodiments, it is clearly defined how to calculate and process the number of fault jitters of the target component in different situations, so that there can be clear standards and logic when monitoring and processing the fault of the target component.
[0129] Figure 4 is a structural diagram of a fault detection device provided by an embodiment of the present application, such as Figure 4 shown.
[0130] Based on the same inventive concept, another embodiment of the present application further provides a fault detection device, the device comprising:
[0131] A setting module 11 is used to set a count period, an attenuation ratio and a fault jitter number threshold for fault jitter detection for different types of target components in the storage system;
[0132] A fault jitter detection module 12 is used to perform fault jitter detection on the target component and count the number of fault jitters of the target component in at least one counting cycle, wherein the number of fault jitters at the beginning of a single counting cycle is determined according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio;
[0133] The determination module 13 is used to determine that the target component has a fault when the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold.
[0134] Optionally, the fault jitter detection module 12 includes:
[0135] A calculation module, used for calculating the number of fault jitters at the beginning of each counting cycle according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component at the beginning of each counting cycle;
[0136] The updating module is used to update the number of fault jitters in each counting cycle when a fault jitter is detected.
[0137] Optionally, the calculation module includes:
[0138] A first fault jitter number determination module, used for determining, when the counting cycle is the first counting cycle, that the fault jitter number at the beginning of the counting cycle is zero;
[0139] The attenuation module is used to attenuate the number of fault jitters at the end of the previous counting cycle according to the attenuation ratio of the target component when the counting cycle is not the first counting cycle, and use the attenuated result as the number of fault jitters at the beginning of the counting cycle.
[0140] Optionally, the device further comprises:
[0141] A first execution module, configured to terminate counting of the number of fault jitters of the target component when the number of fault jitters in the current counting cycle exceeds the threshold number of fault jitters;
[0142] The second execution module is used to continue counting the number of fault jitters in the next counting cycle when the number of fault jitters in the current counting cycle does not exceed the threshold number of fault jitters.
[0143] Optionally, the device further comprises:
[0144] A setting module, used for setting a corresponding fault jitter event and a fault jitter event processing logic for each type of target component before performing fault jitter detection on the target component;
[0145] The device further includes: an alarm module, which is used to process the target component having the fault jitter event according to the fault jitter event processing logic after determining that the target component has the fault jitter event, and issue an alarm for the fault jitter event.
[0146] Optionally, the alarm module includes:
[0147] A first alarm unit, configured to, when the target component where the fault jitter event occurs is a power supply, issue an alarm of an abnormal power supply fault jitter event, so as to replace the power supply and troubleshoot a mainboard fault;
[0148] A second alarm unit is used to report an alarm of an abnormal fault jitter event of the controller when the target component of the fault jitter event is an electronic component in the mainboard, so as to replace the controller;
[0149] A third alarm unit is used for closing the network port and issuing an alarm of abnormal fault jitter event of the network card when the target component of the fault jitter event is the network card, so as to replace the network card;
[0150] A fourth alarm unit, used for closing the hard disk port when the target component where the fault jitter event occurs is a hard disk port, and reporting an alarm of the hard disk port abnormal fault jitter event, so as to replace the hard disk;
[0151] Among them, whether the hard disk port has fault jitter is determined based on the target bit error number of data transmission output by the hard disk port. The calculation formula for the target bit error number of data transmission output by the hard disk port is: target bit error number = current bit error number / 2+(current bit error number-bit error number at the previous sampling time). The bit error number is used to determine whether the hard disk port has fault jitter. The target bit error number is the value of the bit error number used for fault jitter detection each time. The current bit error number is the bit error number sampled when performing fault jitter detection. The bit error number at the previous sampling time is the bit error number sampled when performing fault jitter detection last time.
[0152] Optionally, the number of fault jitters of the target component is the number of faults or the number of repairs after the faults, and the device further includes:
[0153] A second fault jitter number determination module, used to determine the fault jitter number of the target component as the number of post-fault repairs when the target component has automatic repair logic;
[0154] The third fault jitter number determining module is used to determine the fault jitter number of the target component as the number of the fault when the target component does not have automatic repair logic.
[0155] Based on the same inventive concept, another embodiment of the present application further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the fault detection method as described in any of the above embodiments.
[0156] Electronic equipment, see Figure 5 , Figure 5 is a schematic diagram of an electronic device provided by an embodiment of the present application. Figure 5 As shown, the electronic device 500 includes: a memory 510 and a processor 520. The memory 510 and the processor 520 are connected via a bus communication. A computer program is stored in the memory 510. The computer program can be run on the processor 520 to implement the steps in the fault detection method disclosed in the embodiment of the present application.
[0157] Based on the same inventive concept, another embodiment of the present application further provides a computer program product, including a computer program, which is executed by a processor to perform the fault detection method as described in any of the above embodiments.
[0158] Based on the same inventive concept, another embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored, wherein when the program is executed by a processor, the fault detection method as described in any of the above embodiments is implemented.
[0159] As for the device, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.
[0160] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0161] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0162] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0163] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0164] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0165] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.
[0166] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.
[0167] The above is a detailed introduction to a fault detection method, device, equipment and medium provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A fault detection method, characterized in that: The method comprises: For different types of target components in the storage system, set the fault jitter detection counting cycle, attenuation ratio and fault jitter number threshold; Performing fault jitter detection on the target component, and counting the number of fault jitters of the target component in at least one counting cycle, wherein the number of fault jitters at the beginning of a single counting cycle is determined according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio; When the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, it is determined that the target component has a fault.
2. The fault detection method according to claim 1, characterized in that: The performing fault jitter detection on the target component and counting the number of fault jitters of the target component within at least one counting cycle includes: At the beginning of each counting cycle, the number of fault jitters at the beginning of the counting cycle is calculated according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component; In each of the counting cycles, when a fault jitter is detected, the number of fault jitters in the counting cycle is updated.
3. The fault detection method according to claim 2, characterized in that: At the beginning of each counting cycle, the number of fault jitters at the beginning of the counting cycle is calculated according to the number of fault jitters at the end of the previous counting cycle and the attenuation ratio of the target component, including: When the counting cycle is the first counting cycle, determining that the number of fault jitters at the beginning of the counting cycle is zero; When the counting cycle is not the first counting cycle, the number of fault jitters at the end of the previous counting cycle is attenuated according to the attenuation ratio of the target component, and the attenuated result is used as the number of fault jitters at the beginning of the counting cycle.
4. The fault detection method according to claim 1, characterized in that: The method further comprises: When the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold, the counting of the number of fault jitters of the target component ends; When the number of fault jitters in the current counting cycle does not exceed the fault jitter number threshold, the counting of the number of fault jitters in the next counting cycle continues.
5. The fault detection method according to claim 1, characterized in that: The method further comprises: Before performing fault jitter detection on the target component, setting a corresponding fault jitter event and fault jitter event processing logic for each type of target component; In the case where a fault jitter event is detected in the target component, it is determined that a fault jitter occurs in the target component, and the target component having the fault jitter event is processed according to the fault jitter event processing logic, and an alarm is issued for the fault jitter event.
6. The fault detection method according to claim 5, characterized in that: The processing of the target component having the fault jitter event according to the fault jitter event processing logic and issuing an alarm for the fault jitter event includes: When the target component where the fault jitter event occurs is a power supply, an alarm of an abnormal power supply fault jitter event is issued to replace the power supply and troubleshoot the mainboard fault; When the target component of the fault jitter event is an electronic component in the mainboard, an alarm of an abnormal fault jitter event of the controller is reported to replace the controller; When the target component where the fault jitter event occurs is a network card, the network port is closed, and an alarm of an abnormal fault jitter event of the network card is issued, so as to replace the network card; When the target component where the fault jitter event occurs is a hard disk port, the hard disk port is closed, and an alarm of an abnormal fault jitter event of the hard disk port is reported to replace the hard disk; Among them, whether the hard disk port has fault jitter is determined based on the target bit error number of data transmission output by the hard disk port. The calculation formula for the target bit error number of data transmission output by the hard disk port is: target bit error number = current bit error number / 2+(current bit error number-bit error number at the previous sampling time). The bit error number is used to determine whether the hard disk port has fault jitter. The target bit error number is the value of the bit error number used for fault jitter detection each time. The current bit error number is the bit error number sampled when performing fault jitter detection. The bit error number at the previous sampling time is the bit error number sampled when performing fault jitter detection last time.
7. The fault detection method according to any one of claims 1 to 6, characterized in that: The number of fault jitters of the target component is the number of faults or the number of repairs after the faults, and the method further includes: When the target component has automatic repair logic, determining the number of fault jitters of the target component as the number of post-fault repairs; When the target component does not have automatic repair logic, the number of fault jitters of the target component is determined as the number of faults.
8. A fault detection device, characterized in that: The device comprises: A setting module, used to set the counting cycle, attenuation ratio and fault jitter number threshold of fault jitter detection for different types of target components in the storage system; A fault jitter detection module, used to perform fault jitter detection on the target component and count the number of fault jitters of the target component in at least one counting cycle, wherein the number of fault jitters at the beginning of a single counting cycle is determined based on the number of fault jitters at the end of the previous counting cycle and the attenuation ratio; The determination module is used to determine that the target component has a fault when the number of fault jitters in the current counting cycle exceeds the fault jitter number threshold.
9. An electronic device, characterized in that: The method comprises a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the fault detection method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, wherein when the computer program is executed by a processor, the fault detection method according to any one of claims 1 to 7 is implemented.