Driving circuit and driving method

Abstract

The application discloses a driving circuit and a driving method. The driving circuit comprises a light-emitting module, a power supply module, a control module and a voltage adjustment module. The light-emitting module is electrically connected with the voltage adjustment module. The power supply module is electrically connected with the voltage adjustment module and the control module. The control module is electrically connected with the voltage adjustment module. The light-emitting module is used for emitting light based on a driving current. The control module is used for outputting a first control signal and transmitting the first control signal to the power supply module. The control module is also used for outputting a second control signal and transmitting the second control signal to the voltage adjustment module. The power supply module is used for outputting a first voltage to the voltage adjustment module under the control of the first control signal. The voltage adjustment module is used for adjusting the first voltage to a second voltage under the control of the second control signal, so as to control the size of the driving current. By arranging the voltage adjustment module, the display picture color deviation problem caused by the difference between the second voltages of different pixel regions can be solved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a driving circuit and driving method. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are one of the hottest research topics in the field of flat panel displays today. Compared with liquid crystal displays (LCDs), OLEDs have advantages such as low energy consumption, low production cost, self-illumination, wide viewing angle, and fast response speed. Currently, OLEDs have begun to replace traditional liquid crystal display panels in the fields of mobile phones, PDAs, digital cameras, and other flat panel displays.

[0003] Currently, pulse width modulation (PWM) is commonly used to control the brightness of organic light-emitting diode (OLED) displays. This involves dividing a single frame into several subframes, each corresponding to a pulse cycle. Within each pulse cycle, a low level indicates that a subpixel is emitting light, while a high level indicates that the subpixel is not emitting light. Therefore, within a single frame, the higher the duty cycle of the low level, the longer the subpixel emits light, and the higher the brightness of the display.

[0004] In existing organic light-emitting displays, the actual output current of the driver chip differs from the theoretical current value. As a result, the light-emitting diodes in each pixel have a certain half-width and light decay phenomenon, which leads to deviations in the full-color display of the light-emitting diodes. At the same time, due to the different power supply voltages from the input point, different driving voltages are generated for different pixels, resulting in different currents. Generally, the farther away from the power supply terminal, the greater the resistance, the more significant the current drop, and the greater the decrease in the brightness of the light-emitting diode, causing uneven brightness. Summary of the Invention

[0005] This application provides a driving circuit and driving method. By setting a voltage adjustment module, the second voltage of different pixel areas is made consistent, which can solve the problem of color deviation in the display screen caused by the difference in the second voltage between different pixel areas.

[0006] In a first aspect, embodiments of this application provide a driving circuit, characterized in that it includes: a light-emitting module, a power supply module, a control module, and a voltage adjustment module. The light-emitting module is electrically connected to the voltage adjustment module, the power supply module is electrically connected to both the voltage adjustment module and the control module, and the control module is electrically connected to the voltage adjustment module. The light-emitting module is used to emit light based on a driving current. The control module is used to output a first control signal and transmit it to the power supply module. The control module is also used to output a second control signal and transmit it to the voltage adjustment module. The power supply module is used to output a first voltage to the voltage adjustment module under the control of the first control signal. The voltage adjustment module is used to adjust the first voltage to a second voltage under the control of the second control signal to control the magnitude of the driving current.

[0007] Optionally, in some embodiments of this application, the power module includes a first transistor, the first electrode of the first transistor is electrically connected to a first power supply terminal, the second electrode of the first transistor is electrically connected to a first node, and the gate of the first transistor is electrically connected to the control module.

[0008] Optionally, in some embodiments of this application, the light-emitting module includes a first resistor and a light-emitting device, one end of the first resistor is electrically connected to the voltage adjustment module, and the other end of the first resistor is electrically connected to the anode of the light-emitting device; the cathode of the light-emitting device is electrically connected to a second power supply terminal.

[0009] Optionally, in some embodiments of this application, the voltage adjustment module includes a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a second resistor, a third resistor, a fourth resistor, and a fifth resistor. The first electrode of the second transistor is electrically connected to the first node, the second electrode of the second transistor is electrically connected to the second node, and the gate of the second transistor is electrically connected to the control module. The first electrode of the third transistor is electrically connected to the second node, the second electrode of the third transistor is electrically connected to the third node, and the gate of the third transistor is electrically connected to the control module. The first electrode of the fourth transistor is electrically connected to the fourth node, the second electrode of the fourth transistor is electrically connected to the fifth node, and the gate of the fourth transistor is electrically connected to the control module. The first electrode of the fifth transistor is electrically connected to the sixth node, and the second electrode of the fifth transistor is electrically connected to... At the seventh node, the gate of the fifth transistor is electrically connected to the control module; the first electrode of the sixth transistor is electrically connected to the eighth node, the second electrode of the sixth transistor is electrically connected to the ninth node, and the gate of the sixth transistor is electrically connected to the control module; the third node is electrically connected to the fifth node, the seventh node, and the ninth node, and one end of the first resistor is electrically connected to the ninth node; one end of the second resistor is electrically connected to the second node, and the other end of the second resistor is electrically connected to the fourth node; one end of the third resistor is electrically connected to the fourth node, and the other end of the second resistor is electrically connected to the sixth node; one end of the fourth resistor is electrically connected to the sixth node, and the other end of the second resistor is electrically connected to the eighth node; one end of the fifth resistor is electrically connected to the eighth node, and the other end of the second resistor is electrically connected to the second power supply terminal.

[0010] Optionally, in some embodiments of this application, the voltage adjustment module further includes a seventh transistor, the first electrode of which is electrically connected to the first node, the second electrode of which is electrically connected to the eighth node, and the gate of which is electrically connected to the control module.

[0011] Optionally, in some embodiments of this application, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are all transistors of the same type.

[0012] Optionally, in some embodiments of this application, the second control signal includes a pulse width modulation signal, and the control module controls the voltage adjustment module to generate the second voltage through the pulse width modulation signal.

[0013] Optionally, in some embodiments of this application, the control module controls the magnitude of the second voltage by adjusting the duty cycle of the pulse width modulation signal, thereby adjusting the magnitude of the drive current.

[0014] Optionally, in some embodiments of this application, the magnitude of the drive current is:

[0015] ,

[0016] Iout represents the magnitude of the drive current, VDD' represents the second voltage, R1 represents the resistance value of the first resistor, and Duty represents the duty cycle of the pulse width control signal.

[0017] On the other hand, this application provides a driving method applied to the above-mentioned driving circuit, comprising: a control module outputting a first control signal and transmitting it to a power supply module; the power supply module outputting a first voltage to a voltage adjustment module under the control of the first control signal; the control module outputting a second control signal and transmitting it to the voltage adjustment module; the voltage adjustment module adjusting the first voltage to a second voltage under the control of the second control signal to control the magnitude of the driving current; and a light-emitting module emitting light based on the driving current.

[0018] This application provides a driving circuit and driving method. The driving circuit includes a light-emitting module, a power supply module, a control module, and a voltage adjustment module. The light-emitting module is connected in series in the light-emitting circuit. The power supply module is electrically connected to a first power supply terminal and is used to transmit a first voltage to a first node. The control module is electrically connected to the power supply module and is used to provide a control signal to control the conduction and cutoff of the power supply module. The voltage adjustment module is electrically connected to the light-emitting module, the power supply module, and the control module respectively, and is used to adjust the magnitude of a second voltage under the control of the control signal. The driving circuit provided in this application, by setting a voltage adjustment module to adjust the second voltage of different pixel areas, ensures that the second voltage between pixels in the same row is consistent, ensuring uniform brightness of the displayed image. This solves the problem of color shift in the displayed image caused by the difference in the second voltage between different pixel areas, thus improving the display effect. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. The accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the drive circuit provided in an embodiment of this application;

[0021] Figure 2 This is a schematic diagram of a first type of driving circuit provided in the embodiments of this application;

[0022] Figure 3 This is a schematic diagram of the subframe emission time in the driving circuit provided in the embodiments of this application;

[0023] Figure 4 This is a second circuit diagram of the driving circuit provided in the embodiments of this application;

[0024] Figure 5 This is a flowchart illustrating the driving method provided in an embodiment of this application. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0026] This application provides a driving circuit and driving method. By setting a voltage adjustment module, the second voltage of different pixel areas is made consistent, which can solve the problem of color shift in the display screen caused by the difference in the second voltage between different pixel areas. Detailed descriptions are provided below. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of embodiments. Furthermore, in the description of this application, the term "comprising" means "including but not limited to". The terms "first", "second", "third", etc., are used merely as identifiers to distinguish different objects, and are not used to describe a specific order.

[0027] The transistors used in all embodiments of this application can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. Since the source and drain of the transistors used here are symmetrical, they are interchangeable. In the embodiments of this application, to distinguish the two electrodes of the transistor other than the gate, one of the source and drain is called the first electrode, and the other is called the second electrode. According to the configuration shown in the accompanying drawings, the middle terminal of the switching transistor is the gate, the signal input terminal is the source, and the output terminal is the drain. Furthermore, the transistors used in the embodiments of this application are N-type transistors or P-type transistors. The N-type transistor conducts when the gate is at a high potential and is cut off when the gate is at a low potential; the P-type transistor conducts when the gate is at a low potential and is cut off when the gate is at a high potential. In the embodiments of this application, the light-emitting device D can be a Mini-LED or a Micro-LED.

[0028] Please see Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the drive circuit provided in an embodiment of this application; Figure 2 This is a schematic diagram of a first type of driving circuit provided in an embodiment of this application. For example... Figure 1 As shown, this application embodiment provides a driving circuit 100, including: a light-emitting module 10, a power supply module 20, a control module 30, and a voltage adjustment module 40. The light-emitting module 10 is electrically connected to the voltage adjustment module 40, the power supply module 20 is electrically connected to both the voltage adjustment module 40 and the control module 30, and the control module 30 is electrically connected to the voltage adjustment module 40. The light-emitting module 10 emits light based on a driving current. The control module 30 outputs a first control signal and transmits it to the power supply module 20, and also outputs a second control signal and transmits it to the voltage adjustment module 40. The power supply module 20 outputs a first voltage VDD to the voltage adjustment module 40 under the control of the first control signal. The voltage adjustment module 40 adjusts the first voltage VDD to a second voltage VDD' under the control of the second control signal to control the driving current I. out Size.

[0029] The driving circuit provided in this application adjusts the second voltage VDD' of different pixel areas by setting a voltage adjustment module 40, so as to ensure that the second voltage VDD' of pixels in the same row is consistent, and to ensure uniform brightness of the display screen. This can solve the problem of color shift in the display screen caused by the difference of the second voltage VDD' between different pixel areas and improve the display effect.

[0030] In this embodiment, the power module 20 includes a first transistor T1, the first electrode of the first transistor T1 is electrically connected to the first power supply terminal, the second electrode of the first transistor T1 is electrically connected to the first node A, and the gate of the first transistor T1 is electrically connected to the control module 30.

[0031] In the embodiments of this application, such as Figure 2 As shown, the light-emitting module 10 includes a first resistor R1 and a light-emitting device LED. One end of the first resistor R1 is electrically connected to the voltage adjustment module 40, and the other end of the first resistor R1 is electrically connected to the anode of the light-emitting device LED. The cathode of the light-emitting device LED is electrically connected to the second power supply terminal VSS.

[0032] It should be noted that both the first power supply terminal VDD and the second power supply terminal VSS are used to output a preset voltage value. Furthermore, in this embodiment, the potential of the first power supply terminal VDD is greater than the potential of the second power supply terminal VSS. Specifically, the potential of the second power supply terminal VSS can be the potential of the ground terminal. Of course, it is understood that the potential of the second power supply terminal VSS can also be other values.

[0033] In this embodiment, the voltage adjustment module 40 includes a first transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The first electrode of the first transistor T2 is electrically connected to a first node A, the second electrode of the first transistor T2 is electrically connected to a second node B, and the gate of the first transistor T2 is electrically connected to the control module 30. The first electrode of the third transistor T3 is electrically connected to the second node B, the second electrode of the third transistor T3 is electrically connected to a third node C, and the gate of the third transistor T3 is electrically connected to the control module 30. The first electrode of the fourth transistor T4 is electrically connected to a fourth node D, the second electrode of the fourth transistor T4 is electrically connected to a fifth node E, and the gate of the fourth transistor T4 is electrically connected to the control module 30. The first electrode of the fifth transistor T5 is electrically connected to a sixth node F. The second electrode of transistor T5 is electrically connected to the seventh node G, and the gate of the fifth transistor T5 is electrically connected to the control module 30; the first electrode of the sixth transistor T6 is electrically connected to the eighth node H, the second electrode of the sixth transistor T6 is electrically connected to the ninth node I, and the gate of the sixth transistor T6 is electrically connected to the control module 30; the third node C is electrically connected to the fifth node E, the seventh node G, and the ninth node I, and one end of the first resistor R1 is electrically connected to the ninth node I; one end of the second resistor R2 is electrically connected to the second node B, and the other end of the second resistor R2 is electrically connected to the fourth node D; one end of the third resistor R3 is electrically connected to the fourth node D, and the other end of the second resistor R2 is electrically connected to the sixth node F; one end of the fourth resistor R4 is electrically connected to the sixth node F, and the other end of the second resistor R2 is electrically connected to the eighth node H; one end of the fifth resistor R5 is electrically connected to the eighth node H, and the other end of the second resistor R2 is electrically connected to the second power supply terminal VSS.

[0034] In the embodiments of this application, the first transistor T1, the first transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all transistors of the same type. Specifically, they can be one or more of the following: low-temperature polycrystalline silicon thin-film transistors, oxide semiconductor thin-film transistors, amorphous silicon thin-film transistors, and field-effect transistors. The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 can be the same or different. Those skilled in the art can set and adjust the resistance values ​​according to actual needs, and this application does not impose any limitations on this.

[0035] In this embodiment, the second control signal includes a pulse width modulation (PWM) signal. The control module 30 controls the voltage adjustment module 40 to generate a second voltage VDD' via the PWM signal. The control module 30 adjusts the duty cycle of the PWM signal to control the magnitude of the second voltage VDD' and adjust the drive current I. outThe size of the light source is adjusted, thereby adjusting the brightness of the light-emitting module 10.

[0036] Specifically, after receiving the frame image to be displayed, the control module 30 generates N sub-frame images from the received frame image to be displayed according to the number N sub-frames within a frame in the preset pulse width modulation parameters, and configures the emission time and corresponding emission brightness for each sub-frame image in the N sub-frame images; then, it controls the display panel to display each sub-frame image sequentially, and when displaying each sub-frame image, it controls the pixels in that sub-frame image that need to emit light to emit light according to the corresponding emission brightness during the emission time period of that sub-frame image. However, in each sub-frame image, the emission brightness corresponding to each pixel is determined according to the display brightness corresponding to each pixel in the frame image to be displayed and the emission time configured for that sub-frame image, and the emission brightness corresponding to each pixel is selected from a range greater than or equal to the minimum emission brightness of the pixel and less than or equal to the maximum emission brightness of the pixel. Preferably, as shown... Figure 3 As shown, the number of subframes N within a frame is equal to 4, and the illumination time configured for each subframe image is equal, i.e., t1=t2=t3=t4. Figure 3 Only two different emission times, PWM1 and PWM2, are shown. The emission time of the subframe image can be adjusted as needed. Furthermore, the number of subframes N in a frame can also be 5 or 6, and the emission time configured for each subframe image can be equal or unequal.

[0037] That is, within one frame, the display brightness of a pixel is determined not only by the emission time of the emission subframe, where the emission time of the pixel is determined by the duty cycle of the pulse width modulation signal provided by the control module 30; at the same time, the display brightness of the pixel is also determined by the emission brightness of the pixel, where the emission brightness of the pixel is determined by the magnitude of the second voltage VDD'. By setting the voltage adjustment module 40 to adjust the magnitude of the second voltage VDD' according to the pulse width modulation signal, not only can low grayscale brightness be accurately displayed, but also fewer subframes can be used. At the same time, the uniformity of the display brightness of pixels in the plane is ensured, and color shift is avoided.

[0038] In this embodiment of the application, the magnitude of the drive current is:

[0039] ;

[0040] Among them, I out The value represents the driving current, VDD' represents the second voltage VDD', R1 represents the resistance value of the first resistor R1, and Duty represents the duty cycle of the pulse width control signal.

[0041] Specifically, the control module 30 provides a pulse width modulation signal to the power supply module 20 to control the first transistor T1 to turn on, so that the power supply module 20 can transmit the first voltage VDD to the voltage adjustment module 40. The light emission time of the pixel is determined by the duty cycle of the pulse width modulation signal provided by the control module 30. Under the control of the pulse width modulation signal, the voltage adjustment module 40 generates different second voltages VDD'.

[0042] In this embodiment, the voltage adjustment module 40 generates different magnitudes of the second voltage VDD', including the following various adjustment methods:

[0043] The first adjustment method: the first transistor T2 and the third transistor T3 are turned on, and the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is consistent with the first voltage VDD, that is, VDD'=VDD, where VDD represents the first voltage VDD.

[0044] The second adjustment method: the first transistor T2 and the sixth transistor T6 are turned on, while the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is:

[0045] ;

[0046] Where VDD represents the first voltage VDD.

[0047] The third adjustment method: the first transistor T2 and the fifth transistor T5 are turned on, while the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is:

[0048] ;

[0049] Where VDD represents the first voltage VDD.

[0050] The fourth adjustment method: the first transistor T2 and the fourth transistor T4 are turned on, while the third transistor T3, the fifth transistor T5, and the sixth transistor T6 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is:

[0051] ;

[0052] Where VDD represents the first voltage VDD.

[0053] In this embodiment, the pixels farther from the power module 20 have higher resistance and a more significant drop in current. Therefore, pixels in the farther region are adjusted with a higher second voltage VDD' to increase their driving current. Conversely, pixels closer to the power module 20 have lower resistance and a less significant drop in current. Therefore, pixels in the closer region are adjusted with a relatively lower second voltage VDD' to make the second voltage VDD' the same as or relatively higher than the first voltage VDD, so that the driving current remains unchanged or relatively increases. This design ensures that the current flowing through the LEDs corresponding to the pixels in the farther region is the same as the current flowing through the LEDs corresponding to the pixels in the closer region, i.e., the driving current is consistent, thereby avoiding display abnormalities caused by uneven brightness of pixels in different regions.

[0054] As a specific embodiment of this application, please refer to Figure 4 , Figure 4 This is a schematic diagram of the subframe emission time in the driving circuit provided in the embodiments of this application. For example... Figure 4 As shown, this application also provides a driving circuit 200. The difference between driving circuit 200 and driving circuit 100 is that the voltage adjustment module 40 in driving circuit 200 further includes a seventh transistor T7. The first electrode of the seventh transistor T7 is electrically connected to the first node A, the second electrode of the seventh transistor T7 is electrically connected to the eighth node H, and the gate of the seventh transistor T7 is electrically connected to the control module 30. The second electrode of the seventh transistor T7 being electrically connected to the eighth node H serves to increase the voltage.

[0055] In this embodiment, the power module 20 includes a first transistor T1, the first electrode of the first transistor T1 is electrically connected to the first power supply terminal, the second electrode of the first transistor T1 is electrically connected to the first node A, and the gate of the first transistor T1 is electrically connected to the control module 30.

[0056] In this embodiment, the light-emitting module 10 includes a first resistor R1 and a light-emitting device LED. One end of the first resistor R1 is electrically connected to the voltage adjustment module 40, and the other end of the first resistor R1 is electrically connected to the anode of the light-emitting device LED. The cathode of the light-emitting device LED is electrically connected to the second power supply terminal VSS. The first resistor R1 serves to limit current and divide voltage.

[0057] In this embodiment, the voltage adjustment module 40 includes a first transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The first electrode of the first transistor T2 is electrically connected to a first node A, the second electrode of the first transistor T2 is electrically connected to a second node B, and the gate of the first transistor T2 is electrically connected to the control module 30. The first electrode of the third transistor T3 is electrically connected to the second node B, the second electrode of the third transistor T3 is electrically connected to a third node C, and the gate of the third transistor T3 is electrically connected to the control module 30. The first electrode of the fourth transistor T4 is electrically connected to a fourth node D, the second electrode of the fourth transistor T4 is electrically connected to a fifth node E, and the gate of the fourth transistor T4 is electrically connected to the control module 30. The first electrode of the fifth transistor T5 is electrically connected to a sixth node F. The second electrode of transistor T5 is electrically connected to the seventh node G, and the gate of the fifth transistor T5 is electrically connected to the control module 30; the first electrode of the sixth transistor T6 is electrically connected to the eighth node H, the second electrode of the sixth transistor T6 is electrically connected to the ninth node I, and the gate of the sixth transistor T6 is electrically connected to the control module 30; the third node C is electrically connected to the fifth node E, the seventh node G, and the ninth node I, and one end of the first resistor R1 is electrically connected to the ninth node I; one end of the second resistor R2 is electrically connected to the second node B, and the other end of the second resistor R2 is electrically connected to the fourth node D; one end of the third resistor R3 is electrically connected to the fourth node D, and the other end of the second resistor R2 is electrically connected to the sixth node F; one end of the fourth resistor R4 is electrically connected to the sixth node F, and the other end of the second resistor R2 is electrically connected to the eighth node H; one end of the fifth resistor R5 is electrically connected to the eighth node H, and the other end of the second resistor R2 is electrically connected to the second power supply terminal VSS.

[0058] In the embodiments of this application, the first transistor T1, the first transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are all transistors of the same type. Specifically, they can be one or more of the following: low-temperature polycrystalline silicon thin-film transistors, oxide semiconductor thin-film transistors, amorphous silicon thin-film transistors, and field-effect transistors. The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 can be the same or different. Those skilled in the art can set and adjust the resistance values ​​according to actual needs, and this application does not impose any limitations on this.

[0059] In this embodiment, the second control signal includes a pulse width modulation (PWM) signal. The control module 30 controls the voltage adjustment module 40 to generate a second voltage VDD' via the PWM signal. The control module 30 adjusts the duty cycle of the PWM signal to control the magnitude of the second voltage VDD', thereby adjusting the brightness of the light-emitting module 10.

[0060] In this embodiment, within one frame, the display brightness of a pixel is determined not only by the emission time of the emission subframe, where the emission time of the pixel is determined by the duty cycle of the pulse width modulation signal provided by the control module 30; but also by the emission brightness of the pixel, where the emission brightness of the pixel is determined by the magnitude of the second voltage VDD'. By setting the voltage adjustment module 40 to adjust the magnitude of the second voltage VDD' according to the pulse width modulation signal, not only can low grayscale brightness be accurately displayed, but also fewer subframes can be used. At the same time, the uniformity of the display brightness of pixels within the plane is ensured, and color shift is avoided.

[0061] In this embodiment of the application, the magnitude of the drive current is:

[0062] ;

[0063] Among them, I out The value represents the driving current, VDD' represents the second voltage VDD', R1 represents the resistance value of the first resistor R1, and Duty represents the duty cycle of the pulse width control signal.

[0064] Specifically, the control module 30 provides a pulse width modulation signal to the power supply module 20 to control the first transistor T1 to turn on, so that the power supply module 20 can transmit the first voltage VDD to the voltage adjustment module 40. The light emission time of the pixel is determined by the duty cycle of the pulse width modulation signal provided by the control module 30. Under the control of the pulse width modulation signal, the voltage adjustment module 40 generates different second voltages VDD'.

[0065] In this embodiment, the voltage adjustment module 40 generates different magnitudes of the second voltage VDD', including the following various adjustment methods:

[0066] The first adjustment method: the first transistor T2 and the third transistor T3 are turned on, and the fourth transistor T4, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is consistent with the first voltage VDD, that is, VDD'=VDD, where VDD represents the first voltage VDD.

[0067] The second adjustment method: the first transistor T2 and the sixth transistor T6 are turned on, while the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off. In this case, the second voltage VDD' output by the voltage adjustment module 40 is:

[0068] ;

[0069] The third adjustment method: the first transistor T2 and the fifth transistor T5 are turned on, while the third transistor T3, the fourth transistor T4, the sixth transistor T6, and the seventh transistor T7 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is:

[0070] ;

[0071] The fourth adjustment method: the first transistor T2 and the fourth transistor T4 are turned on, while the third transistor T3, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is:

[0072] ;

[0073] The fifth adjustment method: the seventh transistor T7 and the sixth transistor T6 are turned on, and the first transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is consistent with the first voltage VDD, that is, VDD'=VDD.

[0074] The sixth adjustment method: The seventh transistor T7 and the fifth transistor T5 are turned on, while the first transistor T2, the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are turned off. In this case, the second voltage VDD' output by the voltage adjustment module 40 is:

[0075] ;

[0076] The seventh adjustment method: The seventh transistor T7 and the fourth transistor T4 are turned on, while the first transistor T2, the third transistor T3, the fifth transistor T5, and the sixth transistor T6 are turned off. In this case, the second voltage VDD' output by the voltage adjustment module 40 is:

[0077] ;

[0078] Eighth adjustment method: The seventh transistor T7 and the third transistor T3 are turned on, while the first transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are turned off. At this time, the second voltage VDD' output by the voltage adjustment module 40 is:

[0079] ;

[0080] In this embodiment, the pixels farther from the power module 20 have higher resistance and a more significant drop in current. Therefore, pixels in the farther region are adjusted with a higher second voltage VDD' to increase their driving current. Conversely, pixels closer to the power module 20 have lower resistance and a less significant drop in current. Therefore, pixels in the closer region are adjusted with a relatively lower second voltage VDD' to make the second voltage VDD' the same as or relatively higher than the first voltage VDD, so that the driving current remains unchanged or relatively increases. This design ensures that the current flowing through the LEDs corresponding to the pixels in the farther region is the same as the current flowing through the LEDs corresponding to the pixels in the closer region, i.e., the driving current is consistent, thereby avoiding display abnormalities caused by uneven brightness of pixels in different regions.

[0081] The driving circuit provided in this application adjusts the second voltage VDD' of different pixel areas by setting a voltage adjustment module 40, so as to ensure that the second voltage VDD' of pixels in the same row is consistent, and to ensure uniform brightness of the display screen. This can solve the problem of color shift in the display screen caused by the difference of the second voltage VDD' between different pixel areas and improve the display effect.

[0082] Please see Figure 5 , Figure 5 This is a flowchart illustrating the driving method provided in an embodiment of this application. As shown in the figure, this application provides a driving method, including:

[0083] S10, the control module 30 outputs a first control signal and transmits it to the power module 20; under the control of the first control signal, the power module 20 outputs a first voltage VDD to the voltage adjustment module 40;

[0084] S20, the control module 30 outputs a second control signal and transmits it to the voltage adjustment module 40; under the control of the second control signal, the voltage adjustment module 40 adjusts the first voltage VDD to the second voltage VDD' to control the drive current I. out Size;

[0085] S30, the light-emitting module 10 is based on the driving current I out Glowing light.

[0086] In this embodiment, within one frame, the display brightness of a pixel is determined not only by the emission time of the emission subframe, where the emission time of the pixel is determined by the duty cycle of the pulse width modulation signal provided by the control module 30; but also by the emission brightness of the pixel, where the emission brightness of the pixel is determined by the magnitude of the second voltage VDD'. By setting the voltage adjustment module 40 to adjust the magnitude of the second voltage VDD' according to the pulse width modulation signal, not only can low grayscale brightness be accurately displayed, but also fewer subframes can be used. At the same time, the uniformity of the display brightness of pixels within the plane is ensured, and color shift is avoided.

[0087] The driving circuit provided in this application adjusts the second voltage VDD' of different pixel areas by setting a voltage adjustment module 40, so as to ensure that the second voltage VDD' of pixels in the same row is consistent, and to ensure uniform brightness of the display screen. This can solve the problem of color shift in the display screen caused by the difference of the second voltage VDD' between different pixel areas and improve the display effect.

[0088] The driving circuit and driving method provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A driving circuit, characterized in that, It includes a light-emitting module, a power supply module, a control module, and a voltage adjustment module. The light-emitting module is electrically connected to the voltage adjustment module, the power supply module is electrically connected to both the voltage adjustment module and the control module, and the control module is electrically connected to the voltage adjustment module. The light-emitting module is used to emit light based on the driving current; the control module is used to output a first control signal and transmit it to the power supply module, and the control module is also used to output a second control signal and transmit it to the voltage adjustment module; the power supply module is used to output a first voltage to the voltage adjustment module under the control of the first control signal; the voltage adjustment module is used to adjust the first voltage to a second voltage under the control of the second control signal, so as to control the magnitude of the driving current; The power module includes a first transistor, the first electrode of the first transistor is electrically connected to a first power supply terminal, the second electrode of the first transistor is electrically connected to a first node, and the gate of the first transistor is electrically connected to the control module. The light-emitting module includes a first resistor and a light-emitting device. One end of the first resistor is electrically connected to the voltage adjustment module, and the other end of the first resistor is electrically connected to the anode of the light-emitting device. The cathode of the light-emitting device is electrically connected to a second power supply terminal. The voltage adjustment module includes a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and a second resistor, a third resistor, a fourth resistor, and a fifth resistor; The first electrode of the sixth transistor is electrically connected to the second electrode of the seventh transistor, the second electrode of the sixth transistor is electrically connected to the light-emitting module, the gate of the sixth transistor is electrically connected to the control module, the first electrode of the seventh transistor is electrically connected to the first node, and the gate of the seventh transistor is electrically connected to the control module. The first electrode of the second transistor is electrically connected to the first node, the second electrode of the second transistor is electrically connected to the second node, and the gate of the second transistor is electrically connected to the control module; The first electrode of the third transistor is electrically connected to the second node, the second electrode of the third transistor is electrically connected to the third node, and the gate of the third transistor is electrically connected to the control module. The first electrode of the fourth transistor is electrically connected to the fourth node, the second electrode of the fourth transistor is electrically connected to the fifth node, and the gate of the fourth transistor is electrically connected to the control module. The first electrode of the fifth transistor is electrically connected to the sixth node, the second electrode of the fifth transistor is electrically connected to the seventh node, and the gate of the fifth transistor is electrically connected to the control module. The second electrode of the sixth transistor is electrically connected to the ninth node, and the gate of the sixth transistor is electrically connected to the control module; The third node is electrically connected to the fifth node, the seventh node, and the ninth node, and one end of the first resistor is electrically connected to the ninth node; One end of the second resistor is electrically connected to the second node, and the other end of the second resistor is electrically connected to the fourth node; One end of the third resistor is electrically connected to the fourth node, and the other end of the third resistor is electrically connected to the sixth node; One end of the fourth resistor is electrically connected to the sixth node, and the other end of the fourth resistor is electrically connected to the first electrode of the sixth transistor. The node where the fourth resistor and the first electrode of the sixth transistor are electrically connected is the eighth node. One end of the fifth resistor is electrically connected to the eighth node, and the other end of the fifth resistor is electrically connected to the second power supply terminal; When the second voltage equals the first voltage, the first transistor and the third transistor are turned on, while the fourth transistor, the fifth transistor, and the sixth transistor are turned off.

2. The driving circuit according to claim 1, characterized in that, The second voltage is configured as follows The first transistor and the sixth transistor are turned on, while the third transistor, the fourth transistor, and the fifth transistor are turned off. Where VDD represents the first voltage, VDD' is the second voltage, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance of the fourth resistor, and R5 is the resistance of the fifth resistor.

3. The driving circuit according to claim 1, characterized in that, The second voltage is configured as follows The first transistor and the fifth transistor are turned on, while the third transistor, the fourth transistor, and the sixth transistor are turned off. Where VDD represents the first voltage, VDD' is the second voltage, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance of the fourth resistor, and R5 is the resistance of the fifth resistor.

4. The driving circuit according to claim 1, characterized in that, The second voltage is configured as follows The first transistor and the fourth transistor are turned on, while the third transistor, the fifth transistor, and the sixth transistor are turned off. Where VDD represents the first voltage, VDD' is the second voltage, R2 is the resistance of the second resistor, R3 is the resistance of the third resistor, R4 is the resistance of the fourth resistor, and R5 is the resistance of the fifth resistor.

5. The driving circuit according to claim 1, characterized in that, The second control signal includes a pulse width modulation signal, which controls the voltage adjustment module to generate the second voltage. The control module controls the magnitude of the second voltage by adjusting the duty cycle of the pulse width modulation signal. The magnitude of the drive current is: ， I out VDD' represents the magnitude of the drive current, R1 represents the resistance value of the first resistor, and Duty represents the duty cycle of the pulse width control signal.

6. A driving method, applied to the driving circuit as described in any one of claims 1-5, characterized in that, include: The control module outputs the first control signal and transmits it to the power module; Under the control of the first control signal, the power module outputs a first voltage to the voltage adjustment module; The control module outputs a second control signal and transmits it to the voltage adjustment module; under the control of the second control signal, the voltage adjustment module adjusts the first voltage to the second voltage to control the magnitude of the drive current. The light-emitting module emits light based on the driving current.

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