Electronic device and method of manufacturing electronic device

Abstract

An electronic device and a method of manufacturing the electronic device. In one example, an electronic device includes a substrate including a substrate outer side, a substrate inner side, a dielectric structure, and a conductive structure. An electronic component includes an upper side, a lower side opposite the upper side and coupled to an inner side of the substrate, a lateral side connecting the upper side to the lower side, and a conductor on the upper side. A cover structure includes a sidewall coupled to an inner side of the substrate, and an upper wall coupled to the sidewall and including an inner side spaced from the conductor. A thermal interface material (TIM) contacts and is interposed between the conductor and the inner side of the upper wall. The TIM covers the conductors and the lateral sides of the electronic component. Other examples and related methods are also disclosed herein.

Description

Technical Field

[0001] The present disclosure relates generally to electronic devices, and more particularly to electronic devices and methods for making electronic devices. Background Art

[0002] Previous electronic packages and methods for forming electronic packages are inadequate, for example, resulting in excessive cost, reduced reliability, relatively low performance, or package size being too large. Other limitations and disadvantages of conventional and traditional methods will become apparent to those skilled in the art by comparing such methods with the present disclosure and referring to the drawings. Summary of the invention

[0003] In one example, an electronic device includes a substrate including a substrate outer side, a substrate inner side, a dielectric structure, and a conductive structure. The electronic component includes an upper side, a lower side opposite to the upper side and coupled to the inner side of the substrate, a lateral side connecting the upper side to the lower side, and a conductor on the upper side. A covering structure includes a sidewall coupled to the inner side of the substrate, and an upper wall coupled to the sidewall and including an inner side separated from the conductor. A thermal interface material (TIM) contacts the conductor and the inner side of the upper wall and is interposed therebetween. The TIM covers the conductor and the lateral side of the electronic component.

[0004] In one example, an electronic device includes a substrate, the substrate including a substrate outer side, a substrate inner side, a dielectric structure, and a conductive structure. A first electronic component includes a lower side coupled to the inner side of the substrate, an upper side opposite to the lower side and located far from the inner side of the substrate, and a lateral side connecting the upper side to the lower side. A covering structure includes a sidewall coupled to the inner side of the substrate, and an upper wall, the upper wall coupled to the sidewall and including an inner side spaced apart from the upper side of the first electronic component and overlying the upper side. A thermal interface material (TIM) is inserted between the upper side of the first electronic component and the inner side of the upper wall. The TIM covers the upper side and the lateral sides of the first electronic component, and the TIM is coupled to the conductive structure.

[0005] In one example, a method of manufacturing an electronic device includes providing a substrate, the substrate including a substrate outer side, a substrate inner side, a dielectric structure, and a conductive structure. The method includes providing an electronic component, the electronic component including an upper side, a lower side opposite the upper side and coupled to the inner side of the substrate, a lateral side connecting the upper side to the lower side, and a conductor on the upper side. The method includes coupling the lower side of the electronic component to the inner side of the substrate. The method includes providing a covering structure, the covering structure including a sidewall and an upper wall, the upper wall coupled to the sidewall and including an inner side separated from the conductor. The method includes coupling the sidewall to the inner side of the substrate. The method includes providing a thermal interface material (TIM) on the conductor so that it is interposed between the conductor and the inner side of the upper wall and covers the conductor and the lateral side of the electronic component.

[0006] Other examples are included in the present disclosure. Such examples can be found in the drawings, claims, or specification of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 A cross-sectional view of an example electronic device is shown.

[0008] Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E , Figure 2F and Figure 2G A cross-sectional view showing an example method for manufacturing an example electronic device.

[0009] Figure 3 A cross-sectional view of an example electronic device is shown. DETAILED DESCRIPTION

[0010] The following discussion provides various examples of electronic devices and methods of making electronic devices. Such examples are non-limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are non-limiting.

[0011] The drawings illustrate general construction methods, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the present disclosure. In addition, the elements in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements in the various figures may be exaggerated relative to other elements to help improve the understanding of the examples discussed in the present disclosure. The same reference numerals in different figures represent the same elements.

[0012] The term "or" means any one or more items in a list connected by "or". As an example, "x or y" means any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y or z" means any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0013] The terms “comprises,” “comprising,” “includes,” and / or “including” are “open” terms and specify the presence of stated features but do not preclude the presence or addition of one or more other features.

[0014] The terms "first", "second", etc. may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Thus, for example, a first element discussed in the present disclosure may be referred to as a second element without departing from the teachings of the present disclosure.

[0015] Unless otherwise specified, the term "coupled" may be used to describe that two elements are in direct contact with each other, or to describe that two elements are indirectly coupled through one or more other elements. For example, if element A is coupled to element B, element A may be in direct contact with element B or indirectly coupled to element B through an intervening element C. Similarly, the terms "over" or "on" may be used to describe that two elements are in direct contact with each other, or to describe that two elements are indirectly coupled through one or more other elements. Figure 1 A cross-sectional view of an example electronic device 100 is shown. Figure 1 In the example shown, electronic device 100 may include substrate 110, electronic component 120, underfill 130, thermal interface material (TIM) 140, cover structure 150, external interconnect 160, and bonding materials 170a and 170b. In some examples, electronic device 100 may include one or more electronic components 120'.

[0016] The substrate 110 may include a dielectric structure 111 and a conductive structure 112. The conductive structure 112 may include a substrate inward terminal 112a and a substrate outward terminal 112b. The substrate 110 may include a dam 115 laterally spaced apart from the electronic component 120. In some examples, the dam 115 may surround one or more sides of the electronic component 120. The electronic component 120 may include a conductor 121 at an upper side 120a distal to the substrate 110, and a component interconnect 125 at a lower side 120b proximate to the substrate 110. The electronic component 120 may include a lateral side 120c connecting the upper side 120a to the lower side 120b. In some examples, the bottom filler 130 may be inserted between the lower side 120b and the substrate 110, and may surround the component interconnect 125. The cover structure 150 may include an upper wall 152 and a side wall 151. In some examples, the upper wall 152 and the side wall 151 may be separate components. In some examples, the upper wall 152 and the sidewall 151 can be a single piece or integrated structure. In some examples, the sidewall 151 is coupled to the substrate 110 using a bonding material 170a, and the upper wall 152 is coupled to the sidewall 151 using a bonding material 170b. The TIM 140 can cover or encapsulate the electronic component 120 and attach the cover structure 150 to the conductor 121 of the electronic device 120.

[0017] Substrate 110, cover structure 150, bonding materials 170a and 170b, TIM 140, and external interconnect 160 may include or be referred to as an electronic package or package. The electronic package may protect electronic components 120 and 120' from being exposed to external elements and / or the environment. The electronic package may also provide electrical coupling between electronic components 120 and 120' and between electronic components 120 and 120' and external components or other electronic packages.

[0018] Figure 2A to Figure 2G Demonstrates methods for making an example electronic device (e.g., Figure 1 A cross-sectional view of an example method of an electronic device 100 shown in FIG.

[0019] Figure 2A is a cross-sectional view of the electronic device 100 at an early stage of manufacture. Figure 2A In the example shown in , a substrate 110 may be provided. In some examples, the substrate 110 may include or be referred to as a laminate substrate, a redistribution layer (RDL) substrate, a rigid substrate, a glass substrate, a semiconductor substrate, a printed circuit board, a multi-layer substrate, a molded lead frame, or a ceramic substrate. The substrate 110 may include a dielectric structure 111 and a conductive structure 112.

[0020] In some examples, the conductive structure 112 may include or be referred to as one or more conductors, conductive materials, conductive paths, conductive layers, RDLs, wiring layers, traces, vias, pads, or under-bump metallization (UBM). In some examples, one or more of the conductive layers may be interlaced with the dielectric layers of the dielectric structure 111. In some examples, the conductive structure 112 may include copper, aluminum, palladium, titanium, tungsten, titanium / tungsten, nickel, gold, or silver. In some examples, the conductive structure 112 may be provided by sputtering, electroless plating, electrolytic plating, physical vapor deposition (PVD), chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), or other processes known to those of ordinary skill in the art. In some examples, a portion of the conductive structure 112 may be exposed from the inner side 110a of the substrate 110 and from the outer side 110b of the substrate. The substrate inner side 110a may also be referred to as a substrate top side 110a, and the substrate outer side 110b may also be referred to as a substrate bottom side 110b.

[0021] The conductive structure 112 may include a substrate-inward terminal, an internal contact pad, a trace, or a pad 112a, and a substrate-outward terminal, an external contact pad, a trace, or a pad 112b. The internal contact pad 112a may be exposed from the substrate inner side 110a of the substrate 110, and the external contact pad 112b may be exposed from the substrate outer side 110b of the substrate 110. In some examples, the internal contact pad 112a or the external contact pad 112b may be provided in a matrix form having rows or columns, respectively. The conductive structure 112 may be coupled to the electronic components 120 and 120′ ( Figure 1 ) and external interconnect 160 ( Figure 1 ). For example, electronic components 120 and 120' may be coupled to internal contact pads 112a, and external interconnects 160 may be coupled to external contact pads 112b. Conductive structures 112 may transmit signals, currents, or voltages within substrate 110. In some examples, the thickness of conductive structures 112 may be in a range of about 3 μm to about 50 μm. The thickness of conductive structures 112 may relate to individual layers of conductive structures 112.

[0022] In some examples, the dielectric structure 111 may include or be referred to as one or more dielectrics, dielectric materials, dielectric layers, passivation layers, insulating layers, or protective layers. In some examples, the dielectric structure 111 may have a structure in which one or more dielectric layers are stacked. In some examples, the dielectric structure 111 may include a polymer, polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), bismaleimide triazine (BT), a molding material, a phenolic resin, an epoxy resin, a silicone resin, or an acrylate polymer. The dielectric structure 111 may contact the conductive structure 112. The dielectric structure 111 may expose a portion of the conductive structure 112. In some examples, the dielectric structure 111 may maintain the outer shape of the substrate 110, and may structurally support the conductive structure 112 and the electronic components 120 and 120'. In some examples, the dielectric structure 111 may be provided by spin coating, spray coating, printing, oxidation, PVD, CVD, MOCVD, ALD, LPCVD, PECVD, or other processes known to those of ordinary skill in the art. The upper side and the lower side of the dielectric structure 111 may be a portion of the substrate inner side 110a and the substrate outer side 110o of the substrate 110, respectively. The substrate outer side 110b may be opposite to the substrate inner side 110a. In some examples, the thickness of the individual layers of the dielectric structure 111 may be in the range of about 3 μm to about 50 μm. The combined thickness of all layers of the dielectric structure 111 may define the thickness of the substrate 110. In some examples, the total thickness of the dielectric structure 111 may be in the range of about 10 micrometers (μm) to 500 μm.

[0023] In some examples, the substrate 110 may include a dam 115 coupled to the inner side 110a of the substrate. In some examples, the dam 115 may include a conductive material. For example, the dam 115 may include a metal and may be coupled to the internal contact pad 112a. In some examples, the dam 115 may be coupled to ground via the internal contact pad 112a and the conductive structure 112. In some examples, the dam 115 may be provided by deposition, evaporation, printing, plating or sputtering. In some examples, the dam 115 may include a ring shape such as a flat rectangular ring, and a cavity may be provided therein. In some examples, the thickness of the dam 115 may be in the range of about 50 μm to about 200 μm. In some examples, the width (thickness in the plane) of the dam 115 may be in the range of about 50 μm to about 500 μm.

[0024] In some examples, the dam 115 may include a non-conductive material. For example, the dam 115 may include a dielectric, such as an insulating polymer. In some examples and in addition to the above methods, the dam 115 may also be applied via dispensing or printing, or may be attached in the form of a film or other preformed structure. In other examples, the dam 115 may be coupled to the dielectric structure 111 at the inner side 110a of the substrate.

[0025] In some instances, substrate 110 may have an area that varies depending on the area or number of electronic components 120 and 120'. In some instances, substrate 110 may have an area of ​​about 8 millimeters (mm)×8 mm to about 150 mm×150 mm. In some instances, substrate 110 may have a thickness of about 0.2 mm to about 4 mm. In some instances, substrate 110 may be an RDL substrate. The RDL substrate may include (a) one or more conductive redistribution layers and one or more dielectric layers that may be formed layer by layer over an electronic device to which the RDL substrate is to be electrically coupled or (b) may be formed layer by layer over a carrier and may be completely or at least partially removed after the electronic device and the RDL substrate are coupled together. The RDL substrate may be manufactured layer by layer as a wafer-level substrate on a circular wafer with a wafer-level process, and / or manufactured layer by layer as a panel-level substrate on a rectangular or square panel carrier with a panel-level process. The RDL substrate can be formed by an additive deposition process, which may include one or more dielectric layers stacked alternately with one or more conductive layers, wherein the one or more conductive layers define corresponding conductive redistribution patterns or traces, and the conductive redistribution patterns or traces are configured to collectively (a) fan the electrical traces out of the footprint of the electronic device, and / or (b) fan the electrical traces into the footprint of the electronic device. The conductive pattern can be formed using a plating process such as an electroplating process or an electroless plating process. The conductive pattern may include a conductive material, such as copper or other plateable metal. The location of the conductive pattern can be made using a photopatterning process such as a photolithography process and a photoresist material used to form a photolithography mask. The dielectric layer of the RDL substrate can be patterned using a photopatterning process that can include a photolithography mask, through which light is exposed to the desired features of the photopattern, such as vias in the dielectric layer. The dielectric layer can be made of a photo-definable organic dielectric material such as polyimide (PI), benzocyclobutene (BCB) or polybenzoxazole (PBO). These dielectric materials can be spun or otherwise applied in liquid form rather than attached in the form of a preformed film. In order to allow the desired photo-defined features to be properly formed, these photo-definable dielectric materials can omit structural reinforcing agents, or can be filler-free, without strands, woven fabrics or other particles that may interfere with the light from the photopatterning process. In some instances, these filler-free properties of filler-free dielectric materials can allow the thickness of the resulting dielectric layer to be reduced. Although the photo-definable dielectric materials described above can be organic materials, in other instances, the dielectric material of the RDL substrate can include one or more inorganic dielectric layers. Some examples of inorganic dielectric layers can include silicon nitride (Si3N4), silicon oxide (SiO2) and / or SiON. The inorganic dielectric layers may be formed not by using photodefined organic dielectric materials but by growing the inorganic dielectric layers using oxidation or nitridation processes.Such inorganic dielectric layers may be filler-free and free of strands, weaves, or other dissimilar inorganic particles.In some examples, the RDL substrate may omit a permanent core structure or carrier, such as a dielectric material including bismaleimide triazine (BT) or FR4, and these types of RDL substrates may be referred to as coreless substrates.Substrates as disclosed herein may include RDL substrates.

[0026] In some examples, substrate 110 may be a preformed substrate. The preformed substrate may be manufactured before being attached to an electronic device and may include a dielectric layer between corresponding conductive layers. The conductive layer may include copper and may be formed using an electroplating process. The dielectric layer may be a relatively thick non-photodefinable layer that may be attached as a preformed film rather than as a liquid, and may include a resin having fillers such as strands, woven fabrics, and / or other inorganic particles for rigidity and / or structural support. Since the dielectric layer is non-photodefinable, features such as through holes or openings may be formed by using drilling or lasers. In some examples, the dielectric layer may include a prepreg material or an Ajinomoto Buildup Film (ABF). The preformed substrate may include a permanent core structure or carrier, such as a dielectric material including bismaleimide triazine (BT) or FR4, and the dielectric layer and the conductive layer may be formed on the permanent core structure. In other examples, the preformed substrate may be a coreless substrate omitting a permanent core structure, and the dielectric and conductive layers may be formed on a sacrificial carrier that is removed after forming the dielectric and conductive layers and before attaching to an electronic device. The preformed substrate may be referred to as a printed circuit board (PCB) or a laminate substrate. This preformed substrate may be formed by a semi-additive process or a modified semi-additive process. A substrate as disclosed herein may include a preformed substrate.

[0027] Figure 2B A cross-sectional view of the electronic device 100 is shown in a later stage of manufacturing. Figure 2B In the example shown, the electronic component 120 can be disposed on the substrate inner side 110a of the substrate 110. In some examples, the electronic component 120 can be coupled to the conductive structure 112 of the substrate 110. For example, the electronic component 120 can be coupled to the inner contact pad 112a.

[0028] In some instances, electronic component 120 may include or be referred to as one or more dies, chips, or packages. In some instances, electronic component 120 may include a memory, a digital signal processor (DSP), a microprocessor, a network processor, a power management processor, an audio processor, an RF circuit, a wireless baseband system-on-chip (SoC) processor, a sensor, or an application-specific integrated circuit (ASIC).

[0029] The electronic component 120 may be disposed in a cavity of the dam 115 on the inner side 110a of the substrate. In some examples, the dam 115 laterally surrounds the electronic component 120. In some examples, the electronic component 120 may be located at the center of the inner side 110a of the substrate 110. In some examples, in the electronic component 120, the lower side 120b may include or be referred to as an active side, and the upper side 120a may include or be referred to as an inactive side. In some examples, the upper side 120a is at the far side of the inner side 110a of the substrate, and the lower side 120b is near the inner side 110a of the substrate. The electronic component 120 may include one or more lateral sides 120c connected to the upper side 120a and the lower side 120b. The dam 115 is laterally spaced apart from the lateral sides 120c of the electronic component 120 so that a portion of the inner side 110a of the substrate is located between the dam 115 and the electronic component 120. In some examples, the distance between the lateral side 120c of the electronic component 120 and the dam 115 may be in a range of about 100 μm to about 2000 μm. In some examples, the dam 115 continuously surrounds the electronic device 120 without interruption or discontinuity.

[0030] The electronic component 120 may include a conductor 121 above the upper side 120a. In some examples, the conductor 121 may include or be referred to as a backside metallization (BSM) plating, a conductive film or a conductive layer. For example, the conductor 121 may be provided on the upper side 120a of the electronic component by electroplating, electroless plating, evaporation, sputtering or PVD, etc. In some examples, the conductor 121 includes a deposited conductor or a plated conductor structure. In some examples, the conductor 121 may include one or more of the following: copper (Cu), lead (Pb), tin (Sn), aluminum (Al), palladium (Pd), titanium (Ti), tungsten (W), titanium / tungsten (Ti / W), nickel (Ni), gold (Au) or silver (Ag). In some examples, the thickness of the conductor 121 may be in the range of about 0.3 μm to about 3 μm. In the current example, the conductor 121 is provided as a part of the electronic component 120 or a structural element of the electronic component. In some examples, the conductor 121 extends laterally to the lateral side 120c of the electronic component 120. In some examples, the lateral edge 121a of the conductor 121 is substantially coplanar with the lateral side 120c of the electronic component 120. In some examples, the conductor 121 is not or is not a structure formed onto the TIM 140 and then placed onto the upper side 120a of the electronic component as part of the cover structure 150.

[0031] The electronic component 120 may include a component interconnect 125 above the lower side 120b. The component interconnect 125 may be provided adjacent to the lower side 120b of the electronic component 120 and spaced apart from each other in the row or column direction. The component interconnect 125 may include or be referred to as a bump, a column, a pad, or a solder ball. The component terminal 125 may be provided as an electrical contact between the electronic component 120 and the substrate 110. The component terminal 125 may be coupled to the conductive structure 112. For example, the component terminal 125 may be coupled to the inner contact pad 112a of the conductive structure 112 by a mass reflow process, a thermal compression process, or a laser bonding process. In some examples, the component terminal 125 may include copper (Cu), lead (Pb), tin (Sn), aluminum (Al), palladium (Pd), titanium (Ti), tungsten (W), titanium / tungsten (Ti / W), nickel (Ni), gold (Au), or silver (Ag). In other examples, the component interconnects 125 may be disposed on the lower side 120b of the electronic component 120 by electroplating, electroless plating, sputtering, PVD, CVD, MOCVD, ALD, LPCVD, or PECVD. For example, after providing a photoresist pattern for exposing the bonding pads of the electronic component 120, the component interconnects 125 may be provided so as to contact the exposed bonding pads on the lower side 120b of the electronic component 120. In some examples, the thickness of the component interconnects 125 may be in the range of about 1 μm to about 2 μm, and the width and pitch of the component interconnects 125 may be in the range of about 5 μm to about 10 μm.

[0032] In some examples, a pick-and-place device may pick up an electronic component 120 and place the electronic component 120 on the substrate inner side 110a of the substrate 110. A component interconnect 125 of the electronic component 120 may be located on the inner contact pad 112a of the substrate 110. Subsequently, the component interconnect 125 of the electronic component 120 may contact the inner contact pad 112a and be bonded to the inner contact pad by a mass reflow process, a thermal compression process, or a laser bonding process. In some examples, the electronic component 120 may include or be referred to as a die, a chip, or a package. In some examples, the overall thickness of the electronic component 120 may be in the range of about 0.3 mm to about 9 mm, and the area of ​​the electronic component 120 may be in the range of about 0.5 mm×0.5 mm to about 70 mm×70 mm. In some examples, the electronic component 120 or other electronic components may be disposed on the substrate outer side 110b of the substrate 110.

[0033] In some instances, the electronic component 120' may be disposed outside the dam 115 on the inner side 110a of the substrate. The electronic component 120' may include a component interconnect 125'. In some instances, the electronic component 120' and the component interconnect 125' may have corresponding elements, features, materials, or manufacturing methods similar to the electronic component 120 and the component interconnect 125. However, in some instances, the electronic component 120' does not include or contain a conductor 121 above one side of the electronic component 120' that is far from the substrate 110. The electronic component 120' may include or be referred to as a bare die, chip, package, or passive element. For example, the electronic component 120' may include a capacitor, a resistor, or an inductor. In some instances, the thickness of the electronic component 120' may be in the range of about 50 μm to about 2000 μm.

[0034] Although the electronic component 120' is shown as being in a face-down or flip chip configuration (where the component terminals are positioned on the lower side), the electronic component 120' may be in a face-up or wire bonding configuration (where the component terminals are positioned on the upper side). In this example, the lower side of the electronic component 120' may include or be referred to as an inactive side, and the upper side may include or be referred to as an active side. In this example, the inactive side may be bonded to the substrate inner side 110a of the substrate 110. The component terminals may be positioned on the upper side, and the electronic component 120' may be provided as a face-up or wire bonding component. The lower side of the electronic component 120' may be bonded to the substrate inner side 110a of the substrate 110 via an interface material. The component terminals of the electronic component 120' may be electrically connected to the substrate inner terminals 112a of the substrate 110 via different component interconnects such as conductive wires. For example, the conductive wires may bond the component terminals to the internal contact pads 112a of the substrate 110 by using a wire bonding device for the conductive wires. In some examples, the conductive wires may include gold wires, copper wires, or aluminum wires.

[0035] Figure 2C The electronic device 100 is shown in a later stage of manufacturing. Figure 2CIn the example shown, the bottom filler 130 may be disposed between the electronic component 120 and the substrate 110. In some examples, the bottom filler 130 may include or be referred to as a capillary bottom filler (CUF), a molded bottom filler (MUF), a non-conductive paste (NCP), a non-conductive film (NCF), or an anisotropic conductive film (ACF). In some examples, the bottom filler 130 may include an epoxy resin, a thermoplastic material, a thermosetting material, a polyimide, a polyurethane, a polymeric material, a filled epoxy resin, a filled thermoplastic material, a filled thermosetting material, a filled polyimide, a filled polyurethane, a filled polymeric material, or a flux bottom filler. In some examples, the bottom filler 130 is inserted between the lower side 120b of the electronic component 120 and the inner side 110a of the substrate. In some examples, the bottom filler 130 may cover or surround the component interconnect 125. The bottom filler 130 contacts the substrate inner side 110a of the substrate 110 and the lower side 120b of the electronic component 120. In some examples, the bottom filler 130 may cover at least a lower portion of the lateral side 120c of the electronic component 120. In some examples, the bottom filler 130 may prevent or reduce the occurrence of separation of the electronic component 120 from the substrate 110. In some examples, the thickness of the bottom filler 130 may be in a range of about 80 μm to about 800 μm.

[0036] In some examples, when electronic component 120' is in a face-down or flip-chip configuration, underfill 130' can be located between electronic component 120' and substrate 110. Underfill 130' can have corresponding elements, features, materials, or manufacturing methods similar to underfill 130. Figure 2D and Figure 2E A cross-sectional view of the electronic device 100 is shown in a later stage of manufacturing. Figure 2D and Figure 2E In the example shown in FIG. 1 , a cover structure 150 may be disposed over the substrate 110 and the electronic components 120 and 120′. In some examples, the cover structure 150 may include or be referred to as a cover, a cover structure, or a shield. In some examples, the cover structure 150 may include a metal material, such as copper, a copper alloy, nickel, a nickel alloy, or stainless steel. The cover structure 150 may include an upper wall 152 and side walls 151. In some examples, the cover structure 150 or only the upper wall 152 includes a thermally conductive material configured to conduct heat away from the electronic component 120 via the TIM 140.

[0037] In the current example, the cover structure 150 is configured as a multi-piece structure. In some examples, the cover structure 150 may be referred to as or include a heat sink, a heat sink, a shield, a cap cover, an encapsulation component, a protective component, a package, or a body. In some examples, the area of ​​the cover structure 150 may be in the range of about 0.5 mm×0.5 mm to about 70 mm×70 mm.

[0038] In some examples, the sidewall 151 may be formed on an edge (or perimeter) of the upper wall 152 and may extend downward from the upper wall 152. In some examples, the sidewall 151 may be continuously disposed on an edge of the upper wall 152. In some examples, the sidewall 151 may support the upper wall 152. In some examples, the sidewall 151 may cover the electronic components 120 and 120' in a lateral direction.

[0039] The upper wall 152 and the side wall 151 may define a cavity 153. In some examples, the thickness of the cover structure 150 may be in the range of about 300 μm to about 4000 μm. The thickness of the cover structure 150 may be defined as the sum of the thickness of the upper wall 152 and the thickness of the side wall 151. The upper wall 152 may also be referred to as an upper cover wall or an upper cover wall. The side wall 151 may also be referred to as a cover side wall, a cover side wall, or a reinforcement. Although multiple side walls 151 are mentioned, it should be understood that the side wall 151 may be a one-piece side wall structure having portions oriented in different directions. The cavity 153 may also be referred to as a cover cavity.

[0040] exist Figure 2DIn the example shown, the sidewall 151 is disposed on the substrate inner side 110a of the substrate 110. In some examples, the sidewall 151 is separated from the electronic components 120 and 120' on the substrate inner side 110a of the substrate 110, and can be disposed to laterally surround the electronic components 120 and 120'. The lower side of the sidewall 151 can be coupled to the substrate inner side 110a via a bonding material 170a. The bonding material 170a can be disposed on the substrate inner side 110a or on the lower side of the sidewall 151. In some examples, the bonding material 170a can be supplied (or dispensed) on the bottom side of the sidewall 151, and the sidewall 151 can be coupled to the substrate 110 by curing the bonding material 170a in response to the sidewall 151 being disposed on the substrate 110. The bottom side of the sidewall 151 can be coupled to the substrate inner side 110a of the substrate 110 via the bonding material 170a. In some examples, the pick-and-place device may pick up the sidewall 151 to align and place the sidewall 151 onto the bonding material 170a disposed on the substrate 110. In some examples, the sidewall 151 may include a ring structure such as a square ring in a plan view. The sidewall 151 may be placed at the outer periphery of the substrate 110, and the electronic components 120 and 120' may be positioned inside the periphery. In some examples, the bonding material 170a may be applied to the substrate inner side 110a of the substrate 110 or the lower side of the sidewall 151 by dispensing. In some examples, the bonding material 170a may include or be referred to as an interface material, an adhesive, or a solder. In some examples, the bonding material 170a may include a heat-curing adhesive, a light-curing adhesive, or a non-curable adhesive (e.g., a rubber adhesive, an acrylic adhesive, a vinyl alkyl ether adhesive, a silicone adhesive, a polyester adhesive, a polyamide adhesive, or a polyurethane adhesive). In some examples, the bonding material 170a may be a dielectric. In some examples, the bonding material 170a may be conductive. In some examples, the thickness of the bonding material 170 a may be in a range from about 30 μm to about 300 μm.

[0041] In some examples, after the sidewall 151 is coupled to the substrate 110 via the bonding material 170a, the bonding material 170b may be applied to the upper side or upper wall 152 ( Figure 2E) on the lower side. Bonding material 170b may be referred to as an interface material, an adhesive, or a solder, and includes a material similar to bonding material 170a. In some instances, the thickness of bonding material 170b may be in a range of about 5 μm to about 200 μm. In some instances, the sum of the thicknesses of sidewall 151, bonding material 170a, and bonding material 170b may be greater than the thickness of electronic component 120. In some instances, the sum of the thicknesses of sidewall 151, bonding material 170a, and bonding material 170b may be greater than the thickness of electronic component 120 by about 0.2 μm to about 200 μm. In some instances, the thickness of sidewall 151 may be in a range of about 50 μm to about 1600 μm.

[0042] Figure 2E The electronic device 100 is shown in a later stage of manufacturing. Figure 2E In the example shown, an upper wall 152 may be provided. The upper wall 152 may include an inner side 152a and an outer side 152b. The outer side 152b is opposite to the inner side 152a (i.e., oriented away from the inner side). In some examples, the upper wall 152 may include a generally rectangular flat plate. The thickness of the upper wall 152 may refer to the distance between the outer side 152b and the inner side 152a, and may be in the range of about 200 μm to about 3000 μm. The TIM 140 may be disposed above the inner side 152a of the upper wall 152. In some examples, the inner side 151a is spaced apart from the conductor 121 so that the inner side 151a does not directly contact the conductor 121. In the current example, the inner side 152a overlies the conductor 121 and faces the conductor.

[0043] The TIM 140 may be disposed above the inner side 152a of the upper wall 152. In some examples, the TIM 140 may be in contact with the upper wall 152 and electrically connected to the upper wall. In some examples, the TIM 140 may include or be referred to as an interface material or adhesive. The TIM 140 may be disposed between the upper wall 152 and the electronic component 120 ( Figure 2F ). In some examples, TIM 140 can contact inner side 152a of upper wall 152 and the top side of electronic component 120. In some examples, TIM 140 can include one layer or a plurality of layers.

[0044] In some examples, the TIM 140 may include a metal material. The TIM 140 may include a thermally conductive material, such as solder or solder paste. Examples of such thermal interface materials include metal alloy materials, such as gallium, gallium alloys (e.g., alloys with indium, tin, and zinc), silver alloys, tin-silver, indium, and indium alloys. Because the TIM 140 includes a thermally conductive material, heat generated from the electronic component 120 may be easily transferred to the cover structure 150. In some examples, the TIM 140 may be applied to the inner side 152a of the upper wall 152 by dispensing, printing, sputtering, electroless plating, electrolytic plating, PVD, CVD, MOCVD, ALD, LPCVD, or PECVD.

[0045] In some examples, the thickness of TIM 140 may be in a range of about 0.2 μm to about 200 μm. In some examples, the thickness of TIM 140 may be in a range of about 20% to about 40% of the total thickness of electronic component 120. The planar size, plan area, footprint, or area of ​​TIM 140 may be larger than the planar size, plan area, footprint, or area of ​​electronic component 120. For example, the planar size of TIM 140 may be in a range of about 10% to about 15% larger than the planar size of electronic component 120. In this way, the volume of TIM 140 after the curing process creates a shape or structure that covers the lateral side 120c of electronic component 120. In some examples, after the curing process, the shape or structure of TIM 140 along its edge 140a may be convexly rounded. In some examples, when the electronic device is centrally located on the substrate 110, the TIM 140 can be located at the center of the inner side 152a of the upper wall 152. In other examples, the TIM 140 is located on the inner side 152a corresponding to the location of the electronic device 120 on the substrate 110.

[0046] Figure 2F A cross-sectional view of the electronic device 100 is shown in a later stage of manufacturing. Figure 2FIn the example shown, the upper wall 152 is coupled to the side wall 151. In some examples, the inner side 152a of the upper wall 152 can be coupled to the side wall 151 via the bonding material 170b previously described. In some examples, the edge of the inner side 152a of the upper wall 152 can be coupled to the side wall 151 to define a cavity 153. The electronic components 120 and 120' can be accommodated in the cavity 153 or enclosed in the cavity. In some examples, a pick-and-place device can pick up the upper wall 152 to align and place the upper wall 152 on the bonding material 170b above the side wall 151. The TIM 140 can be aligned and placed on the electronic component 120. In some examples, the TIM 140 can be evenly aligned with the electronic component 120 so that the TIM 140 substantially overlaps the electronic component 120 in a uniform manner. In some examples, the TIM 140 extends outward from each side of the electronic component 120 by a substantially equal amount.

[0047] In some examples, the TIM 140 may be coupled to the conductor 121 of the electronic component 120 so that the TIM 140 is inserted between the conductor 121 and the inner side 151a of the upper wall 152. In some examples, the TIM 140 may be in contact with the conductor 121 of the electronic component 120 and the upper wall 152 of the cover structure 150. Subsequently, the TIM 140 may be attached to the upper wall 152 and the conductor 121 using a reflow and curing process. In some examples, the TIM 140 may be reflowed and cured using heat, light, ultraviolet light, and laser via a curing process. In some examples, the TIM 140 may be in contact with the lateral side 120c of the electronic component 120. In some examples, the TIM 140 contacts or overlaps the lateral edge 121a of the conductor 121. In some examples, the TIM 140 may be in contact with the lateral side 120c of the electronic component 120 and the bottom filler 130. The bottom filler 130 may prevent the TIM 140 from contacting the component interconnects 125 of the electronic component 120. In some examples, the TIM 140 may be contained within the dam 115. In some examples, the dam 115 is configured to reduce or contain the flow of the TIM 140 outside the dam 115. In some examples, the TIM 140 may be in contact with the dam 115. In some examples, the TIM 140 may be in contact with the inside (e.g., the side near the electronic device 120) and the top side of the dam 114. In some examples, the outside (e.g., the side far from the electronic component 120) may be substantially free of the TIM 140. In some examples, the TIM 140 may be laterally inserted between the dam 115 and the bottom filler 130. In some examples, the TIM 140 may be located within the perimeter boundary of the cavity or dam 115. The adhesion of the TIM 140 to the electronic component 120 may be improved via the conductor 121 disposed on the electronic component 120 , which improves, among other things, the thermal performance and reliability of the electronic device 100 . In some examples, the electronic component 120 ′ does not contain the TIM 140 .

[0048] In some examples, the curing process of the TIM 140 may be used to cure the bonding materials 170a and 170b to attach the upper wall 152 to the side wall 151, and to attach the side wall 151 to the substrate 110. When the bonding materials 170a and 170b are cured via the curing process, the cover structure 150 may be bonded and fixed to the substrate 110. The cover structure 150 may cover and enclose the electronic components 120 and 120' to protect the electronic components 120 and 120' from external factors.

[0049] The dam 115 can prevent or reduce the flow of the TIM 140 outside the dam 115 during the reflow and curing process. Through the reflow and curing process and the preselected size of the TIM 140 compared to the electronic component 120, the TIM 140 includes a lateral edge covering the lateral side 120c of the electronic component 120. In some examples, the TIM 140 includes a lateral edge 140a that is convexly rounded outward from the lateral side 120c of the electronic component 120 in a cross-sectional view. The convexly rounded outward shape helps to reduce stress around the electronic component 120. In some examples, when the dam 115 is made of a conductive material and connected to the ground pad of the conductive structure 112, the TIM 140 can contact the dam 115 and be electrically connected to the dam. In some examples, the covering structure 150 can be electrically connected to ground via the TIM 140 and the dam 115. In this way, the covering structure 150 can shield the electronic components 120 and 120' to reduce the impact of external disturbances such as electromagnetic interference. In addition, the dam 115 may contain the TIM 140 and reduce any flow of the TIM 140 to other areas of the substrate 110 to improve the reliability of the electronic device 100. The TIM 140 may be inserted between the cover structure 150 and the substrate 110, inside the cavity of the dam 115. The TIM 140 is configured to improve the transfer of heat generated from the electronic component 120 to the cover structure 150. In some examples, an external heat transfer device may be coupled to the upper wall 152.

[0050] Figure 2G A cross-sectional view of the electronic device 100 is shown in a later stage of manufacturing. Figure 2GIn the example shown, the external interconnect 160 may be disposed on the substrate underside 110b of the substrate 110. The external interconnect 160 may be coupled to the conductive structure 112 exposed from the substrate outer side 110b of the substrate 110. For example, the external interconnect 160 may be coupled to the external contact pad 112b of the conductive structure 112. In some examples, the external interconnect 160 may include or be referred to as a solder ball, a metal (e.g., copper) core ball coated with solder, a pillar, a pillar with a solder cap, or a bump with a solder cap. The external interconnect 160 may include tin (Sn), silver (Ag), lead (Pb), copper (Cu), Sn-Pb, Sn37-Pb, Sn95-Pb, Sn-Pb-Ag, Sn-Cu, Sn-Ag, Sn-Au, Sn-Bi, or Sn-Ag-Cu. In some examples, the external interconnection 160 may be provided via a reflow process after forming a conductive material including solder on the substrate underside 110b of the substrate 110 in a ball drop method. The external interconnection 160 may couple the electronic device 100 to an external device. In some examples, the thickness of each of the external interconnections 160 may be in a range of about 50 μm to about 1000 μm.

[0051] In some examples, the TIM 140 may be further reflowed and cured during the reflow and curing process of the external interconnect 160. However, in the case where the TIM 140 includes a structure covering the lateral side 120c of the electronic component 120 between the cover structure 150 and the substrate 110, it is found in practice that the TIM 140 may be more stable to the shape change caused by the further reflow and curing process of the external interconnect 160.

[0052] In some examples, multiple electronic devices may be disposed on a single substrate assembly. Subsequent singulation processes may separate the single substrate assembly into individual electronic devices 100. In some examples, the electronic device 100 may include a substrate 110, an electronic component 120, an underfill 130, a TIM 140, a cover structure 150, and an external interconnect 160.

[0053] Figure 3 A cross-sectional view of an example electronic device 200 is shown. Figure 3In the example shown, the electronic device 200 may include a substrate 110, an electronic component 120, an electronic component 120', an underfill 130, a TIM 140, a cover structure 250, an external interconnect 160, and a bonding material 270. In some examples, the electronic device 200 may include elements, features, materials, or formation processes similar to those of the previously described electronic device 100. The cover structure 250 may include a sidewall 251, an upper wall 252, and a cavity 253. The electronic component 120' in the electronic device 200 is, for example, shown as a passive component, such as a capacitor, a resistor, or an inductor, which may be coupled to the conductive structure 112 of the substrate 110.

[0054] In some examples, the cover structure 250 may include or be referred to as a cover, a cover structure, or a shield. In some examples, the cover structure 150 may include a metal material, such as copper, a copper alloy, nickel, a nickel alloy, or stainless steel. The cover structure 250 may include a side wall 251 and an upper wall 252. In the current example, the cover structure 250 is configured as a single-piece or integrated structure. In some examples, the cover structure 250 may be referred to as or include a heat sink, a heat sink, a shield, a cap cover, an encapsulated component, a protective component, a package, or a body.

[0055] In some examples, the sidewall 251 may be formed on an edge (or perimeter) of the upper wall 252 and may extend downward from the upper wall 252. In some examples, the sidewall 251 may be continuously disposed on an edge of the upper wall 252. In some examples, the sidewall 251 may support the upper wall 252. In some examples, the sidewall 251 may cover the electronic components 120 and 120' in a lateral direction.

[0056] The upper wall 252 and the side wall 251 may define a cavity 253. In some examples, the thickness of the cover structure 250 may be in the range of about 300 μm to about 4000 μm. The thickness of the cover structure 250 may be defined as the sum of the thickness of the upper wall 252 and the thickness of the side wall 251. The upper wall 252 may also be referred to as an upper cover wall or an upper cover wall. The side wall 251 may also be referred to as a cover side wall, a cover side wall, or a reinforcement. The cavity 253 may also be referred to as a cover cavity.

[0057] In some examples, capping structure 250 can be coupled to substrate 110 using bonding material 270 interposed between sidewalls 251 and substrate 110. Bonding material 270 and processes for providing bonding material 270 can be similar to the materials and processes previously described for bonding material 170b.

[0058] In summary, an electronic device and a manufacturing method have been described. In some instances, a cover structure configured to transfer heat is coupled to a substrate. An electronic component is inserted between the substrate and the cover structure, and a TIM material is inserted between the electronic component and the cover structure. In some instances, the TIM material is electrically coupled to a ground node in the substrate. In some instances, a conductive dam structure surrounds the electronic component, and the TIM material contacts the conductive dam structure. In some instances, the conductive dam structure is connected to a ground node in the substrate, and the conductive dam structure couples the TIM material to the ground node. In some instances, the cover structure includes an integrated structure or a single-piece structure. In other instances, the cover structure includes a multi-piece structure. In some instances, a conductor is above the upper side of the electronic component, and is inserted between the upper side of the electronic component and the TIM material to enhance adhesion and improve heat transfer. The electronic device and method provide improved EMI shielding (especially) compared to previous electronic devices and methods, and improve heat transfer capabilities.

[0059] The present disclosure includes reference to certain examples; however, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present disclosure. In addition, modifications may be made to the disclosed examples without departing from the scope of the present disclosure. Therefore, it is intended that the present disclosure is not limited to the disclosed examples, but that the present disclosure will include all examples that fall within the scope of the appended claims.

Claims

1. An electronic device, characterized in that: include: A substrate comprising: outside of substrate; Inside of substrate; Dielectric structures; and Conductive structure; An electronic assembly comprising: upper side; a lower side opposite to the upper side and coupled to the inner side of the substrate; a lateral side connecting the upper side to the lower side; and a conductor on the upper side; Covering structure, which includes: a sidewall coupled to the inner side of the substrate; and an upper wall coupled to the side wall and including an inner side spaced apart from the conductor; and a thermal interface material (TIM) contacting the conductor and the inner side of the upper wall and interposed between the conductor and the inner side of the upper wall, wherein: The thermal interface material covers the conductors and the lateral sides of the electronic component.

2. The electronic device according to claim 1, characterized in that: Further including: a component interconnect coupling the underside of the electronic component to the conductive structure; as well as An underfill is interposed between the undersides of the electronic components and surrounds the component interconnects.

3. The electronic device according to claim 2, characterized in that: The upper wall comprises a thermally conductive material; and The thermal interface material contacts the underfill.

4. The electronic device according to claim 1, characterized in that: The thermal interface material contacts the lateral side of the electronic component.

5. The electronic device according to claim 1, wherein: The thermal interface material includes an edge that is convexly rounded outward from the lateral side of the electronic component.

6. The electronic device according to claim 1, characterized in that: The thermal interface material comprises a metal material; and The cover structure comprises a multi-piece structure.

7. The electronic device according to claim 1, characterized in that: Further including: dam, which is coupled to the inner side of the substrate, in: The dam is laterally spaced from the lateral side of the electronic component and surrounds at least the lateral side of the electronic component; and The thermal interface material extends between the lateral sides of the electronic component and the dam.

8. The electronic device according to claim 7, characterized in that: The thermal interface material comprises a first conductive material; and The dam includes a second conductive material.

9. The electronic device according to claim 8, characterized in that: The thermal interface material is coupled to a ground of the conductive structure through the dam.

10. An electronic device, characterized in that: include: A substrate comprising: outside of substrate; Inside of substrate; Dielectric structures; and Conductive structure; A first electronic assembly comprising: a lower side coupled to the inner side of the substrate; an upper side opposite to the lower side and located far from the inner side of the substrate; and a lateral side connecting the upper side to the lower side; Covering structure, which includes: a sidewall coupled to the inner side of the substrate; and an upper wall coupled to the side wall and including an inner side that is spaced apart from and overlies the upper side of the first electronic component; and a thermal interface material interposed between the upper side of the first electronic component and the inner side of the upper wall, wherein: The thermal interface material covers the upper side and the lateral sides of the first electronic component; and The thermal interface material is coupled to the conductive structure.

11. The electronic device according to claim 10, characterized in that: Further including: a conductor above the upper side and extending to the lateral sides; and a bottom filler interposed between the underside of the first electronic component and the inner side of the substrate; in: The thermal interface material contacts the underfill and the lateral side of the first electronic component; and The thermal interface material covers the conductor.

12. The electronic device according to claim 11, characterized in that: The conductor includes a lateral edge that is substantially coplanar with the lateral side of the first electronic component; and The thermal interface material overlaps the lateral edges of the conductor.

13. The electronic device according to claim 10, characterized in that: Further including: A dam is coupled to the inner side of the substrate and is laterally spaced apart from the first electronic component such that a portion of the inner side of the substrate is located between the dam and the first electronic component.

14. The electronic device according to claim 13, characterized in that: The thermal interface material includes a first conductive material; The dam comprises a second conductive material; and The dam is coupled to the conductive structure of the substrate.

15. The electronic device according to claim 14, characterized in that: The thermal interface material is coupled to the conductive structure of the substrate via the dam.

16. The electronic device according to claim 10, characterized in that: The thermal interface material includes an edge that is convexly rounded outward from the lateral side of the first electronic component in a cross-sectional view.

17. The electronic device according to claim 10, characterized in that: Further including: a second electronic component coupled to the inner side of the substrate; in: The second electronic component is free of the thermal interface material.

18. A method for manufacturing an electronic device, characterized in that: include: A substrate is provided, the substrate comprising: outside of substrate; Inside of substrate; Dielectric structures; and Conductive structure; An electronic assembly is provided, the electronic assembly comprising: upper side; a lower side opposite to the upper side and coupled to the inner side of the substrate; a lateral side connecting the upper side to the lower side; and a conductor on the upper side; coupling the underside of the electronic component to the inner side of the substrate; A covering structure is provided, the covering structure comprising: side walls; and an upper wall coupled to the side wall and including an inner side spaced apart from the conductor; coupling the sidewall to an inner side of the substrate; and A thermal interface material is provided on the conductor and inserted between the conductor and the inner side of the upper wall and covers the conductor and the lateral sides of the electronic component.

19. The method according to claim 18, characterized in that: The electronic assembly comprises a first thickness and a first footprint; Providing the thermal interface material includes providing the thermal interface material on the inner side of the upper wall before coupling the side wall to the inner side of the substrate; The thermal interface material comprises a second thickness and a second footprint; The second thickness is in the range of 20% to 40% of the first thickness; and The second footprint is 10% to 15% larger than the first footprint.

20. The method according to claim 18, characterized in that Further including: providing an underfill interposed between the underside of the electronic component and the inner side of the substrate; in: coupling the underside of the electronic component comprises coupling the underside to the conductive structure using a component interconnect; and Providing the underfill includes surrounding the component interconnect; Providing the thermal interface material includes the thermal interface material including an edge that is convexly rounded outward from the lateral side of the electronic component in a cross-sectional view.

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