Solar cell, method of manufacturing the same, and photovoltaic module

Abstract

The application provides a solar cell, a preparation method thereof and a photovoltaic module, and relates to the technical field of photovoltaics. The solar cell comprises a cell substrate, a dielectric layer, a first conductive layer and a second conductive layer. The dielectric layer is arranged on the surface of the cell substrate, and the dielectric layer is provided with a groove exposing the surface of the cell substrate. At least part of the first conductive layer is arranged in the groove and is in electrical contact with the surface of the cell substrate, and the material of the first conductive layer comprises graphene. The second conductive layer is arranged on the side of the first conductive layer away from the cell substrate and is in electrical contact with the first conductive layer. The first conductive layer and the second conductive layer are connected as a gate line, which is beneficial to reducing the resistance of the gate line, thereby reducing the loss in the energy conversion process. Furthermore, the first conductive layer is made of graphene, and the preparation cost of the gate line is lower than that of the current silver gate line.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to a solar cell and a method for its fabrication. Background Technology

[0002] In the field of solar cell technology, electrode fabrication significantly impacts cell cost and conversion efficiency. Currently, screen printing is the most widely used electrode fabrication process; however, its cost is heavily dependent on the price of the paste, increasing as paste prices rise. Copper electroplating can use base metals instead of precious metals, greatly reducing material costs. However, its cost is primarily constrained by patterning and electroplating equipment, currently preventing large-scale mass production.

[0003] Therefore, how to reduce energy loss, improve energy conversion efficiency, and reduce battery production costs is an urgent problem to be solved in the field. Summary of the Invention

[0004] This application proposes a solar cell, a method for its fabrication, and a photovoltaic module, aiming to reduce energy loss, improve energy conversion efficiency, and reduce battery production costs.

[0005] In a first aspect, this application provides a solar cell, which includes a battery substrate, a dielectric layer, a first conductive layer, and a second conductive layer. The dielectric layer is disposed on the surface of the battery substrate, and trenches are formed in the dielectric layer to expose the surface of the battery substrate. At least a portion of the first conductive layer is disposed within the trenches and is in electrical contact with the surface of the battery substrate. The material of the first conductive layer includes graphene. The second conductive layer is disposed on the side of the first conductive layer away from the battery substrate and is in electrical contact with the first conductive layer.

[0006] In some embodiments, the material of the second conductive layer includes graphite.

[0007] In some embodiments, the width of the second conductive layer is greater than the width of the first conductive layer, and along the width direction of the first conductive layer, the two opposite boundaries of the second conductive layer extend beyond the two opposite boundaries of the first conductive layer. Alternatively, the width of the second conductive layer is equal to the width of the first conductive layer, and along the width direction of the first conductive layer, the two opposite boundaries of the second conductive layer coincide with the two opposite boundaries of the first conductive layer.

[0008] In some embodiments, the battery substrate includes a first surface and a second surface opposite to each other, and a dielectric layer, a first conductive layer and a second conductive layer are disposed on the first surface; and / or, the dielectric layer, the first conductive layer and the second conductive layer are disposed on the second surface.

[0009] In some embodiments, a dielectric layer, a first conductive layer, and a second conductive layer are disposed on a first surface and a second surface, wherein the width of the first conductive layer located on the first surface is smaller than the width of the first conductive layer located on the second surface, and the width of the second conductive layer located on the first surface is smaller than the width of the second conductive layer located on the second surface.

[0010] In some embodiments, the thickness of the first conductive layer ranges from 100 nm to 120 nm, and the thickness of the second conductive layer ranges from 15 μm to 20 μm.

[0011] In this embodiment, a dielectric layer is disposed on the surface of a battery substrate, and the dielectric layer has trenches exposing the surface of the battery substrate. At least a portion of a first conductive layer is disposed within the trenches and is in electrical contact with the surface of the battery substrate. A second conductive layer is disposed on the side of the first conductive layer away from the battery substrate and is in electrical contact with the first conductive layer. The connection between the first and second conductive layers forms a gate line, which helps to reduce the resistance of the gate line, thereby reducing losses and improving energy conversion efficiency during energy conversion. Furthermore, a portion of this gate line (the first conductive layer) is made of graphene, which has a lower manufacturing cost compared to current silver gate lines.

[0012] Secondly, this application also provides a method for fabricating a solar cell, the method comprising: forming a dielectric layer on the surface of a cell substrate, wherein the dielectric layer has trenches exposing the surface of the cell substrate; forming a first conductive layer, wherein at least a portion of the first conductive layer is located within the trenches and is in electrical contact with the surface of the cell substrate, the material of the first conductive layer including graphene; and forming a second conductive layer, wherein the second conductive layer is disposed on the side of the first conductive layer away from the cell substrate and is in electrical contact with the first conductive layer.

[0013] In some embodiments, the battery substrate includes a first surface and a second surface opposite to each other, and a dielectric layer is formed on the surfaces of the battery substrate, including forming a dielectric layer on the first surface and forming a dielectric layer on the second surface. The width of the trenches in the dielectric layer located on the first surface is smaller than the width of the trenches in the dielectric layer located on the second surface.

[0014] In some embodiments, an electroplating deposition method is used to form a first conductive layer on the surface of the battery substrate through the aforementioned trenches, and an electroplating deposition method is used to form a second conductive layer on the first conductive layer.

[0015] The above-described preparation method can be used to prepare the solar cells in the first aspect embodiment described above. The prepared solar cells have the aforementioned beneficial effects, which will not be repeated here.

[0016] Thirdly, this application also provides a photovoltaic module including a plurality of solar cells as described in any of the embodiments mentioned in the first aspect, wherein the plurality of solar cells are electrically connected.

[0017] The photovoltaic modules described above have the same beneficial technical effects as the solar cells improved in some of the above embodiments, and will not be repeated here. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in some embodiments of this application will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not actual dimensions of the products or actual processes of the methods involved in the embodiments of this application.

[0019] Figure 1 A schematic diagram of a solar cell provided in an embodiment of this application;

[0020] Figure 2 This is a schematic diagram of another structure of the solar cell provided in an embodiment of this application;

[0021] Figure 3 A flowchart illustrating a method for fabricating a solar cell, as provided in this application embodiment;

[0022] Figure 4 This application provides a step diagram illustrating the preparation of a dielectric layer for a solar cell.

[0023] Figure 5 A step diagram illustrating the etching process of the dielectric layer of a solar cell provided in this application embodiment;

[0024] Figures 6-7 A step diagram illustrating the fabrication process of the first conductive layer of a solar cell provided in this application embodiment;

[0025] Figures 8-9 A step diagram illustrating the preparation of the second conductive layer of a solar cell provided in this application embodiment;

[0026] Figure 10 This is a schematic diagram of a photovoltaic module provided in an embodiment of this application. Detailed Implementation

[0027] The technical solutions in some embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application are within the scope of protection of this application.

[0028] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open and encompassing, that is, "including, but not limited to".

[0029] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this application, unless otherwise stated, "a plurality of" means two or more.

[0030] In describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be interpreted broadly; for example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. For example, in describing some embodiments, the term "connection" may be used to indicate that two or more components have direct physical or electrical contact with each other.

[0031] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0032] This document describes exemplary embodiments with reference to cross-sectional views, which are intended as idealized exemplary drawings. In the drawings, the thickness of the layers and the area of ​​the regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations caused, for example, by manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0033] According to relevant technologies, the electrode fabrication process of solar cells affects both cell cost and conversion efficiency, making electrode fabrication process optimization a key focus of the industry. Currently, most solar cell electrodes utilize screen printing, but the silver paste required for this process makes screen printing costly. Copper electroplating can use base metals instead of precious metals, but due to limitations in patterning and electroplating equipment, large-scale industrial production is not currently feasible.

[0034] To address the aforementioned problems, embodiments of this application provide a solar cell. Figure 1 This is a schematic diagram of a solar cell provided in an embodiment of this application.

[0035] See Figure 1 The solar cell 1 includes a cell substrate 10, a dielectric layer 20, a first conductive layer 301, and a second conductive layer 302. The dielectric layer 20 is disposed on the surface of the cell substrate 10, and trenches 201 (shown in dashed boxes in the figure) are formed in the dielectric layer 20 to expose the surface of the cell substrate 10. At least a portion of the first conductive layer 301 is disposed within the trenches 201, and the first conductive layer 301 is in electrical contact with the surface of the cell substrate 10. The second conductive layer 302 is disposed on the side of the first conductive layer 301 away from the cell substrate 10, and the second conductive layer 302 is in electrical contact with the first conductive layer 301.

[0036] For example, such as Figure 1 As shown, at least a portion of the first conductive layer 301 is disposed within the trench 201, which can include three scenarios: In the Z-direction, the upper surface of the first conductive layer 301 is lower than the edge of the trench 201; or, the upper surface of the first conductive layer 301 is flush with the trench 201. In both cases, the entire first conductive layer 301 is located within the trench 201. Alternatively, in the Z-axis direction, the upper surface of the first conductive layer 301 is higher than the edge of the trench 201, with a portion of the first conductive layer 301 located within the trench 201 and a portion protruding outside the trench 201.

[0037] In the above embodiments, by providing a second conductive layer 302 on the side of the first conductive layer 301 away from the battery substrate 10, and connecting the first conductive layer 301 and the second conductive layer 302 as a grid line 30, it is beneficial to reduce the resistance of the grid line 30. By collecting the photocurrent generated by the battery substrate 10 through the grid line 30, the loss caused by the current transmission on the grid line 30 can be reduced, thereby improving the energy conversion efficiency of the solar cell 1.

[0038] Furthermore, the first conductive layer 301 is made of graphene, which has a lower material cost compared to the current silver gate lines, thus helping to reduce the material cost of the gate lines 30.

[0039] In some embodiments, see Figure 1 The second conductive layer 302 is made of graphite, which has good conductivity, resulting in a lower resistance and thus reducing the resistance of the gate line 30. Furthermore, compared to current silver gate lines, the material cost of the second conductive layer 302 is lower, thereby reducing the material cost of the gate line 30.

[0040] In some embodiments, see Figure 1The width of the second conductive layer 302 is greater than the width of the first conductive layer 301. Along the width direction of the first conductive layer 301, that is, in the X direction, the two opposite boundaries of the second conductive layer 302 extend beyond the two opposite boundaries of the first conductive layer 301. Alternatively, the width of the second conductive layer 302 is equal to the width of the first conductive layer 301. Along the width direction of the first conductive layer 301, that is, in the X direction, the two opposite boundaries of the second conductive layer 302 coincide with the two opposite boundaries of the first conductive layer 301.

[0041] That is, the orthographic projection of the second conductive layer 302 onto the surface of the battery substrate 10 covers the orthographic projection of the first conductive layer 301 onto the surface of the battery substrate 10. In other words, the second conductive layer 302 covers the first conductive layer 301, and the second conductive layer 302 can protect the first conductive layer 301 and prevent the first conductive layer 301 from falling off.

[0042] Figure 2 This is a schematic diagram of another structure of a solar cell provided in an embodiment of this application.

[0043] In some embodiments, such as Figure 2 As shown, taking the battery substrate 10 as an example of a tunnel oxide passivated contact solar cell (TOPCON), the battery substrate 10 includes an emitter 1001, a substrate 1002, an ultrathin tunnel oxide layer 1003, and a phosphorus-doped polycrystalline silicon layer 1004 stacked together.

[0044] The emitter 1001 is located on the front side of the battery substrate 10. In silicon-based battery substrates, the emitter 1001 is typically a p-doped p-type emitter. The substrate 1002 is the main body of the battery substrate 10, typically a lightly doped n-type silicon substrate. It forms a PN junction with the emitter, which can generate photogenerated carriers when exposed to light. The ultrathin tunneling oxide layer 1003 is relatively thin and its material includes silicon dioxide. Its function is to prevent electrons and holes from recombinating without an external electric field, while allowing carriers generated under light to tunnel through this oxide layer. The phosphorus-doped polycrystalline silicon layer 1004 is a polycrystalline silicon layer doped with phosphorus and is typically used as the back field or back contact of the battery substrate 10. The ultrathin tunneling oxide layer 1003 and the phosphorus-doped polycrystalline silicon layer 1004 constitute a passivated contact structure, allowing electrons to pass through while blocking holes, reducing electron-hole recombination.

[0045] like Figure 2As shown, the battery substrate 10 includes a first surface 101 and a second surface 102 opposite to each other. The dielectric layer 20, the first conductive layer 301 and the second conductive layer 302 can be disposed on the first surface 101, on the second surface 102, or on both the first surface 101 and the second surface 102.

[0046] The first surface 101 is the front side of the battery substrate 10. In the case of a TOPCON battery substrate 10, the dielectric layer 20 on the first surface 101 includes a passivation film and an anti-reflection film. The passivation film is made of aluminum oxide, and the anti-reflection film is made of silicon nitride. The anti-reflection film is used to reduce light reflection loss and improve light capture efficiency. The first conductive layer 301 and the second conductive layer 302 on the first surface 101 constitute the gate lines on the front side.

[0047] The second surface 102 is the back side of the battery substrate 10. The dielectric layer 20 on the second surface 102 includes an anti-reflection film, the material of which is silicon nitride. The first conductive layer 301 and the second conductive layer 302 on the second surface 102 constitute the gate lines on the back side. The gate lines on the front and back sides are used to collect the photocurrent generated by the battery substrate 10 and can be used for the electrical connection of multiple battery cells.

[0048] In some embodiments, see Figure 1 A dielectric layer 20, a first conductive layer 301, and a second conductive layer 302 are disposed on a first surface 101 and a second surface 102. The width of the first conductive layer 301 located on the first surface 101 within the trench 201 is smaller than the width of the first conductive layer 301 located on the second surface 102 within the trench 201, and the width of the second conductive layer 302 located on the first surface 101 is smaller than the width of the second conductive layer 302 located on the second surface 102.

[0049] Wherein, "width of the first conductive layer 301" refers to the dimension of the portion of the first conductive layer 301 located within the trench 201 along the X direction. "width of the second conductive layer 302" refers to the dimension of the portion of the second conductive layer 302 covering the dielectric layer 20 and the first conductive layer 301 along the X direction.

[0050] In the above embodiments, the first surface 101 serves as the front side of the battery substrate 10. The width of the first conductive layer 301 and the second conductive layer 302 on the front side is small, and the area of ​​light blocking is small. While providing good electrical contact and collecting current, it can reduce its light blocking effect and reduce the impact on photoelectric conversion, thereby improving the energy conversion efficiency of the solar cell.

[0051] In some embodiments, taking a TOPCON battery with dimensions of 210mm × 182mm as an example, along the Z direction, the trench 201 has a depth of 0.1μm, and the thickness of the first conductive layer 301 ranges from 100nm to 120nm, for example, the thickness of the first conductive layer 301 is 100nm, 105nm, 110nm, 115nm, or 120nm. The thickness of the second conductive layer 302 ranges from 15μm to 20μm, for example, the thickness of the second conductive layer 302 is 15μm, 16μm, 17μm, 18μm, 19μm, or 20μm.

[0052] In addition, this application also provides a method for preparing a solar cell. Figure 3 This is a flowchart illustrating a method for fabricating a solar cell, as provided in an embodiment of this application. Figures 4-8 The diagram illustrates the steps involved in fabricating a solar cell according to embodiments of this application. The fabrication method includes the following steps S110–S130:

[0053] Step S110: See Figures 4-5 A dielectric layer 20 is formed on the surface of the battery substrate 10, and trenches 201 are provided in the dielectric layer 20 to expose the surface of the battery substrate 10.

[0054] In some embodiments, the battery substrate 10 includes a first surface 101 and a second surface 102 opposite to each other, and forming a dielectric layer 20 on the surface of the battery substrate 10 includes forming a dielectric layer 20 on the first surface 101 and forming a dielectric layer 20 on the second surface 102.

[0055] like Figure 4 As shown, when the battery substrate 10 is a TOPCON battery, the dielectric layer 20 of the first surface 101 includes a passivation film and an antireflection film, wherein the material of the passivation film includes aluminum oxide and the material of the antireflection film includes silicon nitride. The dielectric layer 20 of the second surface 102 includes an antireflection film, wherein the material of the antireflection film includes silicon nitride.

[0056] like Figure 5 As shown, by patterning the dielectric layer 20, trenches 201 are formed in the dielectric layer 20 to expose the surface of the battery substrate 10. That is, after forming the dielectric layer 20 on the surface of the battery substrate 10, antireflection films and passivation films are etched on the first surface 101 of the battery substrate 10 according to a pre-designed electrode pattern using laser etching and wet etching techniques, forming trenches 201, which expose the emitter 1001. Similarly, antireflection films are etched on the second surface 102 according to a pre-designed electrode pattern to form trenches 201, which expose the phosphorus-doped polysilicon layer 1004. The trench 201 region is the pre-designed electrode pattern region, which is used for subsequent electrode formation.

[0057] In some embodiments, such as Figure 5 As shown, the width of the trench 201 in the dielectric layer 20 located on the first surface 101 is smaller than the width of the trench 201 in the dielectric layer 20 located on the second surface 102. Here, "width of trench 201" refers to the dimension of trench 201 along the X direction.

[0058] For example, the etching width of the trench 201 on the first surface 101 is 10 μm, and the etching width of the trench 201 on the second surface 102 is 40 μm. The width of the trench 201 in the dielectric layer 20 of the first surface 101 is smaller than the width of the trench 201 in the dielectric layer 20 of the second surface 102. This allows the size of the electrodes (grid lines 30) on the first surface 101 to be slightly smaller in subsequent processes, reducing the light-blocking effect, increasing the solar cell 1's solar irradiation area, and improving energy conversion efficiency.

[0059] Step S120: See Figures 6-7 A first conductive layer 301 is formed, at least a portion of which is located within the trench 201 and is in electrical contact with the surface of the battery substrate 10. The material of the first conductive layer includes graphene.

[0060] In some embodiments, an electroplating deposition method is used to form a first conductive layer 301 on the surface of the battery substrate 10 through the aforementioned trench 201.

[0061] like Figure 6 As shown, after etching in step S110, vias are locally formed on the dielectric layer 20 of the first surface 101 to expose the emitter 1001 for connection to the positive electrode of the electroplating power supply. Similarly, vias are locally formed on the dielectric layer 20 of the second surface 102 to expose the phosphorus-doped polycrystalline silicon layer 1004 for connection to the positive electrode of the electroplating power supply. After connection, the battery substrate 10 etched in step S110 is used as the positive electrode of the electroplating power supply and immersed in a graphene oxide dispersion. The negative electrode of the electroplating power supply is a graphite electrode. The graphene oxide dispersion is prepared by adding graphene oxide powder to an aqueous methanol solution (volume ratio: methanol / water = 0.5) and ultrasonically vibrating for 2 hours to ensure uniform dispersion of graphene oxide in the solvent. At this point, the graphene oxide concentration in the dispersion is approximately 2 g / L.

[0062] Driven by a specific potential difference, for example, maintaining a positive and negative electrode voltage of 0.5V, graphene oxide accumulates and deposits towards the positive electrode. Here, the positive electrode refers to the emitter 1001 exposed by the trench 201 on the first surface 101, and the phosphorus-doped polycrystalline silicon layer exposed by the trench 201 on the second surface 102. No graphene oxide accumulation or deposition occurs in the portion of the battery substrate 10 covered by the dielectric layer 20. Figure 7As shown, the energizing time lasts for 30 seconds, during which a 100-120 nm graphene oxide layer will be deposited in the tank 201. After deposition, the layer is removed and dried at a low temperature of 100°C. Then, it is immersed in a 10 g / L hydrazine hydrate solution and heated to reduce the solution to 70°C. At this time, the graphene oxide layer at the electrode is reduced to a graphene layer. The graphene layer has excellent conductivity and good adhesion to the battery substrate 10 at the electrode.

[0063] Step S130: See Figures 8-9 A second conductive layer 302 is formed, which is disposed on the side of the first conductive layer 301 away from the battery substrate 10 and is in contact with the first conductive layer 301.

[0064] In some embodiments, an electroplating deposition method is used to form a second conductive layer 302 on the first conductive layer 301.

[0065] like Figure 8 As shown, after the drying and reduction process in step S120 is completed, the battery substrate 10 with the first conductive layer 301 deposited thereon is used as the positive electrode of the electroplating power supply and immersed in a graphite dispersion. The negative electrode of the electroplating power supply is a graphite electrode. The graphite dispersion is made by adding ultrafine graphite powder to an organic dispersant, which is an aqueous solution of ethanol at the same concentration as the methanol aqueous solution in step S120. The binder is ABS resin with a concentration of 100 mg / L.

[0066] Driven by a specific potential difference, for example, maintaining a positive and negative electrode voltage of 2V, graphite colloid accumulates and deposits towards the positive electrode of the power supply. Here, the positive electrode of the power supply refers to the first conductive layer 301 within the trench 201 on the first surface 101 and the first conductive layer 301 within the trench 201 on the second surface 102. Figure 9 As shown, a graphite layer of 15μm to 20μm will be deposited on top of the first conductive layer 301 for 5 minutes. After deposition, the graphite layer is removed and placed in an oxygen-free sintering furnace at 150°C for 30 minutes to remove moisture and most of the organic matter from the graphite layer and to cure the ABS resin, thus completing the preparation of the second conductive layer 302 on the first conductive layer 301.

[0067] The above preparation method can be used to prepare solar cells in any of the aforementioned embodiments. Compared with the silver paste required for current silver grid lines and the equipment required for related preparation processes, this solution uses graphene oxide dispersion and graphite dispersion, which is cheaper. Furthermore, the first conductive layer 301 and the second conductive layer 302 are connected in parallel as a grid line 30, which makes the resistance of the grid line 30 smaller and the energy lost when the current is transmitted on the grid line 30 less, which is beneficial to improving the energy conversion efficiency of the solar cell.

[0068] In addition, this application also provides a photovoltaic module, such as Figure 10As shown, Figure 10 This is a schematic diagram of a photovoltaic module provided in this application. The photovoltaic module 2 includes a plurality of solar cells 1 as described in any of the embodiments mentioned in the first aspect, and the plurality of solar cells 1 are electrically connected. The photovoltaic module 2 can adjust the number of solar cells 1 within the module according to demand, converting solar energy into a certain amount of electrical energy.

[0069] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A solar cell, characterized by, The battery substrate comprises: a battery substrate; a dielectric layer disposed on a surface of the battery substrate, the dielectric layer having a trench exposing the surface of the battery substrate; a first conductive layer at least partially disposed in the trench and in electrical contact with the surface of the battery substrate; the first conductive layer is made of graphene; a second conductive layer disposed on a side of the first conductive layer away from the battery substrate and in electrical contact with the first conductive layer; the second conductive layer is made of graphite.

2. The solar cell according to claim 1, characterized in that, The width of the second conductive layer is greater than the width of the first conductive layer, and along the width direction of the first conductive layer, the opposite boundaries of the second conductive layer exceed the opposite boundaries of the first conductive layer; or The width of the second conductive layer is equal to the width of the first conductive layer, and along the width direction of the first conductive layer, the opposite boundaries of the second conductive layer coincide with the opposite boundaries of the first conductive layer.

3. The solar cell according to claim 1, characterized in that, The battery substrate comprises opposite first and second surfaces; The dielectric layer, the first conductive layer and the second conductive layer are disposed on the first surface; and / or The dielectric layer, the first conductive layer and the second conductive layer are disposed on the second surface.

4. The solar cell according to claim 3, characterized in that, The dielectric layer, the first conductive layer and the second conductive layer are disposed on the first and second surfaces; The width of the first conductive layer on the first surface is less than the width of the first conductive layer on the second surface; The width of the second conductive layer on the first surface is less than the width of the second conductive layer on the second surface.

5. The solar cell according to any one of claims 1 to 4, wherein The thickness of the first conductive layer ranges from 100 nm to 120 nm; The thickness of the second conductive layer ranges from 15 μm to 20 μm.

6. A method of producing a solar cell as claimed in any one of claims 1 to 5, characterized in that The battery substrate comprises: forming a dielectric layer on a surface of the battery substrate, the dielectric layer having a trench exposing the surface of the battery substrate; forming a first conductive layer, at least part of the first conductive layer being located in the trench and in electrical contact with the surface of the battery substrate; the material of the first conductive layer comprises graphene; forming a second conductive layer, the second conductive layer being disposed on a side of the first conductive layer away from the battery substrate and in electrical contact with the first conductive layer.

7. The production method according to claim 6, characterized by, The battery substrate comprises opposite first and second surfaces, and the dielectric layer is formed on the surface of the battery substrate, comprising: forming the dielectric layer on the first surface and forming the dielectric layer on the second surface; wherein the width of the trench of the dielectric layer on the first surface is less than the width of the trench of the dielectric layer on the second surface.

8. The production method according to claim 6 or 7, characterized by, The first conductive layer is formed on the surface of the battery substrate through the trench by electroplating deposition method; The second conductive layer is formed on the first conductive layer by electroplating deposition method.

9. A photovoltaic module, characterized by, The solar cell comprises a plurality of solar cells as claimed in any one of claims 1-5, and the plurality of solar cells are electrically connected.

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