Efficient use of energy in switching power converters

Abstract

An efficient use of energy in a switching power converter is disclosed. A system may include a power converter having a maximum allowable input power drawn from a power source; an energy storage element coupled to the output of the power converter at a top plate of the energy storage element, where the energy storage element is configured to store excess energy; and control circuitry configured to cause excess energy stored in the energy storage element to be consumed by circuitry coupled to an output of the power converter when an input power of the power converter exceeds a maximum allowable input power, and selectively couple the backplane of the energy storage element to the power source to maintain a positive voltage margin of the circuitry coupled to the output of the power converter.

Description

[0001] This application is a divisional application of application number 2020800644159, filing date August 20, 2020, and invention name “Efficient Use of Energy in Switching Power Converters”. Technical Field

[0002] The present disclosure relates generally to circuits for electronic devices, including but not limited to personal audio devices such as wireless telephones and media players, and more particularly to limited average current in a peak-controlled boost converter. Background Art

[0003] Personal audio devices (including wireless phones, such as mobile / cellular phones, cordless phones, mp3 players and other consumer audio devices) are widely used. Such personal audio devices may include a circuit system for driving a pair of headphones or one or more speakers. Such circuit systems generally include a speaker driver, which includes a power amplifier for driving an audio output signal to the headphone or speaker. Typically, a power converter can be used to provide a supply voltage to the power amplifier in order to amplify the signal driven to the speaker, earphone or other transducer. A switching power converter is an electronic circuit that converts a power supply from a direct current (DC) voltage level to another DC voltage level. Examples of such switching DC-DC converters include, but are not limited to, boost converters, buck converters, buck-boost converters, inverting buck-boost converters, and other types of switching DC-DC converters. Therefore, using a power converter, a DC voltage such as a DC voltage provided by a battery can be converted into another DC voltage for powering a power amplifier.

[0004] Typically, the boost converter is operated as a peak current controlled boost converter, where the main control loop of the control system is used to determine the peak current demand for each switching phase of the boost converter in order to generate the desired boost output voltage of the boost converter. For a boost duty cycle where the duty cycle (e.g., which can be determined by subtracting an arithmetic ratio from the digital 1, where the arithmetic ratio is equal to the input voltage supplied to the boost converter divided by the boost output voltage of the boost converter), a slope compensation circuit system may be required to avoid subharmonic behavior of the boost converter. There is also a protection circuit system in many boost converter control systems to ensure that the current of the boost converter remains below a maximum value. The detection of the peak current according to the main control loop and the detection of the maximum allowable current are typically performed by two separate circuits (a first comparator that compares the measured current (e.g., the measured current of the power inductor of the boost converter) with a target peak current signal for slope compensation, and a second comparator that compares the measured current with a maximum current limit). A main control loop, which may also be referred to as a compensator, may generate a target peak current signal that may be modified by the slope compensation circuitry, and this slope compensated target peak current signal may be compared to the measured current by the first comparator to perform peak current control of the boost converter. However, because the slope compensation may occur in the analog circuitry, there may be an unknown correction amount at the point where the first comparator switches. This error may be removed by the main control loop when regulating the boost voltage output by the power converter.

[0005] However, the presence of this unknown error may result in an inability to directly control the maximum current during any particular switching cycle of the boost converter. This lack of control occurs because the second comparator allows measurements to be made without slope compensation of the inductor current above a threshold. If the second comparator is used to directly control the current in the inductor, the lack of slope compensation on this measurement may result in subharmonic behavior. In order to avoid this subharmonic behavior while limiting the current detected by the second comparator, the output of the second comparator can be fed back to allow the control circuit system to apply the desired limiting behavior to the slope compensated target peak current signal. For example, there may be an additional control loop so that when operating under current limiting conditions, the slope compensated target peak current signal is modified to obtain the desired current limiting behavior.

[0006] As a result, a control system can be created that results in limiting and controlling the peak current of the power inductor of the boost converter below a maximum threshold. However, in many systems, the error between the peak inductor current and the average inductor current can be very large, and inductor variations can lead to significant challenges in determining the appropriate peak current limit. Summary of the invention

[0007] According to the teachings of the present disclosure, one or more disadvantages and problems associated with existing methods of operating power converters may be reduced or eliminated.

[0008] According to an embodiment of the present disclosure, a system may include: a power converter having a maximum allowable input power drawn from a power source; an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy; and a control circuit system configured to cause excess energy stored in the energy storage element to be consumed by a circuit system coupled to the output of the power converter when the input power of the power converter exceeds the maximum allowable input power, and to selectively couple a bottom plate of the energy storage element to the power source in order to maintain a positive voltage margin of the circuit system coupled to the output of the power converter, so that when the input power of the power converter exceeds the maximum allowable input power, excess energy stored by the circuit system coupled to the output of the power converter is consumed from the energy storage device.

[0009] According to these and other embodiments of the present disclosure, a system may include: a power converter configured to generate a first supply voltage at a first supply output; and a second supply output configured to generate a second supply voltage lower than the first supply voltage, wherein the second supply voltage tracks an envelope of an output signal generated by an amplifier coupled to a power supply unit.

[0010] According to these and other embodiments of the present disclosure, a system may include a power supply including: a power converter configured to generate a first supply voltage at a first supply output of the power supply; and a second supply output configured to generate a second supply voltage lower than the first supply voltage. The system may also include an amplifier coupled to the power supply and configured to select between the first supply voltage and the second supply voltage as supply voltages to the amplifier.

[0011] According to these and other embodiments of the present disclosure, a system may include: a power converter configured to generate a first supply voltage at a first supply output of a power supply, the power converter having a maximum allowed input power drawn from a power source; an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy; and a second supply output configured to generate a second supply voltage lower than the first supply voltage. When the amplifier consumes power from the second supply output, the second supply voltage can track the envelope of an output signal generated by the amplifier coupled to the power supply, and when the amplifier consumes power from the first supply output, the second supply voltage can regulate the voltage at the bottom plate of the energy storage element.

[0012] According to these and other embodiments of the present disclosure, a method, in a system having a power converter with a maximum allowable input power drawn from a power source and an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy: causing excess energy stored in the energy storage element to be consumed by a circuit system coupled to the output of the power converter when the input power of the power converter exceeds the maximum allowable input power, and in order to maintain a positive voltage margin for the circuit system coupled to the output of the power converter, selectively coupling a bottom plate of the energy storage element to the power source such that excess energy stored by the circuit system coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.

[0013] According to these and other embodiments of the present disclosure, a method may include generating a first supply voltage at a first supply output using a power converter, and generating a second supply voltage lower than the first supply voltage using a second supply output, wherein the second supply voltage tracks an envelope of an output signal generated by an amplifier coupled to a power supply.

[0014] According to these and other embodiments of the present disclosure, a method may include generating a first supply voltage for a power supply unit at a first supply output using a power converter, generating a second supply voltage for the power supply unit that is lower than the first supply voltage using a second supply output, and selecting, by an amplifier coupled to the power supply unit, between the first supply voltage and the second supply voltage as supply voltages to the amplifier.

[0015] According to these and other embodiments of the present disclosure, a method for use in a system having: a power converter configured to generate a first supply voltage at a first supply output of a power supply, the power converter having a maximum allowable input power drawn from a power source; an energy storage element coupled to the output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy; and a second supply output configured to generate a second supply voltage lower than the first supply voltage. The method may include tracking an envelope of an output signal generated by an amplifier coupled to the power supply using the second supply voltage when the amplifier consumes power from the second supply output, and regulating a voltage at a bottom plate of the energy storage element using the second supply voltage when the amplifier consumes power from the first supply output.

[0016] From the drawings, descriptions and claims included herein, the technical advantages of the present disclosure are obvious to those skilled in the art. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features and combinations particularly pointed out in the claims.

[0017] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the claims set forth in the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] A more complete understanding of the present embodiments and their advantages may be obtained by referring to the following description in conjunction with the accompanying drawings, in which like reference numerals represent like features, and in which:

[0019] Figure 1 An example personal audio device according to an embodiment of the present disclosure is shown;

[0020] Figure 2 A block diagram illustrating selected components of an example integrated circuit for a personal audio device according to an embodiment of the present disclosure;

[0021] Figure 3 The present invention shows an embodiment of the present invention having an average current limit control that can be used to implement Figure 2 A block diagram of selected components of an example hybrid peak current controlled boost converter of a power supply section shown in;

[0022] Figure 4 shows a graph depicting example waveforms of actual inductor current and target average inductor current with respect to time and the mathematical integral of the difference between the target average inductor current and the actual inductor current target according to an embodiment of the present disclosure;

[0023] Figure 5A diagram depicting an embodiment of the present disclosure is shown. Figure 3 A graph of example waveforms of selected voltages within an example hybrid peak current controlled boost converter shown in;

[0024] Figure 6 A block diagram illustrating selected components of another example integrated circuit for a personal audio device according to an embodiment of the present disclosure;

[0025] Fig. 7A It shows that the embodiment of the present disclosure can be used to implement Figure 6 A block diagram of selected components of an example power converter of a power supply section shown in;

[0026] Figure 7B It shows that the embodiment of the present disclosure can be used to implement Figure 6 A block diagram of selected components of another example power converter of a power supply section is shown in;

[0027] Figure 7C It shows that the embodiment of the present disclosure can be used to implement Figure 6 A block diagram of selected components of yet another example power converter of a power supply section is shown in;

[0028] Figure 8 It shows that the embodiment of the present disclosure can be used to implement Figure 6 A block diagram of selected components of another example hybrid power converter of a power supply section is shown in;

[0029] Fig. 9 A diagram depicting an embodiment of the present disclosure is shown. Figure 8 Graphs of example waveforms of selected voltages within an example hybrid power converter are shown in FIG. DETAILED DESCRIPTION

[0030] Figure 1 An example personal audio device 1 according to an embodiment of the present disclosure is shown. Figure 1 A personal audio device 1 is depicted coupled to headphones 3 in the form of a pair of earbud speakers 8A and 8B. Figure 1 The earphones 3 depicted in the figure are merely examples, and it should be understood that the personal audio device 1 can be used in conjunction with a variety of audio transducers, including but not limited to headphones, earbuds, in-ear headphones, and external speakers. Plug 4 can provide a connection of the earphones 3 to the electrical terminals of the personal audio device 1. The personal audio device 1 can provide a display to the user and receive user input using a touch screen 2, or alternatively, a standard liquid crystal display (LCD) can be combined with various buttons, sliders and / or dials provided on the face and / or sides of the personal audio device 1. Similarly, Figure 1 As shown, the personal audio device 1 may include an audio integrated circuit (IC) 9 for generating analog audio signals for transmission to the earphone 3 and / or another audio transducer.

[0031] Figure 2 1 shows a block diagram of selected components of an example IC 9A of a personal audio device according to an embodiment of the present disclosure. In some embodiments, Figure 2 The example IC 9A shown in FIG. 9A can be used to implement Figure 1 IC 9. Figure 2 As shown, the microcontroller core 18 can supply a digital audio input signal DIG_IN to a digital-to-analog converter (DAC) 14, which can convert the digital input signal into an analog signal V IN DAC 14 can supply an analog signal V to amplifier 16 IN , the amplifier can amplify or attenuate the input signal V IN To provide a differential output signal V OUT , which output signal can operate a speaker, a headphone transducer, a line level signal output, and / or other suitable output. In some embodiments, DAC 14 can be an integral component of amplifier 16. Power supply 10A can provide a power supply rail input for amplifier 16. In some embodiments, power supply 10A can include a switch mode power converter, as described in more detail below. Although Figure 1 and Figure 2 It is contemplated that IC 9A resides in a personal audio device, but the systems and methods described herein may also be applied to electrical and electronic systems and devices other than personal audio devices, including systems for use in computing devices larger than personal audio devices, such as automobiles, buildings, or other structures. Further, the systems and methods described herein may also be applied to electrical and electronic systems and devices other than audio devices and audio transducers, such as vibrotactile transducers, piezoelectric transducers, or other transducers.

[0032] Figure 3 The average current limiting control according to the embodiment of the present disclosure can be used to implement Figure 2 A block diagram of selected components of an example hybrid peak current controlled boost converter 20A of a power supply 10A is shown in FIG. Figure 3 As shown, boost converter 20A may include battery 22 , power inductor 30 , switch 28 implemented as an n-type metal oxide semiconductor field effect transistor (NFET), switch 29 implemented as a p-type metal oxide semiconductor field effect transistor (PFET), and control circuit 32 . Figure 4 FIG. 4 shows a graph depicting the actual inductor current I according to an embodiment of the present disclosure. L and the target average inductor current I AVG_LIM The target average inductor current I with respect to time AVG_LIM The amount and actual inductor current I L A graph of an example waveform of the mathematical integral of the difference in quantity.

[0033] During the first phase of the switching cycle of the boost converter 20A (at Figure 4 , control circuit 32 may cause switch 28 to be activated (e.g., closed, turned on, enabled) and switch 29 to be deactivated (e.g., opened, turned off, disabled). Thus, during the first phase, switch node (at Figure 3 ) can be effectively shorted to ground potential, causing the battery 22 to reduce its voltage V BAT is applied to the terminals of the power inductor 30. As a result, during the first phase, the inductor current I flowing in the power inductor 30 L As described in more detail below, the control circuit 32 can cause the inductor current I L Increase until the inductor current I L The slope compensation peak current limit I PK ’, at which point the first stage can end.

[0034] During the second phase of the switching cycle of the boost converter 20A (at Figure 4 In the second phase (labeled as “Phase B” in FIG. 1 ), the control circuit 32 may deactivate the switch 28 and activate the switch 29. As a result, during the second phase, as the power inductor 30 discharges into the boost capacitor 26, the inductor current I L can be reduced, thereby reducing the supply voltage V SUPPLY Boost to a voltage higher than the battery voltage V BAT In continuous conduction mode (CCM), the second phase (phase B) can last until the end of the switching cycle, after which the first phase (phase A) appears again, such as Figure 4 In discontinuous conduction mode (DCM), the second phase (Phase B) can continue until the inductor current I L reaches zero, at which point the third phase of the switching cycle ( Figure 4 In the third phase, if present, the control circuit 32 may cause both switches 28 and 29 to be deactivated and the inductor current I L, may remain at zero until the beginning of the next switching cycle, where the first phase (Phase A) occurs again. In some embodiments, control circuit 32 may deactivate switch 29 during the second phase (Phase B) so that the body diode of the PFET implementing switch 29 conducts the inductor current I L , until it reaches zero.

[0035] As the name implies, the hybrid peak current control boost converter 20A can operate in one of at least two modes. In the first mode, the switch 62B can be activated (e.g., turned on, closed, enabled) and the switch 62A can be deactivated (e.g., turned off, disconnected, disabled), so that the power supply voltage V SUPPLY The bottom plate of the boost capacitor 26 is coupled to the ground voltage at the negative terminal of the boost capacitor 26. In the second mode, the switch 62A can be activated and the switch 62B can be deactivated so that the bottom plate of the boost capacitor 26 (eg, with the supply voltage V SUPPLY The top plate of the boost capacitor 26 is coupled to the battery voltage V BAT The switching between the first mode and the second mode may be controlled by the hybrid mode switch controller 60. The hybrid mode switch controller 60 may be configured to switch to the first mode when the voltage ΔV on the boost capacitor 26 drops to a predetermined threshold voltage V TH When the voltage ΔV on the boost capacitor 26 rises to a predetermined threshold voltage V TH When the voltage ΔV is directly measured, the voltage ΔV can be calculated based on the supply voltage V SUPPLY , knowledge of the switch states of switches 62A and 62B, the variable voltage provided by the low dropout regulator 58 and / or the battery voltage V BAT to calculate.

[0036] In some embodiments, control circuit 32 may be configured to selectively enable and disable coupling of the bottom plate of capacitor 26 to battery 22 at a first switching frequency that is significantly less than a second switching frequency at which switches 28 and 29 of hybrid peak current controlled boost converter 20A are switched.

[0037] In these and other embodiments, control circuit 32 may be configured to selectively enable and disable coupling of the bottom plate of capacitor 26 to battery 22 at a switching frequency that is related to another frequency of a signal driven to the load by an amplifier powered from hybrid peak current control boost converter 20A (e.g., amplifier 16). In these and other embodiments, control circuit 32 may be configured to selectively enable and disable coupling of the bottom plate of capacitor 26 to battery 22 at a switching frequency that is related to another frequency of a signal driven to the load by an amplifier powered from hybrid peak current control boost converter 20A (e.g., amplifier 16).

[0038] although Figure 3 , but in some embodiments, the mixed mode switch controller 60 may operate with hysteresis such that the threshold voltage V for switching from the first mode to the second mode is TH can be lower than the threshold voltage V for switching from the second mode to the first mode TH .

[0039] To further illustrate the hybrid operation between the first mode and the second mode, Figure 5 Graphs depicting example waveforms of selected voltages of an example hybrid peak current controlled boost converter 20A when switching between a first mode and a second mode and between the second mode and the first mode are shown in accordance with an embodiment of the present disclosure.

[0040] like Figure 5 As shown, with the output signal V generated by the amplifier 16 OUT The amplitude of the power supply voltage V SUPPLY This voltage reduction may occur because the current drawn from the battery 22 by the hybrid peak current control boost converter 20A may be Figure 3 The circuit system limitation is shown in FIG. This limited current may be required to protect the battery 22 and / or to avoid power failure of other devices using the battery 22 as an energy source. The supply voltage V SUPPLY This voltage drop may be due to a load connected to the output of hybrid peak current control boost converter 20A requiring more power than the limited operation of hybrid peak current control boost converter 20A can provide. Thus, when this voltage drop occurs, the stored energy on capacitor 26 can be used to provide the necessary power to the load.

[0041] If this voltage drop causes the supply voltage V SUPPLY Down to the output signal V OUT The amplitude of the output signal V OUT Therefore, when the supply voltage V SUPPLY drops to the threshold voltage VTH When the following Figure 5 At the time marked as t1 in FIG. 1 , the mixed mode switch controller 60 may cause the first mode (where the bottom plate of the boost capacitor 26 is coupled to ground) to the second mode (where the bottom plate of the boost capacitor 26 is coupled to the battery voltage V BAT ) between. As a result, the bottom plate voltage V at the bottom plate of the boost capacitor 26 BOT It can rise from zero to the battery voltage V BAT In addition, since the voltage ΔV on the boost capacitor 26 cannot change instantaneously, the bottom plate voltage V BOT An increase in the supply voltage V SUPPLY A similar increase in V SUPPLY =V BOT +ΔV), thereby ensuring that the supply voltage V is maintained at +ΔV by allowing the hybrid peak current controlled boost converter 20A to transfer more energy from the boost capacitor 26 to the amplifier 16 than would be possible if the peak current controlled boost converter 20A were operated in the first mode only with the bottom plate of the boost capacitor 26 coupled to ground. SUPPLY Keep the output signal V OUT In fact, in particular embodiments, hybrid operation between the two modes described herein may allow the hybrid peak current controlled boost converter 20A to utilize 1.8 times more energy than would be possible if the peak current controlled boost converter 20A were operated in the first mode solely with the bottom plate of the boost capacitor 26 coupled to ground (or would allow the same amount of energy to be utilized with 1.8 times fewer boost capacitors).

[0042] like Figure 3 As shown, the hybrid peak current control boost converter 20A may include a low dropout regulator 58 coupled between the battery 22 and the switch 62A. In operation, when switching the hybrid operation from the first mode to the second mode, the hybrid mode switch controller 60 may control the voltage on the low dropout regulator 58 to allow the bottom plate voltage V BOT At zero and battery voltage V BAT and vice versa to eliminate the supply voltage V SUPPLY The sudden change of the output signal V OUT High-frequency switching artifacts appear in the

[0043] Likewise Figure 3 As depicted, the hybrid peak current controlled boost converter 20A may include a current sensor circuit 56 to sense the current I flowing through the boost capacitor 26. BOT The current sensor circuit 56 can be used with a resistor R BOT The sense resistor is used to measure the current I BOTIn some embodiments, R BOT The measured current I may have a resistance of approximately 10 mΩ. As described in more detail below, the measured current I may be used by the control circuit 32 to BOT .

[0044] Back to Figure 3 , the control circuit 32 may include a compensator 34, a current average limit control block 35, a multiplexer 37, a current sensor circuit 36, a digital-to-analog converter (DAC) 38, a DAC 40, a ramp generator 42, a peak current comparator 44, a clock (CLK) generator 46, a latch 48, a switch block control 50, an integrator 52, an integrator comparator 54 and a latch 56.

[0045] In both CCM and DCM operation, the duty cycle of switch 28 (eg, the duration of the first phase (Phase A)) can determine the supply voltage V SUPPLY Relative to the battery voltage V BAT For example, in CCM, the desired supply voltage V SUPPLY The required duty cycle D can be obtained by D = 1-V BAT / V SUPPLY Therefore, for the desired level of supply voltage V SUPPLY (For example, it may be based on the envelope of the output signal of the amplifier), the control circuit 32 may be based on the measured supply voltage V SUPPLY and the measured inductor current I L (which can be measured by current sensor circuit 36 ​​(eg, using a current sensor circuit having a resistor R SENSE In some embodiments, R SENSE The feedback control loop (which may be inside the compensator 34) is implemented with a resistor of about 10 mΩ. Thus, the control circuit 32 may monitor the actual supply voltage V SUPPLY , and compare it with the desired supply voltage V SUPPLY By comparing and increasing or decreasing the inductor current I L The peak value is used to increase or decrease the actual supply voltage V SUPPLY Thus, the compensator 34 can generate a digital signal indicating the desired peak current, and when the multiplexer 37 is selected to output the output of the compensator 34, the DAC 38 can convert this digital signal into an analog equivalent peak current signal I PK . Further, if Figure 3 As shown, the peak current signal I PK The measured current I through the boost capacitor 26 is subtracted from BOT , to compensate for the current from the battery 22 that charges the boost capacitor 26, rather than the inductor current I that charges the boost capacitor 26L .

[0046] The ramp generator 42 can generate a slope compensation signal. In some embodiments, the ramp generator 42 can generate the slope compensation signal in the form of a triangle or sawtooth waveform. The slope compensation signal can be PK Combined to generate a slope-compensated peak current signal I PK The peak current comparator 44 can compare the measured inductor current I L (e.g., measured by current sensor circuit 36), thereby generating a control signal in response to the comparison. The output of comparator 44, clock generator 46, and latch 48 can be arranged together as shown, or in another suitable manner, to generate a control signal to switch control block 50. For example, clock generator 46 can generate a clock signal indicating the start of a switching cycle (e.g., the start of the first phase / phase A), and comparator 44 can generate a control signal based on the measured inductor current I L Reaching the peak current I PK Based on these signals indicating the timing of the switching cycles and switching phases of boost converter 20A, latch 48 can generate appropriate control signals to switch control block 50, which in turn can generate appropriate control signals to switches 28 and 29 to selectively activate and deactivate switches 28 and 29.

[0047] In addition, the current average limit control block 35 can generate a digital signal indicating a target average current limit, and the DAC 40 can convert the digital signal into an equivalent analog target average current signal I representing the maximum average current flowing through the power inductor 30. AVG_LIM This target average current signal I AVG_LIM The maximum current limit may be set based on the maximum current limit of the power inductor 30, which may be among the parameters received by the average limit control block 35. Other parameters received by the average limit control block 35 may include the battery voltage V BAT and / or is programmed to indicate as a battery voltage V BAT Additional or alternative parameters may include the supply voltage V SUPPLY , digital audio input signal DIG_IN and / or analog signal V IN .

[0048] The average limit control block 35 can also be based on the target average current signal I AVG_LIM Generates its own version of the peak current I PK (which may be different from the peak current generated by the compensator 34), so that the inductor current IL The maximum current limit based on the control loop including integrator 52, integrator comparator 54 and latch 56 is not exceeded. Figure 3 As shown, the multiplexer 37 may select one of the peak current signals generated by the compensator 34 and the average limit control block 35 based on a control signal transmitted from the multiplexer selection block 39 .

[0049] The multiplexer selection block 39 may be configured such that, if the peak current determined by the compensator 34 is less than the peak current determined by the average limit control block 35, the multiplexer selection block 39 may cause the multiplexer 37 to select the peak current determined by the compensator 34. On the other hand, if the peak current determined by the compensator 34 is greater than the peak current determined by the average limit control block 35, the multiplexer selection block 39 may cause the multiplexer 37 to select the peak current determined by the average limit control block 35.

[0050] In some embodiments, the maximum current limit of power inductor 30 may be determined by analyzing the timing information of the output of latch 48 and the output of latch 56. Because the output of compensator 34 may have a slope compensation value added thereto, the inductor current I L The actual value of the peak current of may be different from the value represented by the output of the compensator 34. Thus, when a current limiting action is applied (e.g., multiplexer selection block 39 causes multiplexer 37 to select the peak current determined by the average limit control block 35), the value of the compensator 34 at that point in time may be recorded by the average limit control block 35 and used as a means to determine whether the compensator 34 has reduced its value to the value indicated by the target average current signal I AVG_LIM The following references indicate the values ​​of the controlled limiting current.

[0051] Thus, the average limit control block 35 may operate to maintain the inductor current I measured over multiple switching cycles of the boost converter 20A at L , to operate under the average current limit set by the average limit control block 35 on the input to DAC 40. Therefore, boost converter 20A can increase the value of the peak current delivered to the input of DAC 38 until the inductor current I L The average value of is greater than the value of the peak current delivered to the input of DAC 40. Once this occurs, the average limit control block 35 can operate to reduce the value of the peak current delivered to the input of DAC 38 until the inductor current I L The average value of is less than the value of the peak current delivered to the input of DAC 40. This operation can maintain the average inductor current over time at the current I represented by the output of DAC 40. AVG_LIM value.

[0052] To further illustrate, consider Figure 4 The measured current I L and the target average current signal I AVG_LIM Because the boost converter 20A must operate in a volt-second balance, the average current during the second phase (Phase B) in CCM must be equal to the average current during the first phase (Phase A) when in steady state. A simple analysis shows that during the first phase (Phase A), if the average current of the power inductor 30 is equal to the desired average current I avg_desired , then during the first phase (phase A), the actual inductor current I L The mathematical integral of will be equal to the mathematical integral of the average current expected during the first phase. Therefore, if the first phase has a duration of time T1, it is known that:

[0053]

[0054] therefore:

[0055]

[0056] as well as

[0057]

[0058] therefore:

[0059]

[0060] As shown in the above equation, if the measured inductor current I L and the expected average current I avg_desired The above equation shows that if the value over the T1 period is integrated, the value will be zero. Similarly, if the difference is integrated, the T1 value can be found when the result of the integration is zero (0). Figure 4 Also shown is the measured inductor current I L and the desired average current I avg_desired The order of the subtractions is not important, since the key detection point is when the integral equals zero.

[0061] To utilize the above analysis, integrator 52 can calculate the actual inductor current I L and the target average current signal I AVG_LIMThe mathematical integral of the difference between , and the integrator comparator 54 can compare the result to zero so that the latch 56 can generate an output indicating when the integration performed by the integrator 52 is zero. As a result of this output, the digital compensation and current average limit control block 34 can appropriately modify the target average current signal I for subsequent switching cycles of the boost converter 20A. AVG_LIM and peak current I PK .

[0062] Therefore, to mitigate issues regarding inductor variations and completely eliminate the errors associated with determining the average current while controlling the peak current, an integrator circuit may be provided prior to the current average comparator to allow determination of when the average input current of the boost converter crosses the threshold circuit. Blanking circuitry (not shown) may be provided to allow the current average comparator to not indicate a threshold crossing at the start of the first phase (Phase A) as the integrator may be set to zero at the start of the first phase.

[0063] Figure 6 1 shows a block diagram of selected components of an example IC 9B of a personal audio device according to an embodiment of the present disclosure. In some embodiments, Figure 6 The example IC 9B shown in FIG. 9B can be used to implement Figure 1 IC 9. Figure 6 As shown, the microcontroller core 18 can supply a digital audio input signal DIG_IN to a digital-to-analog converter (DAC) 14, which can convert the digital input signal into an analog signal V IN DAC 14 can supply an analog signal V to amplifier 16 IN , the amplifier can amplify or attenuate the input signal V IN To provide a differential output signal V OUT , which can operate a speaker, a headphone transducer, a line level signal output, and / or other suitable outputs. In some embodiments, DAC 14 can be an integral component of amplifier 16. Power supply 10B can provide multiple power supplies (e.g., supply voltage V SUPPLY_HI and V SUPPLY_LO ). In some embodiments, the power supply 10B may include a switch-mode power converter, as described in more detail below. Figure 6It is contemplated that IC 9B resides in a personal audio device, but the systems and methods described herein may also be applied to electrical and electronic systems and devices other than personal audio devices, including systems used in computing devices larger than personal audio devices (such as cars, buildings, or other structures). Further, the systems and methods described herein may also be applied to electrical and electronic systems and devices other than audio devices and audio transducers, such as vibrotactile transducers, piezoelectric transducers, or other transducers.

[0064] As described above and Figure 6 As shown in FIG. 1 , the power supply unit 10B can provide a higher supply voltage V SUPPLY_HI and a lower supply voltage V SUPPLY_LO Therefore, the amplifier 16 can be configured as a class G amplifier, which can output the output signal V OUT The amplitude is higher at the supply voltage V SUPPLY_HI and a lower supply voltage V SUPPLY_LO In these and other embodiments, a system may include multiple devices (e.g., amplifier 16 or other devices), each of which may operate at a particular supply voltage, in which case some of the devices may use a higher supply voltage V supplied from power supply 10B. SUPPLY_HI , while other devices can use the lower supply voltage V supplied from the power supply unit 10B SUPPLY_LO .

[0065] Fig. 7A It shows that the embodiment of the present disclosure can be used to implement Figure 6 1 is a block diagram of selected components of an example power converter 20B of a power supply 10B shown in FIG. In many aspects, the power converter 20B may be similar in structure and function to Figure 3 The boost converter 20A depicted in FIG. 1 (including similar components such as the control circuit 32, the details of which are from Fig. 7A (omitted in ). Fig. 7A As shown, the power converter 20B may include a boost converter including a power inductor 30 and switches 28 and 29 under the control of a control circuit 32 to generate a supply voltage V on a boost capacitor 26. SUPPLY_HI , where the supply voltage V SUPPLY_HI Higher than the battery voltage V of the battery 22 BAT In some embodiments, battery 22 may include a multi-cell battery.

[0066] In order to operate with higher power efficiency (for example, supplying only the supply voltage V SUPPLY_HI Compared with the power converter 20B, the power converter 20B can also supply a voltage lower than the supply voltage VSUPPLY_HI The supply voltage V SUPPLY_LO Therefore, in order to reduce power consumption (including idle power consumption of amplifier 16 or other circuits powered by power converter 20B), such amplifier 16 or other circuits (or control circuitry for such amplifier or other circuitry) may be controlled based on the actual power supply requirements of such amplifier 16 or other circuits (e.g., the output signal V driven by amplifier 16). OUT The amplitude) at the supply voltage V SUPPLY_LO and the supply voltage V SUPPLY_HI Therefore, if Fig. 7A As shown, the power converter 20B can provide the battery voltage V BAT As the lower supply voltage V SUPPLY_LO .

[0067] However, for higher battery voltage values ​​V BAT , as is the case when the battery 22 comprises a multi-cell battery, using the battery voltage V BAT As the lower supply voltage V SUPPLY_LO Minimal power savings can be provided, especially for low level output signals V driven by amplifier 16. OUT .

[0068] To overcome this limitation, Figure 7B It shows that the embodiment of the present disclosure can be used to implement Figure 6 FIG. 1 is a block diagram of selected components of another example power converter 20C of a power supply unit 10B shown in FIG. Fig. 7A Compared with the power converter 20B, Figure 7B The main difference between the power converter 20C and the battery 22 is that the battery voltage V BAT is supplied as the lower supply voltage V SUPPLY_LO , but the power converter 20C can provide a battery voltage V lower than the external battery voltage V of the power converter 20C. BAT The voltage supply is used as the lower supply voltage V SUPPLY_LO However, using a voltage lower than the battery voltage V BAT The voltage supply can be a medium level output signal V driven by amplifier 16 OUT Provides minimal power savings.

[0069] To overcome the limitations of power converter 20B and power converter 20C, Figure 7C It shows that the embodiment of the present disclosure can be used to implement Figure 6 FIG. 1 is a block diagram of selected components of another example power converter 20D of the power supply unit 10B shown in FIG. Figure 7CAs shown, the power converter 20D may implement a boost converter including a power inductor 30 and switches 28 and 29 under the control of a control circuit 32 to generate a supply voltage V on a boost capacitor 26. SUPPLY_HI , where the supply voltage V SUPPLY_HI Higher than the battery voltage V of the battery 22 BAT In addition, power converter 20D may implement a class H envelope tracking buck converter including a power inductor 70, a buck capacitor 76, and switches 78 and 79 under the control of a class H buck control circuit 72 to generate a supply voltage V on boost capacitor 26. SUPPLY_LO , where the supply voltage V SUPPLY_LO Lower than the battery voltage V of the battery 22 BAT , and tracks the output signal V OUT Advantageously, the topology of power converter 20D may be able to use the same amount of stored energy of boost capacitor 26 as power converter 20B, but with the presence of a class H tracking buck converter in power converter 20D and the provision of a higher supply voltage V SUPPLY_HI and lower supply voltage V SUPPLY_LO The capability of may result in significantly lower idle power consumption and higher power efficiency for power converter 20D as compared to the idle power consumption and power efficiency of power converter 20B.

[0070] In order to take advantage of the advantages of both power converters 20A and 20D, Figure 8 It shows that the embodiment of the present disclosure can be used to implement Figure 6 1 is a block diagram of selected components of an example hybrid power converter 20E of a power supply 10B shown in FIG. Figure 8 As shown, the hybrid power converter 20E may implement a boost converter including a power inductor 30 and switches 28 and 29 under the control of a control circuit 32 to generate a supply voltage V on a boost capacitor 26. SUPPLY_HI , where the supply voltage V SUPPLY_HI Higher than the battery voltage V of the battery 22 BAT. In addition, the hybrid power converter 20E can implement an H-class envelope tracking buck converter including a power inductor 70, a voltage drop capacitor 76, and switches 78 and 79 under the control of an H-class buck control circuit 72, so as to generate a supply voltage VSUPPLY_LO on the boost capacitor 26, wherein the supply voltage VSUPPLY_LO is lower than the battery voltage VBAT of the battery 22, and tracks the signal envelope of the output signal VOUT. In addition, the hybrid converter 20E can operate in at least two modes. In the first mode, the switch 62B can be activated (e.g., turned on, closed, enabled) and the switch 62A can be deactivated (e.g., turned off, disconnected, disabled), so that the power supply voltage VSUPPLY_LO corresponding to the supply voltage V SUPPLY The bottom plate of the boost capacitor 26 is coupled to the ground voltage at the negative terminal of the boost capacitor 26. In the second mode, the switch 62A can be activated and the switch 62B can be deactivated so that the bottom plate of the boost capacitor 26 (eg, with the supply voltage V SUPPLY The top plate of the boost capacitor 26 is coupled to the supply voltage V SUPPLY_LO The switching between the first mode and the second mode can be controlled by the hybrid mode switch controller 60. The hybrid mode switch controller 60 can be configured to SUPPLY_HI drops to a predetermined threshold voltage V TH When the power supply voltage V SUPPLY_HI rises to a predetermined threshold voltage V TH When the above is done, the operation in the second mode is switched to the operation in the first mode. Figure 8 , but in some embodiments, the mixed mode switch controller 60 may operate with hysteresis such that the threshold voltage V for switching from the first mode to the second mode is TH can be lower than the threshold voltage V for switching from the second mode to the first mode TH .

[0071] To further illustrate the hybrid operation between the first mode and the second mode, Fig. 9 Graphs depicting example waveforms of selected voltages of an example hybrid power converter 20E when switching between a first mode and a second mode and between the second mode and the first mode are shown in accordance with an embodiment of the present disclosure. Fig. 9 As shown, at time t0, the hybrid mode switch control 60 can set the operation mode of the hybrid power converter 20E to the first mode, and the class G control of the amplifier 16 can select the supply voltage V SUPPLY_LO As its supply voltage. The output signal V OUT When the H-type voltage drop control circuit 72 increases, the supply voltage VSUPPLY_LO Tracking output signal V OUT At time t1, the output signal V OUT can be increased until the H-type voltage drop control circuit 72 can no longer track the output signal V OUT level, and therefore, at this time t1, the class G control of the amplifier 16 can select the supply voltage V SUPPLY_HI as its supply voltage, and the supply voltage V SUPPLY_HI Supplying current to this amplifier 16 can begin.

[0072] At time t2, due to the output signal V OUT A further increase in ΔV may reach the boost current limit of the boost converter of the hybrid power converter 20E, and the voltage ΔV on the boost capacitor 26 may begin to decrease. The voltage ΔV on the capacitor 26 drops to the threshold voltage V TH At the following time t3, the H-type voltage drop control circuit 72 can reduce the supply voltage V SUPPLY_LO The target is set to supply voltage V SUPPLY_HI and threshold voltage V TH The difference between the two, and the hybrid mode switch control 60 can set the operation mode of the hybrid power converter 20E to the second mode, thereby coupling the bottom plate of the boost capacitor 26 to the supply voltage V SUPPLY_LO .

[0073] Therefore, once the supply voltage V on the voltage drop capacitor 76 SUPPLY_LO At time t4, it is discharged to the supply voltage V SUPPLY_HI The maximum value (e.g., 20V) minus the threshold voltage V TH , the class H voltage drop controller 72 and the voltage drop converter of the hybrid power converter 20E can regulate the voltage V at the bottom plate of the boost capacitor 26 BOT As amplifier 16 loaded with hybrid power converter 20E continues to draw current, class H buck controller 72 and the buck converter of hybrid power converter 20E may attempt to increase voltage V BOT The supply voltage V SUPPLY_HI The voltage is regulated to its maximum voltage (eg, 20V), thereby allowing the boost capacitor 26 to discharge and use its stored energy to supply current to the amplifier 16 loaded with the hybrid power converter 20E.

[0074] The output signal V OUT When the supply voltage V SUPPLY_HI can increase back to its maximum voltage (eg, 20V) at time t5 and can be reduced by the H-type voltage drop controller 72 and the hybrid power converter 20E's reduced voltage V BOT The voltage drop converter is kept at this maximum voltage. At time t6, when the voltage VBOT When the voltage has dropped to zero, the hybrid mode switch control 60 can set the operating mode of the hybrid power converter 20E to the first mode, thereby coupling the bottom plate of the boost capacitor 26 to ground. At this point, the class H voltage drop controller 72 and the voltage drop converter of the hybrid power converter 20E can reduce the supply voltage V SUPPLY_LO increases to its maximum voltage (e.g., 9V), so that when the output signal V OUT Reduce to the supply voltage V SUPPLY_LO When it is below this maximum voltage, it is ready to be selected as the supply voltage for amplifier 16.

[0075] As used herein, when two or more elements are referred to as being “coupled” to each other, the term indicates that the two or more elements are in electrical or mechanical communication, as applicable, whether indirectly or directly, with or without intervening elements.

[0076] The present disclosure encompasses all changes, substitutions, changes, alterations and modifications to the example embodiments herein that would be understood by a person of ordinary skill in the art. Similarly, where appropriate, the appended claims encompass all changes, substitutions, changes, alterations and modifications to the example embodiments herein that would be understood by a person of ordinary skill in the art. In addition, references to devices or systems or components of devices or systems adapted to, arranged to, capable of, configured to, enabled to, enabled to operate or operable to perform a specific function in the appended claims encompass the device, system or component, regardless of whether it or the specific function is activated, turned on or unlocked, as long as the device, system or component is so adapted, arranged, capable of, configured to, enabled to, enabled to operate or operable. Therefore, without departing from the scope of the present disclosure, the systems, devices and methods described herein may be modified, added or omitted. For example, the components of the systems and devices may be integrated or separated. Moreover, the operations of the systems and devices disclosed herein may be performed by more, fewer or other components, and the described methods may include more, fewer or other steps. Additionally, the steps may be performed in any suitable order. As used herein, "each" refers to every member of a set or every member of a subset of a set.

[0077] Although exemplary embodiments are shown in the drawings and described below, the principles of the present disclosure may be implemented using any number of techniques, whether currently known or not. The present disclosure should not be limited in any way to the exemplary implementations and techniques shown in the drawings and described above.

[0078] Unless specifically noted otherwise, items depicted in the drawings are not necessarily drawn to scale.

[0079] All examples and conditional language cited herein are for teaching purposes to help readers understand the disclosure and concepts contributed by the inventors to advance the art, and are interpreted as not being limited to these specific cited examples and conditions. Although the embodiments of the present disclosure have been described in detail, it should be understood that various changes, substitutions and modifications may be made thereto without departing from the spirit and scope of the present disclosure.

[0080] Although specific advantages have been listed above, various embodiments may include some, none, or all of the listed advantages. Additionally, other technical advantages will become apparent to those of ordinary skill in the art after reading the foregoing drawings and descriptions.

[0081] To assist the Patent Office and any reader of any patent issuing in this application in interpreting the appended claims, Applicants wish to note that unless the words "means for" or "step for" are expressly used in a particular claim, they do not intend that any of the appended claims or claim elements trigger 35 U.S.C. §112(f).

Claims

1. A system comprising: a power converter having a maximum allowable input power drawn from a power source; an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy; as well as A control circuit system is configured to: causing excess energy stored in the energy storage element to be consumed by output circuitry coupled to an output of the power converter when the input power of the power converter exceeds the maximum allowable input power; maintaining a positive voltage margin of the circuitry coupled to the output of the power converter by selectively coupling the bottom plate of the energy storage element to the power source, whereby when the input power of the power converter exceeds the maximum allowable input power, excess energy consumed by the output circuitry is consumed from the energy storage device; and Coupling of the backplane of the energy storage element to the power source is selectively enabled and disabled at a first switching frequency that is substantially less than a second switching frequency at which switches of the power converter are switched. 2 . The system of claim 1 , wherein the maximum allowed input power is limited by an input current limit of the power converter.

3. The system of claim 1, wherein the power source is a battery.

4. The system of claim 1 , wherein the control circuitry is configured to selectively enable and disable coupling of the backplane of the energy storage element to the power source at a first switching frequency related to a second switching frequency of a signal driven from an amplifier powered by the power converter to a load.

5. A method, in a system having a power converter with a maximum allowed input power drawn from a power source and an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, the method comprising: causing excess energy stored in the energy storage element to be consumed by output circuitry coupled to an output of the power converter when the input power of the power converter exceeds the maximum allowable input power, maintaining a positive voltage margin of the circuitry coupled to the output of the power converter by selectively coupling the bottom plate of the energy storage element to the power source, such that when the input power of the power converter exceeds the maximum allowable input power, excess energy consumed by the output circuitry is consumed from the energy storage device, and Coupling of the backplane of the energy storage element to the power source is selectively enabled and disabled at a first switching frequency that is substantially less than a second switching frequency at which switches of the power converter are switched. The method of claim 5 , wherein the maximum allowed input power is limited by an input current limit of the power converter. The method of claim 5 , wherein the power source is a battery.

8. The method of claim 5, wherein the control circuitry is configured to selectively enable and disable coupling of the backplane of the energy storage element to the power source at a first switching frequency related to a second switching frequency of a signal driven from an amplifier powered by the power converter to a load.

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