Circuit structure of ultra-wideband high-linearity low-noise amplifier adopting gallium arsenide technology

Abstract

The invention relates to the field of radio frequency devices, in particular to a circuit structure of a gallium arsenide technology ultra-wideband high-linearity low-noise amplifier, which comprises an amplifier circuit, the amplifier circuit comprises the following components: a GaAs substrate, the bottom of the GaAs substrate is electroplated with gold, and a plurality of metal through holes are formed in the GaAs substrate; the GaAs substrate is powered up by adopting a single power-up point, the voltage of the GaAs substrate is + 5V, and the quiescent current of the GaAs substrate is 75mA; a four-stage common-source amplification structure, a first-stage circuit, a second-stage circuit, a third-stage circuit and a fourth-stage circuit are arranged on a GaAs substrate, the first-stage circuit achieves good impedance matching of an input end through a T-shaped input matching network, reflection loss is reduced, output impedance of a source electrode is increased through a source electrode degeneration inductor, and the stability of the amplifier is improved; the second-stage circuit achieves current multiplexing through a current multiplexing structure, quiescent current consumption is reduced, and the gain of the amplifier is improved through a current enhancing resistor.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency devices, and in particular to a circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier. Background Art

[0002] With the rapid development of wireless communication technology, the importance of ultra-wideband low noise amplifier (LNA) as a key component of ultra-wideband receiving front end has become increasingly prominent. With the continuous increase in operating frequency, bandwidth and frequency band, as well as the application of emerging modulation technologies such as orthogonal frequency division multiplexing (OFDM), higher requirements are placed on the linearity of the amplifier. In addition, the signal power in instrument systems and military fields is also constantly increasing. Therefore, it is particularly important to design a low noise amplifier with ultra-wideband, low noise, high gain and high linearity.

[0003] Overview of existing technology

[0004] Currently, the technologies used to manufacture monolithic low-noise amplifiers mainly include gallium arsenide (GaAs), complementary metal oxide semiconductor (CMOS) and gallium nitride (GaN). Each of these technologies has advantages and disadvantages:

[0005] GaAs Technology:

[0006] Advantages:

[0007] High electron mobility: GaAs material has high electron mobility and can support higher operating frequencies.

[0008] High single-stage gain: GaAs devices generally have high single-stage gain, which reduces the number of stages required for multi-stage amplification and simplifies circuit design.

[0009] Low noise figure: GaAs technology can achieve a low noise figure, making it suitable for noise-sensitive communication systems.

[0010] Low power consumption: GaAs technology has lower power consumption than GaN technology, making it suitable for portable devices and other applications that require energy conservation.

[0011] Lower cost: Compared with GaN technology, GaAs technology has lower cost and is more suitable for large-scale production and commercial applications.

[0012] Application areas: GaAs technology is widely used in high-frequency communication systems, radar systems, satellite communications and other occasions that require high gain, low noise and low power consumption.

[0013] CMOS Technology:

[0014] Advantages:

[0015] Lower cost: CMOS technology is relatively low cost and suitable for large-scale integration.

[0016] Easy to integrate: CMOS technology is easy to integrate with other digital and analog circuits, making it easy to realize highly integrated systems.

[0017] limitation:

[0018] Lower electron mobility: CMOS technology has low electron mobility, which limits its performance in high-frequency applications.

[0019] Higher noise factor: Compared with GaAs technology, CMOS technology has a higher noise factor and is not suitable for noise-sensitive occasions.

[0020] GaN Technology:

[0021] Advantages:

[0022] Higher power handling capability: GaN technology is able to handle higher power levels and is suitable for applications that require high power output.

[0023] Higher operating temperature: GaN technology can operate at higher temperatures, making it suitable for applications in harsh environments.

[0024] limitation:

[0025] Higher cost: The relatively high cost of GaN technology limits its popularity in certain commercial applications.

[0026] Higher power consumption: GaN technology has higher power consumption and is not suitable for applications that require low power consumption. Summary of the invention

[0027] 1. Technical issues to be solved

[0028] In view of the deficiencies in the prior art, the present invention provides a circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier.

[0029] (II) Technical solution

[0030] To achieve the above object, the present invention provides the following technical solution: A circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier of the present invention includes an amplifier circuit, and the amplifier circuit includes the following components:

[0031] A GaAs substrate, wherein the bottom of the GaAs substrate is electroplated with gold, and the GaAs substrate is provided with a plurality of metal through holes;

[0032] The GaAs substrate is powered by a single power-on point, the voltage of the GaAs substrate is +V, and the static current is mA;

[0033] A four-stage common-source amplification structure is arranged on the GaAs substrate, each stage comprising:

[0034] The first stage circuit includes a T-type input matching network and a source degeneration inductor, wherein the T-type input matching network includes a capacitor, an inductor and a microstrip line, and the source degeneration inductor includes a microstrip line;

[0035] The second-stage circuit includes a current multiplexing structure, a current enhancement resistor, a negative feedback circuit, and an inductance peak technology, wherein the current multiplexing structure includes an inductor and a resistor, the current enhancement resistor includes a resistor, the negative feedback circuit includes a resistor, a microstrip line, and a capacitor, and the inductance peak technology includes an inductor and a resistor;

[0036] The third stage circuit includes a negative feedback circuit, a source degeneration inductor, and an inductor peaking technique;

[0037] The fourth-level circuit includes an RC stabilization structure, an inductance peaking technique, and a source degeneration inductor, wherein the RC stabilization structure includes a resistor and a capacitor.

[0038] Preferably, the first-level circuit further includes a first-level tube core, and the first-level circuit adopts the following connection structure:

[0039] Connect a capacitor in series, then connect an inductor and capacitor in parallel to the ground, and then connect a microstrip line in series to the gate of the first-stage die;

[0040] The source stage of the first stage tube core is connected in series with a microstrip line to the ground;

[0041] The drain of the first-stage tube core is first connected in series with a microstrip line and then with a capacitor.

[0042] Further preferably, the second-stage circuit includes a power-on port and a second-stage tube core, the gate and source of the second-stage tube core are each provided with two branches, and the second-stage circuit adopts the following connection structure:

[0043] Starting from the gate of the second-stage tube core, two microstrip lines are connected in series, followed by a resistor and a capacitor;

[0044] One branch is connected in series with an inductor and then connected to the power port;

[0045] The other branch is connected in series with a microstrip line and then connected to the second-stage drain;

[0046] Starting from the source of the second-stage tube core, first connect a section of microstrip line in series, then connect a capacitor in series to the ground, and then connect a resistor in series to the ground;

[0047] The other branch is first connected in series with a resistor, then with an inductor, and then connected to the first-stage drain to form a current multiplexing junction;

[0048] Starting from the drain of the second-stage tube core, first connect a microstrip line in series, and then connect a capacitor in series.

[0049] Again preferably, the third-level circuit includes two branches and a third-level tube core, the drain of the third-level tube core includes two branches, and the third-level circuit adopts the following connection structure:

[0050] First, a section of microstrip line is connected in series, and one branch is connected to the gate of the third-stage tube core;

[0051] The other branch is first connected in series with a capacitor, then a resistor, and then a section of microstrip line, and then connected to the drain of the third-stage tube core;

[0052] The source stage of the third stage tube core is connected in series with a microstrip line to the ground;

[0053] The drain of the third-stage tube core is first connected in series with a microstrip line, and one branch is first connected in series with an inductor, and then connected in series with a resistor before being connected to the power-on port;

[0054] The other branch is connected in series with a capacitor.

[0055] Preferably, the fourth-level circuit includes a power port and a fourth-level tube core, the drain of the fourth-level tube core includes two branches, and the fourth-level circuit adopts the following connection structure:

[0056] A capacitor and a resistor are connected in series and then connected to the gate of the fourth-stage tube core;

[0057] The source of the fourth-stage tube core is connected in series with a microstrip line to the ground;

[0058] The drain of the fourth-stage tube core is first connected in series with a microstrip line, and one branch is first connected in series with an inductor, and then connected in series with a resistor before being connected to the power-on port;

[0059] The other branch is connected to the RF output port after being connected in series with a capacitor.

[0060] Further preferably, a current mirror gate voltage power-on structure is provided on the GaAs substrate, and two current mirror gate voltage power-on structures are provided on the GaAs substrate, and the current mirror gate voltage power-on structure comprises a triode and a resistor, and the triode is connected in series with the first stage circuit, the second stage circuit, the third stage circuit, and the fourth stage circuit through the resistor.

[0061] Again preferably, the operating frequency of the amplifier is 15-46 GHz, the gain is greater than 24.7 dB, the highest gain point is 26.6 dB at 45.3 GHz, and the gain flatness is ±0.95 dB.

[0062] Preferably, the input return loss of the amplifier is 7.5dB over the entire frequency band, and the output return loss is lower than -15dB over the entire frequency band.

[0063] Further preferably, the noise figure of the amplifier is lower than 2.8 dB in the full frequency band, and the lowest noise figure is obtained at 20 Hz, which is about 2.3 dB.

[0064] Again preferably, the output 1 dB compression point of the amplifier is higher than 14.5 dBm in the full frequency band, and the highest output 1 dB compression point is obtained at 39 Hz, which is about 16.7 dBm.

[0065] (III) Beneficial effects

[0066] Compared with the prior art, the present invention provides a circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier, which has the following beneficial effects:

[0067] Efficient Power Management:

[0068] It uses a single power-on point with a voltage of +5V and a quiescent current of 75mA.

[0069] The single power-on point design simplifies the power supply circuit, reduces power consumption and improves the overall efficiency of the system.

[0070] Stable bias voltage supply:

[0071] Two current mirror gate voltage power-on structures are arranged on the GaAs substrate, and each structure includes a triode and a resistor.

[0072] The current mirror gate voltage power-on structure provides consistent bias voltage for each level of circuits, improving the consistency and stability of the amplifier.

[0073] Optimized circuit design:

[0074] T-type input matching network: Through the combination of capacitors, inductors and microstrip lines, good impedance matching at the input end is achieved to reduce reflection loss.

[0075] Source degeneration inductance: Through the design of microstrip lines, the output impedance of the source is increased and the stability of the amplifier is improved.

[0076] Current reuse structure: Through the design of inductance and resistance, current reuse is achieved, static current consumption is reduced, and efficiency is improved.

[0077] Current enhancement resistor: Improve the gain of the amplifier through the design of resistors.

[0078] Negative feedback circuit: Negative feedback is introduced through a combination of resistors, microstrip lines and capacitors to improve the stability of the amplifier.

[0079] Inductor peak technology: Improve frequency response characteristics and gain flatness through the combination of inductance and resistance.

[0080] RC stable structure: Through the combination of resistance and capacitance, the stability of the amplifier is increased and oscillation is reduced.

[0081] Four-stage common source amplification structure:

[0082] Through the four-stage common-source amplification structure, the signal is amplified step by step, thereby improving the gain and stability of the entire amplifier.

[0083] The design of each circuit takes into account the transmission and amplification characteristics of the signal, ensuring the integrity of the signal during transmission;

[0084] First stage circuit:

[0085] A T-type input matching network is used to achieve good impedance matching at the input end and reduce reflection loss.

[0086] The output impedance of the source is increased by the source degeneration inductance, thereby improving the stability of the amplifier.

[0087] Second stage circuit:

[0088] The current reuse structure is used to realize current reuse and reduce static current consumption.

[0089] The gain of the amplifier is increased by current-boosting resistors.

[0090] Negative feedback is introduced through a negative feedback circuit to improve the stability of the amplifier.

[0091] The inductor peaking technique is used to improve the frequency response characteristics and enhance the gain flatness.

[0092] Third level circuit:

[0093] Negative feedback is introduced through a negative feedback circuit to improve the stability of the amplifier.

[0094] The output impedance of the source is increased by the source degeneration inductance, thereby improving the stability of the amplifier.

[0095] The inductor peaking technique is used to improve the frequency response characteristics and enhance the gain flatness.

[0096] Fourth level circuit:

[0097] The RC stabilization structure increases the stability of the amplifier and reduces oscillation.

[0098] The inductor peaking technique is used to improve the frequency response characteristics and enhance the gain flatness.

[0099] The output impedance of the source is increased by the source degeneration inductance, thereby improving the stability of the amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0100] Figure 1Schematic diagram of the circuit structure of a monolithic integrated low noise amplifier based on GaAs process in an embodiment of the present invention;

[0101] Figure 2 It is a schematic diagram of a four-stage common-source amplification structure of a monolithically integrated low-noise amplifier based on GaAs technology in an embodiment of the present invention;

[0102] Figure 3 It is a schematic diagram of measured parameters of a monolithic integrated low noise amplifier based on GaAs process in an embodiment of the present invention;

[0103] Figure 4 It is a schematic diagram of the measured noise coefficient of a monolithic integrated low noise amplifier based on GaAs process in an embodiment of the present invention;

[0104] Figure 5 It is a schematic diagram of the measured output 1dB compression point of the monolithic integrated low noise amplifier based on GaAs process in an embodiment of the present invention;

[0105] In the figure: 1. First-stage circuit; 2. Second-stage circuit; 3. Third-stage circuit; 4. Fourth-stage circuit; 5. T-type input matching network; 6. Negative feedback circuit; 7. Current mirror gate voltage power-on structure; 8. Inductor peak technology; 9. Current multiplexing structure; 10. Current enhancement resistor; 11. RC stabilization structure; 12. Source degeneration inductor. DETAILED DESCRIPTION

[0106] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0107] See also Figure 1-5 The circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier of the present invention includes an amplifier circuit, and the amplifier circuit includes the following components:

[0108] A GaAs substrate, wherein the bottom of the GaAs substrate is electroplated with gold, and the GaAs substrate is provided with a plurality of metal through holes;

[0109] The GaAs substrate is powered by a single power-on point, the voltage of the GaAs substrate is +5V, and the static current is 75mA;

[0110] A four-stage common-source amplification structure is arranged on the GaAs substrate, each stage comprising:

[0111] The first stage circuit 1 includes a T-type input matching network 5 and a source degeneration inductor 12, wherein the T-type input matching network 5 includes a capacitor, an inductor and a microstrip line, and the source degeneration inductor 12 includes a microstrip line;

[0112] The second stage circuit 2 includes a current multiplexing structure 9, a current enhancement resistor 10, a negative feedback circuit 6 and an inductance peaking technique 8, wherein the current multiplexing structure 9 includes an inductor and a resistor, the current enhancement resistor 10 includes a resistor, the negative feedback circuit 6 includes a resistor, a microstrip line and a capacitor, and the inductance peaking technique 8 includes an inductor and a resistor;

[0113] The third stage circuit 3 includes a negative feedback circuit 6, a source degeneration inductor 12 and an inductor peaking technique 8;

[0114] The fourth-stage circuit 4 includes an RC stabilization structure 11 , an inductance peaking technique 8 , and a source degeneration inductor 12 , wherein the RC stabilization structure 11 includes a resistor and a capacitor.

[0115] Summary of the working principle of the circuit structure of the GaAs process ultra-wideband high linearity low noise amplifier

[0116] Amplifier Circuit

[0117] GaAs substrate:

[0118] The bottom of the GaAs substrate is electroplated with gold and connected to the bottom through metal through holes to achieve a common ground, wherein the GaAs substrate and the metal through holes are both conventional substrate structures in low-noise amplifier devices.

[0119] The GaAs substrate is powered by a single power-on point with a voltage of +5V and a quiescent current of 75mA.

[0120] A four-stage common-source amplifier structure is arranged on a GaAs substrate.

[0121] First level circuit 1:

[0122] It includes a T-type input matching network 5 and a source degeneration inductor 12 .

[0123] The T-type input matching network 5 includes a capacitor, an inductor and a microstrip line.

[0124] The source degeneration inductor 12 includes a microstrip line.

[0125] Circuit connection structure:

[0126] Connect a capacitor in series, then connect an inductor and capacitor in parallel to the ground, and then connect a microstrip line in series to the gate of the first-stage die;

[0127] The source stage of the first stage tube core is connected in series with a microstrip line to the ground;

[0128] The drain of the first-stage tube core is first connected in series with a microstrip line and then with a capacitor.

[0129] Second stage circuit 2:

[0130] It includes a current multiplexing structure 9, a current enhancement resistor 10, a negative feedback circuit 6 and an inductance peak technology 8.

[0131] The current multiplexing structure 9 includes an inductor and a resistor.

[0132] The current enhancing resistor 10 includes a resistor.

[0133] The negative feedback circuit 6 includes a resistor, a microstrip line and a capacitor.

[0134] The inductive peak technique 8 includes an inductor and a resistor.

[0135] Circuit connection structure:

[0136] Starting from the gate of the second-stage tube core, two microstrip lines are connected in series, followed by a resistor and a capacitor;

[0137] One branch is connected in series with an inductor and then connected to the power port;

[0138] The other branch is connected in series with a microstrip line and then connected to the second-stage drain;

[0139] Starting from the source of the second-stage tube core, first connect a section of microstrip line in series, then connect a capacitor in series to the ground, and then connect a resistor in series to the ground;

[0140] The other branch is first connected in series with a resistor, then with an inductor, and then connected to the first-stage drain to form a current multiplexing junction;

[0141] Starting from the drain of the second-stage tube core, first connect a microstrip line in series, and then connect a capacitor in series.

[0142] Third level circuit 3:

[0143] It includes a negative feedback circuit 6 , a source degeneration inductor 12 , and an inductor peak technology 8 .

[0144] Circuit connection structure:

[0145] First, a section of microstrip line is connected in series, and one branch is connected to the gate of the third-stage tube core;

[0146] The other branch is first connected in series with a capacitor, then a resistor, and then a section of microstrip line, and then connected to the drain of the third-stage tube core;

[0147] The source stage of the third stage tube core is connected in series with a microstrip line to the ground;

[0148] The drain of the third-stage tube core is first connected in series with a microstrip line, and one branch is first connected in series with an inductor, and then connected in series with a resistor before being connected to the power-on port;

[0149] The other branch is connected in series with a capacitor.

[0150] Fourth level circuit 4:

[0151] It includes an RC stabilization structure 11 , an inductor peak technology 8 and a source degeneration inductor 12 .

[0152] The RC stabilization structure 11 includes a resistor and a capacitor.

[0153] Circuit connection structure:

[0154] A capacitor and a resistor are connected in series and then connected to the gate of the fourth-stage tube core;

[0155] The source of the fourth-stage tube core is connected in series with a microstrip line to the ground;

[0156] The drain of the fourth-stage tube core is first connected in series with a microstrip line, and one branch is first connected in series with an inductor, and then connected in series with a resistor before being connected to the power-on port;

[0157] The other branch is connected to the RF output port after being connected in series with a capacitor.

[0158] Current mirror gate voltage power-up structure 7:

[0159] Two current mirror gate voltage applying structures 7 are arranged on the GaAs substrate.

[0160] Each current mirror gate voltage power-up structure 7 includes a transistor and a resistor.

[0161] The transistor is connected in series with the first-stage circuit 1, the second-stage circuit 2, the third-stage circuit 3 and the fourth-stage circuit 4 through a resistor.

[0162] Working principles of each preferred technical solution

[0163] T-type input matching network 5:

[0164] Used to improve impedance matching at the input end, reduce reflection loss and increase gain.

[0165] Contains capacitors, inductors, and microstrip lines to adjust the phase and amplitude of the input signal.

[0166] Source degeneration inductance 12:

[0167] Used to improve linearity and reduce signal distortion.

[0168] Microstrip lines are included to increase the output impedance of the source, thereby improving the stability of the amplifier.

[0169] Current multiplexing structure 9:

[0170] Used to improve current utilization and reduce static current consumption.

[0171] Contains inductors and resistors to share current between multiple stages of a circuit, improving efficiency.

[0172] Current enhancement resistor 10:

[0173] Used to increase the gain of the amplifier.

[0174] Resistors are included to increase the gain of the amplifier.

[0175] Negative feedback circuit 6:

[0176] Used to improve the stability of the amplifier and reduce oscillation.

[0177] Contains resistors, microstrip lines and capacitors to introduce negative feedback and improve stability.

[0178] Inductor Peak Technology 8:

[0179] Used to improve frequency response characteristics.

[0180] Contains inductors and resistors that adjust the frequency response of the amplifier and improve gain flatness.

[0181] RC stable structure 11:

[0182] Used to improve the stability of the amplifier.

[0183] Contains resistors and capacitors to increase the stability of the amplifier and reduce oscillations.

[0184] Current mirror gate voltage power-up structure 7:

[0185] Used to provide a stable bias voltage.

[0186] Contains transistors and resistors to provide consistent bias voltage for multi-stage circuits, improving amplifier consistency and stability.

[0187] How the preferred solution works

[0188] Working frequency range: Figure 2 Shown

[0189] The operating frequency of the amplifier is 15-46GHz and is suitable for signal amplification in high-frequency communication systems.

[0190] Gain performance:

[0191] The gain is greater than 24.7dB, and the highest gain point is 26.6dB at 45.3GHz.

[0192] The gain flatness is ±0.95dB, ensuring gain stability over the entire operating frequency band.

[0193] Return loss:

[0194] The input return loss is 7.5dB over the entire frequency band, and the output return loss is less than -15dB over the entire frequency band.

[0195] Ensure that reflection loss is minimized during signal transmission and improve signal quality.

[0196] Noise coefficient: Figure 3 Shown

[0197] The noise figure is less than 2.8dB in the full frequency band, and the lowest noise figure is obtained at 20Hz, which is about 2.3dB.

[0198] Improve the signal-to-noise ratio of the amplifier and reduce the impact of noise on the signal.

[0199] Output 1dB compression point: Figure 4 Shown

[0200] The output 1dB compression point is higher than 14.5dBm in the full frequency band, and the highest output 1dB compression point is obtained at 39Hz, which is about 16.7dBm.

[0201] Ensure that the amplifier maintains good linearity under large signal conditions.

[0202] Through the above design, the present invention provides a monolithic integrated low noise amplifier based on GaAs process, which has the characteristics of ultra-wideband working range, high gain, low noise coefficient and high linearity. Through multiple preferred technical solutions such as T-type input matching network 5, source degeneration inductor 12, current multiplexing structure 9, current enhancement resistor 10, negative feedback circuit 6, inductor peak technology 8 and RC stabilization structure 11, the overall performance of the amplifier is improved, making it suitable for signal amplification and transmission in high-frequency communication systems.

[0203] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier, characterized in that: An amplifier circuit is included, the amplifier circuit comprising the following components: A GaAs substrate, wherein the bottom of the GaAs substrate is electroplated with gold, and the GaAs substrate is provided with a plurality of metal through holes; The GaAs substrate is powered by a single power-on point, the voltage of the GaAs substrate is +5V, and the static current is 75mA; A four-stage common-source amplification structure is arranged on the GaAs substrate, each stage comprising: The first stage circuit (1) comprises a T-type input matching network (5) and a source degeneration inductor (12), wherein the T-type input matching network (5) comprises a capacitor, an inductor and a microstrip line, and the source degeneration inductor (12) comprises a microstrip line; The second stage circuit (2) comprises a current multiplexing structure (9), a current enhancement resistor (10), a negative feedback circuit (6) and an inductance peaking technique (8), wherein the current multiplexing structure (9) comprises an inductor and a resistor, the current enhancement resistor (10) comprises a resistor, the negative feedback circuit (6) comprises a resistor, a microstrip line and a capacitor, and the inductance peaking technique (8) comprises an inductor and a resistor; The third stage circuit (3) includes a negative feedback circuit (6), a source degeneration inductor (12) and an inductor peaking technique (8); The fourth-level circuit (4) comprises an RC stabilization structure (11), an inductance peaking technique (8) and a source degeneration inductor (12), wherein the RC stabilization structure (11) comprises a resistor and a capacitor.

2. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 1, characterized in that: in, The first-level circuit (1) further comprises a first-level tube core, and the first-level circuit (1) adopts the following connection structure: Connect a capacitor in series, then connect an inductor and capacitor in parallel to the ground, and then connect a microstrip line in series to the gate of the first-stage die; The source stage of the first stage tube core is connected in series with a microstrip line to the ground; The drain of the first-stage tube core is first connected in series with a microstrip line and then with a capacitor.

3. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 2, characterized in that: in, The second-stage circuit (2) comprises a power-on port and a second-stage tube core, the gate and source of the second-stage tube core are both provided with two branches, and the second-stage circuit (2) adopts the following connection structure: Starting from the gate of the second-stage tube core, two microstrip lines are connected in series, followed by a resistor and a capacitor; One branch is connected in series with an inductor and then connected to the power port; The other branch is connected in series with a microstrip line and then connected to the second-stage drain; Starting from the source of the second-stage tube core, first connect a section of microstrip line in series, then connect a capacitor in series to the ground, and then connect a resistor in series to the ground; The other branch is first connected in series with a resistor, then with an inductor, and then connected to the first-stage drain to form a current multiplexing junction; Starting from the drain of the second-stage tube core, first connect a microstrip line in series, and then connect a capacitor in series.

4. The circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier according to claim 3, characterized in that: in, The third-level circuit (3) comprises two branches and a third-level tube core, the drain of the third-level tube core comprises two branches, and the third-level circuit (3) adopts the following connection structure: First, a section of microstrip line is connected in series, and one branch is connected to the gate of the third-stage tube core; The other branch is first connected in series with a capacitor, then a resistor, and then a section of microstrip line, and then connected to the drain of the third-stage tube core; The source stage of the third stage tube core is connected in series with a microstrip line to the ground; The drain of the third-stage tube core is first connected in series with a microstrip line, and one branch is first connected in series with an inductor, and then connected in series with a resistor before being connected to the power-on port; The other branch is connected in series with a capacitor.

5. The circuit structure of a gallium arsenide process ultra-wideband high linearity low noise amplifier according to claim 4, characterized in that: in, The fourth-level circuit (4) includes a power supply port and a fourth-level tube core, the drain of the fourth-level tube core includes two branches, and the fourth-level circuit (4) adopts the following connection structure: A capacitor and a resistor are connected in series and then connected to the gate of the fourth-stage tube core; The source of the fourth-stage tube core is connected in series with a microstrip line to the ground; The drain of the fourth-stage tube core is first connected in series with a microstrip line, and one branch is first connected in series with an inductor, and then connected in series with a resistor before being connected to the power-on port; The other branch is connected to the RF output port after being connected in series with a capacitor.

6. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 5, characterized in that: A current mirror gate voltage power-on structure (7) is arranged on the GaAs substrate, and two current mirror gate voltage power-on structures (7) are arranged on the GaAs substrate. The current mirror gate voltage power-on structure (7) comprises a triode and a resistor, and the triode is connected in series with a first-stage circuit (1), a second-stage circuit (2), a third-stage circuit (3), and a fourth-stage circuit (4) through the resistor.

7. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 6, characterized in that: The operating frequency of the amplifier is 15-46 GHz, the gain is greater than 24.7 dB, the highest gain point is 26.6 dB at 45.3 GHz, and the gain flatness is ±0.95 dB.

8. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 7, characterized in that: The input return loss of the amplifier is 7.5dB over the entire frequency band, and the output return loss is lower than -15dB over the entire frequency band.

9. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 8, characterized in that: The noise figure of the amplifier is lower than 2.8 dB in the whole frequency band, and the lowest noise figure is obtained at 20 Hz, which is about 2.3 dB.

10. The circuit structure of a GaAs process ultra-wideband high linearity low noise amplifier according to claim 9, characterized in that: The output 1dB compression point of the amplifier is higher than 14.5dBm in the full frequency band, and the highest output 1dB compression point is obtained at 39Hz, which is about 16.7dBm.

Images