Front-end circuit system suitable for full-channel reading of array detector

The front-end circuit system for array detectors addresses the challenges of large output charge by enhancing timing and energy measurement accuracy through low-bandwidth near-saturation amplification and analog circuitry, achieving compact, low-power, and radiation-resistant readout.

CN119210362APending Publication Date: 2024-12-27NORTHWEST INST OF NUCLEAR TECH

Patent Information

Application Number
CN202411265208.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-10
Publication Date
2024-12-27

AI Technical Summary

Technical Problem

Existing front-end readout circuits for array detectors with large output charge face challenges in achieving accurate energy and time measurements, exceed the dynamic range of commercial ASIC chips, lack radiation resistance, and result in large system scale and high cost, while conventional methods fail to meet requirements for low noise, low power consumption, and compact size.

Method used

A front-end circuit system comprising a low-bandwidth near-saturation amplifier, discrimination, threshold adjustment, and power conversion modules, utilizing low-noise operational amplifiers and analog circuits to enhance timing and energy measurement accuracy, and a power conversion circuit for stable power supply.

Benefits of technology

Enables high-precision time measurement, improving timing and energy measurement accuracy, reducing system size and cost, and ensuring radiation resistance, while maintaining low noise and power consumption.

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Abstract

The invention provides a front-end circuit system suitable for full-channel readout of an array detector, and the system comprises a low-bandwidth near-saturation amplification circuit which is used for carrying out the low-bandwidth near-saturation amplification of an output signal of the array detector, improves the timing precision through the characteristics that the leading edge of the signal is accelerated and the amplitudes are similar during the saturation amplification, and achieves the full-channel readout of the array detector. When low-bandwidth operational amplifier is used for near-saturation amplification, the pulse width measurement distinction degree is improved by using the broadening characteristic of the bandwidth not high enough to the pulse width, so that the energy measurement precision is improved; the discrimination circuit is used for converting the output of the near-saturation amplification circuit into a digital signal with time information and energy information; the threshold value adjusting circuit is used for setting the threshold value of the screening circuit; and the power conversion circuit is used for supplying power to the near-saturation amplification circuit, the discrimination circuit and the threshold adjusting circuit. According to the invention, through high-precision measurement of time, comprehensive physical information such as energy deposited by interaction of incident particles and the detector, acting time, intensity of incident rays and the like can be obtained.
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Description

Technical Field

[0001] The invention belongs to the technical field of space radiation detection, and in particular relates to a front-end circuit system suitable for full-channel readout of an array detector. Background Art

[0002] At present, in nuclear physics, particle physics, high-energy physics and other physical experiments, in order to obtain comprehensive physical information, the detector output signal is usually divided into two, one for energy measurement and the other for timing measurement. For the readout circuit at the front end of the array detector, an ASIC chip is often used to read out the energy and time information simultaneously in all channels. This method has high accuracy in energy and time measurement, but for array detectors with large output charge, it exceeds the dynamic range of the current commercial ASIC chip readout, and cannot obtain accurate physical information. In addition, ASIC chips usually do not have radiation resistance and are prohibited devices for aerospace. Therefore, in space radiation detection, it is necessary to use integrated operational amplifier devices to design full-channel readout of array detectors with large output charge. The conventional energy and time separate measurement method is used to design the full-channel readout system of the array detector, which results in a large system scale and high cost. At the same time, there are technical difficulties in designing low noise, low power consumption, light weight, and small size. In order to meet the full-channel readout requirements of spatial array detectors with large output charge, the present invention designs a front-end electronics system for full-channel readout of medium-array detectors. By only high-precision measurement of time, comprehensive physical information such as the energy deposited by the interaction between the incident particles and the detector, the moment of action, and the intensity of the incident rays can be obtained. Summary of the invention

[0003] The purpose of the present invention is to solve the technical difficulties in full-channel readout of spatial array detectors with large output charge amounts, and to provide a front-end circuit system suitable for full-channel readout of array detectors. By only performing high-precision measurement of time, comprehensive physical information such as the energy deposited by the interaction between incident particles and detectors, the moment of action, and the intensity of the incident rays can be obtained.

[0004] To achieve the above object, the present invention provides a front-end circuit system suitable for full-channel readout of an array detector, comprising: a low-bandwidth near-saturation amplifier circuit module, a discrimination circuit module, a threshold adjustment circuit module and a power conversion circuit module;

[0005] The low-bandwidth near-saturation amplification circuit module is used to perform low-bandwidth near-saturation amplification on the array detector output signal, and improve the timing accuracy by utilizing the characteristics of the signal front edge being accelerated and the amplitude being similar during saturation amplification, and improve the pulse width measurement discrimination by utilizing the pulse width widening characteristics of the low-bandwidth and low-noise operational amplifier during near-saturation amplification, thereby improving the energy measurement accuracy;

[0006] The discrimination circuit module is used to convert the output of the low-bandwidth near-saturation amplifier circuit module into a digital signal having time information and energy information;

[0007] The threshold adjustment circuit module is used to set the threshold level of the comparator of the discrimination circuit module;

[0008] The power conversion circuit module is used to supply power to the low-bandwidth near-saturation amplifier circuit module, the discrimination circuit module and the threshold adjustment circuit module.

[0009] Optionally, the input end of the low-bandwidth near-saturation amplifier circuit module is connected to the output end of the array detector, and the output end of the low-bandwidth near-saturation amplifier circuit module is connected to the input positive phase end of the discrimination circuit module.

[0010] Optionally, the input negative phase terminal of the discrimination circuit module is connected to the output terminal of the threshold adjustment circuit module;

[0011] The input end of the threshold adjustment circuit module is connected to the power conversion circuit module.

[0012] Optionally, the low-bandwidth near-saturation amplification circuit module includes: a low-bandwidth low-noise operational amplifier A1, a detector output load R1, a gain adjustment resistor R2, a gain adjustment resistor R3 and a capacitor C1;

[0013] The input positive phase terminal of the low-bandwidth low-noise operational amplifier A1 is connected to the output load R1, and the other end of the output load R1 is grounded; the input negative phase terminal of the low-bandwidth low-noise operational amplifier A1 is connected to the gain adjustment resistor R2, and the other end of the gain adjustment resistor R2 is grounded; the output of the low-bandwidth low-noise operational amplifier A1 is connected to the capacitor C1; the gain adjustment resistor R3 is connected in parallel with the low-bandwidth low-noise operational amplifier A1, one end of the gain adjustment resistor R3 is connected between the input negative phase terminal of the low-bandwidth low-noise operational amplifier A1 and the gain adjustment resistor R2, and the other end is connected between the low-bandwidth low-noise operational amplifier A1 and the capacitor C1;

[0014] The low-bandwidth low-noise operational amplifier A1 is used to perform near-saturation amplification and pulse width stretching on the input signal;

[0015] The detector output end load R1 is set to 50 ohms, which is used to convert the current signal into a voltage signal;

[0016] The gain adjustment resistors R2 and R3 are used to set the amplifier gain G, G=1+R3 / R2, to achieve near-saturation amplification;

[0017] The capacitor C1 is used to remove the DC bias and perform AC coupling.

[0018] Optionally, the identification circuit module includes: a high-speed comparator A2, an input matching resistor R4, a feedback resistor R5 and a differential output signal matching resistor R8;

[0019] The input positive phase terminal of the high-speed comparator A2 is connected to the capacitor C1; the input negative phase terminal of the high-speed comparator A2 is connected to the threshold adjustment circuit module; one end of the input matching resistor R4 is grounded, and the other end of the input matching resistor R4 is connected between the input positive phase terminal of the high-speed comparator A2 and the capacitor C1; the feedback resistor R5 is connected in parallel with the high-speed comparator A2; one end of the feedback resistor R5 is connected between the input matching resistor R4 and the input positive phase terminal of the high-speed comparator A2, and the other end of the feedback resistor R5 is connected between the output of the high-speed comparator A2 and the differential output signal matching resistor R8; the two output ends of the high-speed comparator A2 are respectively connected to the two ends of the differential output signal matching resistor R8;

[0020] The high-speed comparator A2 is used to convert the input analog signal into a digital pulse signal with time information and energy information at a set threshold voltage;

[0021] The input end matching resistor R4 serves as a low impedance input resistor of the high speed comparator A2;

[0022] The feedback resistor R5 is used to reduce vibration and noise;

[0023] The differential output signal matching resistor R8 is used for differential signal terminal matching.

[0024] Optionally, the threshold adjustment circuit module includes: a power reference chip A3, a first voltage-dividing resistor R6, a second voltage-dividing resistor R7, and a filter resistor C2;

[0025] The power reference chip A3 is connected to the first voltage-dividing resistor R6 and the second voltage-dividing resistor R7 in sequence; the other end of the second voltage-dividing resistor R7 is grounded; the filter resistor C2 is connected in parallel with the second voltage-dividing resistor R7; the first voltage-dividing resistor R6, the second voltage-dividing resistor R7 and the filter resistor C2 are respectively connected to the input negative phase terminal of the high-speed comparator A2;

[0026] The power reference chip A3 is used to generate a high-precision voltage with a fixed output;

[0027] The voltage-dividing resistor R6 and the voltage-dividing resistor R7 are respectively used to generate a threshold-crossing discrimination voltage lower than the high-precision voltage;

[0028] The filter resistor C2 is used to filter the threshold voltage after the voltage is divided by the voltage-dividing resistor R6 and the voltage-dividing resistor R7.

[0029] Optionally, the power conversion circuit module includes: a first voltage stabilizing circuit unit and a second voltage stabilizing circuit unit;

[0030] The power conversion circuit module converts the voltage of the external power supply and inputs it into the first voltage stabilizing circuit unit and the second voltage stabilizing circuit unit respectively;

[0031] The first voltage stabilizing circuit unit is used to respectively supply power to the high-speed comparator A2, the power reference chip A3 and the operational amplifier A1;

[0032] The second voltage stabilizing circuit unit is used to supply power to the operational amplifier A1.

[0033] Optionally, the first voltage stabilizing circuit unit includes two outputs; the first output is used to power the high-speed comparator A2 and the power reference chip A3; and the second output is used to power the operational amplifier A1.

[0034] Optionally, the power conversion circuit module further includes: a boost unit;

[0035] The boost unit is used to boost the first output voltage to supply power to the array detector.

[0036] The present invention has the following beneficial effects:

[0037] Through a single high-precision time measurement, comprehensive physical information such as the energy deposited by the interaction between the incident particles and the detector, the moment of interaction, and the intensity of the incident rays can be obtained.

[0038] It is proposed to improve the timing measurement accuracy by low bandwidth near saturation amplification, thereby improving the accuracy of time measurement.

[0039] When using low-bandwidth and low-noise op amps for near-saturation amplification, the pulse width widening characteristics due to insufficient bandwidth are used to improve the pulse width measurement discrimination, thereby improving the energy measurement accuracy.

[0040] The threshold voltage adjustment circuit design does not use the conventional FPGA / CPLD / MCU ​​+ DAC chip to control the threshold voltage. It adopts a pure analog circuit method, that is, a high-precision reference power chip plus a resistor voltage divider method, which realizes individual control of each channel, facilitates modular design and functional division, and saves space.

[0041] The power conversion circuit uses an ultra-low noise LDO chip for voltage stabilization and power conversion to reduce the ripple noise of the power supply voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0043] Figure 1A schematic diagram of the front-end readout circuit system according to an embodiment of the present invention;

[0044] Figure 2 Schematic diagram of the single-channel readout circuit principle of an embodiment of the present invention. Figure 1 A channel in the front-end readout circuit system;

[0045] Figure 3 A schematic diagram of a power conversion structure according to an embodiment of the present invention;

[0046] Figure 4 The energy spectrum diagram obtained by the pulse width of the output signal of the statistical discrimination circuit of the embodiment of the present invention; wherein (a) is before near-saturation amplification, and (b) is after near-saturation amplification;

[0047] Figure 5 for 241 Schematic diagram of the measurement results of Am;

[0048] Figure 6 for 152 Schematic diagram of Eu measurement results;

[0049] Figure 7 for 137 Schematic diagram of the measurement results of Cs. DETAILED DESCRIPTION

[0050] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0051] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0052] This embodiment proposes a front-end circuit system suitable for full-channel readout of an array detector, including: a low-bandwidth near-saturation amplification circuit module, a discrimination circuit module, a threshold adjustment circuit module, and a power conversion circuit module;

[0053] The low-bandwidth near-saturation amplifier circuit module is used to perform low-bandwidth near-saturation amplification on the output signal of the array detector, and improve the timing accuracy by utilizing the characteristics of the signal front edge being accelerated and the amplitude being similar during saturation amplification. The low-bandwidth and low-noise operational amplifier utilizes the characteristics of pulse width widening due to insufficient bandwidth during near-saturation amplification to improve the pulse width measurement discrimination, thereby improving the energy measurement accuracy.

[0054] A discrimination circuit module, used for converting the output of the low-bandwidth near-saturation amplifier circuit module into a digital signal having time information and energy information;

[0055] A threshold adjustment circuit module, used to set the threshold level of the comparator of the discrimination circuit module;

[0056] The power conversion circuit module is used to supply power to the low-bandwidth near-saturation amplifier circuit module, the discrimination circuit module and the threshold adjustment circuit module.

[0057] Furthermore, the input end of the low-bandwidth near-saturation amplifier circuit module is connected to the output end of the array detector, and the output end of the low-bandwidth near-saturation amplifier circuit module is connected to the input positive phase end of the discrimination circuit module.

[0058] Furthermore, the input negative phase terminal of the discrimination circuit module is connected to the output terminal of the threshold adjustment circuit module;

[0059] The input end of the threshold adjustment circuit module is connected to the power conversion circuit module.

[0060] Further, the low-bandwidth near-saturation amplification circuit module includes: a low-bandwidth operational amplifier A1, a detector output load R1, a gain adjustment resistor R2, a gain adjustment resistor R3 and a capacitor C1;

[0061] The input positive phase terminal of the low-bandwidth low-noise operational amplifier A1 is connected to the output load R1, and the other end of the output load R1 is grounded; the input negative phase terminal of the low-bandwidth low-noise operational amplifier A1 is connected to the gain adjustment resistor R2, and the other end of the gain adjustment resistor R2 is grounded; the output of the low-bandwidth low-noise operational amplifier A1 is connected to the capacitor C1; the gain adjustment resistor R3 is connected in parallel with the low-bandwidth low-noise operational amplifier A1, one end of the gain adjustment resistor R3 is connected between the input negative phase terminal of the low-bandwidth low-noise operational amplifier A1 and the gain adjustment resistor R2, and the other end is connected between the low-bandwidth low-noise operational amplifier A1 and the capacitor C1;

[0062] The low-bandwidth low-noise operational amplifier A1 is used to perform near-saturation amplification and pulse width widening on the input signal, which accelerates the leading edge of the signal and makes the signal amplitudes similar, thereby achieving a constant ratio timing effect and improving the timing accuracy. The low-bandwidth operational amplifier is selected to improve the accuracy of pulse width measurement by utilizing the characteristic that insufficient bandwidth will widen the signal pulse width.

[0063] The detector output load R1 is set to 50 ohms to convert the current signal into a voltage signal;

[0064] The gain adjustment resistors R2 and R3 are used to set the amplifier gain G, G=1+R3 / R2, to achieve near-saturation amplification;

[0065] Capacitor C1 is used to remove DC bias, perform AC coupling, eliminate DC bias, and provide a stable input signal for the back-end discriminator.

[0066] Further, the identification circuit module includes: a high-speed comparator A2, an input matching resistor R4, and feedback resistors R5 and R8;

[0067] The input positive phase terminal of the high-speed comparator A2 is connected to the capacitor C1; the input negative phase terminal of the high-speed comparator A2 is connected to the threshold adjustment circuit module; one end of the input matching resistor R4 is grounded, and the other end of the input matching resistor R4 is connected between the input positive phase terminal of the high-speed comparator A2 and the capacitor C1; the feedback resistor R5 is connected in parallel with the high-speed comparator A2; one end of the feedback resistor R5 is connected between the input matching resistor R4 and the input positive phase terminal of the high-speed comparator A2, and the other end of the feedback resistor R5 is connected between the output of the high-speed comparator A2 and the differential output signal matching resistor R8; the two output ends of the high-speed comparator A2 are respectively connected to the two ends of the differential output signal matching resistor R8;

[0068] The high-speed comparator A2 is used to convert the input analog signal into a digital pulse signal with time information and energy information at a set threshold voltage;

[0069] The input end matching resistor R4 serves as a low impedance input resistor of A2;

[0070] Feedback resistor R5 is used to reduce vibration and noise;

[0071] Differential output signal matching resistor R8, used for differential signal terminal matching;

[0072] The input matching resistor R4 is connected to the capacitor C1 and forms a signal filtering circuit.

[0073] Furthermore, the threshold adjustment circuit module includes: a power reference chip A3, a first voltage-dividing resistor R6, a second voltage-dividing resistor R7, and a filter resistor C2;

[0074] The power reference chip A3 is connected to the first voltage-dividing resistor R6 and the second voltage-dividing resistor R7 in sequence; the other end of the second voltage-dividing resistor R7 is grounded; the filter resistor C2 is connected in parallel with the second voltage-dividing resistor R7; the first voltage-dividing resistor R6, the second voltage-dividing resistor R7 and the filter resistor C2 are respectively connected to the input negative phase terminal of the high-speed comparator A2;

[0075] The power reference chip A3 is used to generate a high-precision voltage with a fixed output;

[0076] The voltage-dividing resistor R6 and the voltage-dividing resistor R7 are respectively used to generate a threshold-crossing discrimination voltage lower than the high-precision voltage;

[0077] The filter resistor C2 is used to filter the threshold voltage after the voltage is divided by the voltage-dividing resistor R6 and the voltage-dividing resistor R7.

[0078] A3 converts the input 3V voltage into a high-precision stable 1.25V voltage, and then divides it through two resistors R6 and R7 to get the threshold voltage. At the same time, it is bypassed and filtered by C2 and sent to the negative input terminal of the high-speed comparator.

[0079] Further, the power conversion circuit module includes: a first voltage stabilizing circuit unit, a second voltage stabilizing circuit unit;

[0080] A time measurement unit, used for converting the voltage of the external power supply and inputting it into the first voltage stabilizing circuit unit and the second voltage stabilizing circuit unit respectively;

[0081] A first voltage stabilizing circuit unit is used to respectively supply power to the high-speed comparator A2, the power reference chip A3 and the operational amplifier A1;

[0082] The second voltage stabilizing circuit unit is used to supply power to the operational amplifier A1.

[0083] Furthermore, the first voltage stabilizing circuit unit includes two outputs; the first output is used to supply power to the high-speed comparator A2 and the power reference chip A3; and the second output is used to supply power to the operational amplifier A1.

[0084] Furthermore, the power conversion circuit module further includes: a boost unit;

[0085] The boost unit is used to boost the first output voltage to supply power to the array detector.

[0086] This embodiment provides a front-end readout circuit system for an array detector, such as Figure 1 The whole system includes a saturation amplifier circuit, a high-speed discrimination circuit, a threshold adjustment circuit and a power conversion circuit.

[0087] The low-bandwidth near-saturation amplifier circuit is mainly used to improve the accuracy of timing and pulse width measurement. At the same time, the linearity of energy measurement within a certain range is adjusted according to parameter design, so as to achieve high-precision measurement of energy and time at the same time. The input end is connected to the output end of the array detector, the output end is connected to the input end of the discrimination circuit, and the power supply is connected to the power conversion circuit.

[0088] The discrimination circuit is mainly used to convert the output of the near-saturation amplifier circuit into a digital signal with time information and energy information. The over-threshold pulse width represents the energy information, which is obtained by measuring the front and back edge timestamps and performing logical operations. The positive input terminal is connected to the output terminal of the saturation amplifier circuit, the negative input terminal is connected to the output of the threshold adjustment circuit, and the power supply is connected to the power conversion circuit.

[0089] The threshold adjustment circuit is mainly used to set the threshold of the discrimination circuit, the input end is connected to the output of the power conversion circuit, and the output end is connected to the discrimination circuit.

[0090] The power conversion circuit mainly provides low ripple and low noise power supply for the near-saturation amplifier circuit, the discrimination circuit and the threshold adjustment circuit.

[0091] Figure 2 It is a single-channel front-end readout circuit.

[0092] The near-saturation amplifier circuit includes A1, R1, R2, R3 and C1, where A1 is OPA820 (or multi-op amplifier OPA2820, OPA4820), R1 is the load at the output end of the detector (usually 50Ω), R2 and R3 are gain adjustment resistors (the gain is set to 31 times when near saturation in this article), and C1 is a small AC coupling capacitor (10nF or 100nF) for DC isolation.

[0093] The high-speed discrimination circuit includes A2, R4, R5, and R8, where A2 is a high-speed comparator LMH7220 (or dual comparator LMH7324, LMH7322, etc.); R5 is a small feedback resistor (100-200Ω), which is mainly used to reduce oscillation and noise; R4 is an input matching resistor, usually 50Ω.

[0094] The threshold adjustment circuit is mainly composed of A3, R6, R7 and C2. A3 is a power reference chip REF3212 with 0.1% accuracy. R6 and R7 are used for voltage division and C2 is used for filtering.

[0095] Power conversion circuit such as Figure 3 As shown, it is mainly composed of an LDO voltage regulator circuit. The external power supply is 12V, which is sent to the time measurement module for conversion. The -3V and 3.3V are converted through the LDO voltage regulator chip and the DC / DC boost module. Among them, LDO1 is a dual-output voltage regulator chip TPS7A88, one output 3V is used to power the comparator and power reference chip of the discrimination circuit, and one output 2.5V is used to power the operational amplifier; LDO2 is TPS7S3301 output -2.5V to power the operational amplifier; MAX5206 is a boost module on the array detector board, which powers the array detector, and transmits 3.3V to the front-end array detector board through the front-end electronics for boost conversion.

[0096] Figure 4 The energy spectrum obtained by statistically identifying the pulse width of the output signal of the circuit is Figure 4 It can be seen that energy screening and energy measurement can be performed through pulse width. Figure 4 (a) is before near saturation amplification; Figure 4 (b) is after near-saturation amplification.

[0097] Figure 5-Figure 7 The schematic diagram of the energy spectrum measurement results is obtained by counting the pulse width. The measurement results show that near-saturation amplification improves the timing accuracy. Figure 5 for241 The measurement results of the Am radiation source irradiating the detector, Figure 6 for 152 The measurement results of the Eu radiation source irradiation detector, Figure 7 for 137 The measurement results of the Cs radiation source irradiating the detector.

[0098] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A front-end circuit system suitable for full-channel readout of an array detector, characterized in that: include: A low bandwidth near-saturation amplifier circuit module, a discrimination circuit module, a threshold adjustment circuit module and a power conversion circuit module; The low-bandwidth near-saturation amplification circuit module is used to perform low-bandwidth near-saturation amplification on the output signal of the array detector; The discrimination circuit module is used to convert the output of the near-saturation amplification circuit module into a digital signal having time information and energy information; The threshold adjustment circuit module is used to set the cross-domain level of the comparator of the identification circuit module; The power conversion circuit module is used to supply power to the low-bandwidth near-saturation amplifier circuit module, the discrimination circuit module and the threshold adjustment circuit module.

2. The front-end circuit system suitable for full-channel readout of an array detector according to claim 1, characterized in that: The input end of the low-bandwidth near-saturation amplifier circuit module is connected to the output end of the array detector, and the output end of the low-bandwidth near-saturation amplifier circuit module is connected to the input positive phase end of the discrimination circuit module.

3. The front-end circuit system suitable for full-channel readout of an array detector according to claim 1, characterized in that: The input negative phase terminal of the discrimination circuit module is connected to the output terminal of the threshold adjustment circuit module; The input end of the threshold adjustment circuit module is connected to the power conversion circuit module.

4. The front-end circuit system suitable for full-channel readout of an array detector according to claim 1, characterized in that: The low-bandwidth near-saturation amplification circuit module includes: a low-bandwidth low-noise operational amplifier A1, a detector output load R1, a gain adjustment resistor R2, a gain adjustment resistor R3 and a capacitor C1; The input positive phase terminal of the low-bandwidth low-noise operational amplifier A1 is connected to the output load R1, and the other end of the output load R1 is grounded; the input negative phase terminal of the low-bandwidth low-noise operational amplifier A1 is connected to the gain adjustment resistor R2, and the other end of the gain adjustment resistor R2 is grounded; the output of the low-bandwidth low-noise operational amplifier A1 is connected to the capacitor C1; the gain adjustment resistor R3 is connected in parallel with the low-bandwidth low-noise operational amplifier A1, one end of the gain adjustment resistor R3 is connected between the input negative phase terminal of the low-bandwidth low-noise operational amplifier A1 and the gain adjustment resistor R2, and the other end is connected between the low-bandwidth low-noise operational amplifier A1 and the capacitor C1; The low-bandwidth low-noise operational amplifier A1 is used to perform near-saturation amplification and pulse width stretching on the input signal; The detector output end load R1 is set to 50 ohms, which is used to convert the current signal into a voltage signal; The gain adjustment resistors R2 and R3 are used to set the amplifier gain G, G=1+R3 / R2, to achieve near-saturation amplification; The capacitor C1 is used to remove the DC bias and perform AC coupling.

5. The front-end circuit system suitable for full-channel readout of an array detector according to claim 4, characterized in that: The identification circuit module includes: a high-speed comparator A2, an input matching resistor R4, a feedback resistor R5 and a differential output signal matching resistor R8; The input positive phase terminal of the high-speed comparator A2 is connected to the capacitor C1; the input negative phase terminal of the high-speed comparator A2 is connected to the threshold adjustment circuit module; one end of the input matching resistor R4 is grounded, and the other end of the input matching resistor R4 is connected between the input positive phase terminal of the high-speed comparator A2 and the capacitor C1; the feedback resistor R5 is connected in parallel with the high-speed comparator A2; one end of the feedback resistor R5 is connected between the input matching resistor R4 and the input positive phase terminal of the high-speed comparator A2, and the other end of the feedback resistor R5 is connected between the output of the high-speed comparator A2 and the differential output signal matching resistor R8; the two output ends of the high-speed comparator A2 are respectively connected to the two ends of the differential output signal matching resistor R8; The high-speed comparator A2 is used to convert the input analog signal into a digital pulse signal with time information and energy information at a set threshold voltage; The input end matching resistor R4 serves as a low impedance input resistor of the high speed comparator A2; The feedback resistor R5 is used to reduce vibration and noise; The differential output signal matching resistor R8 is used for differential signal terminal matching.

6. The front-end circuit system suitable for full-channel readout of an array detector according to claim 5, characterized in that: The threshold adjustment circuit module includes: a power reference chip A3, a first voltage-dividing resistor R6, a second voltage-dividing resistor R7, and a filter resistor C2; The power reference chip A3 is connected to the first voltage-dividing resistor R6 and the second voltage-dividing resistor R7 in sequence; the other end of the second voltage-dividing resistor R7 is grounded; the filter resistor C2 is connected in parallel with the second voltage-dividing resistor R7; the first voltage-dividing resistor R6, the second voltage-dividing resistor R7 and the filter resistor C2 are respectively connected to the input negative phase terminal of the high-speed comparator A2; The power reference chip A3 is used to generate a high-precision voltage with a fixed output; The voltage-dividing resistor R6 and the voltage-dividing resistor R7 are respectively used to generate a threshold-crossing discrimination voltage lower than the high-precision voltage; The filter resistor C2 is used to filter the threshold voltage after the voltage is divided by the voltage-dividing resistor R6 and the voltage-dividing resistor R7.

7. The front-end circuit system suitable for full-channel readout of an array detector according to claim 6, characterized in that: The power conversion circuit module includes: a first voltage stabilizing circuit unit and a second voltage stabilizing circuit unit; The power conversion circuit module converts the voltage of the external power supply and inputs it into the first voltage stabilizing circuit unit and the second voltage stabilizing circuit unit respectively; The first voltage stabilizing circuit unit is used to respectively supply power to the high-speed comparator A2, the power reference chip A3 and the low-bandwidth low-noise operational amplifier A1; The second voltage stabilizing circuit unit is used to supply power to the low-bandwidth low-noise operational amplifier A1.

8. The front-end circuit system suitable for full-channel readout of an array detector according to claim 7, characterized in that: The first voltage stabilizing circuit unit includes two outputs; the first output is used to supply power to the high-speed comparator A2 and the power reference chip A3; and the second output is used to supply power to the operational amplifier A1.

9. The front-end circuit system suitable for full-channel readout of an array detector according to claim 8, characterized in that: The power conversion circuit module further includes: a boost unit; The boost unit is used to boost the first output voltage to supply power to the array detector.

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