A DAC differential output circuit using XOR gate

Abstract

The present application uses an XOR gate to implement a DAC differential output circuit, including an XOR gate circuit, a decoding circuit and an audio amplifier circuit; the XOR gate circuit is connected to the input signal of the I2S interface, and the output end of the XOR gate circuit is connected to the decoding circuit; the XOR gate circuit can output multiple different digital signals to the decoding circuit; the output end of the decoding circuit is connected to the audio amplifier circuit, and the decoding circuit can perform digital-to-analog conversion on the received digital signal and send it to the audio amplifier circuit; the audio amplifier circuit is used to amplify the received digital signal and send it to the terminal; the system configuration can be simplified: there is no need to change the DAC itself or add additional amplifier circuits. This design significantly simplifies the system configuration, reduces hardware complexity, and thus reduces overall costs. At the same time, it can improve signal quality, facilitate maintenance, and enhance system reliability.

Description

Technical Field

[0001] The present application belongs to the field of differential output design, and in particular relates to a DAC differential output circuit implemented by using an XOR gate. Background Art

[0002] The digital audio converter (DAC) plays a vital role in the audio system, converting digital signals into analog signals for playback by speakers or other analog devices. In high-performance audio transmission, differential output is a preferred technology because it can effectively suppress noise and reduce electromagnetic interference, thereby improving audio quality. However, not all DACs on the market support differential output, which limits their application in noisy environments or long-distance transmission;

[0003] The disadvantages of the prior art are as follows:

[0004] 1. Higher cost: DACs that support differential outputs are usually more expensive, which increases the overall cost.

[0005] 2. Increased system complexity: Using a differential amplifier or dual DAC system significantly increases hardware complexity and space usage.

[0006] 3. Software processing burden: Generating differential signals through software increases the computational burden on the processor and may cause audio delay.

[0007] 4. Inconvenient maintenance and replacement: In the existing differential output solution, maintenance and replacement are often difficult and require professional technical support.

[0008] Therefore, how to reduce the cost of differential output is a problem that needs to be solved. Summary of the invention

[0009] The purpose of the present application is to provide a DAC differential output circuit implemented by using an XOR gate to solve the problem of high differential output cost in the prior art.

[0010] The technical solution of the present application is: a DAC differential output circuit realized by using an XOR gate, comprising an XOR gate circuit, a decoding circuit and an audio operational amplifier circuit; the XOR gate circuit is connected to the input signal of the I2S interface, and the output end of the XOR gate circuit is connected to the decoding circuit; the XOR gate circuit can output multiple different digital signals to the decoding circuit; the output end of the decoding circuit is connected to the audio operational amplifier circuit, and the decoding circuit can perform digital-to-analog conversion on the received digital signal and send it to the audio operational amplifier circuit; the audio operational amplifier circuit is used to amplify the received digital signal and send it to the terminal;

[0011] The XOR gate circuit includes a first XOR gate, a second XOR gate, a third XOR gate and a fourth XOR gate; the first input end of the first XOR gate is grounded, and the second input end is connected to the BCK interface DAC_BCK of the DAC; the first input end of the second XOR gate is connected to the LRCK interface DAC_LRCK of the DAC, and the second input end is grounded; the first input end of the third XOR gate is grounded, and the second input end is connected to the DATA interface DAC_DATA of the DAC; the first input end of the fourth XOR gate is connected to the DATA interface DAC_DATA of the DAC, and the second input end is connected to a 5V voltage regulator chip.

[0012] Preferably, the decoding circuit includes a first decoding chip and a second decoding chip; pin 1 of the first decoding chip and the second decoding chip is an audio serial interface, pin 2 is a network service interface, pin 3 is a data structure, and pin 4 is grounded; the output end of the first XOR gate is connected to pin 1 of the first decoding chip and the second decoding chip, the output end of the second XOR gate is connected to pin 2 of the first decoding chip and the second decoding chip, the output end of the third XOR gate is connected to pin 3 of the first decoding chip, and the output end of the fourth XOR gate is connected to pin 3 of the second decoding chip; the input and output of the first XOR gate and the second XOR gate are the same, and when the input ends of the third XOR gate and the fourth XOR gate receive the same data, the output signals of the third XOR gate and the fourth XOR gate are opposite.

[0013] Preferably, the audio operational amplifier circuit includes a first audio operational amplifier circuit, a second audio operational amplifier circuit, a third audio operational amplifier circuit and a fourth audio operational amplifier circuit; the first audio operational amplifier circuit is connected to the output end of the first decoding chip, the second audio operational amplifier circuit is connected to the output end of the first decoding chip; the third audio operational amplifier circuit is connected to the output end of the second decoding chip, and the fourth audio operational amplifier circuit is connected to the output end of the second decoding chip;

[0014] The first audio operational amplifier circuit, the second audio operational amplifier circuit, the third audio operational amplifier circuit and the fourth audio operational amplifier circuit all have the same structure.

[0015] Preferably, the first audio op amp circuit includes a first op amp chip, a first resistor, a first capacitor, a second capacitor and a second capacitor; the negative input terminal of the first op amp chip is connected to the decoding circuit, the positive input terminal is grounded, and the output terminal outputs a differential signal; the first resistor is connected between the negative input terminal and the output terminal of the first op amp chip, one end of the first capacitor is connected to pin 4 of the first op amp chip, and the other end is grounded; the second resistor is arranged at the output terminal of the first op amp chip; one end of the second capacitor is connected to pin 8 of the first op amp chip, and the other end is grounded; pins 4 and 8 of the first op amp chip are connected to power.

[0016] Preferably, the first audio operational amplifier circuit outputs an R- signal, and the third audio operational amplifier circuit outputs an R+ signal; the second audio operational amplifier circuit outputs an L- differential signal, and the fourth audio operational amplifier circuit outputs an L+ differential signal.

[0017] Preferably, the decoding circuit is connected to the audio operational amplifier circuit via an IV operational amplifier circuit.

[0018] The DAC differential output circuit implemented by the XOR gate in the present application has the following advantages:

[0019] 1. Simplified system configuration: The present invention generates differential signals by directly using XOR gates on the data lines, without changing the DAC itself or adding additional amplification circuits. This design significantly simplifies the system configuration, reduces hardware complexity, and thus reduces overall costs.

[0020] 2. Improve signal quality: The differential signal processed by the XOR gate can effectively suppress noise and electromagnetic interference and improve signal quality. In contrast, the existing technology requires complex software processing or additional hardware equipment to achieve similar effects.

[0021] 3. Easy maintenance: The present invention is simple in structure and easy to implement, making maintenance more convenient. At the same time, this design is also conducive to automated production, further reducing costs and improving production efficiency.

[0022] 4. Improve system reliability: No additional software processing is required, which reduces the system's failure points and improves overall reliability. This is especially important for audio transmission applications that require high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solution provided by the present application, the following is a brief introduction to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present application.

[0024] Figure 1 This is a circuit structure diagram of the XOR gate circuit and the decoding circuit of this application;

[0025] Figure 2 This is a circuit structure diagram of the audio operational amplifier circuit of this application.

[0026] 1. First XOR gate; 2. Second XOR gate; 3. Third XOR gate; 4. Fourth XOR gate; 5. First decoding chip; 6. Second decoding chip; 7. First audio operational amplifier circuit; 8. Second audio operational amplifier circuit; 9. Third audio operational amplifier circuit; 10. Fourth audio operational amplifier circuit; 11. First operational amplifier chip; 12. First resistor; 13. First capacitor; 14. Second capacitor; 15. Second resistor. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The invention discloses a circuit for realizing DAC differential output by using XOR gates and adopting I2S interface standard.

[0029] I2S (Inter-IC Sound) is a commonly used digital audio interface standard, which usually includes three lines: data line (DATA), clock line (CLOCK) and frame synchronization line (WS). In the standard I2S implementation, data is sent serially through a single data line, but for stereo signals, two DACs are required to process the left and right channel data respectively, which increases the system complexity.

[0030] like Figure 1-Figure 2 As shown, it includes an XOR gate circuit, a decoding circuit and an audio amplifier circuit. The XOR gate circuit is connected to the input signal of the I2S interface, and the output end of the XOR gate circuit is connected to the decoding circuit; the XOR gate circuit can output multiple different digital signals to the decoding circuit; the output end of the decoding circuit is connected to the audio amplifier circuit, and the decoding circuit can perform digital-to-analog conversion on the received digital signal and send it to the audio amplifier circuit; the audio amplifier circuit is used to amplify the received digital signal and send it to the terminal. The terminal can be a speaker or a sound.

[0031] The XOR gate circuit includes a first XOR gate 1, a second XOR gate 2, a third XOR gate 3 and a fourth XOR gate 4; the first input end of the first XOR gate 1 is grounded, and the second input end is connected to the BCK interface DAC_BCK of the DAC; the first input end of the second XOR gate 2 is connected to the LRCK interface DAC_LRCK of the DAC, and the second input end is grounded; the first input end of the third XOR gate 3 is grounded, and the second input end is connected to the DATA interface DAC_DATA of the DAC; the first input end of the fourth XOR gate 4 is connected to the DATA interface DAC_DATA of the DAC, and the second input end is connected to a 5V voltage regulator chip. The LRCK, DATA and BCK interfaces of the DAC are connected to the TF, TD and TK of the RAM7 respectively.

[0032] The input and output of the first XOR gate 1 and the second XOR gate 2 are the same, and when the input ends of the third XOR gate 3 and the fourth XOR gate 4 receive the same data, the output signals of the third XOR gate 3 and the fourth XOR gate 4 are opposite. At the same time, the output ends of the third XOR gate 3 and the fourth XOR gate 4 are connected to different decoding chips in the decoding circuit, thereby realizing the output of the reverse analog signal.

[0033] Preferably, the decoding circuit includes a first decoding chip 5 and a second decoding chip 6. Pin 1 of the first decoding chip 5 and the second decoding chip 6 is an audio serial interface, pin 2 is a network service interface, pin 3 is a data structure, and pin 4 is grounded. The output end of the first XOR gate 1 is connected to pin 1 of the first decoding chip 5 and the second decoding chip 6, the output end of the second XOR gate 2 is connected to pin 2 of the first decoding chip 5 and the second decoding chip 6, the output end of the third XOR gate 3 is connected to pin 3 of the first decoding chip 5, and the output end of the fourth XOR gate 4 is connected to pin 3 of the second decoding chip 6.

[0034] Preferably, the audio operational amplifier circuit includes a first audio operational amplifier circuit 7, a second audio operational amplifier circuit 8, a third audio operational amplifier circuit 9 and a fourth audio operational amplifier circuit 10. The first audio operational amplifier circuit 7 is connected to the output end of the first decoding chip 5, the second audio operational amplifier circuit 8 is connected to the output end of the first decoding chip 5; the third audio operational amplifier circuit 9 is connected to the output end of the second decoding chip 6, and the fourth audio operational amplifier circuit 10 is connected to the output end of the second decoding chip 6.

[0035] The first audio operational amplifier circuit 7 , the second audio operational amplifier circuit 8 , the third audio operational amplifier circuit 9 and the fourth audio operational amplifier circuit 10 all have the same structure.

[0036] Now, the first audio amplifier circuit 7 is taken as an example for explanation: the first audio amplifier circuit 7 includes a first amplifier chip 11, a first resistor 12, a first capacitor 13, a second resistor 15 and a second capacitor 14. The negative input terminal of the first amplifier chip 11 is connected to the decoding circuit, the positive input terminal is grounded, and the output terminal outputs a differential signal; the first resistor 12 is connected between the negative input terminal and the output terminal of the first amplifier chip 11, one end of the first capacitor 13 is connected to the 4th pin of the first amplifier chip 11, and the other end is grounded; the second resistor 15 is arranged at the output terminal of the first amplifier chip 11 for voltage stabilization; one end of the second capacitor 14 is connected to the 8th pin of the first amplifier chip 11, and the other end is grounded. The 4th pin and the 8th pin of the first amplifier chip 11 are connected to the power supply, and the first capacitor 13 and the second capacitor 14 are both used for filtering.

[0037] Among them, the first audio operational amplifier circuit 7 outputs an R- signal, and the third audio operational amplifier circuit 9 outputs an R+ signal to realize R differential output; the second audio operational amplifier circuit 8 outputs an L- differential signal, and the fourth audio amplifier circuit outputs an L+ differential signal to realize L differential output.

[0038] Preferably, the decoding circuit is connected to the audio operational amplifier circuit via an IV operational amplifier circuit, and the IV operational amplifier circuit can simply and stably convert the current signal into a voltage signal.

[0039] Through the above design, this application has the following advantages:

[0040] 1. Simplified system configuration: The present invention generates differential signals by directly using XOR gates on the data lines, without changing the DAC itself or adding additional amplification circuits. This design significantly simplifies the system configuration, reduces hardware complexity, and thus reduces overall costs.

[0041] 2. Improve signal quality: The differential signal processed by the XOR gate can effectively suppress noise and electromagnetic interference and improve signal quality. In contrast, the existing technology requires complex software processing or additional hardware equipment to achieve similar effects.

[0042] 3. Easy maintenance: The present invention is simple in structure and easy to implement, making maintenance more convenient. At the same time, this design is also conducive to automated production, further reducing costs and improving production efficiency.

[0043] 4. Improve system reliability: No additional software processing is required, which reduces the system's failure points and improves overall reliability. This is especially important for audio transmission applications that require high reliability.

[0044] Finally, it should be noted that: the drawings of the embodiments disclosed in the present invention only involve structures related to the embodiments disclosed in the present invention, and other structures can refer to the general design. In the absence of conflict, the same embodiment and different embodiments of the present invention can be combined with each other;

[0045] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A DAC differential output circuit using an XOR gate, characterized in that: It includes an XOR gate circuit, a decoding circuit and an audio amplifier circuit; the XOR gate circuit is connected to the input signal of the I2S interface, and the output end of the XOR gate circuit is connected to the decoding circuit; the XOR gate circuit can output multiple different digital signals to the decoding circuit; the output end of the decoding circuit is connected to the audio amplifier circuit, and the decoding circuit can perform digital-to-analog conversion on the received digital signal and send it to the audio amplifier circuit; the audio amplifier circuit is used to amplify the received digital signal and send it to the terminal; The XOR gate circuit comprises a first XOR gate (1), a second XOR gate (2), a third XOR gate (3) and a fourth XOR gate (4); the first input end of the first XOR gate (1) is grounded, and the second input end is connected to the BCK interface DAC_BCK of the DAC; the first input end of the second XOR gate (2) is connected to the LRCK interface DAC_LRCK of the DAC, and the second input end is grounded; the first input end of the third XOR gate (3) is grounded, and the second input end is connected to the DATA interface DAC_DATA of the DAC; the first input end of the fourth XOR gate (4) is connected to the DATA interface DAC_DATA of the DAC, and the second input end is connected to a 5V voltage regulator chip; The decoding circuit comprises a first decoding chip (5) and a second decoding chip (6); pin 1 of the first decoding chip (5) and the second decoding chip (6) is an audio serial interface, pin 2 is a network service interface, pin 3 is a data structure, and pin 4 is grounded; the output end of the first XOR gate (1) is connected to pin 1 of the first decoding chip (5) and the second decoding chip (6), the output end of the second XOR gate (2) is connected to pin 2 of the first decoding chip (5) and the second decoding chip (6), the output end of the third XOR gate (3) is connected to pin 3 of the first decoding chip (5), and the output end of the fourth XOR gate (4) is connected to pin 3 of the second decoding chip (6); the input and output of the first XOR gate (1) and the second XOR gate (2) are the same, and when the input ends of the third XOR gate (3) and the fourth XOR gate (4) receive the same data, the output signals of the third XOR gate (3) and the fourth XOR gate (4) are opposite; The audio operational amplifier circuit is the output end of the entire circuit, and the audio operational amplifier circuit comprises a first audio operational amplifier circuit (7), a second audio operational amplifier circuit (8), a third audio operational amplifier circuit (9) and a fourth audio operational amplifier circuit (10); the first audio operational amplifier circuit (7) is connected to the output end of the first decoding chip (5), the second audio operational amplifier circuit (8) is connected to the output end of the first decoding chip (5); the third audio operational amplifier circuit (9) is connected to the output end of the second decoding chip (6), and the fourth audio operational amplifier circuit (10) is connected to the output end of the second decoding chip (6); The first audio operational amplifier circuit (7), the second audio operational amplifier circuit (8), the third audio operational amplifier circuit (9) and the fourth audio operational amplifier circuit (10) all have the same structure.

2. The DAC differential output circuit implemented by using an XOR gate as claimed in claim 1, characterized in that: The first audio amplifier circuit (7) comprises a first amplifier chip (11), a first resistor (12), a first capacitor (13), a second resistor (15) and a second capacitor (14); the negative input end of the first amplifier chip (11) is connected to the decoding circuit, the positive input end is grounded, and the output end outputs a differential signal; the first resistor (12) is connected between the negative input end and the output end of the first amplifier chip (11); one end of the first capacitor (13) is connected to pin 4 of the first amplifier chip (11), and the other end is grounded; the second resistor (15) is arranged at the output end of the first amplifier chip (11); one end of the second capacitor (14) is connected to pin 8 of the first amplifier chip (11), and the other end is grounded; pins 4 and 8 of the first amplifier chip (11) are connected to a power supply.

3. The DAC differential output circuit implemented by using an XOR gate as claimed in claim 1, characterized in that: The first audio operational amplifier circuit (7) outputs an R-signal, and the third audio operational amplifier circuit (9) outputs an R+signal; the second audio operational amplifier circuit (8) outputs an L-differential signal, and the fourth audio operational amplifier circuit (10) outputs an L+differential signal.

4. The DAC differential output circuit implemented by using an XOR gate as claimed in claim 1, characterized in that: The decoding circuit is connected to the audio operational amplifier circuit via an IV operational amplifier circuit.

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