Synchrotron radiation device controller and adc resolution optimization method thereof

Abstract

The application provides an ADC resolution optimization method of a synchrotron radiation device controller, which comprises the following steps: establishing an ADC resolution optimization system of the synchrotron radiation device controller on an FPGA chip of the synchrotron radiation device controller; defining a desired signal-to-noise ratio variable of the ADC resolution optimization system, and then solving a controller parameter; obtaining a transfer function from an external disturbance signal to an error from the ADC resolution optimization system of the synchrotron radiation device controller, and minimizing an H2 norm of the transfer function from the external disturbance signal to the error by optimizing the controller parameter; and taking a sampling rate of ADC data obtained by the FPGA as a control variable to control, so as to realize direct control of the ADC resolution and noise reduction control. The application also provides a corresponding ADC resolution optimization system. The ADC resolution optimization method of the synchrotron radiation device controller can effectively improve the ADC resolution, and the hardware does not need to be changed, so that the cost is reduced.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of high-resolution controllers of synchrotron radiation devices, and particularly relates to a synchrotron radiation device controller and an ADC resolution optimization method thereof. BACKGROUND

[0002] The nanometer probe experiment station in the synchrotron radiation device can realize nanometer-level spatial resolution fluorescence scanning imaging of a sample and is applied to the fields of biology, environment and materials. The element distribution of the measured sample in a region of tens of nanometers or even several nanometers can be observed through nanometer resolution fluorescence imaging, and the analysis of sample components and relative content can be realized, thereby providing a powerful tool for the development of nanotechnology. In the nanometer probe experiment device, the optical element and the motion mechanism widely use nanometer piezoelectric ceramic drivers with high resolution and fast response characteristics. In order to ensure the feasibility of the nanometer probe experiment, a closed-loop feedback control with high resolution needs to be designed, wherein the resolution of an analog-to-digital converter (ADC) greatly influences the resolution of the closed-loop control feedback control. Therefore, a method for improving the resolution of the ADC of the controller needs to be proposed.

[0003] As shown in Figure 1 The synchrotron radiation device controller includes an FPGA chip and an ADC module and a DAC module connected with the FPGA core board, the FPGA chip has an expansion interface, and the ADC module and the DAC module are plugged on the expansion interface. The synchrotron radiation device controller collects the capacitance sensor signal for reflecting the motor displacement through the ADC module, then reads the ADC signal through the FPGA chip to execute a closed-loop feedback control algorithm in the controller, so as to control the motor to reach the specified position. The input signal and the output signal of the synchrotron radiation device controller are both analog signals, wherein the input signal is the capacitance sensor signal for reflecting the motor displacement, and the output signal is the voltage signal for controlling the motor displacement. The voltage signal is the result after the PID algorithm.

[0004] At present, the synchrotron radiation device such as the nanometer probe experiment station mainly uses foreign controllers, which have high prices and poor self-controllability. When a controller is developed with 100% domesticization, the closed-loop resolution of the controller of the experiment station is limited by the resolution of the domestic ADC, which is generally 16 bits. The traditional method for improving the resolution of the ADC mainly depends on the improvement of hardware, which greatly increases the cost.

[0005] Therefore, it is necessary to provide a method for improving the resolution of the ADC, which can improve the resolution of the ADC without changing the hardware of the ADC, and can improve the resolution of the domestic ADC from 16 bits to 18 bits. SUMMARY

[0006] The application aims to provide a synchrotron radiation device controller and an ADC resolution optimization system thereof, so as to improve the ADC resolution without changing the ADC hardware, and further improve the resolution of the closed-loop control system of the controller.

[0007] To achieve the above-mentioned purpose, the application provides an ADC resolution optimization method of a synchrotron radiation device controller, which comprises the following steps:

[0008] S1: establishing an ADC resolution optimization system of a synchrotron radiation device controller on an FPGA chip of the synchrotron radiation device controller, wherein the ADC resolution optimization system comprises a generalized object and a controller constituting a closed loop; the generalized object is configured to calculate a measured signal-to-noise ratio variable v and an error z through a signal-to-noise ratio transfer function P(s) according to an external signal w and a sampling rate u of the FPGA for acquiring ADC data; the controller is configured to calculate the sampling rate u of the FPGA for acquiring ADC data through a controller parameter K according to the measured signal-to-noise ratio variable v; the external signal w comprises an external disturbance signal w d and an expected signal-to-noise ratio variable r, and is acquired through an ADC module; the signal-to-noise ratio transfer function P(s) is determined through a system identification method; d

[0009] S2: defining the expected signal-to-noise ratio variable of the ADC resolution optimization system, and solving the corresponding controller parameter K;

[0010] S3: acquiring a transfer function from the external disturbance signal w d to the error z from the ADC resolution optimization system of the synchrotron radiation device controller, optimizing the controller parameter K to minimize the H2 norm of the transfer function from the external disturbance signal w d to the error z, and then controlling the sampling rate u of the FPGA for acquiring ADC data output by the controller as a control variable to adjust the sampling rate of the FPGA to the ADC data, so as to realize direct control and noise reduction control of the ADC resolution.

[0011] In the step S1, the relationship of the generalized object is as follows:

[0012]

[0013] Wherein, u is the sampling rate of the FPGA for acquiring ADC data, v is the measured signal-to-noise ratio variable, w is the external signal, z is the error, s represents the s domain, P 11 (s), P 12 (s), P 21 (s), P 22 (s) are four components of the signal-to-noise ratio transfer function P(s), respectively.

[0014] ​The controller relationship is:

[0015] u=K(s)v,

[0016] Where u is the sampling rate at which the FPGA obtains ADC data, v is the measured signal-to-noise ratio variable, and s represents the s-domain.

[0017] The step S2 specifically includes:

[0018] S21: specify the value of the desired signal-to-noise ratio variable r and establish a stable signal-to-noise ratio transfer function P(s);

[0019] S22: For the signal-to-noise ratio transfer function P(s), decompose it into the reversible minimum phase part P of the signal-to-noise ratio transfer function m (s) and the irreversible full-pass part P a (s);

[0020] S23: According to the irreversible all-pass part of the signal-to-noise ratio transfer function P a (s), determine the desired closed-loop transfer function Y(s) corresponding to the desired signal-to-noise ratio variable r to the measured signal-to-noise ratio variable v;

[0021] S24: Calculate the controller parameter K based on the decomposition result of step S22, the desired closed-loop transfer function Y(s) obtained in step S23, and the relationship between the desired closed-loop transfer function Y(s) and the controller parameter K.

[0022] In step S22, the minimum phase part P of the signal-to-noise ratio transfer function m (s) and the irreversible full-pass part P a (s) satisfies the following formula:

[0023] P(s)=P m (s)P a (s),

[0024]

[0025] Among them, θ is the delay parameter, z i is a non-minimum phase zero point, Re(z i ) is z i The real part of , s represents the s domain, and the subscript i is the ordinal number;

[0026] In step S23, the desired closed-loop transfer function Y(s) is:

[0027] Y(s)=f(s)P a (s),

[0028] Where, f(s) is a low-pass filter;

[0029] In the step S24, the desired closed-loop transfer function Y(s) and the controller parameter K are related as follows:

[0030]

[0031] where P is the signal-to-noise ratio transfer function and K is the controller parameter.

[0032] The low-pass filter f(s) is:

[0033]

[0034] where a is the filter parameter, s represents the s-domain, and n represents the order of the filter.

[0035] The step S3 specifically includes:

[0036] Step S31: According to the relationship of the generalized object P1 of the system optimized by the ADC resolution, the transfer function from the external disturbance signal w d to the error z is given by the linear fractional transformation as follows:

[0037] The transfer function F d (P,K) from the external disturbance signal w l to the error z is:

[0038] F l (P,K) = P 11 + P 12 K(I-P 22 K) -1 P 21 ,

[0039] where I is the identity matrix, P 11 , P 12 , P 21 , and P 22 are four components of the signal-to-noise ratio transfer function P(s), and K is the controller parameter.

[0040] Step S32: By optimizing the controller parameter K, the H2 norm of the error transfer function F d (P,K) from the external disturbance signal w l to the error z is minimized, and at this time, the expected power of the error z is minimized.

[0041] In the step S32, the controller parameter K is continuously updated by the iterative method to optimize the controller parameter K, so that the H2 norm of the error transfer function F d (P,K) from the external disturbance signal w l to the error z reaches the minimum or converges near the minimum value.

[0042] In the step S3, when the controller parameter K is continuously updated by the iterative method, the step S33 is further included: using the amplitude upper bound of the sensitivity function S in the low frequency band and the high frequency band, the complementary sensitivity function T b The upper bound of the amplitude in the high frequency band, the sensitivity function S and the complementary sensitivity function T b Constraints are imposed on the controller parameter K to prevent noise from being amplified at high frequencies and to ensure that the ADC resolution optimizes the robustness margin of the system.

[0043] Sensitivity function S and complementary sensitivity function T b The functional relationship relative to the controller parameter K is:

[0044]

[0045] T b =IS,

[0046] Where I is the identity matrix, S is the sensitivity function, P is the signal-to-noise ratio transfer function, and K is the controller parameter;

[0047] The constraint condition for the amplitude of the sensitivity function S is: H of the weighted sensitivity function ∞ Norm is less than 1; complementary sensitivity function T b The amplitude constraint condition is: weighted complementary sensitivity function W Tb T b H ∞ The norm is less than 1;

[0048] Weight function w of the sensitivity function p for:

[0049]

[0050] Among them, s represents the s domain, M represents the upper bound of the amplitude of the sensitivity function in the high frequency band, ω b is the frequency parameter, and A is the upper bound of the amplitude of the sensitivity function in the low frequency band;

[0051] Weight function W of the complementary sensitivity function Tb for:

[0052]

[0053] Among them, s represents the s domain, k T 、a T is the weight function parameter of the complementary sensitivity function.

[0054] The application provides a synchrotron radiation device controller, which comprises an FPGA chip and an ADC module and a DAC module connected with the FPGA core board, the ADC module is configured to digitize an analog signal and collect ADC data, and the FPGA chip is configured to read the ADC data and run an ADC resolution optimization system of the synchrotron radiation device controller.

[0055] The ADC resolution optimization method of the synchrotron radiation device controller of the application can effectively improve the ADC resolution without changing the hardware and reduces the cost. BRIEF DESCRIPTION OF DRAWINGS

[0056] Figure 1 Fig. 1 is a structural schematic diagram of an existing synchrotron radiation device controller.

[0057] Figure 2 Fig. 4 is a control flow chart of the ADC resolution optimization system of the synchrotron radiation device controller according to an embodiment of the application. DETAILED DESCRIPTION

[0058] The preferred embodiments of the application are described below and in detail.

[0059] The ADC resolution optimization method of the synchrotron radiation device controller of the application is run in the synchrotron radiation device controller and is used to improve the resolution of the ADC module without changing the hardware of the ADC module of the synchrotron radiation device controller, thereby improving the resolution of the closed-loop control system of the controller.

[0060] The ADC resolution optimization method of the synchrotron radiation device controller of the application is based on the following principles: on the one hand, the signal-to-noise ratio transfer function of the controlled system reaches the expected value, which is equivalent to directly controlling the ADC resolution, and the resolution index is improved by improving the signal-to-noise ratio of the ADC collected signal; on the other hand, in order to reduce the influence of external noise on the ADC resolution, the noise output power is minimized through the constraint condition of H2 norm, and the upper bound of sensitivity and complementary sensitivity functions is limited to prevent the noise from being amplified in the high frequency band and to ensure the robustness of the system, thereby further improving the resolution of the ADC.

[0061] Specifically, the resolution index is improved by improving the signal-to-noise ratio of the ADC collected signal, and the basic principle is as follows:

[0062] For ADC, when the input signal is a full-scale sinusoidal signal, the signal-to-noise ratio SNR dB has:

[0063] SNR dB = 6.02N + 1.76dB (1)

[0064] wherein N is the resolution of the ADC.

[0065] The present application is derived for the resolution N of the ADC, and d(SNR dB ) / d(N) = 6.02, that is, the resolution of 1 bit of the ADC corresponds to 6.02dB of the signal-to-noise ratio, and increasing the signal-to-noise ratio can increase the resolution of the ADC.

[0066] The method for optimizing the resolution of the ADC of the synchrotron radiation device controller comprises the following steps:

[0067] Step S1: An ADC resolution optimization system of a synchrotron radiation device controller is established on an FPGA chip of the synchrotron radiation device controller, the ADC resolution optimization system comprises a generalized object P1 and a controller K1 constituting a closed loop; the generalized object P1 is set to calculate a measured signal-to-noise ratio variable v and an error z through a signal-to-noise ratio transfer function P(s) according to an external signal w and a sampling rate u of the FPGA for acquiring ADC data, the controller K1 is set to calculate the sampling rate u of the FPGA for acquiring ADC data according to the measured signal-to-noise ratio variable v; the signal-to-noise ratio transfer function P(s) is determined through a system identification method;

[0068] As Figure 2 shown in FIG. 1 is an ADC resolution optimization system of a synchrotron radiation device controller according to an embodiment of the present application, the ADC resolution optimization system comprises a generalized object P1 and a controller K1 constituting a closed loop, and operations related to the generalized object P1 and the controller K1 are all performed on an FPGA chip. The generalized object P1 is used to describe a signal-to-noise ratio transfer function P(s) and is set to calculate a measured signal-to-noise ratio variable v and an error z through the signal-to-noise ratio transfer function P(s) according to an external signal w and a sampling rate u of the FPGA for acquiring ADC data, the measured signal-to-noise ratio variable v is calculated from a measured voltage signal and thus can be considered as a measured signal-to-noise ratio; the error z is a difference between an expected signal-to-noise ratio variable and the measured signal-to-noise ratio variable, wherein the external signal w comprises an external disturbance signal w d and the expected signal-to-noise ratio variable r, the external disturbance signal w dis obtained by the ADC module, in this embodiment, the external disturbance can be directly obtained through the data collected by the ADC module, for example, the ADC data should be 5V voltage in theory, but the actually obtained signal-to-noise ratio variable is 5.5V, and the extra 0.5 can be used as the disturbance. The expected signal-to-noise ratio variable r is a target value set by a person, which is usually set and input by an external person. The controller K1 calculates the sampling rate u of the FPGA to obtain the ADC data according to the measured signal-to-noise ratio variable v through the controller parameter K, and the sampling rate u of the FPGA to obtain the ADC data is used as a control quantity to realize resolution optimization improvement.

[0069] As described above, the relationship of the generalized object P1 is obtained through the signal-to-noise ratio transfer function P(s), and the measured signal-to-noise ratio variable v and the error z are calculated.

[0070] Therefore, the relationship of the generalized object P1 of the ADC resolution optimization system is:

[0071]

[0072] Wherein, u is the sampling rate of the FPGA to obtain the ADC data, that is, the ADC sampling rate, v is the measured signal-to-noise ratio variable, w is the external signal, including the external disturbance signal w d and the expected signal-to-noise ratio variable r, z is the error, s represents the s domain, and the s domain satisfies s=jw, wherein jw represents the frequency domain of the corresponding variable, for example, P(jw) is the frequency domain of the generalized object P, P 11 (s), P 12 (s), P 21 (s), P 22 (s) are four components of the signal-to-noise ratio transfer function P(s), respectively.

[0073] The relationship of the controller K1 is calculated through the controller parameter K(s).

[0074] Therefore, the relationship of the controller K1 is:

[0075] u=K(s)v (3)

[0076] Wherein, u is the sampling rate of the FPGA to obtain the ADC data, that is, the ADC sampling rate, v is the measured signal-to-noise ratio variable, and s represents the s domain.

[0077] As described above, the state space P is used to describe the signal-to-noise ratio transfer function P(s), which can describe the relationship between the sampling rate u of the FPGA acquiring ADC data and the measured signal-to-noise ratio variable v. In the step S1, the parameter values of the generalized object P1 are obtained by a system identification method, and then the signal-to-noise ratio transfer function P(s) is determined. The determination of the signal-to-noise ratio transfer function P(s) by the system identification method can refer to the literature

System Identification and Modeling, Liu Feng, Wan Xiongbo, Wuhan: China University of Geosciences Press, 2019

[0078] The state space expression of the state space P is:

[0079]

[0080] Wherein, A is a state matrix, B = [B1 B2] is an input matrix, is an output matrix, is a control matrix. These parameters can be obtained by using the existing system identification method. Step S2: defining the expected closed-loop response of the ADC resolution optimization system (i.e. the expected signal-to-noise ratio variable r), and then solving the corresponding controller parameter K.

[0081] As described above, the FPGA chip can improve the resolution of the ADC by controlling the sampling rate u of the FPGA acquiring ADC data.

[0082] The step S2 specifically includes:

[0083] Step S21: defining the value of the expected signal-to-noise ratio variable r;

[0084] Step S22: for the signal-to-noise ratio transfer function P(s), it is decomposed into the reversible minimum phase part P m (s) and the irreversible all-pass part P a (s) of the signal-to-noise ratio transfer function.

[0085] The minimum phase part P m (s) and the irreversible all-pass part P a (s) of the signal-to-noise ratio transfer function satisfy the following formula:

[0086] P(s) = P m (s) P a (s) (5)

[0087]

[0088] Wherein, θ is a time delay parameter, z i is a non-minimum phase zero point, Re(z i ) is the real part of z ithe real part of s, s denotes the s-domain, and subscript i is a serial number.

[0089] Step S23: According to the irreversible all-pass part P a (s) of the signal-to-noise ratio transfer function, the expected closed-loop transfer function Y(s) corresponding to the expected signal-to-noise ratio variable r to the measured signal-to-noise ratio variable v is determined.

[0090] Therefore, the expected closed-loop transfer function Y(s) satisfies the formula v=Y(s)r. It should be noted that Y(s) is not the same value as P 21 (s) in the formula (2) above.

[0091] Specifically, the expected closed-loop transfer function Y(s) includes the non-minimum phase part of the irreversible all-pass part P a (s) of the signal-to-noise ratio transfer function, so the expected closed-loop transfer function Y(s) is:

[0092] Y(s)=f(s)P a (s) (7)

[0093] where f(s) is a low-pass filter, and is:

[0094]

[0095] where a is a filter parameter, s denotes the s-domain, and n denotes the order of the filter, which can be artificially set and is generally selected as 2 or 3.

[0096] Step S24: According to the decomposition result of step S22, the expected closed-loop transfer function Y(s) obtained in step S23, and the relationship formula of the expected closed-loop transfer function Y(s) and the controller parameter K, the controller parameter K is solved.

[0097] According to Figure 1 , the relationship formula of the expected closed-loop transfer function Y(s) and the controller parameter K is:

[0098] Y=PK(1+PK) -1 (9)

[0099] where P is the signal-to-noise ratio transfer function, and K is the controller parameter.

[0100] By combining the formulas (5), (7) and (9), the controller parameter K is solved, so the controller parameter K is:

[0101]

[0102] where f is a low-pass filter, P a is the irreversible all-pass part of the signal-to-noise ratio transfer function, and P mis the invertible minimum phase part of the signal-to-noise ratio transfer function, P is the signal-to-noise ratio transfer function, and Y is the desired closed-loop transfer function.

[0103] Step S3: Obtain the transfer function from the external disturbance signal w d to the error z from the ADC resolution optimization system of the synchrotron radiation device controller, and minimize the H2 norm of the transfer function from the external disturbance signal w d to the error z by optimizing the controller parameter K; subsequently, control the sampling rate u of the FPGA obtaining ADC data as the control quantity output by the controller K1 to adjust the sampling rate of the FPGA to the ADC data, thereby realizing direct control of the ADC resolution and noise reduction control.

[0104] In addition to controlling the signal-to-noise ratio to a specified value, the ADC resolution optimization control also needs to suppress the influence of external noise on the signal-to-noise ratio, wherein the error transfer function F d from the external disturbance signal w l to the error z is minimized in the H2 norm of (P, K) to reduce the error caused by the external disturbance signal w d , which is specifically based on the following principles:

[0105] 1) Assume that in the ADC resolution optimization system, the external disturbance signal w d is a white noise with unit intensity;

[0106] Therefore, the external disturbance signal satisfies the following formula:

[0107] E{w d (t)w d (τ) T}=Iδ(t-τ) (13)

[0108] where T represents the transpose of a matrix, t and τ are the first and second time variables, w d (t) is the external disturbance signal with the first time variable t as the variable, and w d (τ) is the external disturbance signal with the second time variable τ as the variable.

[0109] 2) The expected power of the error z(t) is given by the following formula:

[0110]

[0111] where H represents the conjugate transpose of a matrix, tr represents the trace of a matrix, T d is the integral time, z(t) is the error signal, F(jω) is the transfer function with jω as the variable, ω is the angular frequency, ∥∥ is the norm, subscript 2 represents the H2 norm, and F l (P, K) is the external disturbance signal w dThe error transfer function to z, z(t) is the error.

[0112] Since z is the error, it is necessary to minimize it to satisfy the control objective of optimizing the ADC resolution, the expected power of the error z can be expressed as the external disturbance signal w d The error transfer function F l to z. Therefore, by optimizing the controller parameter K, the expected power of the error z d The error transfer function F l to z can be minimized, so that the expected power of the error z is minimized, so that the output power of the generalized object P1 to the unit intensity white noise input is minimized, so that the root mean square value of the error z is minimized, thereby suppressing the influence of external noise on the signal-to-noise ratio.

[0113] The step S3 specifically comprises:

[0114] Step S31: According to the relationship formula (i.e. formula (2)) of the generalized object P1 of the ADC resolution optimization system, the transfer function from the external disturbance signal w d to the error z is given by the linear fractional transformation;

[0115] The transfer function from the external disturbance signal w d to the error z is defined as:

[0116] z=F l (P,K)w d (11)

[0117] Where F l (P,K) is the transfer function from the external disturbance signal w d to the error z, w d is the external disturbance signal, and z is the error.

[0118] According to the relationship formula (i.e. formula (2)) of the generalized object P1 of the ADC resolution optimization system, the transfer function F d (P,K) from the external disturbance signal w l to the error z is:

[0119] F l (P,K)=P 11 +P 12 K(I-P 22 K) -1 P 21 (12)

[0120] Where I is the unit matrix, P 11 , P 12 , P 21 , P22 are 4 components of the signal-to-noise ratio transfer function P(s), and K is a controller parameter.

[0121] Step S32: By optimizing the controller parameter K, the external disturbance signal w d to the error transfer function F l of (P, K) is minimized, and the expected power of the error z is minimized.

[0122] Thus, by optimizing the controller parameter K, the external disturbance signal w d to the error transfer function F l of (P, K) is minimized, the error caused by the external disturbance signal w d is reduced, and the influence of the external noise on the signal-to-noise ratio is suppressed.

[0123] In the step S32, the controller parameter K is constantly updated by an iterative method to optimize the controller parameter K, so that the H2 norm of the error transfer function F d of (P, K) reaches a minimum value or converges near the minimum value. l

[0124] The step S32 specifically includes: setting η min is the H2 norm of the error transfer function F d of (P, K) l Given an η≥η min , find all controller parameters K that satisfy By iteratively reducing η, an approximate optimal solution or an optimal solution of the controller parameter K can be obtained. When the difference between η and η min is less than a threshold value, it is determined that the H2 norm is a minimum value or converges near the minimum value.

[0125] Wherein, after solving the controller K by the step S2 (i.e. formula (10)), in the process of optimizing the controller K, further simultaneously constrain the controller K to satisfy formula (14), if it cannot be satisfied, re-adjust the parameters in the solving process of step S2 (i.e. the parameters of formula (10)), re-solve the controller K, and so on.

[0126] In addition, in order to prevent noise from being amplified in the high frequency band, and at the same time consider the robustness margin of the system, the upper bound of the amplitude of the sensitivity function S can also be designed to further constrain the controller parameter K.

[0127] ​​Therefore, in the step S3, when the controller parameter K is continuously updated by the iteration method, a step S33 is further included: using the upper bound of the amplitude of the sensitivity function S and the complementary sensitivity function T b at the high frequency band, the upper bound of the amplitude of the sensitivity function S and the complementary sensitivity function T b are applied to the controller parameter K to prevent the noise from being amplified at the high frequency band and ensure the robust margin of the ADC resolution optimization system.

[0128] wherein the sensitivity function S and the complementary sensitivity function T b are functions of the controller parameter K, and the sensitivity function S and the complementary sensitivity function T b are further applied to the controller parameter K to make the finally solved controller parameter K not only prevent the noise from being amplified at the high frequency band, but also ensure the robust margin of the ADC resolution optimization system.

[0129] wherein the sensitivity function S and the complementary sensitivity function T b are functions of the controller parameter K, and the sensitivity function S and the complementary sensitivity function T

[0130]

[0131] T b = I-S (18)

[0132] wherein I is a unit matrix, S is a sensitivity function, P is a signal-to-noise ratio transfer function, and K is a controller parameter.

[0133] In the embodiment, the weight functions of the sensitivity function S and the complementary sensitivity function T b are set according to the upper bounds of the amplitudes of the sensitivity function S and the complementary sensitivity function T b at the low frequency band and the high frequency band, and the H ∞ norms of the weighted sensitivity function and the weighted complementary sensitivity function are less than 1, so that the sensitivity function S and the complementary sensitivity function T b are applied to the controller parameter K.

[0134] Therefore, the constraint condition of the amplitude of the sensitivity function S is that the H ∞ norm of the weighted sensitivity function is less than 1, that is

[0135]

[0136] wherein w p is a weight function of the sensitivity function, used to constrain the amplitude of the sensitivity function S; and w p S is a weighted sensitivity.

[0137] In this embodiment, the weight function w p may be expressed as:

[0138]

[0139] where s represents the s-domain, M represents the upper bound of the amplitude of the sensitivity function in the high frequency band, ω b is a frequency parameter, and A is the upper bound of the amplitude of the sensitivity function in the low frequency band.

[0140] The last equation in equation (16) represents the weighted sensitivity w p of the H ∞ norm of S must be less than 1. Equation (16) is a constraint condition reflecting the amplitude of the sensitivity function S, and in order to prevent noise amplification in the high frequency band and enhance robustness, the amplitude of the sensitivity function S is required to be less than the constraint upper bound reflected by equation (16).

[0141] Thus, through equations (16) and (17), the upper bound of the low frequency band sensitivity function |S| is equal to the upper bound A of the amplitude of the sensitivity function in the low frequency band, and A≈0 can be taken, the purpose being to enhance the robustness of the control system; the upper bound of the high frequency band sensitivity function |S| is equal to the upper bound M of the amplitude of the sensitivity function in the high frequency band, and M≥1, the frequency parameter ω b is the approximate bandwidth, the purpose being to prevent noise amplification in the high frequency band.

[0142] At the same time, the complementary sensitivity function T b is designed, and an upper bound is specified for the amplitude thereof to ensure that the system attenuates fast enough in the high frequency band.

[0143] In order to impose an amplitude upper bound on the complementary sensitivity function T b , the constraint condition for the amplitude of the complementary sensitivity function T b is that the weighted complementary sensitivity function W Tb T b has an H ∞ norm less than 1, that is

[0144] where W Tb T b is the weighted complementary sensitivity function, T b is the complementary sensitivity function, and W Tb is the weight function of the complementary sensitivity function.

[0145] In this embodiment, the weight function W Tb of the complementary sensitivity function is:

[0146]

[0147] where s represents the s-domain, k T, a T The sensitivity function is complemented by the weight function parameter k T , a T The selection of W Tb In the high frequency band, it has a characteristic similar to a third-order integral element, and generally, the value can be 0<k T <1, 0<a T <1.

[0148] To sum up, the ADC resolution optimization method of the synchrotron radiation device controller can directly control the ADC resolution by designing the desired signal-to-noise ratio, and reduce the influence of external noise on the ADC resolution by using the constraint condition of H2 norm to minimize the noise output power, limit the upper bound of the sensitivity function and the complementary sensitivity function to prevent the noise from being amplified in the high frequency band, and ensure the robustness of the system, thereby further improving the resolution of the ADC.

[0149] In addition, the application also provides a synchrotron radiation device controller, which comprises an FPGA chip and an ADC module and a DAC module connected with the FPGA core board, the ADC module is arranged to digitize the analog signal and collect the ADC data (the analog signal is the capacitance sensor signal used to reflect the displacement of the motor), and the FPGA chip is arranged to read the ADC data and run the above-mentioned ADC resolution optimization method of the synchrotron radiation device controller to improve the resolution of the ADC.

[0150] The above-mentioned is only a preferred embodiment of the application, and is not used to limit the range of the application, and the above-mentioned embodiment of the application can be variously changed. Any simple, equivalent change and modification made according to the content of the claims and the description of the application all fall into the protection range of the claims of the application. The application is not described in detail, and all are conventional technical contents.

Claims

1. A method for optimizing an ADC resolution of a synchrotron radiation device controller, the method comprising: It comprises: Step S1: an ADC resolution optimization system of the synchrotron radiation device controller is established on an FPGA chip of the synchrotron radiation device controller, the ADC resolution optimization system comprises a generalized object and a controller constituting a closed loop; the generalized object is configured to calculate a measured signal-to-noise ratio variable v and an error z through a signal-to-noise ratio transfer function P(s) according to an external signal w and a sampling rate u of the FPGA to acquire ADC data; the controller is configured to calculate the sampling rate u of the FPGA to acquire ADC data through a controller parameter K according to the measured signal-to-noise ratio variable v; the external signal w comprises an external disturbance signal w d and an expected signal-to-noise ratio variable r, and the external disturbance signal w d is acquired through an ADC module; determining a signal-to-noise ratio transfer function P(s) by a system identification method; Step S2: defining a desired signal-to-noise ratio variable of the ADC resolution optimization system, and then solving a corresponding controller parameter K; Step S3: Obtain the external disturbance signal w from the ADC resolution optimization system of the synchrotron radiation device controller d The transfer function to the error z is optimized by the controller parameter K to minimize the external disturbance signal w d The H2 norm of the transfer function to the error z is obtained. Subsequently, the sampling rate u of the ADC data obtained by the FPGA is used as the control variable to achieve direct control of the ADC resolution and noise reduction control. The step S2 specifically comprises: Step S21: defining a value of the desired signal-to-noise ratio variable r, and establishing a stable signal-to-noise ratio transfer function P(s); Step S22: For the signal-to-noise ratio transfer function P(s), it is decomposed into an invertible minimum phase part P m (s) and a non-invertible all-pass part P a (s); Step S23: determining a desired closed loop transfer function Y(s) corresponding to a desired signal-to-noise ratio variable r to a measured signal-to-noise ratio variable v according to an irreversible all-pass portion P of the signal-to-noise ratio transfer function a (s), determining a desired closed loop transfer function Y(s) corresponding to a desired signal-to-noise ratio variable r to a measured signal-to-noise ratio variable v according to an irreversible all-pass portion P of the signal-to-noise ratio transfer function Step S24: solving the controller parameter K according to the decomposition result of step S22, the desired closed-loop transfer function Y(s) obtained in step S23, and a relationship between the desired closed-loop transfer function Y(s) and the controller parameter K; In said step S22, the minimum phase portion P m (s) of the signal-to-noise ratio transfer function fulfils the following equation: a (s) and the irreversible all-pass portion P a (s) fulfils the following equation: P(s) = P m (s)P a (s), where θ is a delay parameter, z i is a non-minimum phase zero, Re(z i ) is the real part of z i , s denotes the s-domain, and the subscript i is an ordinal number; In the step S23, the desired closed-loop transfer function Y(s) is: Y(s) = f(s)P a (s), Wherein, f(s) is a low-pass filter; In the step S24, the relationship between the desired closed-loop transfer function Y(s) and the controller parameter K is: where P is the signal-to-noise ratio transfer function, K is the controller parameter; f is a low pass filter, P m is the invertible minimum phase portion of the signal-to-noise ratio transfer function, and Y is the desired closed loop transfer function.

2. The method of claim 1, wherein the number of bits of the ADC is determined based on the number of photons per unit time. In the step S1, the relationship of the generalized object is: where u is the sampling rate of the FPGA to acquire ADC data, v is the measured signal-to-noise ratio variable, w is the external signal, z is the error, s represents the s domain, P 11 (s), P 12 (s), P 21 (s), P 22 (s) are four components of the signal-to-noise ratio transfer function P(s), respectively; The relationship of the controller is: u=K(s)v, Wherein, u is a sampling rate of the FPGA for acquiring ADC data, v is a measured signal-to-noise ratio variable, and s represents an s domain.

3. The method of claim 1, wherein the number of bits of the ADC is determined based on a number of bits of the DAC. The low-pass filter f(s) is: Wherein, a is a filter parameter, s represents an s domain, and n represents an order of the filter.

4. The method of claim 1, wherein the number of bits of the ADC is determined based on a number of bits of the DAC. The step S3 specifically comprises: Step S31: According to the relationship of the generalized object P1 of the ADC resolution optimization system, the external disturbance signal w is given by linear fraction transformation d Transfer function to error z; from the external disturbance signal w d to the error z l (P, K) is: F l (P,K) = P 11 + P 12 K(I-P 22 K) -1 P 21 , where I is the identity matrix, P 11 , P 12 , P 21 , P 22 are the four components of the signal-to-noise ratio transfer function P(s), respectively, and K is the controller parameter; Step S32: By optimizing the controller parameter K, the external disturbance signal w d Error transfer function F to z l The H2 norm of (P,K) is minimized, and the expected power of the error z is minimized.

5. The method of claim 4, wherein the number of bits is determined based on a number of bits of a digital-to-analog converter (DAC) of the radiation source. In the step S32, the controller parameter K is constantly updated by an iterative method to optimize the controller parameter K so that the external disturbance signal w d the error transfer function F l the H2 norm of (P, K) reaches a minimum, or converges around the minimum.

6. The method of claim 5, wherein the method further comprises: In the step S3, when the controller parameter K is continuously updated by the iterative method, it also includes a step S33: using the amplitude upper bound of the sensitivity function S and the complementary sensitivity function T at the low frequency band and the high frequency band b The amplitude upper bound at the high frequency band, the sensitivity function S and the complementary sensitivity function T b The constraint condition is applied to the controller parameter K to prevent the noise from being amplified at the high frequency band and to ensure the robust margin of the ADC resolution optimization system.

7. The method of claim 6, wherein the method further comprises: determining a number of bits of the ADC resolution based on the number of photons per unit time. The sensitivity function S and the complementary sensitivity function T b The function relationship with respect to the controller parameter K is: T b = I - S, Wherein, I is a unit matrix, S is a sensitivity function, P is a signal-to-noise ratio transfer function, and K is a controller parameter; The constraint condition for the amplitude of the sensitivity function S is: H of the weighted sensitivity function ∞ Norm is less than 1; complementary sensitivity function T b The amplitude constraint condition is: weighted complementary sensitivity function W Tb T b H ∞ The norm is less than 1; The weight function w of the sensitivity function p is: where s represents the s-domain, M represents the upper bound of the amplitude of the sensitivity function at the high frequency band, ω b is the frequency parameter, and A is the upper bound of the amplitude of the sensitivity function at the low frequency band. The weight function W that supplements the sensitivity function Tb is: where s denotes the s-domain, k T , a T is a weight function parameter for the complementary sensitivity function.

8. A synchrotron radiation device controller comprising an FPGA chip and an ADC module and a DAC module connected with the FPGA core board, characterized in that, The ADC module is configured to digitize and collect analog signals to obtain ADC data, and the FPGA chip is configured to read the ADC data and run the ADC resolution optimization method of the synchrotron radiation device controller according to any one of claims 1-7.

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