Light emitting diode epitaxial wafer and preparation method thereof, LED

Abstract

The present invention relates to the field of optoelectronic technology, and discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and an LED. The light-emitting diode epitaxial wafer comprises a substrate, on which a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially arranged; the multi-quantum well layer comprises a high-barrier multi-quantum well layer, a medium-barrier multi-quantum well layer, a low-barrier multi-quantum well layer, and a low-barrier end multi-quantum well layer stacked in sequence. The light-emitting diode epitaxial wafer provided by the present invention can improve the hole injection efficiency of a P-type semiconductor material, improve the phenomenon of insufficient hole concentration in a multi-quantum well layer, and improve the matching degree of electron-hole concentration in a multi-quantum well layer, so as to improve the radiation recombination efficiency in the multi-quantum well layer, and finally improve the brightness and light efficiency of LED devices.

Description

Technical Field

[0001] The invention relates to the field of optoelectronic technology, and in particular to a light emitting diode epitaxial wafer and a preparation method thereof, and an LED. Background Art

[0002] For the GaN material system, since electrons have higher mobility and smaller effective mass than holes, and electrons are easier to activate and have higher concentrations, the concentration of electron holes injected into the multi-quantum well layer is mismatched, and the quantum wells close to the N-type semiconductor layer hardly emit light, while electrons can be easily injected into the multi-quantum well layer and even enter the P-type semiconductor layer to cause electron leakage. In addition, the electron blocking layer, which is the main functional layer of the light-emitting diode, not only blocks the injection of electrons into the P-type semiconductor layer, but also blocks the injection of holes into the multi-quantum well layer, further reducing the hole concentration in the multi-quantum well layer, resulting in a more serious problem of mismatching the concentration of electron holes in the multi-quantum well layer, which seriously affects the luminous efficiency of the LED. Therefore, in order to improve the luminous efficiency of GaN-based LEDs, it is very necessary to increase the concentration of holes injected into the multi-quantum well layer and improve the electron-hole matching in the multi-quantum well layer. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a light-emitting diode epitaxial wafer, which can improve the hole injection efficiency, improve the phenomenon of insufficient hole concentration in the multi-quantum well layer, and improve the matching degree of electron-hole concentration in the multi-quantum well layer, so as to improve the radiation recombination efficiency in the multi-quantum well layer, and ultimately achieve the improvement of the brightness and light efficiency of the LED device.

[0004] The technical problem to be solved by the present invention is also to provide a method for preparing a light emitting diode epitaxial wafer, which has a simple process and can stably prepare a light emitting diode epitaxial wafer with high luminous efficiency.

[0005] In order to solve the above technical problems, the present invention provides a light-emitting diode epitaxial wafer, comprising a substrate, on which a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially arranged;

[0006] The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence;

[0007] The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence;

[0008] The medium-barrier multi-quantum well layer comprises a second InGaN layer and a medium-barrier quantum barrier layer which are alternately stacked, and the medium-barrier quantum barrier layer comprises a third GaN layer, a second AlGaN layer, and a fourth GaN layer which are sequentially stacked;

[0009] The low-barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer that are alternately stacked;

[0010] The low-barrier multi-quantum well layer includes a fourth InGaN layer and a low-barrier quantum barrier layer that are alternately stacked, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer that are sequentially stacked.

[0011] In some embodiments, the barrier height of the high barrier quantum barrier layer>the barrier height of the medium barrier quantum barrier layer>the barrier height of the GaN quantum barrier layer>the barrier height of the low barrier quantum barrier layer;

[0012] The thickness of the high barrier quantum barrier layer ≥ the thickness of the medium barrier quantum barrier layer ≥ the thickness of the GaN quantum barrier layer ≥ the thickness of the low barrier quantum barrier layer.

[0013] In some embodiments, the thickness of the high potential barrier quantum barrier layer is 7.8 nm to 17 nm;

[0014] The thickness of the intermediate barrier quantum barrier layer is 7.5nm~16.3nm;

[0015] The thickness of the GaN quantum barrier layer is 7.2nm~15.6nm;

[0016] The thickness of the low potential barrier quantum barrier layer is 7nm-15nm.

[0017] In some embodiments, the high barrier multi-quantum well layer includes 2 to 5 periods of alternately stacked first InGaN layers and high barrier quantum barrier layers;

[0018] The medium barrier multi-quantum well layer includes 3 to 7 cycles of alternately stacked second InGaN layers and medium barrier quantum barrier layers;

[0019] The low-barrier multi-quantum well layer includes 2 to 5 cycles of alternately stacked third InGaN layers and GaN quantum barrier layers;

[0020] The low-barrier end multi-quantum well layer comprises a fourth InGaN layer and a low-barrier quantum barrier layer which are alternately stacked in 1 to 2 cycles.

[0021] In some embodiments, the thickness of the first InGaN layer is 2.35 nm to 4.65 nm;

[0022] The thickness of the second InGaN layer is 2.35nm~4.65nm;

[0023] The thickness of the third InGaN layer is 2.35nm~4.65nm;

[0024] The thickness of the fourth InGaN layer is 2.35 nm to 4.65 nm.

[0025] In some embodiments, the thickness of the first GaN layer is 2.06 nm to 6.5 nm;

[0026] The Si doping concentration of the first GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 ;

[0027] The thickness of the first AlGaN layer is 1.8 nm to 5.2 nm;

[0028] The Al component content of the first AlGaN layer is 0.03-0.36;

[0029] The thickness of the second GaN layer is 2.06nm~6.5nm;

[0030] The Si doping concentration of the second GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 .

[0031] In some embodiments, the thickness of the third GaN layer is 2.01 nm to 6.2 nm;

[0032] The Si doping concentration of the third GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 ;

[0033] The thickness of the second AlGaN layer is 1.5 nm to 5 nm;

[0034] The Al component content of the second AlGaN layer is 0.02-0.28;

[0035] The thickness of the fourth GaN layer is 2.01 nm to 6.2 nm;

[0036] The Si doping concentration of the fourth GaN layer is 1.12×1017 atoms / cm 3 ~7.86×10 18 atoms / cm 3 .

[0037] In some embodiments, the thickness of the fifth GaN layer is 0.5 nm to 3.2 nm;

[0038] The thickness of the AlInGaN layer is 0.9 nm to 5.6 nm;

[0039] The AlInGaN layer has an Al component content of 0.02-0.15 and an In component content of 0.01-0.09;

[0040] The Mg doping concentration of the AlInGaN layer is 3.26×10 18 atoms / cm 3 ~7.81×10 19 atoms / cm 3 ;

[0041] The thickness of the sixth GaN layer is 0.8 nm to 6.6 nm;

[0042] The Mg doping concentration of the sixth GaN layer is 3.26×10 18 atoms / cm 3 ~7.81×10 19 atoms / cm 3 .

[0043] To solve the above problems, the present invention also provides a method for preparing a light emitting diode epitaxial wafer, comprising the following steps:

[0044] S1. providing a substrate;

[0045] S2, depositing a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer on the substrate in sequence;

[0046] The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence;

[0047] The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence;

[0048] The medium-barrier multi-quantum well layer comprises a second InGaN layer and a medium-barrier quantum barrier layer which are alternately stacked, and the medium-barrier quantum barrier layer comprises a third GaN layer, a second AlGaN layer, and a fourth GaN layer which are sequentially stacked;

[0049] The low-barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer that are alternately stacked;

[0050] The low-barrier multi-quantum well layer includes a fourth InGaN layer and a low-barrier quantum barrier layer that are alternately stacked, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer that are sequentially stacked.

[0051] Correspondingly, the present invention further provides an LED, which includes the light-emitting diode epitaxial wafer as described above, or includes the light-emitting diode epitaxial wafer manufactured by the method for manufacturing the light-emitting diode epitaxial wafer as described above.

[0052] The implementation of the present invention has the following beneficial effects:

[0053] In the light-emitting diode epitaxial wafer provided by the present invention, the multi-quantum well layer includes a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence. Among them, the low barrier multi-quantum well layer and the low barrier end multi-quantum well layer can effectively reduce the blocking effect of the multi-quantum well layer on the hole injection of the P-type GaN layer, increase the hole concentration injected into the multi-quantum well layer by the P-type GaN layer, and allow the quantum wells close to the N-type GaN layer to participate in the light emission, significantly improve the matching degree of the electron hole concentration in the multi-quantum well layer region, and improve the brightness and light efficiency of the LED device. At the same time, the high barrier multi-quantum well layer and the medium barrier multi-quantum well layer can respectively bind electrons in front of the high barrier multi-quantum well layer and the medium barrier multi-quantum well layer, play a role in blocking electrons and reducing the electron movement rate, effectively prevent electron leakage caused by electron injection into the P-type GaN layer, and improve the yield of the LED device.

[0054] Furthermore, the high-barrier multi-quantum well layer and the medium-barrier multi-quantum well layer are lightly doped with Si elements, and the low-barrier end multi-quantum well layer is lightly doped with Mg elements, which can respectively provide part of the electrons and holes to the light-emitting areas of the multi-quantum well layers to participate in radiation recombination and luminescence, so as to improve the matching degree of the electron-hole concentration and enhance the brightness and light efficiency of the LED device.

[0055] In summary, the LED chip prepared by the present invention can improve the hole injection efficiency, significantly improve the phenomenon of insufficient hole concentration in the multi-quantum well layer, improve the matching degree of electron-hole concentration in the multi-quantum well layer, so as to improve the radiation recombination efficiency in the multi-quantum well layer, and ultimately achieve the improvement of the brightness and light efficiency of the LED device. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 A schematic diagram of the structure of a light emitting diode epitaxial wafer provided by the present invention;

[0057] Figure 2 A schematic diagram of the structure of a high potential barrier multi-quantum well layer provided by the present invention;

[0058] Figure 3 A schematic diagram of the structure of a medium-barrier multi-quantum well layer provided by the present invention;

[0059] Figure 4 A schematic diagram of the structure of a low-barrier multi-quantum well layer provided by the present invention;

[0060] Figure 5 This is a schematic structural diagram of the low-barrier multi-quantum well layer provided by the present invention. DETAILED DESCRIPTION

[0061] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0062] In the description of the present invention, it is necessary to understand that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0063] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0064] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0065] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0066] The disclosure below provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the examples of various specific processes and materials provided by the present invention, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0067] In the present invention, "preferred" and "better" are only used to describe implementation methods or embodiments with better effects, and it should be understood that they do not constitute a limitation on the scope of protection of the present invention. In the present invention, the technical features described in an open manner include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features. In the present invention, when involving numerical ranges, unless otherwise specified, the two endpoints of the numerical range are included.

[0068] To solve the above problems, the present invention provides a light emitting diode epitaxial wafer, such as Figure 1~Figure 5 As shown, it includes a substrate 100, on which a buffer layer 200, a non-doped GaN layer 300, an N-type GaN layer 400, a stress release layer 500, a multi-quantum well layer 600, an electron blocking layer 700, and a P-type GaN layer 800 are sequentially arranged;

[0069] The multi-quantum well layer 600 includes a high barrier multi-quantum well layer 610, a medium barrier multi-quantum well layer 620, a low barrier multi-quantum well layer 630, and a low barrier end multi-quantum well layer 640 stacked in sequence;

[0070] The high-barrier multi-quantum well layer 610 includes a first InGaN layer 611 and a high-barrier quantum barrier layer 612 alternately stacked, and the high-barrier quantum barrier layer 612 includes a first GaN layer 612a, a first AlGaN layer 612b, and a second GaN layer 612c stacked in sequence;

[0071] The middle barrier multi-quantum well layer 620 includes a second InGaN layer 621 and a middle barrier quantum barrier layer 622 alternately stacked, and the middle barrier quantum barrier layer 622 includes a third GaN layer 622a, a second AlGaN layer 622b, and a fourth GaN layer 622c stacked in sequence;

[0072] The low barrier multi-quantum well layer 630 includes a third InGaN layer 631 and a GaN quantum barrier layer 632 which are alternately stacked;

[0073] The low-barrier multi-quantum well layer 640 includes a fourth InGaN layer 641 and a low-barrier quantum barrier layer 642 which are alternately stacked. The low-barrier quantum barrier layer 642 includes a fifth GaN layer 642a, an AlInGaN layer 642b, and a sixth GaN layer 642c which are sequentially stacked.

[0074] In the light-emitting diode epitaxial wafer provided by the present invention, the multi-quantum well layer includes a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence. Among them, the low barrier multi-quantum well layer and the low barrier end multi-quantum well layer can effectively reduce the blocking effect of the multi-quantum well layer on the hole injection of the P-type GaN layer, increase the hole concentration injected into the multi-quantum well layer by the P-type GaN layer, and allow the quantum wells close to the N-type GaN layer to participate in the light emission, significantly improve the matching degree of the electron hole concentration in the multi-quantum well layer region, and improve the brightness and light efficiency of the LED device. At the same time, the high barrier multi-quantum well layer and the medium barrier multi-quantum well layer can respectively bind electrons in front of the high barrier multi-quantum well layer and the medium barrier multi-quantum well layer, play a role in blocking electrons and reducing the electron movement rate, effectively prevent electron leakage caused by electron injection into the P-type GaN layer, and improve the yield of the LED device.

[0075] The specific structure of the multi-quantum well layer 600 provided by the present invention is as follows:

[0076] 1. High potential barrier multi-quantum well layer 610

[0077] like Figure 2As shown, in some embodiments, the high-barrier multi-quantum well layer 610 includes 2 to 5 periods of alternately stacked first InGaN layers 611 and high-barrier quantum barrier layers 612 .

[0078] In some embodiments, the thickness of the first InGaN layer 611 is 2.35 nm to 4.65 nm; exemplary thicknesses of the first InGaN layer 611 are 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, but are not limited to the above.

[0079] In some embodiments, the thickness of the high barrier quantum barrier layer 612 is 7.8nm~17nm; exemplary thicknesses of the high barrier quantum barrier layer 612 are 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, and 17nm, but are not limited to the above.

[0080] In some embodiments, the thickness of the first GaN layer 612a is 2.06 nm to 6.5 nm; exemplary thicknesses of the first GaN layer 612a are 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, and 6.5 nm, but are not limited to the above.

[0081] In some embodiments, the Si doping concentration of the first GaN layer 612a is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 The exemplary Si doping concentration of the first GaN layer 612a is 5×10 17 atoms / cm 3 , 1×10 18 atoms / cm 3 , 5×10 18 atoms / cm 3 ,7×10 18 atoms / cm 3 , but not limited to the above.

[0082] In some embodiments, the thickness of the first AlGaN layer 612 b is 1.8 nm to 5.2 nm; exemplary thicknesses of the first AlGaN layer 612 b are 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, and 5 nm, but are not limited to the above.

[0083] In some embodiments, the Al component content of the first AlGaN layer 612b is 0.03-0.36. Preferably, the Al component content of the first AlGaN layer 612b is 0.05-0.2.

[0084] In some embodiments, the thickness of the second GaN layer 612c is 2.06nm~6.5nm; exemplary thicknesses of the second GaN layer 612c are 2.5nm, 3nm, 3.5nm, 4nm, 4.5nm, 5nm, 5.5nm, 6nm, 6.5nm, but are not limited to the above list.

[0085] In some embodiments, the Si doping concentration of the second GaN layer 612c is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 The exemplary Si doping concentration of the second GaN layer 612c is 5×10 17 atoms / cm 3 , 1×10 18 atoms / cm 3 , 5×10 18 atoms / cm 3 ,7×10 18 atoms / cm 3 , but not limited to the above.

[0086] (II) Medium barrier multi-quantum well layer 620

[0087] like Figure 3 As shown, in some embodiments, the medium-barrier multi-quantum well layer 620 includes 3 to 7 cycles of alternately stacked second InGaN layers 621 and medium-barrier quantum barrier layers 622 .

[0088] In some embodiments, the thickness of the second InGaN layer 621 is 2.35 nm to 4.65 nm; exemplary thicknesses of the second InGaN layer 621 are 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, but are not limited to the above.

[0089] In some embodiments, the thickness of the intermediate barrier quantum barrier layer 622 is 7.5 nm to 16.3 nm; exemplary thicknesses of the intermediate barrier quantum barrier layer 622 are 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, and 16 nm, but are not limited to the above.

[0090] In some embodiments, the thickness of the third GaN layer 622a is 2.01 nm to 6.2 nm; exemplary thicknesses of the third GaN layer 622a are 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, and 6 nm, but are not limited to the above.

[0091] In some embodiments, the Si doping concentration of the third GaN layer 622a is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 The exemplary Si doping concentration of the third GaN layer 622a is 5×10 17 atoms / cm 3 , 1×10 18 atoms / cm 3 , 5×10 18 atoms / cm 3 ,7×10 18 atoms / cm 3 , but not limited to the above.

[0092] In some embodiments, the thickness of the second AlGaN layer 622 b is 1.5 nm to 5 nm; exemplary thicknesses of the second AlGaN layer 622 b are 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, and 5 nm, but are not limited to the above.

[0093] In some embodiments, the Al component content of the second AlGaN layer 622b is 0.02-0.28. Preferably, the Al component content of the second AlGaN layer 622b is 0.05-0.15.

[0094] In some embodiments, the thickness of the fourth GaN layer 622c is 2.01 nm to 6.2 nm; exemplary thicknesses of the fourth GaN layer 622c are 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm, 5.5 nm, and 6 nm, but are not limited to the above.

[0095] In some embodiments, the Si doping concentration of the fourth GaN layer 622c is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 The exemplary Si doping concentration of the fourth GaN layer 622c is 5×10 17 atoms / cm 3 , 1×1018 atoms / cm 3 , 5×10 18 atoms / cm 3 ,7×10 18 atoms / cm 3 , but not limited to the above.

[0096] (III) Low-barrier multi-quantum well layer 630

[0097] like Figure 4 As shown, in some embodiments, the low-barrier multi-quantum well layer 630 includes 2 to 5 cycles of alternately stacked third InGaN layers 631 and GaN quantum barrier layers 632 .

[0098] In some embodiments, the thickness of the third InGaN layer 631 is 2.35 nm to 4.65 nm; exemplary thicknesses of the third InGaN layer 631 are 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, but are not limited to the above.

[0099] In some embodiments, the thickness of the GaN quantum barrier layer 632 is 7.2 nm to 15.6 nm; exemplary thicknesses of the GaN quantum barrier layer 632 are 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, and 15 nm, but are not limited to the above.

[0100] (IV) Low barrier end multi-quantum well layer 640

[0101] like Figure 5 As shown, in some embodiments, the low-barrier end multi-quantum well layer 640 includes 1 to 2 cycles of alternately stacked fourth InGaN layers 641 and low-barrier quantum barrier layers 642 .

[0102] In some embodiments, the thickness of the fourth InGaN layer 641 is 2.35 nm to 4.65 nm; exemplary thicknesses of the fourth InGaN layer 641 are 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, but are not limited to the above.

[0103] In some embodiments, the thickness of the low barrier quantum barrier layer 642 is 7nm~15nm; exemplary thicknesses of the low barrier quantum barrier layer 642 are 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, and 15nm, but are not limited to the above.

[0104] In some embodiments, the thickness of the fifth GaN layer 642a is 0.5 nm to 3.2 nm; exemplary thicknesses of the fifth GaN layer 642a are 1 nm, 1.5 nm, 2 nm, 2.5 nm, and 3 nm, but are not limited to the above.

[0105] In some embodiments, the fifth GaN layer 642a is a non-doped layer.

[0106] In some embodiments, the thickness of the AlInGaN layer 642b is 0.9nm~5.6nm; exemplary thicknesses of the AlInGaN layer 642b are 1nm, 1.5nm, 2nm, 2.5nm, 3nm, 3.5nm, 4nm, 4.5nm, 5nm, and 5.5nm, but are not limited to the above lists.

[0107] In some embodiments, the AlInGaN layer 642b has an Al content of 0.02-0.15 and an In content of 0.01-0.09. Preferably, the AlInGaN layer 642b has an Al content of 0.04-0.08 and an In content of 0.03-0.06.

[0108] In some embodiments, the Mg doping concentration of the AlInGaN layer 642 b is 3.26×10 18 atoms / cm 3 ~7.81×10 19 atoms / cm 3 The exemplary Mg doping concentration of the AlInGaN layer 642b is 5×10 18 atoms / cm 3 , 1×10 19 atoms / cm 3 , 5×10 19 atoms / cm 3 ,7×10 19 atoms / cm 3 , but not limited to the above.

[0109] In some embodiments, the thickness of the sixth GaN layer 642c is 0.8nm~6.6nm; exemplary thicknesses of the sixth GaN layer 642c are 1nm, 1.5nm, 2nm, 2.5nm, 3nm, 3.5nm, 4nm, 4.5nm, 5nm, 5.5nm, 6nm, and 6.5nm, but are not limited to the above lists.

[0110] In some embodiments, the Mg doping concentration of the sixth GaN layer 642c is 3.26×10 18 atoms / cm 3~7.81×10 19 atoms / cm 3 The exemplary Mg doping concentration of the sixth GaN layer 642c is 5×10 18 atoms / cm 3 , 1×10 19 atoms / cm 3 , 5×10 19 atoms / cm 3 ,7×10 19 atoms / cm 3 , but not limited to the above.

[0111] In summary, in some embodiments, the barrier height of the high barrier quantum barrier layer 612 is greater than the barrier height of the medium barrier quantum barrier layer 622, greater than the barrier height of the GaN quantum barrier layer 632, and greater than the barrier height of the low barrier quantum barrier layer 642; the barrier height of the barrier layer of the multi-quantum well layer is designed as a structure that decreases from bottom to top, forming a gradually decreasing barrier height, which is beneficial for the injection of electrons and holes from the outside into the quantum well, thereby increasing the injection efficiency of electrons and holes, allowing more carriers to participate in the radiation recombination process, thereby improving the luminescence efficiency.

[0112] In some embodiments, the thickness of the high barrier quantum barrier layer 612 is ≥ the thickness of the medium barrier quantum barrier layer 622 ≥ the thickness of the GaN quantum barrier layer 632 ≥ the thickness of the low barrier quantum barrier layer 642. A thicker high barrier layer can more effectively limit the movement of electrons in the quantum well, reduce the tunneling effect of electrons, and thus increase the binding energy of electrons in the quantum well. Furthermore, the high barrier multi-quantum well layer and the medium barrier multi-quantum well layer are low-doped with Si elements, and the low barrier multi-quantum well layer is low-doped with Mg elements, which can respectively provide part of the electrons and holes to the light-emitting area of ​​the multi-quantum well layer to participate in the radiation recombination luminescence, so as to improve the matching degree of the electron-hole concentration and improve the brightness and light efficiency of the LED device.

[0113] In summary, the LED chip prepared by the present invention can improve the hole injection efficiency, significantly improve the phenomenon of insufficient hole concentration in the multi-quantum well layer, improve the matching degree of electron-hole concentration in the multi-quantum well layer, so as to improve the radiation recombination efficiency in the multi-quantum well layer, and ultimately achieve the improvement of the brightness and light efficiency of the LED device.

[0114] Accordingly, the present invention provides a method for preparing a light emitting diode epitaxial wafer, comprising the following steps:

[0115] S1, providing a substrate 100;

[0116] In some embodiments, the substrate 100 may be selected from one of a sapphire substrate, a SiO2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate. Preferably, the substrate is selected from a sapphire substrate, which is a commonly used GaN-based LED substrate material. The sapphire substrate has the characteristics of mature preparation technology, low price, easy cleaning and processing, and good stability at high temperatures.

[0117] S2, sequentially depositing a buffer layer 200, a non-doped GaN layer 300, an N-type GaN layer 400, a stress release layer 500, a multi-quantum well layer 600, an electron blocking layer 700, and a P-type GaN layer 800 on the substrate 100;

[0118] The multi-quantum well layer 600 includes a high barrier multi-quantum well layer 610, a medium barrier multi-quantum well layer 620, a low barrier multi-quantum well layer 630, and a low barrier end multi-quantum well layer 640 stacked in sequence;

[0119] The high-barrier multi-quantum well layer 610 includes a first InGaN layer 611 and a high-barrier quantum barrier layer 612 alternately stacked, and the high-barrier quantum barrier layer 612 includes a first GaN layer 612a, a first AlGaN layer 612b, and a second GaN layer 612c stacked in sequence;

[0120] The middle barrier multi-quantum well layer 620 includes a second InGaN layer 621 and a middle barrier quantum barrier layer 622 alternately stacked, and the middle barrier quantum barrier layer 622 includes a third GaN layer 622a, a second AlGaN layer 622b, and a fourth GaN layer 622c stacked in sequence;

[0121] The low barrier multi-quantum well layer 630 includes a third InGaN layer 631 and a GaN quantum barrier layer 632 which are alternately stacked;

[0122] The low-barrier multi-quantum well layer 640 includes a fourth InGaN layer 641 and a low-barrier quantum barrier layer 642 which are alternately stacked. The low-barrier quantum barrier layer 642 includes a fifth GaN layer 642a, an AlInGaN layer 642b, and a sixth GaN layer 642c which are sequentially stacked.

[0123] Specifically, the above step S2 specifically includes the following steps:

[0124] S21 , depositing the buffer layer 200 on the substrate 100 .

[0125] In some embodiments, the buffer layer 200 is an AlN buffer layer.

[0126] S22 , depositing the undoped GaN layer 300 on the buffer layer 200 .

[0127] In some embodiments, the temperature of the reaction chamber is controlled at 1050° C. to 1200° C., the pressure is controlled at 100 torr to 600 torr, N source and Ga source are introduced, and a non-doped GaN layer with a thickness of 1 μm to 5 μm is grown.

[0128] S23 , depositing the N-type GaN layer 400 on the undoped GaN layer 300 .

[0129] In some embodiments, the temperature of the reaction chamber is controlled at 1050° C. to 1200° C., the pressure is controlled at 100 torr to 600 torr, and an N source, a Ga source, and a Si source are introduced to grow the N-type GaN layer.

[0130] S24 , depositing the stress release layer 500 on the N-type GaN layer 400 .

[0131] In some embodiments, the temperature of the reaction chamber is controlled at 700°C~900°C, the pressure is controlled at 50torr~600torr, and N source, Ga source, and In source are introduced as needed to grow a periodic structure of alternating InGaN layers and GaN layers as a stress release layer.

[0132] S25 , depositing the multi-quantum well layer 600 on the stress release layer 500 .

[0133] In some embodiments, the multi-quantum well layer 600 is prepared by the following method: sequentially growing the high barrier multi-quantum well layer 610, the medium barrier multi-quantum well layer 620, the low barrier multi-quantum well layer 630, and the low barrier end multi-quantum well layer 640.

[0134] In some embodiments, the high barrier multi-quantum well layer 610 is prepared by the following method:

[0135] The first InGaN layer 611 and the high-barrier quantum barrier layer 612 are alternately grown to obtain the high-barrier multi-quantum well layer 610 .

[0136] In some embodiments, the first InGaN layer 611 is made by the following method:

[0137] The temperature of the reaction chamber is controlled at 678° C. to 915° C., the growth pressure is 50 torr to 360 torr, and N source, Ga source, and In source are introduced as required to grow the first InGaN layer 611 .

[0138] In some embodiments, the high potential barrier quantum barrier layer 612 is prepared by the following method:

[0139] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Si source are introduced as needed to grow the first GaN layer 612 a ;

[0140] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Al source are introduced as needed to grow the first AlGaN layer 612 b ;

[0141] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Si source are introduced as required to grow the second GaN layer 612 c.

[0142] In some embodiments, the middle barrier multi-quantum well layer 620 is prepared by the following method:

[0143] The second InGaN layer 621 and the medium-barrier quantum barrier layer 622 are grown alternately to obtain the medium-barrier multi-quantum well layer 620 .

[0144] In some embodiments, the second InGaN layer 621 is made by the following method:

[0145] The temperature of the reaction chamber is controlled at 678° C. to 915° C., the growth pressure is 50 torr to 360 torr, and N source, Ga source, and In source are introduced as required to grow the second InGaN layer 621 .

[0146] In some embodiments, the intermediate barrier quantum barrier layer 622 is prepared by the following method:

[0147] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Si source are introduced as needed to grow the third GaN layer 622a;

[0148] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Al source are introduced as needed to grow the second AlGaN layer 622 b ;

[0149] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Si source are introduced as required to grow the fourth GaN layer 622 c.

[0150] In some embodiments, the low barrier multi-quantum well layer 630 is prepared by the following method:

[0151] The temperature of the reaction chamber is controlled at 678° C. to 915° C., the growth pressure is 50 torr to 360 torr, and N source, Ga source, and In source are introduced as needed to grow the third InGaN layer 631;

[0152] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source and Ga source are introduced as required to grow the GaN quantum barrier layer 632 .

[0153] In some embodiments, the low barrier end multi-quantum well layer 640 is prepared by the following method:

[0154] The fourth InGaN layer 641 and the low-barrier quantum barrier layer 642 are grown alternately to obtain the low-barrier final multiple quantum well layer 640 .

[0155] In some embodiments, the fourth InGaN layer 641 is made by the following method:

[0156] The temperature of the reaction chamber is controlled at 678° C. to 915° C., the growth pressure is 50 torr to 360 torr, and N source, Ga source, and In source are introduced as needed to grow a fourth InGaN layer 641;

[0157] In some embodiments, the low potential barrier quantum barrier layer 642 is prepared by the following method:

[0158] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source and Ga source are introduced as needed to grow the fifth GaN layer 642 a ;

[0159] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, Al source, In source, and Mg source are introduced as needed to grow an AlInGaN layer 642 b;

[0160] The temperature of the reaction chamber is controlled at 827° C. to 936° C., the growth pressure is controlled at 50 torr to 360 torr, and N source, Ga source, and Mg source are introduced as required to grow the sixth GaN layer 642 c.

[0161] S26, depositing the electron blocking layer 700 on the multi-quantum well layer 600;

[0162] In some embodiments, the temperature of the reaction chamber is controlled at 900° C. to 1000° C., the pressure is controlled at 100 torr to 300 torr, N source, Al source, Ga source, and In source are introduced, and an AlInGaN electron blocking layer with a thickness of 10 nm to 40 nm is grown.

[0163] S27 , depositing the P-type GaN layer 800 on the electron blocking layer 700 .

[0164] In some embodiments, the temperature of the reaction chamber is controlled at 900° C. to 1050° C., the pressure is controlled at 100 torr to 600 torr, and an N source, a Mg source, and a Ga source are introduced to grow the P-type GaN layer.

[0165] Accordingly, the present invention further provides an LED, which comprises the above-mentioned light-emitting diode epitaxial wafer, wherein the photoelectric efficiency of the LED is effectively improved and other electrical properties are good.

[0166] The present invention is further described below with specific embodiments:

[0167] Example 1

[0168] This embodiment provides a light-emitting diode epitaxial wafer, comprising a substrate, on which a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially provided;

[0169] The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence;

[0170] The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked in three periods, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence; the thickness of the first InGaN layer is 3nm; the thickness of the first GaN layer is 3nm, and the Si doping concentration is 2×10 17 atoms / cm 3 The thickness of the first AlGaN layer is 3 nm, and the Al content is 0.1; the thickness of the second GaN layer is 3 nm, and the Si doping concentration is 2×10 17 atoms / cm 3 .

[0171] The medium barrier multi-quantum well layer comprises a second InGaN layer and a medium barrier quantum barrier layer alternately stacked in 5 cycles, and the medium barrier quantum barrier layer comprises a third GaN layer, a second AlGaN layer, and a fourth GaN layer stacked in sequence; the thickness of the second InGaN layer is 3nm; the thickness of the third GaN layer is 2.5nm, and the Si doping concentration is 2×10 17 atoms / cm 3 The thickness of the second AlGaN layer is 2.5 nm, and the Al content is 0.08; the thickness of the fourth GaN layer is 2.5 nm, and the Si doping concentration is 2×1017 atoms / cm 3 .

[0172] The low barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer alternately stacked in three periods; the thickness of the third InGaN layer is 3 nm; the thickness of the GaN quantum barrier layer is 7.2 nm;

[0173] The low-barrier end multi-quantum well layer includes two periods of alternately stacked fourth InGaN layers and low-barrier quantum barrier layers, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer stacked in sequence; the thickness of the fourth InGaN layer is 3nm. The thickness of the fifth GaN layer is 1.5nm; the thickness of the AlInGaN layer is 4nm, the Al component content is 0.05, the In component content is 0.05, and the Mg doping concentration is 4×10 18 atoms / cm 3 The thickness of the sixth GaN layer is 1.5 nm, and the Mg doping concentration is 4×10 18 atoms / cm 3 .

[0174] Example 2

[0175] This embodiment provides a light-emitting diode epitaxial wafer, comprising a substrate, on which a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially provided;

[0176] The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence;

[0177] The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked in three periods, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence; the thickness of the first InGaN layer is 3nm; the thickness of the first GaN layer is 3.5nm, and the Si doping concentration is 1×10 18 atoms / cm 3 The thickness of the first AlGaN layer is 3.5 nm, and the Al content is 0.1; the thickness of the second GaN layer is 3.5 nm, and the Si doping concentration is 1×10 18 atoms / cm 3 .

[0178] The medium barrier multi-quantum well layer includes a second InGaN layer and a medium barrier quantum barrier layer alternately stacked in 5 cycles, and the medium barrier quantum barrier layer includes a third GaN layer, a second AlGaN layer, and a fourth GaN layer stacked in sequence; the thickness of the second InGaN layer is 3nm; the thickness of the third GaN layer is 3nm, and the Si doping concentration is 1×10 18 atoms / cm 3 The thickness of the second AlGaN layer is 3 nm, and the Al content is 0.08; the thickness of the fourth GaN layer is 3 nm, and the Si doping concentration is 1×10 18 atoms / cm 3 .

[0179] The low barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer alternately stacked in three periods; the thickness of the third InGaN layer is 3nm; the thickness of the GaN quantum barrier layer is 8nm;

[0180] The low-barrier end multi-quantum well layer includes two periods of alternately stacked fourth InGaN layers and low-barrier quantum barrier layers, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer stacked in sequence; the thickness of the fourth InGaN layer is 3nm. The thickness of the fifth GaN layer is 2nm; the thickness of the AlInGaN layer is 3.5nm, the Al component content is 0.05, the In component content is 0.05, and the Mg doping concentration is 1×10 19 atoms / cm 3 The thickness of the sixth GaN layer is 2 nm, and the Mg doping concentration is 1×10 19 atoms / cm 3 .

[0181] Example 3

[0182] This embodiment provides a light-emitting diode epitaxial wafer, comprising a substrate, on which a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially provided;

[0183] The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence;

[0184] The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked in three periods, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence; the thickness of the first InGaN layer is 3nm; the thickness of the first GaN layer is 5nm, and the Si doping concentration is 7×1018 atoms / cm 3 The thickness of the first AlGaN layer is 5 nm, and the Al content is 0.1; the thickness of the second GaN layer is 5 nm, and the Si doping concentration is 7×10 18 atoms / cm 3 .

[0185] The medium barrier multi-quantum well layer comprises a second InGaN layer and a medium barrier quantum barrier layer alternately stacked in 5 cycles, and the medium barrier quantum barrier layer comprises a third GaN layer, a second AlGaN layer, and a fourth GaN layer stacked in sequence; the thickness of the second InGaN layer is 3nm; the thickness of the third GaN layer is 4.5nm, and the Si doping concentration is 7×10 18 atoms / cm 3 The thickness of the second AlGaN layer is 4.5 nm, and the Al content is 0.08; the thickness of the fourth GaN layer is 4.5 nm, and the Si doping concentration is 7×10 18 atoms / cm 3 .

[0186] The low barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer alternately stacked in three periods; the thickness of the third InGaN layer is 3nm; the thickness of the GaN quantum barrier layer is 13nm;

[0187] The low-barrier end multi-quantum well layer includes two periods of alternately stacked fourth InGaN layers and low-barrier quantum barrier layers, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer stacked in sequence; the thickness of the fourth InGaN layer is 3nm. The thickness of the fifth GaN layer is 4nm; the thickness of the AlInGaN layer is 4nm, the Al component content is 0.05, the In component content is 0.05, and the Mg doping concentration is 7×10 19 atoms / cm 3 The thickness of the sixth GaN layer is 4 nm, and the Mg doping concentration is 7×10 19 atoms / cm 3 .

[0188] Comparative Example 1

[0189] This comparative example provides a light-emitting diode epitaxial wafer, and the difference from the rest of Example 1 is that: its multi-quantum well layer is an alternately stacked InGaN quantum well layer and an AlGaN quantum barrier layer, the number of stacking periods is 1 to 20, the growth temperature of the InGaN quantum well layer is 790°C to 810°C, the thickness is 2nm to 5nm, and the growth pressure is 50torr to 300torr; the growth temperature of the AlGaN quantum barrier layer is 800°C to 900°C, the thickness is 5nm to 15nm, and the growth pressure is 50torr to 300torr. The rest is the same as Example 1.

[0190] The light-emitting diode epitaxial wafers prepared in Examples 1 to 3 and Comparative Example 1 were prepared into 10 mil×24 mil chips using the same chip process conditions. 300 LED chips were respectively extracted and tested at a current of 120 mA. Compared with the LED chips prepared in Comparative Example 1, the luminous efficiency improvement rate of each example was calculated. The specific test results are shown in Table 1.

[0191] Table 1 Performance test results of LED chips obtained from Examples 1 to 3 and Comparative Example 1

[0192]

[0193] From the above results, it can be seen that the light-emitting diode epitaxial wafer provided by the present invention can improve the hole injection efficiency of the P-type semiconductor material, improve the phenomenon of insufficient hole concentration in the multi-quantum well layer, and improve the matching degree of the electron-hole concentration in the multi-quantum well layer, so as to improve the radiation recombination efficiency in the multi-quantum well layer, and ultimately achieve the improvement of the brightness and light efficiency of the LED device.

[0194] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0195] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light emitting diode epitaxial wafer, characterized in that: It comprises a substrate, on which a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially arranged; The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence; The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence; The medium-barrier multi-quantum well layer comprises a second InGaN layer and a medium-barrier quantum barrier layer which are alternately stacked, and the medium-barrier quantum barrier layer comprises a third GaN layer, a second AlGaN layer, and a fourth GaN layer which are sequentially stacked; The low-barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer that are alternately stacked; The low-barrier multi-quantum well layer includes a fourth InGaN layer and a low-barrier quantum barrier layer that are alternately stacked, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer that are sequentially stacked.

2. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The barrier height of the high barrier quantum barrier layer>the barrier height of the medium barrier quantum barrier layer>the barrier height of the GaN quantum barrier layer>the barrier height of the low barrier quantum barrier layer; The thickness of the high barrier quantum barrier layer ≥ the thickness of the medium barrier quantum barrier layer ≥ the thickness of the GaN quantum barrier layer ≥ the thickness of the low barrier quantum barrier layer.

3. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the high potential barrier quantum barrier layer is 7.8nm~17nm; The thickness of the intermediate barrier quantum barrier layer is 7.5nm~16.3nm; The thickness of the GaN quantum barrier layer is 7.2nm~15.6nm; The thickness of the low potential barrier quantum barrier layer is 7nm-15nm.

4. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The high-potential barrier multi-quantum well layer comprises 2 to 5 periods of alternately stacked first InGaN layers and high-potential barrier quantum barrier layers; The medium barrier multi-quantum well layer includes 3 to 7 cycles of alternately stacked second InGaN layers and medium barrier quantum barrier layers; The low-barrier multi-quantum well layer includes 2 to 5 cycles of alternately stacked third InGaN layers and GaN quantum barrier layers; The low-barrier end multi-quantum well layer comprises a fourth InGaN layer and a low-barrier quantum barrier layer which are alternately stacked in 1 to 2 cycles.

5. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the first InGaN layer is 2.35nm~4.65nm; The thickness of the second InGaN layer is 2.35nm~4.65nm; The thickness of the third InGaN layer is 2.35nm~4.65nm; The thickness of the fourth InGaN layer is 2.35 nm to 4.65 nm.

6. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the first GaN layer is 2.06nm~6.5nm; The Si doping concentration of the first GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 ; The thickness of the first AlGaN layer is 1.8 nm to 5.2 nm; The Al component content of the first AlGaN layer is 0.03-0.36; The thickness of the second GaN layer is 2.06nm~6.5nm; The Si doping concentration of the second GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 .

7. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the third GaN layer is 2.01 nm to 6.2 nm; The Si doping concentration of the third GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 ; The thickness of the second AlGaN layer is 1.5 nm to 5 nm; The Al component content of the second AlGaN layer is 0.02-0.28; The thickness of the fourth GaN layer is 2.01 nm to 6.2 nm; The Si doping concentration of the fourth GaN layer is 1.12×10 17 atoms / cm 3 ~7.86×10 18 atoms / cm 3 .

8. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The thickness of the fifth GaN layer is 0.5 nm to 3.2 nm; The thickness of the AlInGaN layer is 0.9 nm to 5.6 nm; The AlInGaN layer has an Al component content of 0.02-0.15 and an In component content of 0.01-0.09; The Mg doping concentration of the AlInGaN layer is 3.26×10 18 atoms / cm 3 ~7.81×10 19 atoms / cm 3 ; The thickness of the sixth GaN layer is 0.8 nm to 6.6 nm; The Mg doping concentration of the sixth GaN layer is 3.26×10 18 atoms / cm 3 ~7.81×10 19 atoms / cm 3 .

9. A method for preparing a light emitting diode epitaxial wafer according to any one of claims 1 to 8, characterized in that: The following steps are involved: S1. providing a substrate; S2, depositing a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer on the substrate in sequence; The multi-quantum well layer comprises a high barrier multi-quantum well layer, a medium barrier multi-quantum well layer, a low barrier multi-quantum well layer, and a low barrier end multi-quantum well layer stacked in sequence; The high-barrier multi-quantum well layer comprises a first InGaN layer and a high-barrier quantum barrier layer alternately stacked, and the high-barrier quantum barrier layer comprises a first GaN layer, a first AlGaN layer, and a second GaN layer stacked in sequence; The medium-barrier multi-quantum well layer comprises a second InGaN layer and a medium-barrier quantum barrier layer which are alternately stacked, and the medium-barrier quantum barrier layer comprises a third GaN layer, a second AlGaN layer, and a fourth GaN layer which are sequentially stacked; The low-barrier multi-quantum well layer includes a third InGaN layer and a GaN quantum barrier layer that are alternately stacked; The low-barrier multi-quantum well layer includes a fourth InGaN layer and a low-barrier quantum barrier layer that are alternately stacked, and the low-barrier quantum barrier layer includes a fifth GaN layer, an AlInGaN layer, and a sixth GaN layer that are sequentially stacked.

10. An LED, characterized in that: The LED comprises the light emitting diode epitaxial wafer as described in any one of claims 1 to 8.

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