Frequency multiplication modulation method of three-level converter
Through the frequency multiplication modulation method of the three-level converter, the problem of high-power switching loss limiting switching frequency increase is solved, and the output level frequency multiplication and device loss equalization are achieved, which is suitable for high-power flexible distribution systems.
Patent Information
- Application Number
- CN202411297717.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-18
- Publication Date
- 2024-12-31
AI Technical Summary
The high-power switched IGBT or IGCT devices have large switching losses in three-level converters, which limits the increase in switching frequency and leads to an increase in harmonic content after inverting, which is not conducive to the design of the AC-side grid-connected filter.
Using the frequency multiplication modulation method of a three-level converter, by obtaining the modulation wave and carrier wave, determining the switching state of the power switch, outputting two non-zero level pulses in one voltage cycle, and ensuring zero power in one switching cycle There are two output paths in the flat, which realize the output level frequency multiplication and equalize the device loss.
It realizes output level frequency double, reduces the problem of unbalanced device loss distribution, improves the capacity utilization efficiency of power devices, and is suitable for high-power flexible power distribution systems.
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Figure CN119231965A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of power conversion, and in particular to a frequency doubling modulation method for a three-level converter. Background Art
[0002] Flexible converters, represented by three-level converters, are one of the core equipment of flexible distribution networks and are used to achieve AC / DC power conversion.
[0003] With the increase of power level of flexible distribution system, the power level of flexible converter is required to be further improved. One method is to use high-power switch IGBT or IGCT devices to build three-level converter to improve the power capacity of converter. However, the switching loss during high-power switching is large, which limits the increase of switching frequency, resulting in high harmonic content after inversion, which is not conducive to the design of AC side grid-connected filter. Summary of the invention
[0004] In order to solve the above problems, the inventors have made the present invention, and provide a frequency doubling modulation method for a three-level converter through a specific implementation method.
[0005] In a first aspect, an embodiment of the present invention provides a frequency multiplication modulation method for a three-level converter, wherein a single-phase bridge arm of the three-level converter includes a capacitor C1, a capacitor C2, a power switch T1, a power switch T2, a power switch T3, a power switch T4, a power switch T5, a power switch T6, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5 and a diode D6, wherein the diode D1, the diode D2, the diode D3, the diode D4, the diode D5 and the diode D6 are respectively connected to the power switch T1, the power switch T2, the power switch T3, the power switch T4, the power switch T5 and the power The switch T6 is connected in anti-parallel, the power switch T1, the power switch T2, the power switch T3 and the power switch T4 are connected in series in sequence, the collector of the power switch T5 is respectively connected to the emitter of the power switch T1 and the collector of the power switch T2, the emitter of the power switch T5 is respectively connected to the negative electrode of the capacitor C1, the positive electrode of the capacitor C2 and the collector of the power switch T6, the collector of the power switch T6 is respectively connected to the negative electrode of the capacitor C1 and the positive electrode of the capacitor C2, the positive electrode of the capacitor C1 is connected to the collector of the power switch T1, and the negative electrode of the capacitor C2 is connected to the emitter of the power switch T4. The method comprises the following steps:
[0006] Obtaining a modulated wave and a carrier wave, wherein the carrier wave includes an upper carrier wave and a lower carrier wave, and the upper carrier wave and the lower carrier wave are offset by 180 degrees on the time axis;
[0007] According to the modulation wave, the upper carrier wave and the lower carrier wave, the switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined so as to output two non-zero level pulses within one voltage cycle, and within one switching cycle, there are two output paths for the zero level.
[0008] The beneficial effects of the above technical solution provided by the embodiment of the present invention include at least:
[0009] Obtain a modulation wave and a carrier wave; determine the switching states of the power switches T1, T2, T3, T4, T5 and T6 according to the modulation wave, the upper carrier wave and the lower carrier wave, so as to output two non-zero level pulses within one voltage cycle, and there are two output paths for the zero level within one switching cycle, so that each power switch can be switched only once within one switching cycle, and the inverter side can output two non-zero level pulses, thereby achieving the effect of output level doubling. At the same time, there are two output paths for the zero level within one switching cycle, so that the device loss distribution is more balanced, which is conducive to the maximum use of the power device capacity.
[0010] Other features and advantages of the present invention will be described in the following description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings.
[0011] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:
[0013] Figure 1 is a flow chart of a method in an embodiment of the present invention;
[0014] Figure 2 is a circuit diagram of a single-phase bridge arm of a three-level converter in an embodiment of the present invention;
[0015] Figure 3 is an action logic diagram of a power switch in an embodiment of the present invention;
[0016] Figure 4 A schematic diagram of the working principle of the method in an embodiment of the present invention; DETAILED DESCRIPTION
[0017] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
[0018] A three-level converter is a power electronic device that uses three-level output and adjusts the output voltage and polarity by controlling the switch state. Compared with a two-level converter, a three-level converter has a wider output voltage adjustment range and can achieve bidirectional energy transmission.
[0019] The single-phase bridge arm of the three-level converter is usually composed of four switching devices (such as IGBT or MOSFET) and two DC voltage-dividing capacitors in series. These four switching devices are usually divided into two groups, two in each group, and the two switching devices in each group are alternately turned on to generate three different levels of output voltage: positive level (+Vdc / 2), zero level (0) and negative level (-Vdc / 2), where Vdc is the voltage on the DC side.
[0020] With the increase of power level of flexible distribution system, the power level of flexible converter is required to be further improved. One method is to use high-power switch IGBT or IGCT devices to build three-level converter to improve the power capacity of converter. However, the switching loss during high-power switching is large, which limits the increase of switching frequency, resulting in high harmonic content after inversion, which is not conducive to the design of AC side grid-connected filter.
[0021] In order to solve the problems existing in the prior art, an embodiment of the present invention provides a frequency doubling modulation method for a three-level converter.
[0022] The embodiment of the present invention provides a frequency doubling modulation method for a three-level converter, the process of which is as follows: Figure 1 As shown, the following steps are included:
[0023] Step S1: Acquire a modulated wave and a carrier wave, wherein the carrier wave includes an upper carrier wave and a lower carrier wave, and the upper carrier wave and the lower carrier wave are offset by 180 degrees on the time axis.
[0024] Step S2: Determine the switching states of power switch T1, power switch T2, power switch T3, power switch T4, power switch T5 and power switch T6 according to the modulation wave, upper carrier wave and lower carrier wave, so as to output two non-zero level pulses within one voltage cycle, and there are two output paths of zero level within one switching cycle.
[0025] Among them, the circuit of the single-phase bridge arm of the three-level converter is as follows Figure 2As shown, the single-phase bridge arm of the three-level converter includes a capacitor C1, a capacitor C2, a power switch T1, a power switch T2, a power switch T3, a power switch T4, a power switch T5, a power switch T6, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5 and a diode D6, wherein the diode D1, the diode D2, the diode D3, the diode D4, the diode D5 and the diode D6 are respectively connected in anti-parallel with the power switch T1, the power switch T2, the power switch T3, the power switch T4, the power switch T5 and the power switch T6, and the power switch The power switch T1, the power switch T2, the power switch T3 and the power switch T4 are connected in series in sequence, the collector of the power switch T5 is respectively connected to the emitter of the power switch T1 and the collector of the power switch T2, the emitter of the power switch T5 is respectively connected to the negative electrode of the capacitor C1, the positive electrode of the capacitor C2 and the collector of the power switch T6, the collector of the power switch T6 is respectively connected to the negative electrode of the capacitor C1 and the positive electrode of the capacitor C2, the positive electrode of the capacitor C1 is connected to the collector of the power switch T1, and the negative electrode of the capacitor C2 is connected to the emitter of the power switch T4.
[0026] Specifically, capacitor C1 and capacitor C2 are upper bus capacitor and lower bus capacitor respectively. The DC bus is mainly used to carry rectified DC current and convert DC into AC in the inverter. Capacitor C1 and capacitor C2 are connected in parallel with the DC bus to smooth bus voltage fluctuations, filter high-frequency noise, and provide instantaneous energy support. Capacitor C1 and capacitor C2 can ensure the stability and reliability of the DC bus voltage, thereby optimizing the performance and life of the system.
[0027] Power switch T5 and power switch T6 are clamping switch tubes. In the single-phase bridge arm of the three-level converter, the clamping switch tube works together with other components such as diodes and capacitors to achieve multi-level output of the circuit. When the switch device of the single-phase bridge arm is turned on, the clamping switch tube stabilizes the output level of the circuit at the set value; when the switch device is turned off, the clamping switch tube limits the voltage across the switch device to a safe range, thereby protecting the switch device from damage.
[0028] The power switch T1 and the power switch T2 are external switch tubes of the bridge arm. The external switch tubes of the bridge arm realize on-off control of the current in the circuit by controlling their on-off states. By controlling the on-off combination of the external switch tubes of the bridge arm, the flow direction of the current in the circuit can be switched to realize the conversion and transmission of electric energy.
[0029] The power switch T3 and the power switch T4 are switch tubes in the bridge arm. The switch tubes in the bridge arm can realize the on-off control of the current in the circuit by controlling their on-off state. When the switch tube in the bridge arm is turned on, the current can flow through; when the switch tube in the bridge arm is turned off, the current is blocked. By controlling the on-off combination of the switch tube in the bridge arm, the flow direction of the current in the circuit can be switched to realize the conversion and transmission of electric energy.
[0030] In the above method of this embodiment, the state of the power switch is as follows: Figure 3 As shown, the working principle is as follows Figure 4 As shown;
[0031] In the positive half cycle of voltage, when the modulation wave is greater than the upper carrier wave and the lower carrier wave, the power switch T1 and the power switch T2 are turned on, the power switch T3, the power switch T4, the power switch T5 and the power switch T6 are turned off, and the single-phase bridge arm outputs a positive level P.
[0032] In the positive half cycle of voltage, when the modulated wave is greater than the upper carrier wave and less than the lower carrier wave, the power switch T2 and the power switch T5 are turned on, the power switch T1, the power switch T3, the power switch T4 and the power switch T6 are turned off, and the single-phase bridge arm outputs the first zero level OU1.
[0033] When the modulated wave is smaller than the upper carrier wave and larger than the lower carrier wave, the power switches T2, T4 and T5 are turned on, the power switches T1, T3 and T6 are turned off, and the single-phase bridge arm outputs a second zero level OU2.
[0034] In the negative half cycle of the voltage, when the modulation wave is smaller than the upper carrier wave and the lower carrier wave, the power switches T3, T4 and T5 are turned on, the power switches T1, T2 and T6 are turned off, and the single-phase bridge arm outputs a negative level N.
[0035] In the negative half cycle of voltage, when the modulated wave is greater than the upper carrier wave and less than the lower carrier wave, the power switch T3 and the rate switch T6 are turned on, the power switch T1, the power switch T2, the power switch T4 and the power switch T5 are turned off, and the single-phase bridge arm outputs the third zero level OL1.
[0036] In the negative half cycle of voltage, when the modulated wave is smaller than the upper carrier wave and larger than the lower carrier wave, the power switch T1, the power switch T3 and the rate switch T6 are turned on, the power switch T2, the power switch T4 and the power switch T5 are turned off, and the single-phase bridge arm outputs the fourth zero level OL2.
[0037] In the above method of this embodiment, obtaining a carrier wave includes the following steps:
[0038] A basic carrier signal is acquired, and a phase shift process is performed on the basic carrier signal to obtain an upper carrier and a lower carrier.
[0039] In the above method of this embodiment, the power switch is an IGBT, IEGT or IGCT device.
[0040] The frequency doubling modulation method of the three-level converter of the present embodiment obtains a modulation wave and a carrier wave; according to the modulation wave, the upper carrier wave and the lower carrier wave, the switching states of the power switch T1, the power switch T2, the power switch T3, the power switch T4, the power switch T5 and the power switch T6 are determined, so that two non-zero level pulses are output within one voltage cycle, and there are two output paths for the zero level within one switching cycle, so that each power switch is switched only once within one switching cycle, and the inverter side can output two non-zero level pulses, so that the output frequency of the inverter is doubled compared with the switching frequency, thereby achieving the effect of output level frequency doubling, and at the same time, there are two output paths for the zero level within one switching cycle, so that the device loss distribution is more balanced, which is conducive to the maximum use of the power device capacity.
[0041] Any modifications, supplements and equivalent substitutions made within the scope of the principles of the present invention shall still fall within the patent scope of the present invention.
[0042] Unless otherwise stated, the "connection" mentioned above refers to a logical relationship of current transmission, and does not necessarily mean a direct electrical connection. At the same time, "first", "second", etc. do not indicate a sequence, but are only used to identify related units, devices, etc.
Claims
1. A frequency multiplication modulation method for a three-level converter, wherein a single-phase bridge arm of the three-level converter comprises a capacitor C1, a capacitor C2, a power switch T1, a power switch T2, a power switch T3, a power switch T4, a power switch T5, a power switch T6, a diode D1, a diode D2, a diode D3, a diode D4, a diode D5 and a diode D6, wherein: The diode D1, the diode D2, the diode D3, the diode D4, the diode D5 and the diode D6 are respectively connected in anti-parallel with the power switch T1, the power switch T2, the power switch T3, the power switch T4, the power switch T5 and the power switch T6. The power switch T1, the power switch T2, the power switch T3 and the power switch T4 are sequentially connected in series. The collector of the power switch T5 is respectively connected with the emitter of the power switch T1 and the collector of the power switch T2. The emitter of the power switch T5 is respectively connected with the negative electrode of the capacitor C1, the positive electrode of the capacitor C2 and the collector of the power switch T6. The collector of the power switch T6 is respectively connected with the negative electrode of the capacitor C1 and the positive electrode of the capacitor C2. The positive electrode of the capacitor C1 is connected with the collector of the power switch T1. The negative electrode of the capacitor C2 is connected with the emitter of the power switch T4. The method comprises the following steps: Obtaining a modulated wave and a carrier wave, wherein the carrier wave includes an upper carrier wave and a lower carrier wave, and the upper carrier wave and the lower carrier wave are offset by 180 degrees on the time axis; According to the modulation wave, the upper carrier wave and the lower carrier wave, the switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined so as to output two non-zero level pulses within one voltage cycle, and within one switching cycle, there are two output paths for the zero level.
2. The method according to claim 1, characterized in that The switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined according to the modulation wave, the upper carrier wave and the lower carrier wave, so as to output two non-zero level pulses in one voltage cycle, and there are two output paths of zero level in one switching cycle, including the following steps: In the positive half cycle of voltage, when the modulation wave is greater than the upper carrier wave and the lower carrier wave, the power switch T1 and the power switch T2 are turned on, the power switch T3, the power switch T4, the power switch T5 and the power switch T6 are turned off, and the single-phase bridge arm outputs a positive level P.
3. The method according to claim 2, characterized in that The switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined according to the modulation wave, the upper carrier wave and the lower carrier wave, so as to output two non-zero level pulses in one voltage cycle, and there are two output paths of zero level in one switching cycle, including the following steps: In the positive half cycle of voltage, when the modulated wave is greater than the upper carrier wave and less than the lower carrier wave, the power switch T2 and the power switch T5 are turned on, the power switch T1, the power switch T3, the power switch T4 and the power switch T6 are turned off, and the single-phase bridge arm outputs the first zero level OU1.
4. The method according to claim 3, characterized in that According to the modulation wave, the upper carrier wave and the lower carrier wave, the switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined so as to output two non-zero level pulses in one voltage cycle, and there are two output paths of zero level in one switching cycle, including the following steps: When the modulated wave is smaller than the upper carrier wave and larger than the lower carrier wave, the power switches T2, T4 and T5 are turned on, the power switches T1, T3 and T6 are turned off, and the single-phase bridge arm outputs a second zero level OU2.
5. The method according to claim 4, characterized in that The switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined according to the modulation wave, the upper carrier wave and the lower carrier wave, so as to output two non-zero level pulses in one voltage cycle, and there are two output paths of zero level in one switching cycle, including the following steps: In the negative half cycle of the voltage, when the modulation wave is smaller than the upper carrier wave and the lower carrier wave, the power switches T3, T4 and T5 are turned on, the power switches T1, T2 and T6 are turned off, and the single-phase bridge arm outputs a negative level N.
6. The method according to any one of claims 5, characterized in that: The switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined according to the modulation wave, the upper carrier wave and the lower carrier wave, so as to output two non-zero level pulses in one voltage cycle, and there are two output paths of zero level in one switching cycle, including the following steps: In the negative half cycle of voltage, when the modulated wave is greater than the upper carrier wave and less than the lower carrier wave, the power switch T3 and the rate switch T6 are turned on, the power switch T1, the power switch T2, the power switch T4 and the power switch T5 are turned off, and the single-phase bridge arm outputs the third zero level OL1.
7. The method according to claim 6, characterized in that The switching states of the power switches T1, T2, T3, T4, T5 and T6 are determined according to the modulation wave, the upper carrier wave and the lower carrier wave, so as to output two non-zero level pulses in one voltage cycle, and there are two output paths of zero level in one switching cycle, including the following steps: In the negative half cycle of voltage, when the modulated wave is smaller than the upper carrier wave and larger than the lower carrier wave, the power switch T1, the power switch T3 and the rate switch T6 are turned on, the power switch T2, the power switch T4 and the power switch T5 are turned off, and the single-phase bridge arm outputs the fourth zero level OL2.
8. The method according to any one of claims 1 to 7, characterized in that: The carrier wave acquisition includes the following steps: acquiring a basic carrier wave signal, performing phase shift processing on the basic carrier wave signal, and obtaining an upper carrier wave and a lower carrier wave.
9. The method according to claim 8, wherein the upper carrier wave and the lower carrier wave are triangular waves.
10. The method according to any one of claims 1 to 7, wherein the power switch is an IGBT, IEGT or IGCT device.