Dual-mode signal controller, signal processing method and storage medium

Abstract

The invention relates to the field of signal processing, in particular to a dual-mode signal controller, a signal processing method and a storage medium. The dual-mode signal controller comprises a signal processing unit used for matching an input pulse signal according to a first signal strength threshold and a first pulse width threshold which are obtained from a control unit and correspond to a target pulse signal to obtain the target pulse signal; splitting a target pulse signal into a first pulse signal and a second pulse signal, and respectively transmitting the first pulse signal and the second pulse signal to a delay adjustment branch and a frequency division adjustment branch; the delay adjustment branch is used for performing delay adjustment on the first pulse signal and outputting the first pulse signal; the frequency division adjustment branch is used for performing frequency division adjustment on the second pulse signal and outputting the second pulse signal; and the output unit is used for carrying out logic OR processing on the pulse signals output by the delay adjusting branch and the frequency division adjusting branch and outputting the pulse signals. The noise reduction effect of the whole system and the accuracy of signal detection are effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of signal processing, and in particular to a dual-mode signal controller, a signal processing method and a storage medium. Background Art

[0002] A single photon detector (SPAD) is an ultra-low noise device that can detect photons with enhanced sensitivity. SPADs are widely used in biophotonics, medical imaging, non-destructive material inspection, security and surveillance, vision and navigation, quantum imaging, and encryption systems. The existing detector gating capabilities have the following problems: 1. Some near-infrared detectors or lasers do not have gating capabilities, or require external access to a gate controller, especially for miniaturized detection equipment.

[0003] For example, when using a laser with a 10MHz repetition rate, in order to accurately control the emission time of the laser and ensure that it matches the receiving window of the detector, it must be synchronized with an external gater of the same frequency. Because the detector is easily saturated, the existing technology usually uses an external gater. In the application of non-line-of-sight near-infrared detection, if the first echo is too strong, the subsequent echoes cannot be detected. Specifically, when the SPAD detector receives each laser pulse, it can only detect 0 or 1 photons and enters a dead time, during which the detector cannot detect other photons. This dead time is caused by the avalanche event triggered by the photon, and the detector needs time to recover. Since SPAD is based on the Poisson statistical model, a non-fluctuation model, a stronger initial light signal (one echo) may cause the detector to saturate, so that the subsequent weaker echo (three echoes) arrive before the detector recovers and cannot be detected. As a result, the detected signal may not be entirely composed of three echoes.

[0004] 2. Lack of frequency reduction processing capability.

[0005] Existing detectors, such as those offered by Aurea and MPD, typically do not have built-in downsampling capabilities. These detectors can encounter challenges when dealing with high repetition rate lasers, especially when the laser repetition rate approaches or exceeds the maximum response rate of the detector. Because the detector has an inherent dead time, a short recovery period is required after each photon detection, during which no new photons can be detected. Therefore, if the laser repetition rate is too high, it may not match the detector's dead time, causing a slight difference in time, which may cause part of the laser signal to be missed during the dead time, increasing the noise floor and affecting the accuracy of signal detection.

[0006] The detector's frequency reduction processing capability: Existing detectors, such as Aurea and MPD, do not have down-conversion capabilities, which means they cannot automatically adjust to match the repetition rate of the incident laser.

[0007] Mismatch between laser repetition rate and detector dead time: The repetition rate of the laser, for example 10MHz, corresponds to a period of 100ns, while the dead time of the detector is longer, for example 5μs, or 5000ns. During the dead time of the detector, the laser still emits pulses, but since the detector cannot detect any signal during this period, these extra pulses will turn into background noise, affecting the overall signal clarity.

[0008] 3. No fine control ability.

[0009] The gate control module of existing detectors lacks fine control capabilities and can usually only perform unified control on the overall detection signal, such as adjusting the gate width or delay, but cannot achieve individual control of each burst signal. Summary of the invention

[0010] The embodiments of the present invention provide a dual-mode signal controller, a signal processing method and a storage medium, which are used to at least partially solve the above-mentioned problems existing in the detector.

[0011] In one aspect, the present invention provides a dual-mode signal controller, the dual-mode signal controller comprising a signal processing unit, a control unit, a delay adjustment branch, a frequency division adjustment branch and an output unit: The signal processing unit is used to match the input pulse signal according to the first signal strength threshold and the first pulse width threshold corresponding to the target pulse signal obtained from the control unit to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal, and transmit them to the delay adjustment branch and the frequency division adjustment branch respectively; The delay adjustment branch is used to perform delay adjustment on the first pulse signal and output it; The frequency division adjustment branch is used to perform frequency division adjustment on the second pulse signal and output it; The output unit is used to perform logical OR processing on the pulse signals output by the delay adjustment branch and the frequency division adjustment branch and output them.

[0012] Optionally, the signal processing unit is provided with a comparator circuit and a trigger circuit; a digital potentiometer is provided between the signal processing unit and the control unit; the control unit outputs two different voltages through the first digital potentiometer, and loads the two different voltages to the comparator circuit to control the first signal strength threshold and controls the first pulse width threshold through the trigger circuit.

[0013] Optionally, the delay adjustment branch includes a first delay adjustment module and a first waveform adjustment module; The first delay adjustment module is used to delay the first pulse signal and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The first waveform adjustment module is used to adjust and output the pulse signal output by the first delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the delay adjustment branch.

[0014] Optionally, the first delay adjustment module includes two delay chips; the delay value range is set to 40-170ns through the two delay chips.

[0015] Optionally, the first waveform adjustment module is provided with a comparator circuit and a trigger circuit.

[0016] Optionally, the frequency division adjustment branch includes a frequency division processing module, a second delay adjustment module and a second waveform adjustment module; The frequency division processing module is used to perform frequency division processing on the second pulse signal and output it according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit; The second delay adjustment module is used to delay the pulse signal output by the frequency division processing module and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The second waveform adjustment module is used to adjust and output the pulse signal output by the second delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the frequency division adjustment branch.

[0017] Optionally, the dual-mode signal controller includes a command mode and a pulse mode; a parameter configuration table is provided in the control unit; In the command mode, the control unit is used to receive external interactive commands and set the control parameters of the target pulse signal according to the interactive commands; In pulse mode, the control unit is used to detect and record the number of pulses input by the pulse input interface. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

[0018] On the other hand, the present invention further provides a signal processing method of a dual-mode signal controller, the signal processing method of the dual-mode signal controller comprising: Matching the input pulse signal according to the obtained first signal strength threshold and first pulse width threshold corresponding to the target pulse signal to obtain the target pulse signal; splitting the target pulse signal into a first pulse signal and a second pulse signal; Delay-adjusting and outputting the first pulse signal; Performing frequency division adjustment on the second pulse signal and outputting the signal; The pulse signal output by delay adjustment and the pulse signal output by frequency division adjustment are processed logically and output.

[0019] Optionally, the dual-mode signal controller includes a command mode and a pulse mode; the signal processing method of the dual-mode signal controller further includes: In the command mode, external interactive commands are received and control parameters of the target pulse signal are set according to the interactive commands; In pulse mode, the number of pulses input from the pulse input interface is detected and recorded. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

[0020] On the other hand, the present invention provides a computer-readable storage medium, on which a signal processing program of a dual-mode signal controller is stored. The signal processing program of the dual-mode signal controller can be executed by at least one processor to implement the steps of any of the signal processing methods of the dual-mode signal controller as described above. The present invention realizes the delay and frequency division capabilities of the input signal through the cooperation of the signal processing unit, the control unit, the delay adjustment branch, the frequency division adjustment branch and the output unit, which helps to make the operating frequencies of the supporting devices consistent, and can also make the pulse signal emitted by the laser synchronize with the preset pulse width signal, and can also reduce the repetition frequency of the laser to adapt to the dead time of the detector, so as to achieve the purpose of noise reduction.

[0021] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings: Figure 1 An architecture diagram of a dual-mode signal controller provided by an embodiment of the present invention; Figure 2 A flow chart of a signal processing method of a dual-mode signal controller provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0024] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are used only to facilitate the description of the present invention and have no specific meanings. Therefore, "module", "component" or "unit" can be used in a mixed manner. Expressions such as "first" and "second" are only used to distinguish technical terms.

[0025] The dual-mode signal controller provided in the embodiment of the present invention can be used for, but is not limited to, photon detection gating elements, and provides two working modes: gating and pulse. In the command mode, the user can adjust the pulse width and delay of the pulse signal to control the characteristics of the signal. The pulse mode focuses on the precise control of each channel and each pulse signal, and uses a dual matrix structure to achieve this function. This structure includes a clock signal of the laser pulse and a preset delay matrix, so that the device can effectively adjust the delay moment of the signal. By precisely controlling the arrival time of each signal, the component ensures the accuracy and repeatability of the detection system. In addition, users can also flexibly control the pulse width, delay, and frequency reduction multiple (frequency division multiple) to meet the requirements of different application scenarios.

[0026] The dual-mode signal controller may include: a pulse signal input interface, two SMA output interfaces, a clock signal (control pulse) input interface, a USB interface, a signal processing unit, a delay adjustment branch, a frequency division adjustment branch, a control unit (micro control unit MCU), etc. The delay adjustment branch may include a first delay adjustment module and a first waveform adjustment module. The frequency division adjustment branch may include a frequency division processing module, a second delay adjustment module, and a second waveform adjustment module.

[0027] In some embodiments, the dual-mode signal controller includes a signal processing unit, a control unit, a delay adjustment branch, a frequency division adjustment branch and an output unit.

[0028] The signal processing unit is used to match the input pulse signal according to the first signal strength threshold and the first pulse width threshold corresponding to the target pulse signal obtained from the control unit to obtain the target pulse signal; split the target pulse signal into a first pulse signal and a second pulse signal, and transmit them to the delay adjustment branch and the frequency division adjustment branch respectively; The delay adjustment branch is used to perform delay adjustment on the first pulse signal and output it; The frequency division adjustment branch is used to perform frequency division adjustment on the second pulse signal and output it; The output unit performs logical OR processing on the pulse signals output by the delay adjustment branch and the frequency division adjustment branch and outputs the pulse signals.

[0029] The embodiments of the present invention realize the delay and frequency division capabilities of the input signal, which helps to synchronize the operating frequencies of the supporting devices. It can also synchronize the pulse signal emitted by the laser with the preset pulse width signal, and can also reduce the repetition frequency of the laser to adapt to the dead time of the detector, so as to achieve the purpose of noise reduction.

[0030] Optionally, the delay adjustment branch includes a first delay adjustment module and a first waveform adjustment module; The first delay adjustment module is used to delay the first pulse signal and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The first waveform adjustment module is used to adjust and output the pulse signal output by the first delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the delay adjustment branch.

[0031] The frequency division adjustment branch includes a frequency division processing module, a second delay adjustment module and a second waveform adjustment module; The frequency division processing module is used to perform frequency division processing on the second pulse signal and output it according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit; The second delay adjustment module is used to delay the pulse signal output by the frequency division processing module and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The second waveform adjustment module is used to adjust and output the pulse signal output by the second delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the frequency division adjustment branch.

[0032] In some embodiments, the dual-mode signal controller includes a command mode and a pulse mode; a storage medium in the control unit is provided with a parameter configuration table; the control unit may be provided with a pulse input interface; In the command mode, the control unit is used to receive external interactive commands and set the control parameters of the target pulse signal according to the interactive commands; In pulse mode, the control unit is used to detect and record the number of pulses input by the pulse input interface. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

[0033] Based on the dual-mode signal controller provided above, its signal processing method may include: Matching the input pulse signal according to the first signal strength threshold and the first pulse width threshold corresponding to the target pulse signal to obtain the target pulse signal; splitting the target pulse signal into a first pulse signal and a second pulse signal, and transmitting them to the delay adjustment branch and the frequency division adjustment branch respectively; Delay-adjusting and outputting the first pulse signal; Performing frequency division adjustment on the second pulse signal and outputting the signal; The pulse signal output by delay adjustment and the pulse signal output by frequency division adjustment are processed logically and output.

[0034] Optionally, delay adjusting and outputting the first pulse signal includes: According to the obtained delay value corresponding to the target pulse signal, delay processing is performed on the first pulse signal and the delay processing is output; According to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit, the pulse signal that is delayed and output is adjusted and output.

[0035] Optionally, frequency-dividing and adjusting the second pulse signal and outputting the signal comprises: According to the obtained frequency division multiple corresponding to the target pulse signal, the second pulse signal is frequency-divided and output; According to the delay value corresponding to the target pulse signal, the pulse signal subjected to frequency division processing and output is delayed and output; According to the obtained second signal strength threshold and second pulse width threshold corresponding to the target pulse signal, the pulse signal that is delayed and output is adjusted and output.

[0036] In some embodiments, the dual-mode signal controller includes a command mode and a pulse mode; the signal processing method of the dual-mode signal controller further includes: In the command mode, external interactive commands are received and control parameters of the target pulse signal are set according to the interactive commands; In pulse mode, the number of pulses input from the pulse input interface is detected and recorded. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

[0037] In addition, an embodiment of the present invention also provides a computer-readable storage medium, on which a signal processing program of a dual-mode signal controller is stored. The signal processing program of the dual-mode signal controller can be executed by at least one processor to implement the steps of any of the signal processing methods of the dual-mode signal controller as described above.

[0038] The following describes in detail a dual-mode signal controller, a signal processing method, and a storage medium provided by an embodiment of the present invention using a specific example.

[0039] The modules of the dual-mode signal controller are mainly used to complete the following tasks: 1) A signal processing unit, configured to match an input pulse signal according to a first signal strength threshold and a first pulse width threshold corresponding to a target pulse signal obtained from a control unit, obtain a target pulse signal, and split the target pulse signal into a first pulse signal, a second pulse signal, and a third pulse signal.

[0040] Among them, the first signal strength threshold and the first pulse width threshold are obtained by presetting and obtaining from the MCU (micro control unit). For example, a first digital potentiometer (digital potentiometer 1) is provided in the MCU and the signal processing unit, and the signal processing unit can be composed of a processor and a peripheral circuit. The processor can be selected according to actual needs and is not specifically limited here. The peripheral circuit mainly includes a comparator circuit and a trigger circuit. A digital potentiometer is provided between the signal processing unit and the control unit; the control unit outputs two different voltages through the first digital potentiometer, and the two different voltages are loaded into the comparator circuit to control the first signal strength threshold; the first pulse width threshold is controlled by the trigger circuit.

[0041] The pulse signal (i.e., analog signal) input by the SMA interface is amplitude limited, shaped, and split. The signal is then divided into three paths, namely the first pulse signal, the second pulse signal, and the third pulse signal. The three pulse signals can be optionally shaped into standard TTL / NIM signals. This processing can effectively solve the situation where the signal amplitude decreases, the noise is enhanced, and other factors affect signal identification. The first pulse signal, the second pulse signal, and the third pulse signal are referred to as signal 1, signal 2, and signal 3, respectively. Of course, in the specific implementation process, the SMA interface can also be used as an interface.

[0042] RMS Jitter (Root Mean Square Jitter) refers to the root mean square value of jitter in a clock signal or pulse signal. Jitter refers to the periodic or random fluctuations of a signal, which may cause timing errors in the signal. RMS Jitter is a commonly used statistical indicator to describe the magnitude of such fluctuations. Specifically, RMS Jitter represents the standard deviation of jitter. Its calculation process involves measuring the time series data of the jitter and obtaining the value under the square root by the square sum mean to express the strength of the jitter. This process introduces RMS Jitter, which is recorded as J 1, that is, the RMS Jitter of the target pulse signal is recorded as J 1.

[0043] In the specific implementation process, the signal output by the laser in the detector is divided into two paths according to the intensity and input to the SMA interface. One path is the above-mentioned pulse signal, and the other path is a reference signal. The analog signal is a signal used to detect the target object and belongs to the signal on the main optical path. The intensity of the reference signal is weaker than the analog signal, and the other properties are the same. The reference signal is used to align with the pulse signal for detecting the target object; in other words, the dual-mode signal controller can determine the time when the laser outputs the pulse signal, the time of the first echo of the pulse signal, and other information based on the reference signal.

[0044] The first signal strength threshold and the first pulse width threshold can be set according to the target echo signal. For example, if you need to match the secondary echo, you can set it according to the secondary echo signal strength and pulse width; if you need to match the tertiary echo, you can set it according to the tertiary echo signal strength and pulse width.

[0045] For example, if it is necessary to detect the target object behind the wall through the detector, the analog signal is output through the laser. At this time, the wall will return an echo and the target object will return a second echo. Of course, there can also be a matching situation for three echoes. Since the detector is easily saturated, in the application of non-line-of-sight near-infrared detection, if the first echo is too strong, the subsequent echoes will not be detected. Specifically, when the SPAD detector receives each laser pulse, it can only detect 0 or 1 photons and enter a dead time, during which the detector cannot detect other photons. This dead time is caused by the avalanche event triggered by the photon, and the detector needs time to recover. Since SPAD is based on the Poisson statistical model, a non-fluctuation model, a stronger first echo may cause the detector to saturate, so that the subsequent weaker third echoes arrive before the detector is recovered, so they cannot be detected. As a result, the detected signal may not be completely composed of three echoes. The embodiment of the present invention can effectively solve this problem by setting a signal processing unit. In addition, pulse width modulation can also effectively avoid situations that affect signal discrimination, such as signal amplitude reduction and noise enhancement.

[0046] Among them, the third pulse signal formed after the target pulse signal (signal 1) is directly output using the SMA interface. The signal output parameters meet Vmin>100mV, Vmax<5V, pulse width>0.5ns, and impedance matching 50Ω. For the pulse width control of the first pulse signal (signal 2), the optional range is 1-50ns, and the step length is 500ps.

[0047] 2) A first delay adjustment module, used to adjust the delay of the first pulse signal according to the delay value corresponding to the target pulse signal obtained from the micro control unit, and output a fourth pulse signal. The delay value and the first pulse width threshold are obtained by presetting and obtaining from the MCU (micro control unit).

[0048] Optionally, the pulse width of the first pulse signal is controlled in an adjustment range of 0-3300mV and a resolution of 100mV; and the delay value of the delay adjustment is in a range of 40-170ns and a resolution of 500ps. The output signal is called the fourth pulse signal (signal 4). Optionally, in order to solve the problem of obvious changes in the output waveform (such as signal amplitude reduction, noise enhancement, etc. that affect signal discrimination), the second pulse signal is shaped into a standard TTL / NIM signal output. This process introduces RMSJitter and is recorded as J 2. That is, the pulse signal RMS Jitter output by the first delay adjustment module is recorded as J 2.

[0049] The first delay adjustment module includes two cascaded delay chips.

[0050] In some embodiments, a delay value can be set according to a single echo of a reference signal. The delay value can be used to set the detection timing of the detector to a limited extent, further solving the problem that the detector is easily saturated, and effectively solving the following problems: In the application of non-line-of-sight near-infrared detection, if the first echo is too strong, subsequent echoes will not be detected. Specifically, when the SPAD detector receives each laser pulse, it can only detect 0 or 1 photons and enter a dead time, during which the detector cannot detect other photons. This dead time is caused by a photon-triggered avalanche event, and the detector needs time to recover. Since SPAD is based on the Poisson statistical model, a non-fluctuation model, a stronger single echo may cause the detector to saturate, causing subsequent weaker triple echoes to arrive before the detector recovers and therefore cannot be detected. As a result, the detected signal may not be entirely composed of three echoes.

[0051] 3) A frequency division processing module, which is used to perform frequency division processing on the second pulse signal (signal 3) according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit, and output a fifth pulse signal (signal 5). The frequency division multiple is obtained by presetting and obtaining from the MCU (microcontroller unit). Optionally, the frequency reduction processing of signal 3 is performed, the frequency reduction multiple is 1-4096 times, the pulse width is controlled, the adjustment range is 0-3300mV, and the resolution is 100mV; and the delay adjustment is performed, the adjustment range is 47-170ns, and the resolution is 500ps.

[0052] The frequency division processing module may be composed of a frequency divider, and the MCU sets the frequency division multiple of the frequency divider through an SPI interface.

[0053] Existing detectors such as Aurea and MPD do not have a frequency reduction processing function. This means that they cannot automatically adjust to match the repetition rate of the incident laser. The embodiment of the present invention effectively solves the problem of mismatch between the laser repetition rate and the detector dead time through a frequency division processing module: The repetition rate of the laser, for example 10MHz, corresponds to a period of 100ns, while the dead time of the detector is longer, for example 5μs, or 5000ns. During the dead time of the detector, the laser still emits pulses, but since the detector cannot detect any signal during this period, these extra pulses will turn into background noise, affecting the overall signal clarity.

[0054] 4) A second delay adjustment module is used to adjust the delay of the fifth pulse signal according to the delay value corresponding to the target pulse signal obtained from the micro control unit, and output a sixth pulse signal (signal 6). The delay value and the first pulse width threshold are obtained by presetting and obtaining from the MCU (micro control unit).

[0055] Optionally, the delay value range is 40-170ns with a step size of 500ps.

[0056] 5) A first waveform adjustment module, used to adjust the fifth pulse signal according to a second signal strength threshold and a second pulse width threshold corresponding to the target pulse signal obtained from the micro control unit, and output a seventh pulse signal.

[0057] The second waveform adjustment module is used to adjust the sixth pulse signal according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the micro control unit, and output an eighth pulse signal.

[0058] The second signal strength threshold and the second pulse width threshold are obtained by presetting and obtaining from an MCU (micro control unit).

[0059] The specific implementation of the first waveform adjustment module and the second waveform adjustment module can refer to the signal processing unit. A comparator circuit and a trigger circuit can be set.

[0060] Optionally, the pulse width control range is 1-50ns, with a step length of 500ps. Optionally, if the seventh pulse signal and the eighth pulse signal are amplitude limited and shaped, it can effectively avoid the situation where the output waveform changes significantly (such as signal amplitude reduction, noise enhancement, etc.) that will affect signal discrimination. Optionally, it should be shaped into a standard TTL / NIM signal output. This process introduces RMSJitter, which is recorded as J 3. That is, the RMS Jitter of the pulse signal output by the first waveform adjustment module and the second waveform adjustment module is recorded as J 3.

[0061] 6) Output unit, used to perform logical OR and reshape the seventh pulse signal and the eighth pulse signal through an OR gate, and the output signal is called the tenth pulse signal. The parameters of the tenth pulse signal meet Vmin>100mV, Vmax<3.3V, impedance matching 50Ω, and can be optionally shaped into a standard TTL signal. This process introduces RMS Jitter and is recorded as J 4. Use the SMA interface to output to the detector. The RMS Jitter of the pulse signal output by the output unit is recorded as J 4.

[0062] 7) A parameter configuration table is provided in the MCU, in which control parameters for each received target pulse signal in the delay adjustment branch and the frequency division adjustment branch are provided. The control parameters of each target pulse signal include the first signal strength threshold and the first pulse width threshold, the delay value, the frequency division multiple, the second signal strength threshold and the second pulse width threshold of the second, third, fourth, fifth, sixth, seventh, eighth and eighth pulse signals.

[0063] Among them, the MCU is used to set the control parameters of each target pulse signal in the parameter configuration table, according to the interactive instructions of the upper computer or detect and record the number of pulses input by the pulse input interface, when each pulse is accumulated, call the configuration parameters associated with the number of pulses in the parameter configuration table, and set the control parameters of the target pulse signal in the delay adjustment branch and the frequency division adjustment branch according to the called control parameters.

[0064] The MCU receives the clock signal from the clock signal (control pulse) input interface and receives the interactive instructions from the host computer from the USB interface.

[0065] In the specific implementation, two data tables are pre-written in the storage medium of the MCU, and each table should have two columns. The first column corresponds to the cumulative number of pulses received, and the second column corresponds to the specific configuration parameter value corresponding to the number of pulses. The number of rows in the data table is 1024 (1K). The two data tables can be constructed in the MCU using matrix A / B or array.

[0066] When switched to pulse control mode, the control unit will detect and record the number of pulses input from the pulse input interface in real time. Whenever a pulse is accumulated, the control unit will configure the configuration parameters associated with the corresponding number of pulses to the relevant functional unit module. With this as a constraint, when the number of pulses accumulates to 1024, the controller will reset the pulse count value, start recording from 0 again, and respond to the corresponding configuration parameters.

[0067] The pulse command response cycle of the controller should not be greater than 1ms.

[0068] The embodiment of the present invention realizes fine control capability by adopting parameter configuration table, especially in the form of dual matrix / dual array. It effectively solves the problem that the gate control module of the existing detector lacks fine control capability, and can usually only perform unified control on the overall detection signal. For example, it can adjust the gate width or delay, but cannot realize individual control on each burst signal.

[0069] 8) Equipped with a host computer to realize flexible control of pulse width, delay, frequency reduction multiple, and modify the values ​​in matrix A / B; In some embodiments, the matching effect of the dual-mode signal controller can be effectively guaranteed through indicators, and the above indicators need to meet: ; ; .

[0070] In addition, priority should be given to ensuring J 1As small as possible.

[0071] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0072] The serial numbers of the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.

[0073] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A dual-mode signal controller, characterized in that: The dual-mode signal controller includes a signal processing unit, a control unit, a delay adjustment branch, a frequency division adjustment branch and an output unit: The signal processing unit is used to match the input pulse signal according to the first signal strength threshold and the first pulse width threshold corresponding to the target pulse signal obtained from the control unit to obtain the target pulse signal; Splitting the target pulse signal into a first pulse signal and a second pulse signal, and transmitting them to the delay adjustment branch and the frequency division adjustment branch respectively; The delay adjustment branch is used to perform delay adjustment on the first pulse signal and output it; The frequency division adjustment branch is used to perform frequency division adjustment on the second pulse signal and output it; The output unit is used to perform logical OR processing on the pulse signals output by the delay adjustment branch and the frequency division adjustment branch and output them.

2. The dual-mode signal controller according to claim 1, characterized in that: The signal processing unit is provided with a comparator circuit and a trigger circuit; a digital potentiometer is provided between the signal processing unit and the control unit; the control unit outputs two different voltages through the first digital potentiometer, and loads the two different voltages to the comparator circuit to control the first signal strength threshold and controls the first pulse width threshold through the trigger circuit.

3. The dual-mode signal controller according to claim 1, characterized in that: The delay adjustment branch includes a first delay adjustment module and a first waveform adjustment module; The first delay adjustment module is used to delay the first pulse signal and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The first waveform adjustment module is used to adjust and output the pulse signal output by the first delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the delay adjustment branch.

4. The dual-mode signal controller according to claim 3, characterized in that: The first delay adjustment module includes two delay chips; the delay value range is set to 40-170ns through the two delay chips.

5. The dual-mode signal controller according to claim 3, characterized in that: The first waveform adjustment module is provided with a comparator circuit and a trigger circuit.

6. The dual-mode signal controller according to claim 1, characterized in that: The frequency division adjustment branch includes a frequency division processing module, a second delay adjustment module and a second waveform adjustment module; The frequency division processing module is used to perform frequency division processing on the second pulse signal and output it according to the frequency division multiple corresponding to the target pulse signal obtained from the control unit; The second delay adjustment module is used to delay the pulse signal output by the frequency division processing module and output it according to the delay value corresponding to the target pulse signal obtained from the control unit; The second waveform adjustment module is used to adjust and output the pulse signal output by the second delay adjustment module according to the second signal strength threshold and the second pulse width threshold corresponding to the target pulse signal obtained from the control unit; the output pulse signal is the pulse signal output by the frequency division adjustment branch.

7. The dual-mode signal controller according to any one of claims 1 to 6, characterized in that: The dual-mode signal controller includes a command mode and a pulse mode; a parameter configuration table is provided in the control unit; In the command mode, the control unit is used to receive external interactive commands and set the control parameters of the target pulse signal according to the interactive commands; In the pulse mode, the control unit is used to detect and record the number of pulses input by the pulse input interface. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

8. A signal processing method for a dual-mode signal controller, characterized in that: The signal processing method of the dual-mode signal controller includes: Matching the input pulse signal according to the obtained first signal strength threshold and first pulse width threshold corresponding to the target pulse signal to obtain the target pulse signal; splitting the target pulse signal into a first pulse signal and a second pulse signal; Delay-adjusting and outputting the first pulse signal; Performing frequency division adjustment on the second pulse signal and outputting the signal; The pulse signal output by delay adjustment and the pulse signal output by frequency division adjustment are processed logically and output.

9. The signal processing method of the dual-mode signal controller according to claim 8, characterized in that: The dual-mode signal controller includes a command mode and a pulse mode; the signal processing method of the dual-mode signal controller also includes: In the command mode, external interactive commands are received and control parameters of the target pulse signal are set according to the interactive commands; In pulse mode, the number of pulses input from the pulse input interface is detected and recorded. When each pulse is accumulated, the configuration parameters associated with the number of pulses in the parameter configuration table are called to set the control parameters of the target pulse signal; the control parameters include a first signal strength threshold, a first pulse width threshold, a second signal strength threshold, a second pulse width threshold, a frequency division multiple and a delay value.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a signal processing program of a dual-mode signal controller, and the signal processing program of the dual-mode signal controller can be executed by at least one processor to implement the steps of the signal processing method of a dual-mode signal controller as claimed in any one of claims 8 to 9.

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