Anti-interference delay trigger circuit and working method thereof
By introducing voltage stabilization, voltage division, delay and driving circuits and execution circuits into the delay trigger circuit, combined with the current limiting circuit, the problem of poor delay accuracy in complex environments is solved, the anti-interference ability is improved, and the equipment is ensured in complexity. High precision startup in the environment.
Patent Information
- Application Number
- CN202411376085.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-01-03
AI Technical Summary
The existing delay trigger circuits cannot effectively resist interference in complex environments, resulting in poor delay accuracy and cannot meet the electromagnetic compatibility and electrostatic deposition requirements under flight conditions.
An anti-interference delay trigger circuit is designed, including voltage stabilization circuit, voltage divider circuit, delay and drive circuit and execution circuit. The voltage stabilization circuit provides suitable power supply, voltage divider circuit attenuates input signals, delay and drive circuit processing The trigger signal is triggered and the control signal is output by the execution circuit. The preferred solution is to add a current limiting circuit to prevent misstarting start.
It realizes high-precision delay and drive functions, improves the anti-interference ability of the delay trigger circuit, and ensures the timely start of the equipment in complex environments.
Smart Images
Figure CN119254208A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to an anti-interference time-delay trigger circuit and a working method thereof, belonging to the technical field of drive circuits. Background Art
[0002] In order to accurately control the startup time of the device, it is necessary to control the execution circuit through a delayed driving circuit to start the control circuit and achieve precise control of the device.
[0003] Due to the interference of complex environment on electromagnetic signals, there are a lot of interference signals between the power supply signal and the input signal, resulting in poor delay accuracy and the inability to effectively realize the function of the control circuit.
[0004] The existing delay circuit cannot meet the requirements of electromagnetic compatibility and anti-interference of electrostatic deposition under flight conditions under complex working environment conditions. Summary of the invention
[0005] Purpose: In order to overcome the deficiencies of the delay trigger circuit in the prior art, the present invention provides an anti-interference delay trigger circuit and a working method thereof. The present invention performs anti-interference design from multiple aspects including the power supply end, the input end, and the output end to eliminate the interference signal in the circuit and solve the shortcomings of the existing delay trigger circuit.
[0006] Technical solution: To solve the above technical problems, the technical solution adopted by the present invention is:
[0007] In a first aspect, an anti-interference delay trigger circuit includes a voltage stabilizing circuit, a voltage dividing circuit, a delay and driving circuit, and an execution circuit.
[0008] The voltage stabilizing circuit is used to provide a suitable power supply voltage for the delay and driving circuit.
[0009] The voltage divider circuit is used to attenuate the input trigger signal so that the level is suitable for the level requirement of the delay circuit.
[0010] The delay and drive circuit is used to send out a trigger signal after a delay after the trigger signal appears, and to send out a drive signal according to the trigger signal.
[0011] The execution circuit is used to send an execution signal according to the driving signal.
[0012] As a preferred solution, it also includes: a current limiting circuit.
[0013] The current limiting circuit is used to limit the pre-charging current of the energy storage capacitor to avoid false startup of the equipment.
[0014] As a preferred solution, the voltage stabilizing circuit includes a resistor R1 and a voltage stabilizing diode V1, one end of the resistor R1 is connected to the power supply VCC terminal, the other end of the resistor R1 is connected to the cathode of the voltage stabilizing diode V1, the anode of the voltage stabilizing diode V1 is connected to the power supply ground terminal, and the common point of the resistor R1 and the voltage stabilizing diode V1 serves as the output end of the voltage stabilizing circuit.
[0015] As a preferred solution, the voltage divider circuit includes: a resistor R2, a resistor R5, a TVS tube V8 and a capacitor C6, the trigger signal input terminal TR+ is respectively connected to the negative electrode of the TVS tube V8, one end of the capacitor C6 and one end of the resistor R2, the positive electrode of the TVS tube V8 and the other end of the capacitor C6 are connected to the power ground terminal, the other end of the resistor R2 is connected in series with the resistor R5 and then connected to the power ground terminal, and the common point of the resistor R2 and the resistor R5 serves as the output end of the voltage divider circuit.
[0016] As a preferred solution, the delay and drive circuit includes a dual monostable trigger N1, a resistor R3, a resistor R4, a resistor R6, a resistor R7 and a capacitor C1, a capacitor C2, and a capacitor C3. The output end of the voltage divider circuit is connected to the +TR1 pin of the dual monostable trigger N1, the output end of the voltage stabilizing circuit is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the reset pin RST1 of the dual monostable trigger N1, the other end of the resistor R3 is also connected to the power ground terminal through the resistor R4, the other end of the resistor R3 is also connected to the reset pin RST2 of the dual monostable trigger N1, the common point of the reset pin RST1 and the reset pin RST2 of the dual monostable trigger N1 is connected to the power ground terminal through the capacitor C3, and the output end of the voltage stabilizing circuit They are respectively connected to one end of the resistor R6, one end of the resistor R7 and the power pin VDD of the dual monostable trigger N1, the other end of the resistor R6 is connected to the RxCx1 pin of the dual monostable trigger N1, the other end of the resistor R7 is connected to the RxCx2 pin of the dual monostable trigger N1, the RxCx1 pin of the dual monostable trigger N1 is also connected to the power ground terminal through the capacitor C1, the RxCx2 pin of the dual monostable trigger N1 is also connected to the power ground terminal through the capacitor C2, the Q1 pin of the dual monostable trigger N1 is connected to the -TR2 pin of the dual monostable trigger N1, and the +TR2 pin of the dual monostable trigger N1 is connected to the Q2 pin of the dual monostable trigger N1 to serve as the output end of the delay and drive circuit.
[0017] As a preferred solution, the CX1 pin and the CX2 pin of the dual monostable trigger N1 are respectively connected to the power ground terminal, and the -TR1 pin of the dual monostable trigger N1 is connected to the ground terminal of the power supply. pins are connected, the VSS pin of the dual monostable trigger N1 is connected to the power ground terminal, and the Pin not used.
[0018] As a preferred solution, the execution circuit includes a capacitor C4, a thyristor V3, a resistor R13, and an inductor L1. The output end of the delay and drive circuit is connected to one end of the inductor L1, and the other end of the inductor L1 is respectively connected to one end of the capacitor C4 and the gate end of the thyristor V3, the other end of the capacitor C4 is connected to the power ground terminal, the anode of the thyristor V3 is connected to one end of the resistor R13, the cathode of the thyristor V3 is connected to the other end of the resistor R13 and then connected to the power ground terminal, and the common point of the anode of the thyristor V3 and the resistor R13 serves as a discharge test end.
[0019] As a preferred solution, the current limiting circuit includes a resistor R9, a resistor R10, a resistor R11, a switching diode V2 and a capacitor C5, one end of the resistor R9 is connected to the power supply VCC end, the other end of the resistor R9 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the positive electrode of the switching diode V2, the negative electrode of the switching diode V2 is connected to the capacitor C5, the resistor R11 and the power supply ground terminal in sequence, the negative electrode of the switching diode V2 and the common point with the capacitor C5 serve as the output end of the current limiting circuit, and the output end of the current limiting circuit is connected to the discharge test end.
[0020] In a second aspect, a working method of an anti-interference delay trigger circuit specifically includes:
[0021] After the power is turned on, the voltage stabilizing circuit provides a stable power supply voltage for the delay and drive circuits.
[0022] The trigger signal is input from the input end of the delay and drive circuit after passing through the voltage divider circuit. The delay and drive circuit delays the drive signal and sends it to the execution circuit. The drive signal drives the execution circuit to turn on, and the execution circuit outputs a start signal for the control device.
[0023] As a preferred solution, it also includes:
[0024] At the same time, a current limiting circuit is connected between the power supply end and the circuit output end to limit the pre-charge current of the output capacitor to avoid false startup of the equipment.
[0025] Beneficial effects: The anti-interference delay trigger circuit and working method provided by the present invention realize high-precision delay and drive functions, solve the problem that the existing delay circuit cannot maintain a high probability of timely startup in a complex interference environment, and improve the anti-interference ability of the delay trigger. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 The invention discloses a circuit block diagram of an anti-interference time-delay trigger circuit.
[0027] Figure 2The invention discloses a circuit diagram of a voltage stabilizing circuit of an anti-interference time-delay trigger circuit.
[0028] Figure 3 The invention discloses a circuit diagram of a current limiting circuit of an anti-interference time-delay trigger circuit.
[0029] Figure 4 The invention discloses a circuit diagram of a voltage-dividing circuit of an anti-interference time-delay trigger circuit.
[0030] Figure 5 The invention discloses a circuit diagram of a delay and driving circuit of an anti-interference delay trigger circuit.
[0031] Figure 6 The invention discloses a timing diagram of a delay and a driving circuit of an anti-interference delay trigger circuit.
[0032] Figure 7 The invention discloses a circuit diagram of an execution circuit of an anti-interference delay trigger circuit. DETAILED DESCRIPTION
[0033] The following is a clear and complete description of the technical solutions in the examples of the present invention in conjunction with the accompanying drawings in the examples of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the protection scope of the present invention.
[0034] The present invention will be further described below in conjunction with specific embodiments.
[0035] Embodiment 1:
[0036] This embodiment introduces an anti-interference delay trigger circuit. Figure 1 As shown, it includes a voltage stabilizing circuit, a current limiting circuit, a voltage dividing circuit, a delay and driving circuit, and an execution circuit.
[0037] The voltage stabilizing circuit is used to provide a suitable power supply voltage for the delay and driving circuit.
[0038] The current limiting circuit is used to limit the pre-charging current of the energy storage capacitor to avoid false startup of the equipment.
[0039] The voltage divider circuit is used to attenuate the input trigger signal so that the level is suitable for the level requirement of the delay circuit.
[0040] The delay and drive circuit is used to send out a trigger signal after a delay after the trigger signal appears, and to send out a drive signal according to the trigger signal.
[0041] The execution circuit is used to send an execution signal according to the driving signal.
[0042] Further, such as Figure 2 As shown, the voltage stabilizing circuit includes a resistor R1 and a voltage stabilizing diode V1, one end of the resistor R1 is connected to the power supply VCC end, the other end of the resistor R1 is connected to the cathode of the voltage stabilizing diode V1, the anode of the voltage stabilizing diode V1 is connected to the power supply ground end, and the common point of the resistor R1 and the voltage stabilizing diode V1 serves as the output end of the voltage stabilizing circuit.
[0043] The voltage stabilization circuit is used to prevent the delay and driving circuit from being affected when there is interference in the power supply voltage.
[0044] Further, such as Figure 3 As shown, the current limiting circuit includes a resistor R9, a resistor R10, a resistor R11, a switching diode V2 and a capacitor C5, one end of the resistor R9 is connected to the power supply VCC end, the other end of the resistor R9 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the positive electrode of the switching diode V2, the negative electrode of the switching diode V2 is connected to the capacitor C5, the resistor R11 and the power supply ground terminal in sequence, and the common point of the negative electrode of the switching diode V2 and the capacitor C5 serves as the output end of the current limiting circuit.
[0045] The current limiting circuit is used to connect resistors R9 and R10 in series between the power supply and the output to limit the pre-charge current of the energy storage capacitor C5, avoid false start-up of the circuit, and improve the anti-interference ability of the circuit output end.
[0046] Further, such as Figure 4 As shown, the voltage divider circuit includes: a resistor R2, a resistor R5, a TVS tube V8 and a capacitor C6, the trigger signal input terminal TR+ is respectively connected to the negative electrode of the TVS tube V8, one end of the capacitor C6 and one end of the resistor R2, the positive electrode of the TVS tube V8 and the other end of the capacitor C6 are connected to the power ground terminal, the other end of the resistor R2 is connected in series with the resistor R5 and then connected to the power ground terminal, and the common point of the resistor R2 and the resistor R5 is used as the output end of the voltage divider circuit.
[0047] The voltage divider circuit is used to connect TVS tube V8 and capacitor C6 in parallel to form a surge protection circuit, which improves the anti-interference ability of the circuit input. When a surge or high-voltage static electricity greater than TR+ is applied to the delay input, the TVS responds quickly to guide the excessive voltage and current to the power ground, thereby preventing the surge pulse or static electricity from damaging the subsequent circuit. Capacitor C6 can bypass high-frequency pulses and form a surge protection circuit together with TVS to improve the circuit's ability to withstand electromagnetic interference. The input trigger level is divided by resistors R2 and R5 to make the level suitable for the trigger level requirements of the delay circuit, providing the delay circuit with an input trigger signal.
[0048] Further, such as Figure 5As shown, the delay and driving circuit includes a dual monostable trigger N1, a resistor R3, a resistor R4, a resistor R6, a resistor R7 and a capacitor C1, a capacitor C2, and a capacitor C3. The output end of the voltage divider circuit is connected to the +TR1 pin of the dual monostable trigger N1, the output end of the voltage stabilizing circuit is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the reset pin RST1 of the dual monostable trigger N1, the other end of the resistor R3 is also connected to the power ground terminal through the resistor R4, the other end of the resistor R3 is also connected to the reset pin RST2 of the dual monostable trigger N1, the common point of the reset pin RST1 and the reset pin RST2 of the dual monostable trigger N1 is connected to the power ground terminal through the capacitor C3, and the output end of the voltage stabilizing circuit is respectively It is connected to one end of the resistor R6, one end of the resistor R7 and the power pin VDD of the dual monostable trigger N1, the other end of the resistor R6 is connected to the RxCx1 pin of the dual monostable trigger N1, the other end of the resistor R7 is connected to the RxCx2 pin of the dual monostable trigger N1, the RxCx1 pin of the dual monostable trigger N1 is also connected to the power ground terminal through the capacitor C1, the RxCx2 pin of the dual monostable trigger N1 is also connected to the power ground terminal through the capacitor C2, the Q1 pin of the dual monostable trigger N1 is connected to the -TR2 pin of the dual monostable trigger N1, and the +TR2 pin of the dual monostable trigger N1 is connected to the Q2 pin of the dual monostable trigger N1 as the output end of the delay and drive circuit.
[0049] Furthermore, the CX1 pin and the CX2 pin of the dual monostable trigger N1 are connected to the power ground terminal respectively, and the -TR1 pin of the dual monostable trigger N1 is connected to the pins are connected, the VSS pin of the dual monostable trigger N1 is connected to the power ground terminal, and the Pin not used.
[0050] The delay and drive circuit is used when the 4-pin +TR1 of the dual monostable trigger N1 receives the output of the voltage divider circuit, and there is a process of jumping from 0 level to high level. The 6-pin Q1 of the dual monostable trigger N1 immediately outputs a single pulse, and the falling edge of this pulse triggers the 10-pin Q2 of the dual monostable trigger N1 to output a single pulse. Figure 6 As shown. The delay time is determined by the product of R6 and C1, td = R6×C1 / 2. The pulse width of the driving signal is determined by the product of R7 and C2, td = R7×C2 / 2. The 2-pin RxCx1, 14-pin RxCx2, and 16-pin VDD input voltages of the dual monostable trigger N1 are the output voltages of the voltage regulator circuit. The 3-pin RST1 and 13-pin RST2 input voltages of the dual monostable trigger N1 are the voltages output by the voltage regulator circuit after being divided by R3 and R4, so that the dual monostable trigger has the ability to reset again. C3 is a filter capacitor to eliminate interference signals at the power supply end.
[0051] Furthermore, Figure 7 As shown, the execution circuit includes a capacitor C4, a thyristor V3, a resistor R13, and an inductor L1. The output end of the delay and drive circuit is connected to one end of the inductor L1, and the other end of the inductor L1 is respectively connected to one end of the capacitor C4 and the gate end of the thyristor V3, the other end of the capacitor C4 is connected to the power ground terminal, the anode of the thyristor V3 is connected to one end of the resistor R13, the cathode of the thyristor V3 is connected to the other end of the resistor R13 and then connected to the power ground terminal, and the common point of the anode of the thyristor V3, the resistor R13 and the output end of the current limiting circuit is used as a discharge test end.
[0052] The output of the 10th pin of the dual monostable trigger N1 is used as the input of the execution circuit, and the 2nd pin of the thyristor triggers it to conduct. The 3rd pin of the thyristor is the discharge test terminal, which is connected to the output of the current limiting circuit to control the device to start. The inductor L1 and the capacitor C4 form an LC filter circuit, which is calculated by the formula The filtering frequency can be calculated. Interference signals above this frequency range can be completely filtered out, and interference signals below this frequency can be attenuated by capacitor C4, thereby enhancing the anti-interference ability.
[0053] Embodiment 2:
[0054] This embodiment introduces a working method of an anti-interference delay trigger circuit, which specifically includes:
[0055] After the power is turned on, the voltage stabilizing circuit provides a stable power supply voltage for the delay and drive circuits. At the same time, a current limiting circuit is connected between the power supply end and the circuit output end to limit the pre-charge current of the output capacitor to avoid false startup of the equipment.
[0056] The trigger signal is input from the input end of the delay and drive circuit after passing through the voltage divider circuit. The delay and drive circuit delays the drive signal and sends it to the execution circuit. The drive signal drives the execution circuit to turn on, and the execution circuit outputs a start signal for the control device.
[0057] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. An anti-interference delay trigger circuit, characterized in that: It includes voltage stabilizing circuit, voltage dividing circuit, delay and driving circuit and execution circuit; The voltage stabilizing circuit is used to provide a suitable power supply voltage for the delay and driving circuits; The voltage divider circuit is used to attenuate the input trigger signal so that the level is suitable for the level requirement of the delay circuit; The delay and drive circuit is used to send out a trigger signal after a delay after the trigger signal appears, and send out a drive signal according to the trigger signal; The execution circuit is used to send an execution signal according to the driving signal.
2. The anti-interference delay trigger circuit according to claim 1, characterized in that: Also includes: Current limiting circuit; The current limiting circuit is used to limit the pre-charging current of the energy storage capacitor to avoid false startup of the equipment.
3. The anti-interference delay trigger circuit according to claim 1 or 2, characterized in that: The voltage stabilizing circuit includes a resistor R1 and a voltage stabilizing diode V1, one end of the resistor R1 is connected to the power supply VCC end, the other end of the resistor R1 is connected to the cathode of the voltage stabilizing diode V1, the anode of the voltage stabilizing diode V1 is connected to the power supply ground end, and the common point of the resistor R1 and the voltage stabilizing diode V1 serves as the output end of the voltage stabilizing circuit.
4. The anti-interference delay trigger circuit according to claim 1 or 2, characterized in that: The voltage divider circuit includes: a resistor R2, a resistor R5, a TVS tube V8 and a capacitor C6, the trigger signal input terminal TR+ is respectively connected to the negative electrode of the TVS tube V8, one end of the capacitor C6 and one end of the resistor R2, the positive electrode of the TVS tube V8 and the other end of the capacitor C6 are connected to the power ground terminal, the other end of the resistor R2 is connected in series with the resistor R5 and then connected to the power ground terminal, and the common point of the resistor R2 and the resistor R5 serves as the output end of the voltage divider circuit.
5. The anti-interference delay trigger circuit according to claim 1 or 2, characterized in that: The delay and driving circuit includes a dual monostable trigger N1, a resistor R3, a resistor R4, a resistor R6, a resistor R7 and a capacitor C1, a capacitor C2 and a capacitor C3. The output end of the voltage divider circuit is connected to the +TR1 pin of the dual monostable trigger N1, the output end of the voltage stabilizing circuit is connected to one end of the resistor R3, the other end of the resistor R3 is connected to the reset pin RST1 of the dual monostable trigger N1, the other end of the resistor R3 is also connected to the power ground terminal through the resistor R4, the other end of the resistor R3 is also connected to the reset pin RST2 of the dual monostable trigger N1, the common point of the reset pin RST1 and the reset pin RST2 of the dual monostable trigger N1 is connected to the power ground terminal through the capacitor C3, and the output end of the voltage stabilizing circuit is respectively connected to One end of the resistor R6, one end of the resistor R7 and the power pin VDD of the dual monostable trigger N1 are connected, the other end of the resistor R6 is connected to the RxCx1 pin of the dual monostable trigger N1, the other end of the resistor R7 is connected to the RxCx2 pin of the dual monostable trigger N1, the RxCx1 pin of the dual monostable trigger N1 is also connected to the power ground terminal through the capacitor C1, the RxCx2 pin of the dual monostable trigger N1 is also connected to the power ground terminal through the capacitor C2, the Q1 pin of the dual monostable trigger N1 is connected to the -TR2 pin of the dual monostable trigger N1, and the +TR2 pin of the dual monostable trigger N1 is connected to the Q2 pin of the dual monostable trigger N1 to serve as the output end of the delay and drive circuit.
6. The anti-interference delay trigger circuit according to claim 5, characterized in that: The CX1 pin and the CX2 pin of the dual monostable trigger N1 are connected to the power ground terminal respectively, and the -TR1 pin of the dual monostable trigger N1 is connected to the ground terminal of the power supply. pins are connected, the VSS pin of the dual monostable trigger N1 is connected to the power ground terminal, and the Pin not used.
7. The anti-interference delay trigger circuit according to claim 1 or 2, characterized in that: The execution circuit includes a capacitor C4, a thyristor V3, a resistor R13, and an inductor L1. The output end of the delay and drive circuit is connected to one end of the inductor L1, the other end of the inductor L1 is respectively connected to one end of the capacitor C4 and the gate end of the thyristor V3, the other end of the capacitor C4 is connected to the power ground end, the anode of the thyristor V3 is connected to one end of the resistor R13, the cathode of the thyristor V3 is connected to the other end of the resistor R13 and then connected to the power ground end, and the common point of the anode of the thyristor V3 and the resistor R13 serves as a discharge test end.
8. The anti-interference delay trigger circuit according to claim 2, characterized in that: The current limiting circuit includes a resistor R9, a resistor R10, a resistor R11, a switching diode V2 and a capacitor C5, one end of the resistor R9 is connected to the power supply VCC end, the other end of the resistor R9 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the positive electrode of the switching diode V2, the negative electrode of the switching diode V2 is connected to the capacitor C5, the resistor R11 and the power supply ground end in sequence, the negative electrode of the switching diode V2 and the common point with the capacitor C5 serve as the output end of the current limiting circuit, and the output end of the current limiting circuit is connected to the discharge test end.
9. The working method of the anti-interference delay trigger circuit according to any one of claims 1 to 8, characterized in that: Specifically include: After the power is turned on, the voltage stabilizing circuit provides a stable power supply voltage for the delay and drive circuits; The trigger signal is input from the input end of the delay and drive circuit after passing through the voltage divider circuit. The delay and drive circuit delays the drive signal and sends it to the execution circuit. The drive signal drives the execution circuit to turn on, and the execution circuit outputs a start signal for the control device.
10. The working method of the anti-interference delay trigger circuit according to claim 9, characterized in that: Also includes: At the same time, a current limiting circuit is connected between the power supply end and the circuit output end to limit the pre-charge current of the output capacitor to avoid false startup of the equipment.