Optical integrated device, optical transmission device and optical transceiver
By forming trenches on a chip with electro-optical effect and installing the first chip, the high-precision problem of optical waveguide alignment task is solved, the installation workload is reduced, and the driving voltage of the modulator is reduced, and the efficiency of the optical circuit is improved.
Patent Information
- Application Number
- CN202410707084.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-07
- Filing Date
- 2024-06-03
- Publication Date
- 2025-01-07
AI Technical Summary
In chips including optical waveguides with electro-optical effects, the optical mode field diameter is small, resulting in high precision in alignment tasks and increasing installation workload.
By forming trenches on the second chip with electro-optical effect and mounting the first chip in the trenches, docking and coupling with adhesive, optical coupling is achieved, reducing the number of components and installation workload.
The workload required for installation in a chip with electro-optical effects is significantly reduced, the drive voltage of the modulator is reduced, and the optical circuit is smaller, improving installation efficiency.
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Figure CN119270425A_ABST
Abstract
Description
Technical Field
[0001] The embodiments discussed herein relate to optical integrated devices, optical transmission devices, and optical transceivers. Background Art
[0002] Fig.24 is a schematic plan view illustrating an example of the optical integrated device 100, and Fig.25 1 is a schematic cross-sectional view illustrating an example of the optical integrated device 100. For convenience of explanation, the schematic cross-sectional view is Fig.24 Schematic cross-sectional view of the illustrated optical integrated device 100. The optical integrated device 100 has an optical modulator chip 110, a microlens array (MLA) 121, a polarization rotator (PR) 122, a polarization beam combiner (PBC) 123, and an optical fiber array 130. The optical modulator chip 110 is, for example, a TF-LN (thin film LiNnO3) modulator chip. The optical modulator chip 110 has: a TF-LN optical waveguide 111, a TF-LN optical modulator 112, an input unit 113, a first output unit 114A, and a second output unit 114B. The input unit 113, the first output unit 114A, and the second output unit 114B are located on the chip end face 110A of the optical modulator chip 110.
[0003] The optical waveguide 111 in the optical modulator chip 110 has an input waveguide 111A, a folded waveguide 111B, a first output waveguide 111C1, and a second output waveguide 111C2. The input waveguide 111A is a TF-LN waveguide extending in a straight line from an input unit 113 of the optical modulator chip 110 in the longitudinal direction of the optical modulator chip 110. The folded waveguide 111B is a TF-LN waveguide folded back from the input waveguide 111A and connected to the input stage of the optical modulator 112. The first output waveguide 111C1 is a TF-LN waveguide connecting the output stage of the optical modulator 112 to the first output unit 114A of the optical modulator chip 110. The second output waveguide 111C2 is a TF-LN waveguide connecting the output stage of the optical modulator 112 to the second output unit 114B of the optical modulator chip 110.
[0004] The optical modulator 112 has an optical waveguide and an electrode for applying an electric signal to the optical waveguide, and optically modulates light passing through the optical waveguide by applying the electric signal from the electrode. The optical fiber array 130 has an input side optical fiber 131A for receiving light and an output side optical fiber 131B for outputting light.
[0005] The MLA 121 is an optical component connected to the chip end face 110A of the optical modulator chip 110, which optically couples the TF-LN optical waveguide 111 to the optical fiber array 130. The MLA 121 is connected to the input side optical fiber 131A in the optical fiber array 130, and inputs the light from the input side optical fiber 131A into the input waveguide 111A. The MLA 121 outputs the TE polarized signal light from the optical modulator 112 to the PR 122 and the PBC 123. The PR 122 rotates the polarization of the signal light from the optical modulator 112 passing through the MLA 121 by 90°, and outputs the TM polarized signal light after the polarization rotation to the PBC 123. The PBC 123 polarization-multiplexes the TE polarized signal light obtained from the optical modulator 112 passing through the MLA 121 and the TM polarized signal light after the polarization rotation, and outputs the polarization-multiplexed signal light to the output side optical fiber 131B in the optical fiber array 130. The related art is described in, for example, Japanese Laid-Open Patent Publication No. 2020-134609; U.S. Patent Application Publication No. 2016 / 0116680; Japanese Laid-Open Patent Publication No. 2020-021015; U.S. Patent Application Publication No. 2015 / 0355421; and Japanese Laid-Open Patent Publication No. 2001-324654.
[0006] In the optical integrated device 100, the optical modulator chip 110 and the MLA 121 are fixed by using the adhesive A by aligning the optical waveguide 111 on the chip end face 110A of the optical modulator chip 110 with the optical axis of the MLA 121. Subsequently, the alignment task requires aligning the optical axis of the PR 122, the optical axis of the PBC 123, and the optical axis of the optical fiber array 130 with respect to the MLA 121.
[0007] However, since the optical waveguide 111 in the optical modulator chip 110 is a TF-LN optical waveguide with an electro-optical effect, the optical mode field diameter is small, requiring a high-precision alignment task. Therefore, the amount of work required for mounting in a chip including an optical waveguide with an electro-optical effect increases.
[0008] Therefore, an object of one aspect of an embodiment of the present invention is to provide an optical integrated device or the like that can reduce the amount of work required for mounting in a chip including an optical waveguide having an electro-optical effect. Summary of the invention
[0009] According to an aspect of the embodiment, there is provided an optical integrated device, the optical integrated device comprising: a first chip comprising an optical circuit; and a second chip comprising an optical waveguide, the optical waveguide comprising a material having an electro-optical effect greater than an electro-optical effect of a material of the first chip. The first chip is mounted in a groove formed on the second chip, and the first chip is optically coupled to the second chip by butt coupling. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 is a schematic plan view illustrating an example of the optical integrated device of the first embodiment;
[0011] Figure 2 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0012] Figure 3 is a schematic plan view illustrating an example of an optical integrated device according to a second embodiment;
[0013] Figure 4 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0014] Figure 5 is a schematic plan view illustrating an example of an optical integrated device according to a third embodiment;
[0015] Figure 6 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0016] Figure 7 is a schematic plan view illustrating an example of an optical integrated device according to a fourth embodiment;
[0017] Figure 8 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0018] Fig. 9 is a schematic plan view illustrating an example of an optical integrated device according to a fifth embodiment;
[0019] Fig.10 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0020] Fig.11 is a schematic plan view illustrating an example of an optical integrated device according to a sixth embodiment;
[0021] Fig.12 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0022] Fig.13 is a schematic plan view illustrating an example of an optical integrated device according to a seventh embodiment;
[0023] Fig.14 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0024] Fig.15 is a schematic plan view illustrating an example of an optical integrated device according to an eighth embodiment;
[0025] Fig.16 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0026] Fig.17 is a schematic plan view illustrating an example of an optical integrated device according to a ninth embodiment;
[0027] Fig.18 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0028] Fig.19 is a schematic plan view illustrating an example of an optical integrated device according to a tenth embodiment;
[0029] Fig. 20 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0030] Fig.21 is a schematic plan view illustrating an example of an optical integrated device according to an eleventh embodiment;
[0031] Fig. 22 is a schematic cross-sectional view illustrating an example of an optical integrated device;
[0032] Fig.23 is an explanatory diagram illustrating an example of an optical transceiver of the present example;
[0033] Fig.24 is a schematic plan view illustrating an example of an optical integrated device; and
[0034] Fig.25 is a schematic cross-sectional view illustrating an example of an optical integrated device. DETAILED DESCRIPTION
[0035] The preferred embodiments of the present invention are described with reference to the accompanying drawings. This example does not limit the disclosed technology. Each of the examples shown below can be appropriately combined within the scope that does not cause contradictions.
[0036] (a) First Embodiment
[0037] Figure 1 is a schematic plan view of an example of the optical integrated device 1 of the first embodiment, and Figure 2It is a schematic cross-sectional view of an example of an illustrated optical integrated device 1. For ease of explanation, the schematic cross-sectional view is a schematic cross-sectional view of the optical integrated device 1. The optical integrated device 1 has: a second chip 2, the second chip including a second optical waveguide 11 having an electro-optical effect; a first chip 3, the third chip including an optical circuit 24 and a first optical waveguide 23; and an optical fiber array 4. The second chip 2 is, for example, a chip having an electro-optical effect such as TF-LN (Thin-Film LiNbO3). The second chip 2 is an LN thin film substrate with a sub-micron thickness. The first chip 3 is, for example, a silicon photonic (SiPh) chip. The optical fiber array 4 has an input side optical fiber 4A for receiving light and an output side optical fiber 4B for outputting light.
[0038] The second chip 2 has: a second optical waveguide 11 made of TF-LN material, an optical modulator 12 made of TF-LN material, a groove 13 formed on the chip end face 2A1, an input unit 14, a first output unit 15A, and a second output unit 15B. The groove 13 is formed on the chip end face 2A1 of the second chip 2, and is used as a platform structure for mounting the first chip 3. The input unit 14 is a portion located on the second bonding surface 13A of the groove 13 and receiving light from the first optical waveguide 23 of the first chip 3. The second bonding surface 13A is a surface in contact with the first bonding surface 3A of the first chip 3 to be described below. The first output unit 15A and the second output unit 15B are portions located on the second bonding surface 13A of the groove 13 and outputting signal light from the optical modulator 12 to the first optical waveguide 23 of the first chip 3.
[0039] The second optical waveguide 11 has an input waveguide 11A, a folded waveguide 11B, a first output waveguide 11C1, and a second output waveguide 11C2. The input waveguide 11A is a linear TF-LN optical waveguide extending from the input unit 14 in the longitudinal direction of the second chip 2, and is connected to the folded waveguide 11B. The folded waveguide 11B is a folded TF-LN waveguide that connects the input waveguide 11A to the input stage of the optical modulator 12. The first output waveguide 11C1 is a TF-LN waveguide that connects the output stage of the optical modulator 12 to the first output unit 15A. The second output waveguide 11C2 is a TF-LN waveguide that connects the output stage of the optical modulator 12 to the second output unit 15B.
[0040] The first chip 3 has a first input unit 21A, a second input unit 21B, a third input unit 21C, a first output unit 22A, a second output unit 22B, a first optical waveguide 23, and an optical circuit 24. The optical circuit 24 has a polarization rotator (PR) 24A made of Si material, and a polarization beam combiner (PBC) 24B made of Si material. The first input unit 21A is a portion located on the surface connected to the optical fiber array 4, and receives light from the input side optical fiber 4A in the optical fiber array 4. The first output unit 22A is a portion located on the first joint surface 3A in contact with the second joint surface 13A of the second chip 2, and outputs light from the first input unit 21A to the second chip 2. The second input unit 21B is a portion located on the first joint surface 3A, and inputs light from the optical modulator 12 in the second chip 2 to the PR 24A. The third input unit 21C is a portion located on the first joint surface 3A, and inputs light from the optical modulator 12 in the second chip 2 to the PBC 24B. The second output unit 22B is a portion located on the surface connected to the optical fiber array 4 , and outputs the signal light from the PBC 24B to the output-side optical fiber 4B in the optical fiber array 4 .
[0041] The first optical waveguide 23 has an input waveguide 23A, a first input waveguide 23B1, a second input waveguide 23B2, and an output waveguide 23C. The input waveguide 23A is a Si waveguide that connects the first input unit 21A to the first output unit 22A. The first input waveguide 23B1 is a Si waveguide that connects the second input unit 21B to the PR 24A. The second input waveguide 23B2 is a Si waveguide that connects the third input unit 21C to the PBC 24B. The output waveguide 23C is a Si waveguide that connects the second output unit 22B to the PBC 24B.
[0042] PR 24A is a polarization rotation unit that converts TE polarized signal light from the first input waveguide 23B1 into TM polarized signal light by rotating the polarization of the TE polarized signal light by 90°, and outputs the TM polarized signal light to PBC 24B. PBC 24B is a polarization multiplexer that polarization-multiplexes the TE polarized signal light from the second input waveguide 23B2 and the TM polarized signal light from PR 24A after polarization rotation, and outputs the polarization-multiplexed signal light to the output waveguide 23C.
[0043] A portion of the second chip 2 near the chip end surface 2A1 is provided with a groove 13 having a platform structure for, for example, face-down mounting of the first chip 3. The groove 13 is formed, for example, by etching the surface of the second chip 2. On the second bonding surface 13A serving as a wall surface of the groove 13, the first output unit 22A, the first input unit 21A, and the second input unit 21B are positioned as described above.
[0044] In order to mount the first chip 3 face-down in the groove 13 of the second chip 2, the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 are optically coupled by butt coupling using an adhesive A. As a result, the input unit 14 in the second chip 2 and the first output unit 22A in the first chip 3 are optically connected. In addition, the first output unit 15A in the second chip 2 and the second input unit 21B in the first chip 3 are optically connected, and the second output unit 15B in the second chip 2 and the third input unit 21C in the first chip 3 are optically connected.
[0045] Furthermore, the first chip 3 is connected to the optical fiber array 4 using the adhesive A so that the first input unit 21A and the input-side optical fiber 4A are optically connected, and the second output unit 22B and the output-side optical fiber 4B are optically connected.
[0046] In the optical integrated device 1 of the first embodiment, the first chip 3 including the optical circuit 24 is mounted on the groove 13 in the second chip 2 with the electro-optical effect, and the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 are optically coupled by butt coupling. As a result, since it is not necessary to separately mount the components of the PR 24A and the PBC 24B, the number of components can be reduced, and the amount of work required for mounting in the second chip 2 with the electro-optical effect can be significantly reduced.
[0047] Generally, the size of the LN modulator chip is larger than that of the SiPh chip, and when the LN modulator is mounted by forming a groove on the SiPh chip, the size of the SiPh chip also needs to be increased to match the size of the LN modulator. On the other hand, since the optical integrated device 1 of the first embodiment does not need to match the size of the first chip 3 as the SiPh chip with the size of the second chip 2 as the LN modulator chip, waste of the first chip 3 can be eliminated.
[0048] Since the first chip 3 is mounted face down on the groove 13 in the second chip 2, the depth of the groove 13 formed on the second chip 2 can be made shallow. Therefore, the burden required for etching when forming the groove 13 can be reduced.
[0049] Since the optical modulator 12 of the second chip 2 is a TF-LN crystal optical modulator, the driving voltage of the modulator can be reduced by allowing a large electro-optical effect.
[0050] Since the first chip 3 is a SiPh chip, the optical circuit 24 including the PR 24A and the PBC 24B can be made smaller.
[0051] For ease of explanation, the case where the first chip 3 is mounted face-down on the groove 13 of the second chip 2 is illustrated as an example, but face-up mounting may also be used, and the mounting method may be modified as needed. In the first chip 3, since the first optical waveguide 23 is formed near the chip surface, the first chip 3 can be mounted face-up on the groove 13 of the second chip 2 by increasing the depth of the groove 13.
[0052] Although TF-LN is illustrated as an example of a material for the electro-optical effect, the material is not limited to TF-LN. For example, the material may be TF-barium titanate and may be modified as needed. The material for the electro-optical effect may be, for example, TF-BTO (BaTiO3), TF-PLZT (PbLaZrTiO3), and TF-PZT (PbZrTiO3).
[0053] In the optical integrated device 1 of the first embodiment, as an example, a case where optical coupling is performed between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 by butt coupling is illustrated. However, when the spacing X between the input waveguide 11A and the first output waveguide 11C1 in the second optical waveguide 11 in the second chip 2 becomes wider, when the placement angle of the first chip 3 deviates when the first chip 3 is mounted to the second chip 2, the optical axis misalignment becomes larger. As a result, the coupling loss between the second optical waveguide 11 and the first optical waveguide 23 increases. In this regard, an embodiment that solves this situation will be described below as a second embodiment.
[0054] (b) Second Embodiment
[0055] Figure 3 is a schematic plan view illustrating an example of an optical integrated device 1A of the second embodiment, and Figure 41 is a schematic cross-sectional view illustrating an example of an optical integrated device 1A. The same symbols are attached to the same configurations as those of the optical integrated device 1 in the first embodiment, and descriptions of repeated configurations and operations are omitted. The spacing X between the input waveguide 11A1 and the first output waveguide 11C1 at the butt-coupling point of the second chip 2 and the spacing X between the input waveguide 23A1 and the first input waveguide 23B1 at the butt-coupling point of the first chip 3 are narrower. The butt-coupling point is a portion where the second chip 2 and the first chip 3 are optically coupled by butt-coupling. The spacing X between the input waveguide 11A1 and the first output waveguide 11C1 and the spacing X between the input waveguide 23A1 and the first input waveguide 23B1 are narrower than the spacing X1 between the input side optical fiber 4A and the output side optical fiber 4B.
[0056] In order to mount the first chip 3 face-down in the groove 13 of the second chip 2, the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 are optically coupled by butt coupling using an adhesive A. That is, the input waveguide 11A1 of the input unit 14 in the second chip 2 and the input waveguide 23A of the first output unit 22A in the first chip 3 are optically connected. The first output waveguide 11C1 of the first output unit 15A in the second chip 2 and the first input waveguide 23B1 of the second input unit 21B in the first chip 3 are optically connected. In addition, the second output waveguide 11C2 of the second output unit 15B in the second chip 2 and the second input waveguide 23B2 of the third input unit 21C in the first chip 3 are optically connected.
[0057] Since the spacing X between the input waveguide 11A1 and the first output waveguide 11C1 of the second chip 2 is narrow, the curvature radius of the folded waveguide 11B1 is smaller than Figure 1 The radius of curvature of the illustrated folded waveguide 11B.
[0058] The input waveguide 23A1 in the first chip 3 is bent to align the interval between the input waveguide 23A1 and the output waveguide 23C in the first chip 3 and the interval X1 between the input-side optical fiber 4A and the output-side optical fiber 4B of the optical fiber array 4 .
[0059] In the optical integrated device 1A of the second embodiment, the interval X between the input waveguide 11A1 and the first output waveguide 11C1 at the butt coupling point of the second chip 2 is narrower than the interval X1 between the input-side optical fiber 4A and the output-side optical fiber 4B of the optical fiber array 4. As a result, the tolerance caused by the deviation of the placement angle of the first chip 3 when mounting the first chip 3 can be relaxed, and the degradation of the coupling loss between the second optical waveguide 11 and the first optical waveguide 23 can be suppressed.
[0060] In the optical integrated device 1A of the second embodiment, since the interval X between the input waveguide 11A1 and the first output waveguide 11C1 of the second chip 2 is narrow, the curvature radius of the folded waveguide 11B1 is small. As a result, radiation loss may occur in the folded waveguide 11B1. In this regard, an embodiment that solves this situation will be described below as a third embodiment.
[0061] (c) Third Embodiment
[0062] Figure 5 is a schematic plan view illustrating an example of an optical integrated device 1B of the third embodiment, and Figure 6 1 is a schematic cross-sectional view illustrating an example of an optical integrated device 1B. The same symbols are attached to the same configurations as those of the optical integrated device 1A in the second embodiment, and descriptions of repeated configurations and operations are omitted. The diameter of the folded waveguide 11B2 in the second chip 2 is wider than the spacing X between the input waveguide 11A2 and the first output waveguide 11C1 at the butt coupling point in the second chip 2.
[0063] The diameter X2 of the folded waveguide 11B2 in the second chip 2 in the optical integrated device 1B of the third embodiment is wider than the interval X between the input waveguide 11A2 and the first output waveguide 11C1 at the butt coupling point in the second chip 2. As a result, since the radius of curvature of the folded waveguide 11B2 increases, the radiation loss in the folded waveguide 11B2 can be suppressed.
[0064] In the optical integrated device 1B of the third embodiment, the alignment task for aligning the optical axis of the second optical waveguide 11 of the TF-LN having a small optical mode field diameter and the optical axis of the first optical waveguide 23 requires high precision, resulting in an increase in the amount of installation work. In this regard, an embodiment that solves this situation will be described below as a fourth embodiment.
[0065] (d) Fourth Embodiment
[0066] Figure 7 is a schematic plan view illustrating an example of an optical integrated device 1C of the fourth embodiment, and Figure 81 is a schematic cross-sectional view of an example of an illustrated optical integrated device 1C. The same symbols are attached to the same configuration as that of the optical integrated device 1B in the third embodiment, and the description of the repeated configuration and operation is omitted. The second chip 2 has: a test output unit 15A1, a test waveguide 15A2 connected to the test output unit 15A1, and a grating coupler (GC) 15A3 connected to the test waveguide 15A2 and also connected to the optical fiber 5 that outputs the test light. The test output unit 15A1 is located between the input unit 14 and the second output unit 15B on the second bonding surface 13A in the groove 13. The test waveguide 15A2 is a TF-LN waveguide, which is located between the input waveguide 11A1 of the input unit 14 and the second output waveguide 11C2 of the second output unit 15B, and is connected to the test output unit 15A1. The GC 15A3 is a coupler that connects the test waveguide 15A2 to the optical fiber 5.
[0067] The first chip 3 has: a test input unit 25A1, a test waveguide 25A2 connected to the test input unit 25A1, and a loop mirror 25A3 connected to the test waveguide 25A2. The test input unit 25A1 is located between the first output unit 22A and the third input unit 21C on the first bonding surface 3A of the first chip 3, and is connected to the test output unit 15A1 of the second chip 2. The test waveguide 25A2 is a Si waveguide, which is located between the input waveguide 23A1 of the first output unit 22A and the second input waveguide 23B2 of the third input unit 21C. And is connected to the test input unit 25A1. The loop mirror 25A3 is a reflector connected to the test waveguide 25A2 and reflects the test light input from the test waveguide 25A2.
[0068] When the first chip 3 is mounted in the groove 13 of the second chip 2, the test output unit 15A1 in the second chip 2 is connected to the test input unit 25A1 in the first chip 3. GC 15A3 outputs the test light from the optical fiber 5 from the test waveguide 15A2 in the second chip 2 to the test waveguide 25A2 in the first chip 3 through the test input unit 25A1. In addition, the ring mirror 25A3 reflects the test light input from the test waveguide 25A2 to the test waveguide 25A2, and outputs the reflected test light to the test waveguide 15A2. Subsequently, GC 15A3 outputs the reflected test light from the test waveguide 15A2 to a test monitor (not shown). The test monitor receives the reflected test light. Based on the power of the reflected light, the test monitor can reliably perform the alignment task of aligning the optical axis of the second optical waveguide 11 of the second chip 2 and the optical axis of the first optical waveguide 23 of the first chip 3.
[0069] In the optical integrated device 1C of the fourth embodiment, the GC 15A3 in the second chip 2 and the loop mirror 25A3 in the first chip 3 are optically connected by the test waveguides 15A2 and 25A2. In addition, based on the reflected light of the loop mirror 25A3 versus the power of the test light input from the GC 15A3, the optical integrated device 1C can achieve the alignment task of aligning the optical axis of the second optical waveguide 11 in the second chip 2 and the optical axis of the first optical waveguide 23 in the first chip 3. As a result, the workload of optical coupling between the second optical waveguide 11 and the first optical waveguide 23 can be reduced.
[0070] The test monitor connected to the GC 15A3 monitors the power of the reflected light, and when the power of the reflected light is at a predetermined level, it can be determined that the optical axis of the second optical waveguide 11 in the second chip 2 is aligned with the optical axis of the first optical waveguide 23 in the first chip 3. When the power of the reflected light is less than the predetermined level, the test monitor can determine that the optical axis of the second optical waveguide 11 and the optical axis of the first optical waveguide 23 are not aligned.
[0071] Since the path from GC 15A3 to the ring mirror 25A3 is independent of the path used to input light to / output light from the optical modulator 12, the impact of the test light and reflected light used by the GC 15A3 and the ring mirror 25A3 provided for the installation task on the modulator performance can be suppressed.
[0072] In the optical integrated device 1C, when the GC 15A3 and the optical fiber 5 are not aligned, it is not possible to accurately determine whether the test waveguide 15A2 in the second chip 2 and the test waveguide 25A2 in the first chip 3 are aligned. In this regard, an embodiment that solves this situation is described below as a fifth embodiment.
[0073] (e) Fifth Embodiment
[0074] Fig. 9 is a schematic plan view illustrating an example of an optical integrated device 1D of a fifth embodiment, and Fig.10 1 is a schematic cross-sectional view illustrating an example of an optical integrated device 1D. The same symbols are attached to the same configuration as that of the optical integrated device 1C in the fourth embodiment, and the description of the repeated configuration and operation is omitted. In addition to the test output unit 15A1, the test waveguide 15A2, and the GC 15A3, the second chip 2 also has a first GC 16A3, a first test waveguide 16A2, and a first loop mirror 16A1.
[0075] GC 15A3 is connected to the first optical fiber in the dual-core optical fiber array 5A, and is also connected to the test waveguide 15A2, and outputs the first test light from the first optical fiber to the test waveguide 15A2. GC 15A3 outputs the first reflected light for the first test light from the test waveguide 15A2 to the test monitor. The test output unit 15A1 of the test waveguide 15A2 is connected to the test input unit 25A1 of the first chip 3, outputs the first test light from the GC 15A3, and outputs the first reflected light for the first test light from the test input unit 25A1 to the test waveguide 15A2. Subsequently, the test monitor connected to GC 15A3 receives the first reflected light.
[0076] The first GC 16A3 is connected to the second optical fiber in the dual-core optical fiber array 5A, and is also connected to the first test waveguide 16A2, and outputs the second test light from the second optical fiber to the first test waveguide 16A2. The first GC 16A3 outputs the second reflected light for the second test light from the first test waveguide 16A2 to the test monitor. The first test waveguide 16A2 is a TF-LN optical waveguide that connects the first GC 16A3 to the first loop mirror 16A1. The first loop mirror 16A1 receives the second test light from the first test waveguide 16A2, and reflects the second test light to the first test waveguide 16A2 as the second reflected light for the second test light. Subsequently, the test monitor connected to the first GC 16A3 receives the second reflected light.
[0077] The first GC 16A3 is connected to the second optical fiber in the dual-core optical fiber array 5A, and outputs the second test light from the second optical fiber to the first test waveguide 16A2. The first ring mirror 16A1 outputs the second test light from the first test waveguide 16A2 to the first test waveguide 16A2 as the second reflected light. Subsequently, the test monitor connected to the first GC 16A3 receives the second reflected light from the first test waveguide 16A2. Based on the power of the second reflected light, the test monitor checks the alignment position between the first GC 16A3 and the second optical fiber in the second chip 2. When the power of the second reflected light is higher than a predetermined level, the test monitor determines that the GC 15A3 in the second chip 2 is aligned with the second optical fiber, that is, the second chip 2 is aligned with the dual-core optical fiber array 5A.
[0078] After determining that the second chip 2 and the dual-core fiber array 5A are aligned, the GC 15A3 outputs the first test light from the first optical fiber in the dual-core fiber array 5A to the test waveguide 15A2. The ring mirror 25A3 outputs the first reflected light from the test waveguide 15A2 for the first test light to the test waveguide 15A2. Subsequently, the test monitor connected to the GC 15A3 receives the first reflected light from the test waveguide 15A2. Based on the power of the first reflected light, the test monitor can accurately determine whether the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 are aligned.
[0079] In the optical integrated device 1D, the case where the test waveguide 25A2 connected to the single loop mirror 25A3 in the first chip 3 is connected to the test waveguide 15A2 in the second chip 2 is illustrated as an example. However, this embodiment is not limited to the case where there is a single loop mirror 25A3 in the first chip 3, and a plurality of loop mirrors may be used, which is described below as a sixth embodiment.
[0080] (f) Sixth Embodiment
[0081] Fig.11 is a schematic plan view illustrating an example of an optical integrated device 1E of the sixth embodiment, and Fig.12 1 is a schematic cross-sectional view of an example of an optical integrated device 1E. The same symbols are attached to the same configuration as that of the optical integrated device 1D in the fifth embodiment, and the description of the repeated configuration and operation is omitted. The difference between the optical integrated device 1E and the optical integrated device 1D is that a plurality of ring mirrors (for example, two ring mirrors) are located in the first chip 3.
[0082] The second chip 2 has a third GC 15B3, a third test waveguide 15B2, and a third test output unit 15B1 outside the optical modulator 12. Furthermore, the second chip 2 has a fourth GC 15C3, a fourth test waveguide 15C2, and a fourth test output unit 15C1 outside the input waveguide 11A1.
[0083] The third GC 15B3 is connected to the first optical fiber in the three-core optical fiber array 5B, and is also connected to the third test waveguide 15B2, and outputs the third test light from the first optical fiber to the third test waveguide 15B2. The third GC 15B3 outputs the third reflected light for the third test light from the third test waveguide 15B2 to the test monitor. The third test output unit 15B1 of the third test waveguide 15B2 is connected to the third test input unit 25B1 of the first chip 3, and also outputs the third test light from the third GC 15B3, and receives the third reflected light for the third test light from the third test input unit 25B1.
[0084] The fourth GC 15C3 is connected to the third optical fiber in the three-core optical fiber array 5B, and is also connected to the fourth test waveguide 15C2, and outputs the fourth test light from the third optical fiber to the fourth test waveguide 15C2. The fourth GC 15C3 outputs the fourth reflected light for the fourth test light from the fourth test waveguide 15C2 to the test monitor. The fourth test output unit 15C1 of the fourth test waveguide 15C2 is connected to the fourth test input unit 25C1 of the first chip 3, and also outputs the fourth test light from the fourth GC 15C3, and receives the fourth reflected light for the fourth test light from the fourth test input unit 25C1.
[0085] The first chip 3 includes a third test input unit 25B1, a third test waveguide 25B2, and a third loop mirror 25B3. The first chip 3 includes a fourth test input unit 25C1, a fourth test waveguide 25C2, and a fourth loop mirror 25C3.
[0086] The third test waveguide 25B2 is a Si waveguide that is located outside the first input waveguide 23B1 serving as one end of the first chip 3, and connects the third test input unit 25B1 to the third loop mirror 25B3. The third loop mirror 25B3 receives the third test light from the third test waveguide 25B2, and reflects the third test light toward the third test waveguide 25B2 as third reflected light for the third test light.
[0087] The fourth test waveguide 25C2 is a Si waveguide, which is located outside the input waveguide 23A1 serving as the other end of the first chip 3, and connects the fourth test input unit 25C1 to the fourth loop mirror 25C3. The fourth loop mirror 25C3 receives the fourth test light from the fourth test waveguide 25C2, and reflects the fourth test light toward the fourth test waveguide 25C2 as the fourth reflected light for the fourth test light.
[0088] The third GC 15B3 is connected to the first optical fiber in the three-core optical fiber array 5B, and outputs the third test light from the first optical fiber to the third test waveguide 15B2. The third ring mirror 25B3 reflects the third test light from the third test waveguide 15B2 to the third test waveguide 15B2 as the third reflected light. Subsequently, the test monitor connected to the third GC 15B3 receives the third reflected light from the third test waveguide 15B2. Based on the power of the third reflected light, the test monitor corrects the tilt of the first chip 3, and at the same time checks the alignment position between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3.
[0089] The fourth GC 15C3 is connected to the third optical fiber in the three-core optical fiber array 5B, and outputs the fourth test light from the third optical fiber to the fourth test waveguide 15C2. The fourth ring mirror 25C3 reflects the fourth test light from the fourth test waveguide 15C2 to the fourth test waveguide 15C2 as the fourth reflected light. Subsequently, the test monitor connected to the fourth GC 15C3 receives the fourth reflected light from the fourth test waveguide 15C2. Based on the power of the fourth reflected light, the test monitor corrects the tilt of the first chip 3 and checks the alignment position between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3.
[0090] The optical integrated device 1E of the sixth embodiment achieves the aligned position between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 while correcting the tilt of the first chip 3 by using two ring mirrors in the first chip 3. As a result, the aligned position between the optical modulator 12 and the PBC 24B and between the optical modulator 12 and the PR 24A can be achieved with high accuracy.
[0091] When the power of the third reflected light and the power of the fourth reflected light are both higher than a predetermined level, the test monitor can accurately determine that the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 are aligned.
[0092] For the sake of explanation, the case of using the third test waveguide 15B2 and the fourth test waveguide 15C2 to determine whether the second optical waveguide 11 and the first optical waveguide 23 are aligned using the test light of the two waveguides is illustrated as an example. However, this embodiment is not limited to two waveguides (i.e., two butt coupling points), and three or more waveguides may be used, or the test waveguides, GCs, and loop mirrors may be located at various placement points, and this may be modified as needed.
[0093] The optical waveguide is perpendicular to the second bonding surface 13A of the second chip 2 and the first bonding surface 3A of the first chip 3 at the butt-coupling point between the second chip 2 and the first chip 3. As a result, the reflected return light at the butt-coupling point may return to the optical waveguide, and the reflected return light may make the light from the light source unstable. In this regard, an embodiment that solves this situation is described below as a seventh embodiment.
[0094] (g) Seventh Embodiment
[0095] Fig.13 is a schematic plan view illustrating an example of an optical integrated device 1F of the seventh embodiment, and Fig.141 is a schematic cross-sectional view illustrating an example of an optical integrated device 1F. The same symbols are attached to the same configurations as those of the optical integrated device 1E in the sixth embodiment, and descriptions of repeated configurations and operations are omitted. The difference between the optical integrated device 1F and the optical integrated device 1E is that at the butt coupling point between the second chip 2A and the first chip 3E, the second bonding surface 13A1 of the groove 13 and the first bonding surface 3E1 of the first chip 3E are inclined relative to the optical waveguides of the second chip 2A and the first chip 3E.
[0096] The planar shape of the first chip 3E is a parallelogram. The first chip 3E has a structure in which a first bonding surface 3E1 at a butt-coupling point of the first chip 3E is inclined with respect to the first optical waveguide 23 .
[0097] The second chip 2A has a structure in which the wall surface of the groove 13 at the butt-coupling point of the second chip 2A (ie, the second bonding surface 13A1 ) is inclined with respect to the second optical waveguide 11 .
[0098] The second joint surface 13A1 and the first joint surface 3E1 are in oblique contact with the optical waveguide at a butt coupling point where the input waveguide 23A of the first chip 3E is connected to the input waveguide 11A1 of the second chip 2A.
[0099] The second joint surface 13A1 and the first joint surface 3E1 are in oblique contact with the optical waveguide at a butt coupling point where the first input waveguide 23B1 of the first chip 3E is connected to the first output waveguide 11C1 of the second chip 2A.
[0100] The second joint surface 13A1 and the first joint surface 3E1 are in oblique contact with the optical waveguide at a butt-coupling point where the second input waveguide 23B2 of the first chip 3E is connected to the second output waveguide 11C2 of the second chip 2A.
[0101] The second joint surface 13A1 and the first joint surface 3E1 are in oblique contact with the optical waveguide at a butt-coupling point where the third test waveguide 25B2 of the first chip 3E is connected to the third test waveguide 15B2 of the second chip 2A.
[0102] The second joint surface 13A1 and the first joint surface 3E1 are in oblique contact with the optical waveguide at a butt-coupling point where the fourth test waveguide 25C2 of the first chip 3E is connected to the fourth test waveguide 15C2 of the second chip 2A.
[0103] In the optical integrated device 1F of the seventh embodiment, at the butt-coupling point between the second chip 2A and the first chip 3E, the second joint surface 13A1 and the first joint surface 3E1 are inclined relative to the optical waveguide of the second chip 2A and the optical waveguide of the first chip 3E. As a result, the reflected return light at the butt-coupling point can be suppressed.
[0104] However, in the optical integrated device 1F of the seventh embodiment, since the planar shape of the first chip 3E is a parallelogram, the number of chips to be obtained may be reduced when the first chip 3E is cut from the silicon wafer. In this regard, an embodiment that solves this situation will be described below as an eighth embodiment.
[0105] (h) Eighth Embodiment
[0106] Fig.15 is a schematic plan view illustrating an example of an optical integrated device 1G of an eighth embodiment, and Fig.16 1 is a schematic cross-sectional view illustrating an example of an optical integrated device 1G. The same symbols are attached to the same configurations as those of the optical integrated device 1E in the sixth embodiment, and descriptions of repeated configurations and operations are omitted. The difference between the optical integrated device 1G and the optical integrated device 1E is that at the butt-coupling point between the second chip 2B and the first chip 3B, the waveguide is positioned obliquely relative to the second bonding surface 13A of the second chip 2B and the first bonding surface 3B1 of the first chip 3B.
[0107] The waveguide near the first output unit 22A of the input waveguide 23A of the first chip 3B is set to the inclined waveguide 23A11. The waveguide near the input unit 14 of the input waveguide 11A1 of the second chip 2B is set to the inclined waveguide 11A11. Then, the input waveguide 23A is optically connected to the input waveguide 11A1 through optical coupling of the inclined waveguides 23A11 and 11A11 via butt coupling.
[0108] The waveguide near the second input unit 21B of the first input waveguide 23B1 of the first chip 3B is set to the inclined waveguide 23B11. The waveguide near the first output unit 15A of the first output waveguide 11C1 of the second chip 2B is set to the inclined waveguide 11C11. The first output waveguide 11C1 is optically connected to the first input waveguide 23B1 through optical coupling of the inclined waveguides 23B11 and 11C11 via butt coupling.
[0109] The waveguide near the third input unit 21C of the second input waveguide 23B2 of the first chip 3B is set to the inclined waveguide 23B21. The waveguide near the second output unit 15B of the second output waveguide 11C2 of the second chip 2B is set to the inclined waveguide 11C21. The second output waveguide 11C2 is optically connected to the second input waveguide 23B2 through the optical coupling of the inclined waveguides 23B21 and 11C21 via butt coupling.
[0110] The waveguide near the third test input unit 25B1 of the third test waveguide 25B2 of the first chip 3B is set to the inclined waveguide 25B21. The waveguide near the third test output unit 15B1 of the third test waveguide 15B2 of the second chip 2B is set to the inclined waveguide 15B21. The third test waveguide 15B2 is optically connected to the third test waveguide 25B2 through the optical coupling of the inclined waveguides 25B21 and 15B21 via butt coupling.
[0111] The waveguide near the fourth test input unit 25C1 of the fourth test waveguide 25C2 of the first chip 3B is set to the inclined waveguide 25C21. The waveguide near the fourth test output unit 15C1 of the fourth test waveguide 15C2 of the second chip 2B is set to the inclined waveguide 15C21. The fourth test waveguide 15C2 is optically connected to the fourth test waveguide 25C2 through the optical coupling of the inclined waveguides 25C21 and 15C21 via butt coupling.
[0112] In the optical integrated device 1G of the eighth embodiment, the inclined waveguide at the butt-coupling point between the second chip 2B and the first chip 3B is optically coupled by butt-coupling, so that the reflected return light at the butt-coupling point can be suppressed. In addition, since the planar shape of the first chip 3B is a rectangle, when the first chip 3B is cut from the silicon wafer, the number of chips to be obtained can be increased compared with the number of the first chips 3E in the seventh embodiment.
[0113] The optical integrated device 1G that suppresses reflected return light at the butt coupling point is not limited to the structure of the eighth embodiment, and another embodiment is described below as a ninth embodiment.
[0114] (i) Ninth Embodiment
[0115] Fig.17 is a schematic plan view illustrating an example of an optical integrated device 1H of a ninth embodiment, and Fig.18 1 is a schematic cross-sectional view illustrating an example of an optical integrated device 1H. The same symbols are attached to the same configurations as those of the optical integrated device 1E in the sixth embodiment, and descriptions of repeated configurations and operations are omitted. The difference between the optical integrated device 1H and the optical integrated device 1E is that at the butt coupling point between the second chip 2A and the first chip 3C, the second bonding surface 13A1 of the second chip 2A and the first bonding surface 3C1 of the first chip 3C are inclined relative to the optical waveguides of the second chip 2A and the first chip 3C.
[0116] The second chip 2A has a structure in which a second bonding surface 13A1 (ie, a chip end face) of the groove 13 at a butt-coupling point of the second chip 2A is inclined with respect to the second optical waveguide 11 .
[0117] The planar shape of the first chip 3C remains rectangular, but the first optical waveguide 23, the PR 24A, and the PBC 24B are Fig.11 The first optical waveguide 23 is positioned tilted compared to the first optical waveguide 23 , PR and PBC, and the first bonding surface 3C1 at the butt-coupling point of the first chip 3C is tilted relative to the first optical waveguide 23 .
[0118] The second joint surface 13A1 and the first joint surface 3C1 at the butt-coupling point where the input waveguide 23A of the first chip 3C is connected to the input waveguide 11A1 of the second chip 2A are in oblique contact with the waveguide.
[0119] The second joint surface 13A1 and the first joint surface 3C1 at the butt-coupling point where the first input waveguide 23B1 of the first chip 3C is connected to the first output waveguide 11C1 of the second chip 2A are in oblique contact with the waveguide.
[0120] The second joint surface 13A1 and the first joint surface 3C1 at the butt-coupling point where the second input waveguide 23B2 of the first chip 3C is connected to the second output waveguide 11C2 of the second chip 2A are in oblique contact with the waveguide.
[0121] The second joint surface 13A1 and the first joint surface 3C1 at the butt-coupling point where the third test waveguide 25B2 of the first chip 3C is connected to the third test waveguide 15B2 of the second chip 2A are in oblique contact with the waveguide.
[0122] The second joint surface 13A1 and the first joint surface 3C1 at the butt-coupling point where the fourth test waveguide 25C2 of the first chip 3C is connected to the fourth test waveguide 15C2 of the second chip 2A are in oblique contact with the waveguide.
[0123] In the optical integrated device 1H of the ninth embodiment, the second joint surface 13A1 and the first joint surface 3C1 are inclined relative to the waveguide of the second chip 2A and the waveguide of the first chip 3C at the butt coupling point between the second chip 2A and the first chip 3C. As a result, the reflected return light at the butt coupling point can be suppressed.
[0124] Next, as a tenth embodiment, a form in which an optical fiber array 4 is connected to the first chip 3C in the optical integrated device 1H of the ninth embodiment will be described.
[0125] (j) Tenth Embodiment
[0126] Fig.19 is a schematic plan view illustrating an example of an optical integrated device 1J of a tenth embodiment, and Fig. 201J is a schematic cross-sectional view illustrating an example of an optical integrated device 1J. The same symbols are attached to the same configurations as those in the ninth embodiment, and descriptions of repeated configurations and operations are omitted. Fig.19 The illustrated optical integrated device 1J has a configuration in which the first chip 3C in the optical integrated device 1H of the ninth embodiment is connected to the optical fiber array 4 using an optical adhesive A1 for alignment.
[0127] The first chip 3C is in contact with the fourth joint surface 4X of the optical fiber array 4 at the third joint surface 3C2 serving as a chip end face facing the first joint surface 3C1 adjacent to the second chip 2A.
[0128] In the optical fiber array 4, the fourth bonding surface 4X adjacent to the third bonding surface 3C2 of the first chip 3C is inclined relative to the axial direction of the optical fiber array 4 so that the input side optical fiber 4A1 and the output side optical fiber 4B1 are tilted relative to the fourth bonding surface 4X of the optical fiber array 4.
[0129] The first chip 3C is aligned with the second chip 2A and fixed with an optical adhesive A. The input waveguide 23A of the third joint surface 3C2 of the first chip 3C is optically connected to the input side optical fiber 4A1 of the optical fiber array 4, and the output waveguide 23C of the third joint surface 3C2 is optically connected to the output side optical fiber 4B1 of the optical fiber array 4. Subsequently, the fourth joint surface 4X of the optical fiber array 4 and the third joint surface 3C2 of the first chip 3C are joined with the adhesive A1. The optical integrated device 1J can be aligned with the optical fiber array 4.
[0130] In the optical integrated device 1J of the tenth embodiment, the case of the alignment position between the first chip 3C and the optical fiber array 4 is illustrated as an example. However, depending on the position of the driver of the optical modulator 12 and the shape of the package, the optical fiber array 4 can be located at any angular position of the first chip 3C, and this can be modified as needed. In this regard, this embodiment is described below as the eleventh embodiment.
[0131] (k) Eleventh Embodiment
[0132] Fig.21 is a schematic plan view illustrating an example of an optical integrated device 1K according to an eleventh embodiment, and Fig. 22 1K is a schematic cross-sectional view illustrating an example of an optical integrated device 1K. The same symbols are attached to the same configurations as those in the ninth embodiment, and descriptions of repeated configurations and operations are omitted. Fig.21The illustrated optical integrated device 1K has a configuration in which the optical fiber array 4 is connected with the optical adhesive A3 at an angular position of 90° with respect to the axial direction of the first chip 3D in the optical integrated device 1H of the ninth embodiment.
[0133] The first chip 3D has a fifth bonding surface 3D2 that is bonded to the optical fiber array 4 at an angle of 90° to the axial direction of the first chip 3D (e.g., a chip side that is orthogonal to the first bonding surface 3D1 bonded to the second chip 2B). The first chip 3D has an output waveguide 23C1 and an input waveguide 23A1. The input waveguide 23A1 is a curved waveguide that is bent from the fifth bonding surface 3D2 toward the first bonding surface 3D1. The output waveguide 23C1 is a curved waveguide that is bent from the fifth bonding surface 3D2 toward the PBC 24B.
[0134] In the optical fiber array 4, the fourth bonding surface 4X bonded to the fifth bonding surface 3D2 of the first chip 3D is inclined relative to the axial direction of the optical fiber array 4. The input side optical fiber 4A2 and the output side optical fiber 4B2 are positioned obliquely relative to the fourth bonding surface 4X of the optical fiber array 4.
[0135] The first chip 3D is aligned with the second chip 2B and fixed with an optical adhesive A. The input waveguide 23A1 of the fifth bonding surface 3D2 of the first chip 3D is optically connected to the input side optical fiber 4A2 of the optical fiber array 4, and the output waveguide 23C1 of the fifth bonding surface 3D2 is optically connected to the output side optical fiber 4B2 of the optical fiber array 4. The fourth bonding surface 4X of the optical fiber array 4 is bonded to the fifth bonding surface 3D2 of the first chip 3D with an adhesive A3. In the optical integrated device 1K, the optical fiber array 4 can be located at an angular position of 90° with respect to the axial direction of the optical integrated device 1K.
[0136] In the optical integrated device 1K of the eleventh embodiment, the optical fiber array 4 is located at an angular position of 90° with respect to the axial direction of the optical integrated device 1K, which can contribute to miniaturization of the package.
[0137] Waveguides such as the second optical waveguide 11 and the first optical waveguide 23 may be, for example, rib waveguides, ridge waveguides, rectangular waveguides, or high mesh waveguides. Rib waveguides are preferred because they are also less sensitive to sidewall roughness in the core when light passes through the plate portion, resulting in low-loss propagation. Rectangular waveguides are preferred because they have strong light confinement, which reduces losses even when the bending radius R is small. The waveguide may be a low-loss curved waveguide, which may be modified as needed.
[0138] The first optical waveguide 23 may be a GaAs waveguide, PLC, or InP waveguide having both a cladding and a core made of SiO2. The core may be a Si waveguide having a core made of Si, a lower cladding made of SiO2, and an upper cladding made of SiO2, air, or SiN. When the waveguide is a Si waveguide, it is preferred because light confinement is strong due to a large relative refractive index difference, thereby enabling a low-loss curved waveguide with a small bending radius R, that is, miniaturization of the optical device.
[0139] Next, an optical transceiver 50 using the optical integrated device 1 in this example will be described. Fig.23 1 is an explanatory diagram illustrating an example of an optical transceiver 50 employing the optical integrated device 1 . Fig.23 The illustrated optical transceiver 50 has an optical transmitter / receiver 51 and a digital signal processor (DSP) 52. The optical transmitter / receiver 51 has an optical modulator element 54, a driver circuit 55, an optical receiver element 56, and a transimpedance amplifier (TIA) 57. The DSP 52 controls the entire optical transmitter / receiver 51. The DSP 52 is an electronic component that performs digital signal processing that performs IQ modulation processing of a transmission signal and demodulation processing of a reception signal.
[0140] For example, the DSP 52 performs processing such as encoding of transmission data, generates an electrical signal including the transmission data, and outputs the generated electrical signal to the driver circuit 55. The driver circuit 55 drives the optical modulator element 54 in response to the electrical signal from the DSP 52. The optical modulator element 54 incorporates the optical integrated device 1 including an optical modulator that optically modulates signal light.
[0141] The optical receiver element 56 converts the signal light into an electric signal. The TIA 57 amplifies the electric signal after the electric conversion, and outputs the amplified electric signal to the DSP 52. The DSP 52 obtains reception data by performing processing such as decoding on the electric signal acquired from the TIA 57.
[0142] For ease of explanation, the case where the optical transceiver 50 incorporates a communication element 53 including an optical modulator element 54 and an optical receiver element 56 is illustrated as an example; however, the optical transceiver 50 may also be an optical transmission device incorporating only the optical modulator element 54, and this may be modified as needed.
[0143] The various components of the various units illustrated in the drawings do not necessarily have to be physically configured as illustrated in the drawings. That is, the specific forms of dispersion and integration of the various units are not limited to those illustrated in the drawings, but can be configured by functionally or physically dispersing and integrating all or part of them in any unit according to various loads and usage conditions.
[0144] In addition, all or any of the various processing functions performed by the various devices may be performed on a central processing unit (CPU) (or a microcomputer such as a microprocessing unit (MPU) and a microcontroller unit (MCU)). It goes without saying that all or any of the various processing functions may be performed on a computer program analyzed and executed by the CPU (or a microcomputer such as an MPU or an MCU) or on hardware using wired logic.
[0145] According to one aspect, the amount of work required for mounting can be reduced in a chip including an optical waveguide having an electro-optical effect.
Claims
1. An optical integrated device, comprising: a first chip, the first chip comprising an optical circuit; and a second chip, the second chip comprising an optical waveguide, the optical waveguide comprising a material having an electro-optical effect greater than that of a material of the first chip, wherein The first chip is mounted in a groove formed on the second chip, and the first chip is optically coupled to the second chip through butt coupling.
2. The optical integrated device according to claim 1, wherein: The second chip comprises: an optical modulator connected to the optical waveguide, and The optical circuit comprises: a polarization rotator that rotates polarization of signal light from the optical modulator; and A polarization multiplexer polarization-multiplexes the signal light from the optical modulator and the signal light after the polarization rotation is performed by the polarization rotator.
3. The optical integrated device according to claim 1, wherein: The second chip comprises: a second engagement surface; and a second optical waveguide, the second optical waveguide being positioned obliquely relative to the second engagement surface, The first chip comprises: a first engaging surface, the first engaging surface being in contact with the second engaging surface; and A first optical waveguide is positioned obliquely with respect to the first joining surface and is connected to the second optical waveguide.
4. The optical integrated device according to claim 1, wherein: The second chip comprises: a second optical waveguide; and a second bonding surface of the groove, the second bonding surface of the groove being inclined relative to the second optical waveguide, The first chip comprises: a first optical waveguide connected to the second optical waveguide; and A first bonding surface is provided, the first bonding surface is inclined with respect to the first optical waveguide and is in contact with the second bonding surface.
5. The optical integrated device according to claim 1, wherein: The second chip comprises: a second optical waveguide; and a second inclined waveguide, the second inclined waveguide being inclined relative to the second optical waveguide and connected to the second optical waveguide, The first chip comprises: a first optical waveguide; and A first tilted waveguide is tilted relative to the first optical waveguide and connected to the second tilted waveguide.
6. The optical integrated device according to claim 1, wherein: The first chip is mounted face down on the groove formed on the second chip.
7. The optical integrated device according to claim 1, wherein: The second chip includes a thin film LN LiNbO3 crystalline material.
8. The optical integrated device according to claim 1, wherein: The second optical waveguide in the second chip comprises: a second input waveguide connected to the first chip; a folded waveguide folded back between the second input waveguide and the optical modulator to connect the second input waveguide and the optical modulator; and A second output waveguide is connected to the optical modulator and to the first chip.
9. The optical integrated device according to claim 8, wherein: The optical integrated device has a structure in which a diameter of the folded waveguide is larger than a spacing between the second input waveguide and the second output waveguide at a joining portion where the first chip and the second chip are butt-coupled to each other.
10. The optical integrated device according to claim 8, wherein: The first optical waveguide in the first chip comprises: a first input waveguide, the first input waveguide connecting the input-side optical fiber and the second input waveguide; and a first output waveguide, the first output waveguide connecting the output-side optical fiber and the second output waveguide, and The optical integrated device has a structure in which a distance between the second input waveguide and the second output waveguide at a joint portion where the first chip and the second chip are butt-coupled to each other is smaller than a distance between the first input waveguide and the first output waveguide on a joint surface between the input-side optical fiber and the output-side optical fiber.
11. The optical integrated device according to claim 8, wherein: The first chip comprises: Reflector, The second chip comprises: a third optical waveguide connected to the reflector; and a coupler connected to the third optical waveguide, and When the test light is input from the coupler to the third optical waveguide, the reflector reflects reflected light with respect to the input test light to the coupler.
12. The optical integrated device according to claim 11, wherein: The second chip comprises: a fourth optical waveguide; a first coupler connected to the fourth optical waveguide; and a first reflector connected to the fourth optical waveguide, and When test light is input from the first coupler to the fourth optical waveguide, the first reflector reflects reflected light with respect to the input test light to the first coupler.
13. An optical transmission device, comprising an optical modulator element that modulates light by using an electrical signal and sends transmission light, wherein: The optical modulator element includes an optical integrated device, which includes: a first chip, the first chip includes an optical circuit; and a second chip, the second chip includes an optical waveguide, the optical waveguide includes a material with an electro-optical effect greater than the electro-optical effect of the material of the first chip, the first chip is mounted in a groove formed on the second chip, and the first chip is optically coupled to the second chip by butt coupling.
14. An optical transceiver comprising an optical modulator element that optically modulates light by using transmission light and transmits the transmission light; and an optical receiver element that receives a reception signal from the received light by using light, wherein The optical modulator element includes an optical integrated device, which includes: a first chip, the first chip includes an optical circuit; and a second chip, the second chip includes an optical waveguide, the optical waveguide includes a material with an electro-optical effect greater than the electro-optical effect of the material of the first chip, the first chip is mounted in a groove formed on the second chip, and the first chip is optically coupled to the second chip by butt coupling.
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