Display panel, manufacturing method of display panel, and display device

Abstract

The application discloses a display panel, a manufacturing method of the display panel and a display device, and generally relates to the technical field of display equipment. The display panel comprises a plurality of light emitting units and a circuit unit corresponding to each light emitting unit; the circuit unit comprises a plurality of sub-circuits; each sub-circuit comprises a positive voltage input end, a negative voltage input end and a data signal input end; each sub-circuit writes the working voltage of the pixel to the working voltage output end of the sub-circuit in response to the data signal input by the respective signal input end; and the working voltage output ends of the plurality of sub-circuits are connected in parallel to form a working voltage writing end of the circuit unit, so as to synchronously write the working voltage to the pixels corresponding to the plurality of sub-circuits through the plurality of sub-circuits. The pixel circuit can reach the microampere-level current required by the low-pixel-density unit display panel without changing the nanoampere-level input current of the pixel current.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to the technical field of display device, and in particular, to a display panel, a manufacturing method of the display panel, and a display device. BACKGROUND

[0002] With the continuous development of display technology, the demand for display panel clarity and color performance is also changing.

[0003] There may be differences in size and pixel density units between different display panels. In the related art, for a display panel with a high pixel density unit, a pixel circuit can achieve the required display brightness by a current of nanampere (nA) level; for a display panel with a low pixel density unit, a pixel circuit needs a current of microampere (uA) level to achieve the required display brightness.

[0004] However, based on the existing pixel circuit in the related art, in the case of needing to achieve the display brightness required by the display panel with a low pixel density unit by a current of microampere level, the current supply needs to be greatly changed and improved, and the power consumption of the display panel will also be greatly increased. SUMMARY

[0005] In view of the problem that the existing pixel circuit in the related art needs to greatly change and improve the current supply in the case of needing to achieve the display brightness required by the display panel with a low pixel density unit by a current of microampere level, and thus greatly increases the power consumption of the display panel, the pixel circuit can achieve a current of microampere level required by the display panel with a low pixel density unit without changing the input current of the pixel current of nanampere level.

[0006] In a first aspect, a display panel is provided, the display panel comprising a plurality of light emitting units and a circuit unit corresponding to each light emitting unit;

[0007] The circuit unit comprises a plurality of sub-circuits, each sub-circuit comprising a positive voltage input end, a negative voltage input end, and a data signal input end, and each sub-circuit writes a working voltage of the pixel to a working voltage output end of the sub-circuit in response to a data signal input to the respective signal input end;

[0008] The working voltage output ends of the plurality of sub-circuits are connected in parallel to form a working voltage writing end of the circuit unit, so as to synchronously write working voltages to the pixels corresponding to the plurality of sub-circuits through the plurality of sub-circuits.

[0009] In the present application, the display panel includes a plurality of light emitting units and a circuit unit corresponding to each of the plurality of light emitting units; the circuit unit includes a plurality of sub-circuits, each of the sub-circuits includes a positive voltage input segment, a negative voltage input segment and a data signal input segment, and the sub-circuit writes the working voltage of the pixel to the working voltage output end of the sub-circuit in response to the data signal input by the respective signal input segment; wherein the working voltage output ends of the plurality of sub-circuits are connected in parallel to form the working voltage writing end of the circuit unit, so as to synchronously write the working voltage to the pixels corresponding to the plurality of sub-circuits through the plurality of sub-circuits. In this way, by connecting the plurality of sub-circuits in parallel to form the circuit unit, the current of the circuit unit is increased by several times, so that the voltage of the circuit unit corresponding to the plurality of sub-circuits is unchanged and the current is increased without changing the writing current and voltage of the single sub-circuit, and the pixel circuit of the display panel can be applied to the display panel requiring large current.

[0010] In a second aspect, a manufacturing method of a display panel is provided, the display panel includes a plurality of light emitting units and a circuit unit corresponding to each of the plurality of light emitting units, the circuit unit includes a plurality of sub-circuits, each of the sub-circuits includes a positive voltage input segment, a negative voltage input segment and a data signal input segment, and the sub-circuit writes the working voltage of the pixel to the working voltage output end of the sub-circuit in response to the data signal input by the respective signal input segment, and the method includes:

[0011] etching, by a first mask, a first film layer corresponding to the positive voltage input segments of the plurality of sub-circuits in the display panel, so that the positive voltage input segments of the plurality of sub-circuits are connected in parallel;

[0012] etching, by a second mask, a second film layer corresponding to the negative voltage input segments of the plurality of sub-circuits in the display panel and covering the third film layer on a side of the second film layer away from the substrate, so that the negative voltage input segments of the plurality of sub-circuits are connected in parallel;

[0013] connecting, in parallel, the working voltage output ends of the plurality of sub-circuits to form the working voltage writing end of the circuit unit, so as to synchronously write the working voltage to the pixels corresponding to the plurality of sub-circuits through the plurality of sub-circuits;

[0014] insulating between the positive voltage input segments of the plurality of sub-circuits and the negative voltage input segments of the plurality of sub-circuits.

[0015] In a third aspect, a display device is provided, including the display panel of the first aspect.

[0016] Additional aspects and advantages of the present application will be made apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0017] Other features, objects, and advantages of the application will become more apparent from the following detailed description when read in conjunction with the accompanying drawings:

[0018] Figure 1 A schematic diagram of a display panel according to an embodiment of the application;

[0019] Figure 2 A schematic diagram of a display panel according to an embodiment of the application;

[0020] Figure 3 A schematic diagram of a display panel according to an embodiment of the application;

[0021] Figure 4 A schematic diagram of a display panel according to an embodiment of the application;

[0022] Figure 5 A schematic diagram of a display panel according to an embodiment of the application;

[0023] Figure 6 A schematic diagram of a display panel according to an embodiment of the application;

[0024] Figure 7 A schematic diagram of a display panel according to an embodiment of the application;

[0025] Figure 8 A schematic diagram of a display panel according to an embodiment of the application;

[0026] Figure 9 A schematic diagram of a display panel according to an embodiment of the application;

[0027] Figure 10 A schematic diagram of a display panel according to an embodiment of the application;

[0028] Figure 11 A schematic diagram of a display panel according to an embodiment of the application;

[0029] Figure 12 A schematic diagram of a display panel according to an embodiment of the application;

[0030] Figure 13 A schematic diagram of a display panel according to an embodiment of the application;

[0031] Figure 14 A schematic diagram of a display panel according to an embodiment of the application;

[0032] Figure 15 A schematic diagram of a display panel according to an embodiment of the application;

[0033] Figure 16A structural schematic diagram of a computer device provided by an embodiment of the present application is shown in the following. DETAILED DESCRIPTION

[0034] The present application will be further described below in conjunction with the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the related application, and not to limit the application. In addition, it should be noted that only the parts related to the application are shown in the drawings for ease of description.

[0035] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict. The use scenarios of the embodiments of the present application will be described as follows.

[0036] With the continuous development of display panels, the forms of display panels are continuously enriched. For example, for commonly used handheld terminals and commonly used electronic devices, the commonly used display panel is a high pixel density unit (Pixels Per Inch, PPI) display panel (PPI, i.e. the number of pixels per inch, is an important indicator for measuring the sharpness of the screen, the higher the PPI value, the more delicate the image displayed on the screen, and the better the visual effect). The pixel circuit of the high PPI product often uses a nanoampere (nA) level current, which can determine the display brightness of the display panel. By supplying power to the pixel circuit of the display panel through the nanoampere level current, the display brightness required by the high PPI product can be achieved. At the same time, since the high PPI product is usually used in a small size display panel (for example, the display panel of a handheld terminal), therefore, the positive voltage input line (VDD input line) and the data voltage line of the pixel circuit of the high PPI product are arranged in the display area (i.e. AA area), and the negative voltage input line (VSS input line) is arranged in the non-display area (i.e. non-AA area).

[0037] In the case of a low pixel density unit (Pixels Per Inch, PPI) display panel, supplying power to the pixel circuit of the display panel by the nanoampere level current cannot meet the power consumption demand of the pixel circuit of the low PPI display panel, and it needs microampere (uA) level current to drive the pixel circuit of the low PPI display panel. That is, compared with the previous nanoampere level current, the current input to the pixel circuit of each pixel needs to be increased by several hundred to several thousand times, so that the energy consumption of the low PPI display panel is greatly increased.

[0038] Based on this, the display panel, the manufacturing method of the display panel and the display device are provided, which can solve the problem that the existing pixel circuit needs to change and improve the current supply greatly and further increase the energy consumption of the display panel in the case of needing to reach the display brightness required by the display panel with low pixel density unit through microampere level current, and can make the pixel circuit reach the microampere level current required by the display panel with low pixel density unit without changing the nanoampere level input current of the pixel current.

[0039] Figure 1 The block schematic diagram of the display panel of an embodiment of the present application is shown in FIG. 1. Figure 1 The display panel includes a plurality of light emitting units and a circuit unit corresponding to each light emitting unit.

[0040] In the embodiment of the present application, each light emitting unit in the plurality of light emitting units in the display panel can be a light emitting structure in a pixel of the display panel, so that the pixel is lit according to a preset brightness and color (for example, red, green or blue).

[0041] It can be understood that for the display panel, the pixel circuit of the display panel can provide a working voltage for the light emitting unit in the pixel to make the light emitting unit emit light. In an example, the light emitting unit can be a light emitting unit in a red pixel or a light emitting unit in a green pixel or a light emitting unit in a blue pixel, which is not limited in the embodiment of the present application.

[0042] In the embodiment of the present application, the circuit unit includes a plurality of sub-circuits, and the sub-circuit includes a positive voltage input end, a negative voltage input end and a data signal input end. The sub-circuit writes the working voltage of the pixel to the working voltage output end of the sub-circuit in response to the data signal input by the respective signal input end.

[0043] For example, the sub-circuit can be a pixel circuit, such as a 9T1C pixel circuit, a 7T1C circuit, etc. As shown in FIG. 2, Figure 2 Figure 2 It can be a circuit diagram of a single sub-circuit, which is a 9T1C circuit.

[0044] Further, as shown in FIG. 3, Figure 2 The positive voltage input end can be a VDD input end, the negative voltage input end can be a VSS input end, and the data signal input end can be a DATA signal input end.

[0045] For example, when the voltage difference between the positive voltage input end and the negative voltage input end reaches a set voltage difference threshold, the sub-circuit is triggered and started, and then the working voltage of the pixel corresponding to the sub-circuit is input by the data signal input end. ​

[0046] In the embodiment of the present application, the working voltage output ends of the plurality of sub-circuits are connected in parallel to form the working voltage write-in ends of the circuit units, so as to synchronously write working voltage into the corresponding pixels of the plurality of sub-circuits through the plurality of sub-circuits.

[0047] It can be understood that, in the embodiment of the present application, in order to greatly improve the current without changing the input current, the plurality of sub-circuits are connected in parallel to achieve this effect. Based on this, the plurality of sub-circuits are connected in parallel to form circuit units, each of which is connected with a light-emitting unit to provide voltage for the light-emitting unit to emit light, so that the pixel emits light according to the preset brightness and color.

[0048] For example, the sub-circuit can be a single pixel circuit, and a plurality of pixel circuits are connected in parallel to form a pixel unit. Figure 1 As shown in Figure 1 That is, a plurality of 9T1C circuits, that is, a plurality of pixel circuits, are connected in parallel to form a circuit unit.

[0049] It can be understood that, in the embodiment of the present application, the working voltage output ends of the plurality of sub-circuits are connected in parallel to form the working voltage write-in ends of the circuit units, so as to synchronously write working voltage into the corresponding pixels of the plurality of sub-circuits through the plurality of sub-circuits. Figure 1 and Figure 2 It can be seen that the present application does not change the circuit structure of the single sub-circuit itself, but only changes the way of inputting voltage from the working voltage output end of the sub-circuit to the light-emitting unit, that is, connecting the working voltages of the plurality of sub-circuits in parallel, so that the working currents are superimposed, and finally the current of each circuit unit, that is, the current of the light-emitting unit, is superimposed.

[0050] For example, for the circuit unit in the present application, the current needs to be improved, and the voltage of each port should remain unchanged. Based on this, the working voltage output ends are connected in parallel, which means that the positive voltage input ends between the plurality of sub-circuits, the negative voltage input ends between the plurality of sub-circuits and the data signal input ends between the plurality of sub-circuits are connected in parallel. Thus, the voltage of the working voltage output end remains unchanged, and the current increases.

[0051] For example, the circuit unit corresponding to the plurality of sub-circuits includes a light-emitting unit, so that the plurality of sub-circuits synchronously write working voltage into the corresponding pixels, light up the light-emitting unit, that is, make the pixel emit light.

[0052] It can be seen that, for the light-emitting unit, the positive voltage input end and the negative voltage input end between the circuit unit are electrically connected, so as to drive the light-emitting unit according to the voltage drop between the positive voltage input end and the negative voltage input end. Therefore, the electrical connection points of the light-emitting unit in the circuit unit need to be connected in parallel, and the voltage drop at the electrical connection point can trigger the driving of the light-emitting unit. The working voltage output end includes the electrical connection point.

[0053] For example,Figure 3 As shown in Figure 3 In the embodiment, the light emitting unit OLED is arranged at the electrical connection point 32 between the positive voltage input end and the negative voltage input end of the circuit unit composed of the 9 sub-circuits (working voltage output end), that is Figure 3 In the embodiment, the N4 points of each of the 9 sub-circuits are connected in parallel.

[0054] The display panel provided in the present application includes a plurality of light emitting units and a plurality of circuit units corresponding to the light emitting units, each of the circuit units includes a plurality of sub-circuits, each of the sub-circuits includes a positive voltage input segment, a negative voltage input segment and a data signal input segment, the sub-circuit writes the working voltage of the pixel to the working voltage output end of the sub-circuit in response to the data signal input by the signal input segment, and the working voltage output ends of the plurality of sub-circuits are connected in parallel to form the working voltage writing end of the circuit unit, so as to synchronously write the working voltage to the pixels corresponding to the plurality of sub-circuits through the plurality of sub-circuits. In this way, the plurality of sub-circuits are connected in parallel to form the circuit unit, and the current of the circuit unit is increased several times, so that the voltage of the circuit unit corresponding to the plurality of sub-circuits is unchanged, and the current is increased, so that the pixel circuit of the display panel can be applied to the display panel requiring large current.

[0055] Optionally, in the embodiment of the present application, the positive voltage input ends of the sub-circuits in the same circuit unit are connected in parallel to form the positive voltage input end of the circuit unit, the negative voltage input ends of the sub-circuits in the same circuit unit are connected in parallel to form the negative voltage input end of the circuit unit, and the data signal input ends of the sub-circuits in the same circuit unit are connected in parallel to form the data signal input of the circuit unit.

[0056] For example, as described above, the circuit unit includes a plurality of sub-circuits, each of the sub-circuits includes its own positive voltage input end, negative voltage input end and data signal input end, the positive voltage input ends, the negative voltage input ends and the data signal input ends of the plurality of sub-circuits are connected in parallel, so as to form the negative voltage input end of the circuit unit, the positive voltage input end of the circuit unit and the data signal input end of the circuit unit, and the voltage difference between the positive voltage and the negative voltage in the circuit unit is unchanged, the working voltage of the data signal input end is unchanged, and the current is the product of the current of each sub-circuit in the circuit unit and the number of the plurality of sub-circuits in the circuit unit.

[0057] Optionally, in the embodiment of the present application, the positive voltage input ends of adjacent circuit units are connected in parallel, the negative voltage input ends of adjacent circuit units are connected in parallel, and the data signal input ends of adjacent circuit units are connected in parallel.

[0058] It can be understood that, in the embodiment of the present application, the voltage input ends of the sub-circuits in each circuit unit are connected in parallel (including the positive voltage input end, the negative voltage input end and the data signal input end of each sub-circuit), on this basis, in order to further improve the current, the positive voltage input ends of adjacent circuit units can be connected in parallel, the negative voltage input ends of adjacent circuit units can be connected in parallel, and the data signal input ends of adjacent circuit units can be connected in parallel, then for the entire display panel, the voltage difference between the positive voltage and the negative voltage in each circuit unit is unchanged, and the working voltage of the data signal input end in each circuit unit is unchanged, and the current is superimposed as the product of the current of each circuit unit in the plurality of circuit units in the display panel and the number of the plurality of circuit units.

[0059] In this way, by connecting in parallel between adjacent circuit units, the circuit units in the display panel are connected in parallel with each other, forming a voltage that is unchanged and a current that is further superimposed, without changing the specific circuit structure of each sub-circuit, the current of the display panel is further greatly improved.

[0060] Optionally, in the embodiment of the present application, the working voltage writing end of the circuit unit is electrically connected to the light emitting unit corresponding to the circuit unit, and the light emitting unit is electrically connected between the positive voltage input end and the negative voltage input end of the circuit unit.

[0061] When the voltage difference between the positive voltage input end and the negative voltage input end of the circuit unit satisfies a preset threshold, the light emitting unit is in a conductive state, the data signal input end of the circuit unit receives a data signal, and the working voltage writing end of the circuit unit writes a working voltage to the pixel corresponding to the circuit unit, so as to light up the light emitting unit.

[0062] It can be understood that, as known from the foregoing, each circuit unit includes a plurality of sub-circuits, and each circuit unit includes a light emitting unit, so that each light emitting unit is lit by the working voltage generated by the common operation of the plurality of sub-circuits.

[0063] Further, in an example, the light emitting unit can be a component with unidirectional conduction performance, so that it can be turned on by the voltage difference between the positive voltage input end and the negative voltage input end of the circuit unit satisfying a preset threshold, and according to the connection with the data signal input end, the working voltage signal is received to light up the light emitting unit.

[0064] Optionally, in the embodiment of the present application, each circuit unit includes a closed first metal frame for transmitting a positive voltage signal and a closed second metal frame for transmitting a negative voltage signal, the positive projection range of the plurality of sub-circuits is within the positive projection range of the first metal frame and within the positive projection range of the second metal frame, and the first metal frame and the second metal frame are insulated.

[0065] Exemplarily, the first metal frame is used to connect and parallel the positive voltage input terminals of the plurality of sub-circuits, and the second metal frame is used to connect and parallel the negative voltage input terminals of the plurality of sub-circuits.

[0066] It can be understood that, without changing the circuit structure of each sub-circuit in the display panel, if it is required to parallel the positive voltage input terminals between each sub-circuit, a closed first metal frame can be provided for each circuit unit, the plurality of sub-circuits in the circuit unit are arranged in the first metal frame, and the positive voltage input terminals of each sub-circuit are connected to the first metal frame, so as to parallel the positive voltage input terminals of the plurality of sub-circuits in the circuit unit. Correspondingly, without changing the circuit structure of each sub-circuit in the display panel, if it is required to parallel the negative voltage input terminals between each sub-circuit, a closed second metal frame can be provided for each circuit unit, the plurality of sub-circuits in the circuit unit are arranged in the second metal frame, and the negative voltage input terminals of each sub-circuit are connected to the second metal frame, so as to parallel the negative voltage input terminals of the plurality of sub-circuits in the circuit unit.

[0067] Further, the first metal frame and the second metal frame are respectively used to conduct the positive voltage and the negative voltage of the circuit unit, and the voltage drop between the positive voltage and the negative voltage drives the light emitting unit to be turned on. Therefore, the first metal frame and the second metal frame should be insulated.

[0068] Exemplarily, the first metal frame and the second metal frame can be insulated by providing an insulating film layer.

[0069] It can be understood that, in the layout corresponding to the sub-circuit, the positive voltage input terminal and the negative voltage input terminal of the sub-circuit in the circuit unit are located at the fixed position of the sub-circuit. The positive voltage input terminals of the plurality of sub-circuits all extend in the same direction. Therefore, the first metal frame can be provided at the position of the positive voltage input terminal of the circuit unit, so as to parallel the positive voltage input terminals of the plurality of sub-circuits at the same time. Meanwhile, the second metal frame can be provided at the position of the negative voltage input terminal, so as to connect the negative voltage input terminals and parallel the negative voltage input terminals of the plurality of sub-circuits at the same time.

[0070] The connection mode of the positive voltage input terminal and the first metal frame and the connection mode of the negative voltage input terminal and the second metal frame in the embodiment of the present application will be introduced as follows:

[0071] (1) Connection mode of the positive voltage input terminal and the first metal frame

[0072] Optionally, in the embodiment of the present application, the positive voltage input terminals of the plurality of sub-circuits are connected to the first metal frame in parallel.

[0073] It is understandable that the first metal frame is made of metal, and the positive voltage input terminals of multiple sub-circuits are also made of metal. The positive voltage input terminals of multiple sub-circuits are connected in parallel with the first metal frame to form a parallel connection of the positive voltage input terminals of multiple sub-circuits.

[0074] In one example, the first metal frame can be any metal film layer in the display panel that can be connected to a positive pressure input terminal.

[0075] For example, the positive voltage input terminals of the aforementioned multiple sub-circuits extending from each of the aforementioned sub-circuits to the aforementioned first metal frame can be directly overlapped when the multiple sub-circuits and the first metal frame are on the same film layer; when the multiple sub-circuits and the first metal frame are not on the same film layer, they can be overlapped through overlap holes between the two film layers.

[0076] Optionally, in this embodiment, both the first metal frame and the positive pressure input terminal are disposed on the SD2 film layer.

[0077] For example, the positive voltage input terminals of the plurality of sub-circuits extend from each of the sub-circuits to the first metal frame and are connected in parallel.

[0078] like Figure 4 As shown, Figure 4 The diagram shows a circuit unit 41 in the display panel, which includes nine sub-circuits 42, each of which includes an extended positive voltage input terminal 43. A first metal frame 44 is connected to the positive voltage input terminal 43 of each of the nine sub-circuits 42 so that the positive voltage input terminals of the nine sub-circuits 42 are connected in parallel.

[0079] Among them, the positive pressure input terminal 43 is located in the SD2 layer, and the first metal frame 44 is also located in the SD2 layer.

[0080] Specifically, such as Figures 5 to 7 As shown, Figure 5 for Figure 4 A magnified view of part 46. Figure 6 for Figure 4 A magnified view of part 47. Figure 7 for Figure 5 and Figure 6 Side sectional view of the overlapping section.

[0081] Depend on Figure 5 As can be seen, the first metal frame 44 and each sub-circuit's extended positive voltage input terminal 43 include multiple overlap points 51 at the overlap, correspondingly, by... Figure 6 It can be seen that the overlap includes multiple overlap points 61. For example... Figure 7 As shown, Figure 7The middle SD2 layer 71 is the structure formed by the above-mentioned overlapping point 51 and overlapping point 61, and is also a side view of the first metal frame 44. In addition to this, the middle SD2 layer 71 also includes a PLN1 layer 72, a PLN2 layer 73, a PVX layer 74, and an SD1 layer 75. Figure 7 The middle SD2 layer 71 is the structure formed by the above-mentioned overlapping point 51 and overlapping point 61, and is also a side view of the first metal frame 44. In addition to this, the middle SD2 layer 71 also includes a PLN1 layer 72, a PLN2 layer 73, a PVX layer 74, and an SD1 layer 75.

[0082] Optionally, in the embodiment of the present application, the first metal frames between different circuit units are connected in parallel.

[0083] As shown in Figure 8 , it can be seen that the middle SD2 layer 71 includes a plurality of circuit units 81, each of which includes its own first metal frame 82, and the first metal frames 82 of different circuit units 81 are electrically connected in parallel, thereby achieving the parallel connection of the positive voltage input terminals between different circuit units. Figure 8

[0084] Optionally, in the embodiment of the present application, the positive projection range corresponding to the above-mentioned plurality of sub-circuits is covered with a first metal overlapping film layer away from one side of the substrate in the above-mentioned display panel, and the negative voltage input terminals of the above-mentioned plurality of sub-circuits and the above-mentioned second metal frame are connected in parallel through the above-mentioned first metal overlapping film layer.

[0085] It can be understood that, in the embodiment of the present application, the negative voltage input terminal of each sub-circuit in the circuit unit is non-extended, that is, the negative voltage input terminal of each sub-circuit is arranged in the sub-circuit. In order to connect the negative voltage input terminals in the plurality of sub-circuits with the second metal frame, the film layer of the second metal frame can be arranged to be the same as the negative voltage input terminal of the sub-circuit, and then a first metal overlapping film layer is arranged on the side away from the substrate of the second metal frame and the negative voltage input terminal of the sub-circuit. The negative voltage input terminals of the plurality of sub-circuits in the circuit unit within the range of the second metal frame and the second metal frame are electrically connected by the first metal overlapping film layer, thereby achieving the parallel connection of the negative voltage input terminals between the plurality of sub-circuits of the circuit unit.

[0086] Optionally, in the embodiment of the present application, the negative voltage input terminal of each pixel circuit in the above-mentioned plurality of sub-circuits and the above-mentioned second metal frame include an SD2 film layer and an anode film layer located away from the substrate on one side of the above-mentioned SD2 film layer, and the above-mentioned first metal overlapping film layer is a cathode film layer located away from the substrate on one side of the above-mentioned anode film layer.

[0087] Optionally, in the embodiment of the present application, the negative voltage input terminal of each pixel circuit in the above-mentioned plurality of sub-circuits and the above-mentioned second metal frame are connected in parallel through the above-mentioned cathode film layer.

[0088] Optionally, in the embodiment of the present application, the above-mentioned first metal overlapping film layer can be a cathode film layer.

[0089] As shown in Figure 9 and Figure 10 , the middle SD2 layer 71 includes a plurality of circuit units 81, each of which includes its own first metal frame 82, and the first metal frames 82 of different circuit units 81 are electrically connected in parallel, thereby achieving the parallel connection of the positive voltage input terminals between different circuit units. Figure 9 and Figure 10 ​This is a top view of a circuit unit, including area 91 where the negative voltage input terminals of the nine sub-circuits are located and area 92 where the second metal frame is located. Next, as... Figure 10 As shown, a first metal overlap film layer, also known as a cathode layer, is covered on the side of the substrate away from the display panel in the region 91 where the negative voltage input terminals of the nine sub-circuits are located and the region 92 where the second metal frame is located, connecting the region 91 where the negative voltage input terminals of the nine sub-circuits are located and the region 92 where the second metal frame is located.

[0090] Figure 11 for Figure 10 A side cross-sectional view of the membrane layer containing the second metal frame 92 and the region 91 containing the negative voltage input terminals of the nine sub-circuits, by... Figure 11 It can be seen that, Figure 10 The second metal frame 92 has a film layer including an SD2 layer 94 and an anode film layer 95. The negative voltage output terminals of each of the nine sub-circuits also have a film layer including an SD2 layer 94 and an anode film layer 95. Therefore, by covering the cathode layer 96 on the side of the SD2 layer 94 and the anode film layer 95 away from the substrate in the area where the circuit unit is located, the negative voltage output terminals 91 of the nine sub-circuits inside the pixel unit can be connected to the second metal frame 92. In addition, Figure 11 It also includes SD1 layer 97, PVX layer 98, PLN1 layer 99, PLN2 layer 100, and PDL layer 101.

[0091] It should be noted that, Figure 11 The image shows a film layer stacking configuration for a display panel. Figure 11 In other display panels, the PVX layer may not be included.

[0092] Optionally, in embodiments of this application, the first metal frames of different circuit units are connected in parallel.

[0093] like Figure 12 As shown, in Figure 12 As can be seen, the negative pressure input terminal area 111 includes multiple circuit units. Each negative pressure input terminal area 111 includes its own second metal frame 112. The second metal frames 112 of different negative pressure input terminal areas 111 are electrically connected in parallel, thereby completing the parallel connection of the positive pressure input terminals in the above-mentioned different circuit units.

[0094] Optionally, in this embodiment of the application, the data signal input terminals of the first circuit unit located in the same column among the above-mentioned plurality of circuit units are connected in parallel to each other and connected to the circuit board of the display panel.

[0095] It is understandable that, such as Figure 13 As shown, in Figure 13The image shows a data signal input terminal in a circuit unit 121. It can be seen that a circuit unit 121 includes nine sub-circuits 122, each of which includes a data signal input terminal 123. Through the arrangement of the nine sub-circuits 122 and the aforementioned parallel connection, each circuit unit 121 ultimately extends three data signal input terminals 123. Simultaneously, one circuit unit 121 corresponds to one light-emitting unit, i.e., one pixel. Next, as... Figure 14 As shown, Figure 14 The diagram shows the connection of the data signal input terminals of multiple circuit units 121. As mentioned above, the three data signal input terminals 123 of different circuit units 121 are connected in parallel. Finally, at the circuit unit 121 closest to the edge of the display panel, the three data signal input terminals are combined into one data signal input terminal, which is then led to the display circuit of the display panel or the flexible circuit board of the display panel.

[0096] Compared to the previous perforated design, this through-line data signal line design can significantly reduce resistance, and the line resistance is much smaller than the via resistance. This reduces the resistance of the data signal line, thereby increasing charging time and charging rate, and ultimately improving the uniformity of panel brightness.

[0097] Figure 15 This is a schematic flowchart of a method for manufacturing a display panel according to an embodiment of this application. The subject of this method can be a display panel manufacturing apparatus. Figure 15 As shown, the display panel includes multiple light-emitting units and circuit units corresponding to each light-emitting unit. Each circuit unit includes multiple sub-circuits, each sub-circuit including a positive voltage input terminal, a negative voltage input terminal, and a data signal input terminal. Each sub-circuit writes the operating voltage of the pixel to its operating voltage output terminal in response to the data signal input at its respective signal input terminal. The method includes the following steps 301-303:

[0098] Step 301: Etch the first film layer corresponding to the positive voltage input terminals of multiple sub-circuits in the display panel through the first mask, so that the positive voltage input terminals of the multiple sub-circuits are connected in parallel;

[0099] Step 302: Etch the second film layer corresponding to the negative voltage input terminals of the multiple sub-circuits in the display panel through the second mask, and cover the third film layer on the side of the second film layer away from the substrate, so that the negative voltage input terminals of the multiple sub-circuits are connected in parallel;

[0100] Step 303: Connect the working voltage output terminals of multiple sub-circuits in the display panel in parallel to form the working voltage writing terminal of the circuit unit, so as to synchronously write the working voltage to the corresponding pixels of the multiple sub-circuits through the multiple sub-circuits;

[0101] Exemplarily, the positive voltage input ends of the plurality of sub-circuits and the negative voltage input ends of the plurality of sub-circuits are insulated.

[0102] In a possible embodiment, the method for manufacturing the display panel disclosed in the present application includes: etching, by using the first mask, the first film layer corresponding to the positive voltage input ends of the plurality of sub-circuits in the display panel, to generate the positive voltage input ends of the plurality of sub-circuits and a closed first metal frame; and covering the third film layer on a side of the second film layer away from the substrate, to make the positive voltage input ends of the plurality of sub-circuits parallel to each other.

[0103] In a possible embodiment, the first film layer is an SD2 film layer in the method for manufacturing the display panel disclosed in the present application.

[0104] In a possible embodiment, the method for manufacturing the display panel disclosed in the present application includes: etching, by using the second mask, the second film layer corresponding to the negative voltage input ends of the plurality of sub-circuits in the display panel, to generate the negative voltage input ends of the plurality of sub-circuits and a closed second metal frame; and covering the third film layer on a side of the second film layer away from the substrate, to make the negative voltage input ends of the plurality of sub-circuits parallel to each other.

[0105] In a possible embodiment, the second film layer includes an SD2 layer and an anode film layer, and the third film layer includes a cathode film layer in the method for manufacturing the display panel disclosed in the present application.

[0106] The embodiments of the present application further provide a computer readable storage medium, which has stored thereon a computer program. The computer program is executed by a processor to implement the training rule determination method described in the embodiments of the present application. For example, the computer readable storage medium can be used to execute Figure 15 each step of the method shown in the figure.

[0107] The embodiments of the present application provide a computer program product. The computer program product includes instructions. The instructions are executed by a processor to implement Figure 15 each step of the method shown in the figure.

[0108] It should be noted that although the operation of the method of the present invention is described in a specific order in the accompanying drawings, this does not require or imply that the operations must be performed in that specific order, or that all the operations shown must be performed in order to achieve the desired result.

[0109] The following is for reference. Figure 16 , Figure 16 A schematic diagram of a computer device suitable for implementing embodiments of this application is shown. For example... Figure 16 As shown, the computer system 1700 includes a central processing unit (CPU) 1701, which can perform various appropriate actions and processes based on programs stored in read-only memory (ROM) 1702 or programs loaded from storage section 1708 into random access memory (RAM) 1703. RAM 1703 also stores various programs and data required for the system's operating instructions. CPU 1701, ROM 1702, and RAM 1703 are interconnected via bus 1704. Input / output (I / O) interface 1705 is also connected to bus 1704.

[0110] The following components are connected to I / O interface 1705: an input section 1706 including a keyboard, mouse, etc.; an output section 1707 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 1708 including a hard disk, etc.; and a communication section 1709 including a network interface card such as a LAN card, modem, etc. The communication section 1709 performs communication processing via a network such as the Internet. Drive 1710 is also connected to I / O interface 1705 as needed. Removable media 1711, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., are installed on drive 1710 as needed so that computer programs read from them can be installed into storage section 1708 as needed.

[0111] Specifically, according to embodiments of this application, the flowchart above refers to... Figure 15 The described process can be implemented as a computer software program. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowchart. In such an embodiment, the computer program contains program code for performing the methods shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via communication section 1709, and / or installed from removable medium 1711. When the computer program is executed by central processing unit (CPU) 1701, it performs the functions defined in the system of this application.

[0112] It should be noted that the computer-readable medium shown in the application can be a computer-readable signal medium or a computer-readable storage medium or any combination of the two. The computer-readable storage medium may, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination of the above. More specific examples of computer-readable storage media can include, but are not limited to, an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this application, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device or component. In this application, the computer-readable signal medium can include a data signal carried in a baseband or as a carrier wave part of a carrier wave, which carries computer-readable program code. Such a propagated data signal can take many forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. The computer-readable signal medium can also be any computer-readable medium that can send, propagate or transmit a program for use by or in conjunction with an instruction execution system, device or component. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0113] The flowcharts and block diagrams in the drawings illustrate the possible implementation architectures, functions and operation instructions of the systems, methods and computer program products according to various embodiments of the application. In this regard, each block in the flowchart or block diagram can represent a module, a program segment or a part of code, which contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can also occur in different order from that noted in the drawings. For example, two connected blocks can actually be executed substantially in parallel, and sometimes in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or operation instructions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0114] The units or modules described in the embodiments of the present application can be implemented in the form of software or in the form of hardware. The described units or modules can also be arranged in a processor, for example, a processor can be described as including a first collection module, a second collection module and a sending module. In some cases, the names of these units or modules do not constitute a limitation on the units or modules themselves.

[0115] As another aspect, the present application also provides a computer readable storage medium, which can be included in the electronic device described in the above embodiments, or can exist separately and not be assembled into the electronic device. The computer readable storage medium stores one or more programs, and when the programs are used by one or more processors to execute the method for manufacturing the display panel described in the present application.

[0116] The above description is merely preferred embodiments of the present application and a description of the principles of the technology used. Those skilled in the art should understand that the disclosed range of the present application is not limited to the technical solutions formed by the specific combinations of the above technical features, and should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above disclosed concept. For example, the above features are replaced with the technical features disclosed in the present application (but not limited to) having similar functions to form technical solutions.

Claims

1. A display panel, characterized in that, The display panel includes multiple light-emitting units and circuit units corresponding to each light-emitting unit; The circuit unit includes multiple sub-circuits, each sub-circuit having a positive voltage input terminal, a negative voltage input terminal, and a data signal input terminal. Each sub-circuit writes the pixel's operating voltage to its operating voltage output terminal in response to the data signal input at its respective signal input terminal. The working voltage output terminals of the multiple sub-circuits are connected in parallel to form the working voltage writing terminal of the circuit unit, so as to synchronously write the working voltage to the pixel corresponding to the multiple sub-circuits through the multiple sub-circuits. The positive voltage input terminals of each sub-circuit in the same circuit unit are connected in parallel to form the positive voltage input terminal of the circuit unit; the negative voltage input terminals of each sub-circuit in the same circuit unit are connected in parallel to form the negative voltage input terminal of the circuit unit; and the data signal input terminals of each sub-circuit in the same circuit unit are connected in parallel to form the data signal input terminal of the circuit unit. The positive voltage input terminals of adjacent circuit units are connected in parallel, the negative voltage input terminals of adjacent circuit units are connected in parallel, and the data signal input terminals of adjacent circuit units are connected in parallel. The working voltage writing terminal of the circuit unit is electrically connected to the light-emitting unit corresponding to the circuit unit, and the light-emitting unit is electrically connected to the positive voltage input terminal and the negative voltage input terminal of the circuit unit. When the voltage difference between the positive and negative input terminals of the circuit unit meets a preset threshold, the light-emitting unit is in a conducting state. The data signal input terminal of the circuit unit receives a data signal and writes a working voltage to the corresponding pixel of the circuit unit through the working voltage writing terminal of the circuit unit to light up the light-emitting unit.

2. The display panel according to claim 1, characterized in that, Each circuit unit includes a closed first metal frame for transmitting positive pressure signals and a closed second metal frame for transmitting negative pressure signals. The orthographic projection range of the plurality of sub-circuits is within the orthographic projection range of the first metal frame and within the orthographic projection range of the second metal frame. The first metal frame and the second metal frame are insulated from each other. The first metal frame is connected to the positive input terminals of the plurality of sub-circuits, thereby connecting the positive input terminals of the plurality of sub-circuits in parallel. The second metal frame is used to connect the negative input terminals of the plurality of sub-circuits, thereby connecting the negative input terminals of the plurality of sub-circuits in parallel.

3. The display panel according to claim 2, characterized in that, The positive voltage input terminals of the plurality of sub-circuits are connected in parallel with the first metal frame.

4. The display panel according to claim 3, characterized in that, Both the first metal frame and the positive pressure input terminal are disposed on the SD2 film layer; The positive voltage input terminals of the plurality of sub-circuits extend from each sub-circuit to the first metal frame and are connected in parallel.

5. The display panel according to claim 2, characterized in that, The side of the orthogonal projection range corresponding to the plurality of sub-circuits away from the substrate in the display panel is covered with a first metal overlap film layer, and the negative voltage input terminals of the plurality of sub-circuits and the second metal frame are connected in parallel through the first metal overlap film layer.

6. The display panel according to claim 5, characterized in that, The negative voltage input terminal of each pixel circuit in the plurality of sub-circuits and the second metal frame include: an SD2 film layer and an anode film layer located on the side of the SD2 film layer away from the substrate, wherein the first metal overlap film layer is a cathode film layer located on the side of the anode film layer away from the substrate. The negative voltage input terminals of the plurality of sub-circuits and the second metal frame are connected in parallel via the cathode film layer.

7. The display panel according to claim 1, characterized in that, The data signal input terminals of the first circuit unit in the same column of the plurality of circuit units are connected in parallel to each other and connected to the circuit board of the display panel.

8. A method for manufacturing a display panel, characterized in that, The display panel includes multiple light-emitting units and circuit units corresponding to each light-emitting unit. Each circuit unit includes multiple sub-circuits, each sub-circuit including a positive voltage input terminal, a negative voltage input terminal, and a data signal input terminal. Each sub-circuit writes the operating voltage of a pixel to its operating voltage output terminal in response to the data signal input at its respective signal input terminal. The method includes: The first film layer corresponding to the positive voltage input terminal of multiple sub-circuits in the display panel is etched by the first mask, so that the positive voltage input terminals of the multiple sub-circuits are connected in parallel. The second film layer corresponding to the negative voltage input terminals of multiple sub-circuits in the display panel is etched by the second mask, and a third film layer is covered on the side of the second film layer away from the substrate, so that the negative voltage input terminals of the multiple sub-circuits are connected in parallel. The working voltage output terminals of multiple sub-circuits in the display panel are connected in parallel to form the working voltage writing terminal of the circuit unit, so as to synchronously write the working voltage to the pixels corresponding to the multiple sub-circuits through the multiple sub-circuits. The positive voltage input terminals and negative voltage input terminals of the plurality of sub-circuits are insulated from each other.

9. The method according to claim 8, characterized in that, Etching the first film layer corresponding to the positive voltage input terminals of multiple sub-circuits in the display panel using a first mask to generate the positive voltage input terminals such that the positive voltage input terminals of the multiple sub-circuits are connected in parallel, including: The first film layer corresponding to the positive voltage input terminal of multiple sub-circuits in the display panel is etched by the first mask to generate the positive voltage input terminal of multiple sub-circuits and a closed first metal frame. The first metal frame is connected to the positive voltage input terminals of the plurality of sub-circuits, thereby enabling the positive voltage input terminals of the plurality of sub-circuits to transmit positive voltage signals in parallel.

10. The method according to claim 8, characterized in that, The step of etching a second film layer corresponding to the negative voltage input terminals of multiple sub-circuits in the display panel through the second mask and covering the third film layer on the side of the second film layer away from the substrate, so that the negative voltage input terminals of the multiple sub-circuits are connected in parallel, includes: The second mask is used to etch the second film layer corresponding to the negative voltage input terminals of multiple sub-circuits in the display panel to generate the negative voltage input terminals of multiple sub-circuits and a closed second metal frame. The third film layer is covered on the side of the second film layer away from the substrate, and the negative voltage input terminals of multiple sub-circuits corresponding to the second film layer are connected in parallel with the second metal frame through the third film layer to transmit negative voltage signals.

11. A display device, characterized in that, The display device includes the display panel as described in any one of claims 1-7.

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