Low temperature silicon oxide gap fill

By depositing a flowable silicon film on the substrate surface and controlling the deposition with a plasma distribution modulator, the problem of silicon oxide gap filling in high aspect ratio and low critical dimension characteristics is solved, and efficient low-temperature steam-free filling is achieved, which improves device performance and fill efficiency.

CN119278507APending Publication Date: 2025-01-07APPLIED MATERIALS INC
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Patent Information

Application Number
CN202380042928.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-05-27
Filing Date
2023-05-23
Publication Date
2025-01-07

AI Technical Summary

Technical Problem

The prior art is difficult to achieve silicon oxide gap filling under low temperature without steam conditions in high aspect ratio and low critical dimension characteristics, resulting in device performance and low filling efficiency.

Method used

Using a flowable silicon film to deposit on the substrate surface, plasma deposition is controlled by a plasma distribution modulator, sidewall material is selectively etched, converting material is formed to fill gaps, and sidewall coverage is restricted during curing to prevent void formation.

Benefits of technology

Steam-free low-temperature silicon oxide gap filling in high aspect ratio and low critical dimension features is achieved, which improves filling efficiency and device performance, reduces void formation and simplifies processing flow.

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Abstract

Embodiments of the present disclosure relate to methods for forming a silicon-based gap fill within a substrate feature. A flowable silicon film is formed within the feature with a thickness of a bottom surface and a top surface thereof greater than a thickness of a sidewall surface. An etching plasma removes the silicon film from the sidewall surface. A conversion plasma is used to convert a silicon film into a silicon-based gap fill (e.g., silicon oxide). In some embodiments, the silicon film is preferentially converted on the top surface and the bottom surface before being etched from the sidewall surfaces.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of and priority to U.S. Patent Application No. 17 / 827,652, filed on May 27, 2022, entitled “LOW TEMPERATURESILICON OXIDE GAP FILL,” which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of the present disclosure generally provide methods of depositing silicon-based gapfill in high aspect ratio structures. In particular, some embodiments of the present disclosure relate to methods of forming silicon oxide gapfill at low temperatures without the need for steam. Background Art

[0004] Integrated circuits are made possible by processes that create intricately patterned layers of material on a substrate surface. Creating patterned material on a substrate requires controlled methods for forming and removing exposed material. As device dimensions continue to shrink, material formation can affect subsequent operation.

[0005] In a gap fill operation, material may be formed or deposited to fill a trench or other feature formed on a semiconductor substrate. Because the features may be characterized by a higher aspect ratio and a reduced critical dimension, certain filling methods may not be suitable. For example, some methods deposit more material at the top of narrower features and along the sidewalls. Continuous deposition by these methods may pinch off features, including between sidewalls within the features, and may create voids therein. These voids may adversely affect device performance and subsequent processing operations.

[0006] Specifically, current methods for depositing silicon oxide rely on steam-based processes that utilize relatively high temperatures. However, the underlying structures to be filled typically include exposed silicon or silicon-germanium materials that may be oxidized by these high temperature steam conditions. Some methods for depositing silicon oxide gap fill use multiple chambers to meet the material requirements of the gap fill material. These multi-chamber processes have long processing times and low throughput.

[0007] Therefore, there is a need in the art for new methods of depositing gap fill materials in high aspect ratio and / or low critical dimension features. In particular, there is a need for silicon oxide gap fill that can be performed in situ in a single processing chamber at relatively low temperatures without the need for steam. Summary of the invention

[0008] One or more embodiments of the present disclosure relate to a method for depositing a gap fill of a silicon base. The method comprises the following steps: depositing a flowable silicon film on a substrate surface having at least one feature therein. The feature has an opening width, one or more sidewalls, and the feature extends from the top surface of the substrate to a depth at the bottom. The flowable silicon film is deposited as a top material on the top surface, as a sidewall material on the one or more sidewalls, and as a bottom material on the bottom. The sidewall material is more selectively etched than the top material and the bottom material. The top material and the bottom material are converted to form a conversion material.

[0009] Additional embodiments of the present disclosure relate to a method of depositing a silicon-based gap fill. The method includes the following steps: depositing a flowable silicon film on a substrate surface having at least one feature therein. The feature has an opening width, one or more sidewalls, and the feature extends from the top surface of the substrate to a depth, the flowable silicon film being deposited as a top material on the top surface, as a sidewall material on the one or more sidewalls, and as a bottom material on the bottom. The top material and the bottom material are selectively converted to form a converted material. The sidewall material is more selectively etched than the converted material. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to be able to understand the above-mentioned features of the present disclosure in detail, a more specific description of the present disclosure briefly summarized above may be obtained by reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings only illustrate typical embodiments of the present disclosure and therefore should not be considered as limiting the scope thereof, as the present disclosure may allow other equally effective embodiments. The embodiments described herein are illustrated by way of example and are not limited to the figures in the accompanying drawings, in which the same reference numerals represent similar elements.

[0011] FIG. 1 depicts a schematic cross-sectional view of an exemplary processing chamber according to one or more embodiments;

[0012] FIG2 illustrates a process flow chart of a processing method according to one or more embodiments; and

[0013] 3A-3C illustrate cross-sectional views of a substrate during processing according to one or more embodiments.

[0014] Some of the drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes and should not be considered to be drawn to scale unless specifically noted as being drawn to scale. Additionally, as schematic diagrams, the drawings are provided to aid understanding and may not include all aspects or information as compared to actual representations and may include exaggerated material for illustrative purposes.

[0015] In the drawings, similar components and / or features may have the same reference numerals. In addition, various components of the same type may be distinguished by following the reference numeral with a letter or additional numeral that distinguishes the similar components. If only the primary reference numeral is used in the specification, the description applies to any of the similar components having the same primary reference numeral, regardless of the letter or additional numeral. DETAILED DESCRIPTION

[0016] Before describing several exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or processing steps set forth in the following description. The present disclosure is capable of other embodiments and can be practiced or carried out in various ways.

[0017] As used in this specification and the appended claims, the term "substrate" refers to a surface or portion of a surface upon which a process acts. Those skilled in the art will also understand that, unless the context clearly indicates otherwise, reference to a substrate may also refer to only a portion of a substrate. In addition, references to operations on or to a substrate may refer to both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0018] As used herein, "substrate" is any substrate or material surface formed on a substrate on which film processing is performed during a manufacturing process. For example, substrate surfaces on which processing may be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other material such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers.

[0019] The substrate may be exposed to a pre-treatment treatment to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, e-beam cure, and / or bake the substrate surface. In addition to film treatments performed directly on the surface of the substrate itself, in the present disclosure, any film treatment steps disclosed may also be performed on an under-layer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" is intended to include such an under-layer as indicated by the context.

[0020] The term "substrate surface" as used herein refers to any substrate surface on which a layer may be formed. The substrate surface may have one or more features formed therein, one or more layers formed thereon, and combinations thereof. The shape of the feature may be any suitable shape, including but not limited to peaks, grooves, holes, and vias (circular or polygonal). As used in this regard, the term "feature" refers to any intentional surface irregularity. Suitable examples of features include but are not limited to a groove having a top, two sidewalls, and a bottom extending into the substrate, and a via having one or more sidewalls extending into the substrate to the bottom.

[0021] As used in this specification and claims, the term "selectively" refers to a treatment that acts on a first surface to a greater extent than on another, second surface. Such a treatment will be described as acting "selectively" on the first surface more than on the second surface. The term "over" as used in this context does not imply a physical orientation of one surface on top of another surface, but rather a relationship of the thermodynamic or kinetic properties of a chemical reaction of one surface relative to another surface.

[0022] The term "on" indicates that there is direct contact between elements. The term "directly on" indicates that there is direct contact between elements without intervening elements.

[0023] As used in this specification and the appended claims, the terms "precursor," "reactant," "reactant gas," and the like are used interchangeably to refer to any gaseous substance that can react with a substrate surface.

[0024] Embodiments of the present disclosure provide methods for depositing silicon-based gap fills. Some embodiments of the present disclosure provide gap fills at relatively low temperatures. Some embodiments provide gap fills in a bottom-up manner. Some embodiments provide gap fills without seams or voids. Some embodiments provide in situ gap fills within a single processing chamber. Further embodiments advantageously provide methods for depositing silicon oxide gap fills. Some embodiments provide silicon oxide gap fills without the use of steam.

[0025] Amorphous silicon can be used in the manufacture of semiconductor devices for many structures and processes, including as a sacrificial material, for example as a dummy gate material, or as a trench filling material. In gap filling operations, some processes can utilize a flowable film formed under processing conditions to limit the conformality of the deposition, which can allow the deposited material to better fill the features on the substrate. The flowable silicon material can be characterized by a relatively large amount of hydrogen and can be less dense than other formed films. Therefore, subsequent processing operations can be performed to cure the resulting film. Conventional techniques can utilize UV ​​curing processes to remove hydrogen and process the film. However, UV curing can cause significant film shrinkage, which can cause stress to the features and create voids within the structure.

[0026] As feature sizes continue to shrink, flowable films may face challenges with narrow features, which may be further characterized by higher aspect ratios. For example, pinching of features may occur more easily due to deposition on the sidewalls of the feature, which in small feature sizes may further restrict flow further into the feature and may create voids. The present technology can overcome these limitations by performing directional treatment of the material formed in the feature, which may not be performed on the material deposited on the sidewalls. In addition, the present technology can perform selective etching and / or modification of the formed film during the curing operation, thereby enabling the removal of material on the sidewalls while maintaining material near the bottom of the feature. This can limit or prevent sidewall coverage during trench fill, allowing for improved fill operations to be performed.

[0027] After describing general aspects of a chamber according to some embodiments of the present technology in which the plasma processing operations discussed below may be performed, specific methods will be discussed. It should be understood that the present technology is not intended to be limited to the specific films, chambers, or processes discussed, as the described techniques can be used to improve any number of film forming processes and are applicable to a variety of processing chambers, operations, and materials.

[0028] 1 illustrates a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology. The figure depicts an overview of a system that incorporates one or more aspects of the present technology and / or that can perform one or more deposition or other processing operations according to embodiments of the present technology.

[0029] According to some embodiments of the present technology, the chamber 100 can be used to form a film layer, although it should be understood that these methods can be similarly performed in any chamber in which film formation can occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 and a lid assembly 106, wherein the substrate support 104 is disposed inside the chamber body 102, and the lid assembly 106 is coupled to the chamber body 102 and encloses the substrate support 104 in a processing space 120. The substrate 103 can be provided to the processing space 120 through an opening 126, which can generally be sealed using a slit valve or door for processing. During processing, the substrate 103 can rest on the surface 105 of the substrate support. As indicated by arrow 145, the substrate support 104 can rotate along an axis 147, and the shaft 144 of the substrate support 104 can be located at the axis 147. Similarly, the substrate support 104 can be raised or lowered as needed for loading and unloading of the substrate 103.

[0030] The plasma distribution modulator 111 may be disposed in the processing chamber 100 to control the plasma distribution on the substrate 103 disposed on the substrate support 104. The plasma distribution modulator 111 may include a first electrode 108, which may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or may be a separate sidewall electrode. The first electrode 108 may be an annular or ring-like member and may be an annular electrode. The first electrode 108 may be a continuous ring around the periphery of the processing chamber 100, or if desired, the first electrode 108 may be discontinuous at selected locations, and the processing chamber 100 surrounds the processing space 120. The first electrode 108 may also be a perforated electrode (such as a perforated ring or mesh electrode), or may be a plate-like electrode, such as, for example, a secondary gas distributor.

[0031] One or more isolators 110a, 110b including a dielectric material such as a ceramic or a metal oxide (e.g., aluminum oxide and / or aluminum nitride) can contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 can define an aperture 118 for distributing process precursors into the process volume 120. The gas distributor 112 can be coupled to a first power source 142 such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that can be coupled to the process chamber 100. In some embodiments, the first power source 142 can be an RF power source.

[0032] The gas distributor 112 may be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 may also be formed of conductive and non-conductive components. For example, the body of the gas distributor 112 may be conductive, while the face plate of the gas distributor 112 may be non-conductive. The gas distributor 112 may be powered, such as by the first power supply 142 shown in FIG. 1, or in some embodiments, the gas distributor 112 may be coupled to ground.

[0033] The first electrode 108 may be coupled to a first tuning circuit 128, which may control a ground path for the processing chamber 100. The first tuning circuit 128 may include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or may include a variable capacitor or other circuit element. The first tuning circuit 128 may be or may include one or more inductors 132. The first tuning circuit 128 may be any circuit capable of achieving a variable or controllable impedance under plasma conditions present in the processing volume 120 during processing. In some embodiments shown, the first tuning circuit 128 may include a first circuit leg and a second circuit leg, the first circuit leg and the second circuit leg being coupled in parallel between ground and the first electronic sensor 130. The first circuit leg may include a first inductor 132A. The second circuit leg may include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be disposed between the first electronic controller 134 and a node connecting both the first circuit branch and the second circuit branch to the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to the first electronic controller 134, which may provide a degree of closed-loop control of the plasma conditions within the processing volume 120.

[0034] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104 or coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire mesh, or a conductive element arranged in any other distribution. The second electrode 122 may be a tuning electrode and may be coupled to the second tuning circuit 136 through a conduit 146, such as a cable having a selected resistance (such as 50 ohms) disposed in the shaft 144 of the substrate support 104. The second tuning circuit 136 may have a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to provide further control of the plasma conditions in the processing volume 120.

[0035] The third electrode 124 (which may be a bias electrode and / or an electrostatic chuck electrode) may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 through a filter 148, which may be an impedance matching circuit. The second power source 150 may be a DC power source, a pulsed DC power source, an RF bias power source, a pulsed RF power source, or a bias power source, or a combination of these or other power sources. In some embodiments, the second power source 150 may be an RF bias power source.

[0036] The lid assembly 106 and substrate support 104 of FIG. 1 may be used with any processing chamber for plasma or thermal processing. In operation, the processing chamber 100 may provide real-time control of plasma conditions in the processing space 120. The substrate 103 may be disposed on the substrate support 104, and the inlet 114 may be used to flow the processing gas through the lid assembly 106 according to any desired flow plan. The inlet 114 may include delivery from a remote plasma source unit 116, which may be coupled to the chamber fluid, and a bypass 117 for the delivery of processing gases that may not flow through the remote plasma source unit 116. The gas may leave the processing chamber 100 through the outlet 152. Electric power may be coupled to the gas distributor 112 to establish a plasma in the processing space 120. In some embodiments, the substrate may be electrically biased using a third electrode 124.

[0037] Once the plasma is ignited in the processing space 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Then, the electronic controllers 134, 140 can be used to adjust the flow characteristics of the ground path represented by the two tuning circuits 128 and 136. The set point can be transmitted to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In an embodiment where both electronic controllers can be variable capacitors, the electronic sensors can independently adjust the variable capacitors to maximize the deposition rate and minimize the thickness non-uniformity.

[0038] Each of the tuning circuits 128, 136 may have a variable impedance that may be adjusted using the respective electronic controllers 134, 140. In the case where the electronic controllers 134, 140 are variable capacitors, the capacitance range of each variable capacitor and the inductance of the first inductor 132A and the second inductor 132B may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, which may have a minimum value within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at a minimum or maximum value, the impedance of the first tuning circuit 128 may be high, causing the plasma shape to have minimal aerial or lateral coverage above the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma may grow to a maximum, effectively covering the entire working area of ​​the substrate support 104. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber wall and the aerial coverage of the substrate support may decline. The second electronic controller 140 may have a similar effect, as the capacitance of the second electronic controller 140 is changed to increase and decrease the air coverage of the plasma on the substrate support.

[0039] The electronic sensors 130, 138 may be used to tune the individual circuits 128, 136 in a closed loop. A set point for current or voltage (depending on the type of sensor used) may be installed in each sensor, and the sensors may be provided with control software that determines the adjustments to be made to each individual electronic controller 134, 140 to minimize deviations from the set point. Thus, the plasma shape may be selected and dynamically controlled during processing. It should be understood that while the foregoing discussion is based on electronic controllers 134, 140 that may be variable capacitors, any electronic component with an adjustable characteristic may be used to provide an adjustable impedance for the tuning circuits 128 and 136.

[0040] The processing chamber 100 may be used in some embodiments of the present technology for a processing method, which may include the formation, treatment, etching or conversion of materials of a semiconductor structure. It should be understood that the described chamber should not be considered limiting, and any chamber that can be configured to perform the described operations may be used similarly. FIG. 2 illustrates an exemplary operation in a processing method 200 according to some embodiments of the present technology. The method may be performed in various processing chambers and on one or more main frames or tools (which include the above-mentioned processing chamber 100). The method 200 may include a plurality of optional operations, which may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many operations are described in order to provide a larger range of structural forms, but are not critical to the technology, or may be performed by an alternative method that is easily understood. The method 200 may describe the operations schematically shown in FIGS. 3A to 3C, and its diagrams will be described in conjunction with the operations of the method 200. It should be understood that the drawings only depict partial schematic diagrams, and the substrate may include any number of additional materials and features having various characteristics and aspects as shown.

[0041] Furthermore, it should be noted that the order of the operations identified in FIG. 2 may be modified, as discussed below. For example, in some embodiments, the film may be converted prior to being modified or densified. Additionally, as also discussed below, it may not be necessary to perform each operation during each processing cycle. For example, in some embodiments, the cycle of deposition and modification may be repeated several times, then proceed to conversion, and then return to deposition and modification.

[0042] Referring to FIG. 2 , method 200 may include additional operations before the listed operations are initiated. For example, additional processing operations may include forming structures on the semiconductor substrate, which may include both forming and removing materials. For example, transistor structures, memory structures, or any other structures may be formed. Pre-processing operations may be performed in a chamber in which method 200 may be performed, or processing may be performed in one or more other processing chambers before the substrate is transported to a semiconductor processing chamber or chambers in which method 200 may be performed. Regardless, method 200 may optionally include the step of transporting a semiconductor substrate to a processing area of ​​a semiconductor processing chamber, such as processing chamber 100 described above, or other chambers that may include components as described above. The substrate may be deposited on a substrate support, which may be a pedestal such as substrate support 104, and may reside in a processing area of ​​the chamber, such as processing volume 120 described above.

[0043] The substrate on which several operations have been performed may be substrate 305 of structure 300, which may show a partial view of a substrate on which semiconductor processing may be performed. It should be understood that structure 300 may only show a few top layers during processing to illustrate aspects of the present technology. Substrate 305 may include a material in which one or more features 310 may be formed. Substrate 305 may be any number of materials used in semiconductor processing. The substrate material may be or may include silicon, germanium, a dielectric material including silicon oxide or silicon nitride, a metallic material, or any number of combinations of these materials. According to the present technology, feature 310 may be characterized as any shape or configuration. In some embodiments, the feature may be or may include a groove structure or hole formed in substrate 305.

[0044] Although feature 310 can be characterized as any shape or size, in some embodiments, feature 310 can be characterized as having a higher aspect ratio, or as a ratio of the depth of the feature to the width across the feature. For example, in some embodiments, feature 310 can be characterized as having an aspect ratio of greater than or about 5:1, greater than or about 10:1, greater than or about 15:1, greater than or about 20:1, greater than or about 25:1, greater than or about 30:1, greater than or about 40:1, or greater than or about 50:1. In addition, the feature can be characterized as having a narrow width or diameter across the feature including between two sidewalls, such as a size of less than or about 20 nm, less than or about 15 nm, less than or about 12 nm, less than or about 10 nm, less than or about 9 nm, less than or about 8 nm, less than or about 7 nm, less than or about 6 nm, or less than or about 5 nm.

[0045] In some embodiments, method 200 may include an optional treatment operation (such as pre-treatment) that may be performed to prepare the surface of substrate 305 for deposition. Once prepared, method 200 may include the following steps: delivering one or more precursors to a processing region of a semiconductor processing chamber containing structure 300. The precursors may include one or more silicon-containing precursors, and one or more diluents or carrier gases (such as inert gases) or other gases delivered with the silicon-containing precursors. In operation 205, a plasma may be formed from the deposition precursors including the silicon-containing precursor. The plasma may be formed in the processing region, which may allow the deposition material to be deposited on the substrate. For example, in some embodiments, a capacitively coupled plasma may be formed in the processing region by applying plasma power to a faceplate as previously described.

[0046] In operation 210, a silicon-containing material may be deposited on a substrate from a plasma effluent of a silicon-containing precursor. In some embodiments, the material may be a flowable silicon-containing material, which may be or may include amorphous silicon. The deposited material may at least partially flow into features on the substrate to provide a bottom-up type of gap filling. As shown in FIG. 3A, material 315 may be deposited on substrate 305 and may flow into trenches or features 310. As shown, the deposited material 315 may flow into the bottom of the feature, although a certain amount of material may remain on the sidewalls of the substrate (as shown in material 317) and on the top of the feature or between the features (as shown in material 319). Although the amount deposited may be relatively small, the residual material on the sidewalls may restrict subsequent flow. In addition, if a conventional conversion is performed on the deposited material (such as, for example, conversion to silicon nitride), such conversion will involve expansion of the film. For reduced size features, the residual material formed on the sidewalls may be converted and expand outward toward the opposite sidewalls. This may cause the feature to be pinched off, thereby possibly forming a void within the feature.

[0047] The power applied during deposition can be a lower power plasma, which can limit dissociation and maintain the amount of bound hydrogen in the deposited material. This bound hydrogen can contribute to the fluidity of the deposited material. In addition, unlike conventional techniques, the present technology can introduce a bias treatment that can treat the deposited film during the deposition operation. The treatment can include utilizing source power (such as coupled to a panel or showerhead as described above) and utilizing bias power (applied through a substrate support as discussed above). The source power can be used to perform controlled dissociation of silicon-containing precursors, which can limit dissociation and allow the formation of longer material chains. When these materials contact the substrate, longer chains of silicon-containing materials can have increased fluidity, which can improve bottom-up filling.

[0048] The source power can be pulsed and the duty cycle can be reduced, which can further reduce the effective plasma power in some embodiments. For example, the source power can be applied at any higher frequency, such as greater than or about 10 MHz, greater than or about 13 MHz, greater than or about 15 MHz, or greater than or about 20 MHz. The plasma power supply can deliver less than or about 300 W, less than or about 250 W, less than or about 200 W, less than or about 150 W, less than or about 100 W, or less than or about 50 W of plasma power to the panel. In addition, the source power can be pulsed at a pulse frequency of 20 kHz or less, such as less than or about 15 kHz, less than or about 12 kHz, less than or about 10 kHz, or less than or about 8 kHz. In addition, the pulse duty cycle can be applied at less than or about 50%, less than or about 40%, less than or about 30%, less than or about 20%, less than or about 10%, less than or about 5%, or less than or about 1%. This can limit dissociation of the silicon precursor and improve long chain formation as described above.

[0049] In some embodiments, to facilitate dissociation and deposition, the deposition precursor may include one or more inert gases (such as argon and / or helium), which may help improve dissociation. In addition, in some embodiments, the deposition precursor may include diatomic hydrogen, which may flow to facilitate handling during deposition, and which may be assisted by bias power. For example, hydrogen may be delivered with the silicon-containing precursor, and the flow rate ratio of hydrogen to silicon-containing precursor is greater than or about 0.5:1, greater than or about 1:1, greater than or about 1.5:1, greater than or about 2:1, greater than or about 2.5:1, greater than or about 3.0:1, greater than or about 3.5:1, or greater than or about 4.0:1.

[0050] Hydrogen may also dissociate in the generated plasma and may be further activated by utilizing bias power delivery. For example, in some embodiments, the bias power supply may operate at a frequency lower than the source power and may operate at less than or about 10 MHz, less than or about 5 MHz, or less than or about 2 MHz. The power supply may operate at a power of less than or about 2000 W, less than or about 1000 W, less than or about 500 W, less than or about 450 W, less than or about 400 W, or less than or about 350 W. The bias power may produce a certain amount of directional effluent motion and may allow lighter hydrogen radicals to further dissociate argon and / or helium, which may be directed downwardly at the structure more specifically. The lower frequency power may also deliver additional energy to the ions as they travel downwardly to the substrate in a more linear path.

[0051] These hydrogen and inert gas radical species can transfer energy to materials along the surface perpendicular to the direction of travel, such as material along the bottom of the feature and material along the top of the feature, such as materials 315 and 319. The energy can help release excess hydrogen, which can densify the film at these locations. As shown in FIG. 3B, while material 317 along the sidewalls may not be affected, or may have limited changes, materials 315 and 319 can be densified, which can improve the quality of the material. Therefore, in some embodiments, the material along the top and bottom of the structure can be characterized as having a higher quality (which can include increased density) than the material deposited along the sidewalls of the feature.

[0052] However, by utilizing bias power, the deposition plasma can be characterized by increased power, which can further dissociate the silicon-containing precursor and reduce mobility. Therefore, to limit this effect, the bias power can also be pulsed at a pulse frequency of less than or about 20 kHz, less than or about 10 kHz, less than or about 5 kHz, less than or about 1 kHz, less than or about 500 Hz, less than or about 100 Hz, less than or about 50 Hz, or less than or about 10 Hz. In addition, the duty cycle can be operated at less than or about 50%, less than or about 40%, less than or about 30%, less than or about 20%, less than or about 10%, less than or about 5%, or about 1%, which can further reduce the effect of the bias power. By operating the bias power at a relatively low pulse frequency and duty cycle, the bias power can be used to improve the film quality at the top of the structure and the bottom of the feature while limiting the impact on any other deposition characteristics. Additionally, by utilizing relatively low powers, the hydrogen may not be sufficiently excited to cause etching of the deposited material, or result in sputtering of the material upon bombardment by the inert gas effluent.

[0053] After a certain amount of deposition, in some embodiments of the present technology, an etching and / or modification process may be performed, which is configured to selectively etch back material from the sidewalls of the feature while modifying the material at the top and bottom of the feature. This process may be performed in the same chamber as the deposition and may be performed in a cyclic process to fill the feature. In some embodiments, the flow of silicon-containing precursors may be stopped and the processing area may be purged. The flow of inert gases (such as argon and / or helium) may also be stopped. After purging the processing area, a hydrogen-containing precursor or NF3 may flow into the processing area of ​​the processing chamber. In some embodiments, the modification process may include only a hydrogen-containing precursor, which may be diatomic hydrogen in some embodiments. In some embodiments, the modification plasma contains NF3. A modification plasma may be formed in operation 215, which may also be a capacitively coupled plasma formed in the processing area, although inductively coupled plasma may be similarly applied in some embodiments.

[0054] Similar to the deposition process, during the etching / modification operation, an additional power source may be engaged and coupled with the substrate support as described above to provide a bias to the plasma generated above the substrate. Therefore, the etching process may also include a source power and a bias power. This may attract plasma effluents to the substrate, which may bombard the film and cause densification of the deposited material, especially the material that has been at least partially improved by the treatment performed during deposition. Although any hydrogen-containing material can be used, in some embodiments, diatomic hydrogen can be used as a hydrogen-containing precursor to generate an etching plasma. Hydrogen radicals and ions can easily penetrate the material formed in the groove and can release the bound hydrogen from the film, thereby causing densification. The applied bias power can be relatively low to limit the sputtering of the film produced and to limit any potential damage to the structure. In addition, by adjusting the source power and the applied bias power, an etching operation can be performed, which can reduce the sidewall coverage of the deposited material while limiting any impact on the previously treated material.

[0055] Diatomic hydrogen or any other hydrogen-containing material can be used to generate plasma in the processing region by power delivered to the panel from a plasma power supply. Similarly, NF3-based plasmas can also be used. In some embodiments, the plasma power from both the source power and the bias power can be greater than the plasma power used during deposition. For example, the delivered plasma source power can be greater than or about 100 W, and can be greater than or about 200 W, greater than or about 300 W, greater than or about 400 W, or greater than or about 500 W. By increasing the plasma power during the formation of the modified plasma, a larger amount of plasma effluent can be generated. However, as the plasma power increases, the amount of material etched from the bottom of the structure can also increase. Therefore, in some embodiments, the plasma source power can be maintained at less than or about 500 W, less than or about 400 W, or less than or about 300 W. In addition, aspects of the bias power can also be adjusted. For example, in some etching / modification operations, the bias power can be higher than the plasma source power, which can provide sufficient power for the plasma to ensure that etching of lower quality materials (such as materials along the sidewalls that may not be processed during the deposition operation) occurs.

[0056] Applying a greater bias power can increase the ability to etch the deposited material. Although the bias power during deposition can be reduced to limit any etching effects, during the etching / modification operation, the bias power at any of the above frequencies can be increased to greater than or about 500 W, greater than or about 800 W, greater than or about 1000 W, greater than or about 1200 W, greater than or about 1400 W, greater than or about 1600 W, or greater than or about 1800 W. However, because the bias power can impart directionality, the bias power can be pulsed as discussed below, which can provide etching of lower quality materials while maintaining previously treated materials, and can modify and / or densify materials. The plasma effluent can then etch the flowable film at operation 220, and the flowable film can be removed from the sidewalls of the groove.

[0057] At the same time and advantageously, the more directionally delivered plasma effluents can penetrate the residual film formed at the bottom of the feature and can reduce hydrogen incorporation to densify the film in optional operation 225. As shown in FIG. 3C, material 317 can be removed from the sidewalls and overhanging regions of the substrate 305, which can retain deposited material in the bottom region of the feature and along the top region of the structure. As an additional benefit, the dense material 319 at the top of the structure can also protect the underlying material from damage by limiting any impact on the substrate material 305. The process can also provide reduced hydrogen incorporation in the residual material, such as less than or about 40 atomic percent (at.%), less than or about 35 at.%, less than or about 30 at.%, less than or about 25 at.%, less than or about 20 at.%, less than or about 15 at.%, less than or about 10 at.%, or less than or about 5 at.%.

[0058] By adjusting one or more characteristics of the supplied plasma power or bias power, additional adjustments can be made to further increase the etching of the deposited material along the sidewalls of the feature. For example, in some embodiments, both the plasma power supply and the bias power supply can be operated in a continuous wave mode. In addition, one or both of these power supplies can be operated in a pulsed mode. In some embodiments, the source power can be operated in a continuous wave mode, while the bias power is operated in a pulsed mode. The pulse frequency of the bias power can be any of the pulse frequencies discussed above. The duty cycle of the bias power supply can be less than or about 75%, and the bias power supply can be operated at a duty cycle of less than or about 70%, less than or about 60%, less than or about 50%, less than less than or about 40%, less than or about 30%, less than or about 20%, less than or about 10%, less than or about 5%, or less. By operating the bias power supply with a reduced duty cycle (such as less than or about 50% of the on-time duty), more of the amount of time per cycle (such as during the off time) can perform a more isotropic etch within the feature, which can better remove material from the sidewalls.

[0059] Additional power configurations may also include synchronization of the source power and bias power in a master / slave relationship. For example, both power supplies may be operated in a pulsed manner, and the bias power supply may be synchronized so that the source power is activated after each pulse activation. A level-to-level pulse scheme may also be applied. For example, during the operation of the bias power, the source power may be operated at a first plasma power. During the remainder of the cycle when the bias power is off, the source power may be operated at a second plasma power, which may be greater than the first plasma power. This may increase isotropic etching by removing bias-induced directionality, or may increase the etching characteristics of the isotropic etching. The deposition and etching processes may be repeated cyclically any number of times to fill the feature.

[0060] Additionally, in some embodiments where it may be sought to convert silicon within a feature, the cycle may also include a conversion operation. By converting during each cycle, the problem of penetration through the feature may be completely resolved. Furthermore, by performing the conversion operation after curing and etching / modification, the deposited material may be removed from the sidewalls prior to conversion, which may limit lateral expansion of the film within the trench or feature between the sidewalls as previously described. The conversion may be performed in a different chamber than the deposition and disposal, although in some embodiments two or more (including all operations) may be performed in a single processing chamber. This may reduce queue time compared to conventional processing.

[0061] Method 200 continues with converting the amorphous silicon to another material. For example, after etching and densification, one or more conversion precursors may be delivered to a processing area of ​​the chamber. For example, a nitrogen-containing precursor, an oxygen-containing precursor, and / or a carbon-containing precursor may be delivered to a processing area of ​​the chamber along with any carrier or diluent gases. A plasma may be formed from the conversion precursors and may then contact the amorphous silicon material within the feature. In optional operation 230, plasma effluents of the conversion precursors may interact with the amorphous silicon material within the trench and convert the material to silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon oxycarbide, silicon carbonitride, or silicon oxycarbonitride, as well as any other material that may be used to convert an amorphous silicon film. The plasma power may be similar to the powers previously described and may be from about 100 W to as high as about 1,000 W or more for a capacitively coupled system and up to 10 kW or more for an inductively coupled plasma system, for example, although any type of conversion may also be performed.

[0062] Although the deposit may be formed to be several nanometers or more, by performing the etching process as described above, the thickness of the densified material may be controlled to a thickness of less than or about 500 Å, and may be less than or about 450 Å, less than or about 400 Å, less than or about 350 Å, less than or about 300 Å, less than or about 250 Å, less than or about 200 Å, less than or about 150 Å, less than or about 100 Å, less than or about 50 Å, or less. By controlling the thickness of the deposited material, conversion of the entire thickness may be performed more easily, and percolation problems common in conventional processing may be resolved. After the deposited material is converted, the process may then be completely repeated to continue to produce converted material through the feature upward.

[0063] With respect to deposition precursors used during any formation operation, any number of precursors may be used with the present technology. Silicon-containing precursors that may be used during any formation of silicon, formation of silicon oxide, or formation of silicon nitride may include, but are not limited to: silane (SiH4), disilane (Si2H6), trisilane, tetrasilane or other organosilanes, including cyclohexasilane, silicon tetrafluoride (SiF4), silicon tetrachloride (SiCl4), dichlorosilane (SiH2Cl2), tetraethyl orthosilicate (TEOS), and any other silicon-containing precursor that may be used for silicon-containing film formation. By utilizing higher order silanes, longer material chains may be produced, which may increase fluidity in some embodiments. In some embodiments, the silicon-containing material may be nitrogen-free, oxygen-free, and / or carbon-free. Oxygen-containing precursors used in any operation described throughout the present technology may include O2, N2O, NO2, O3, H2O, H2O2, and any other oxygen-containing precursor that may be used in silicon oxide film formation or other film formation. The nitrogen-containing precursor used in any operation may include N2, N2O, NO2, NH3, N2H2, and any other nitrogen-containing precursor that may be used in silicon nitride film formation. The carbon-containing precursor may be or may include any carbon-containing material, such as any hydrocarbon, or any other precursor that includes carbon. In any operation, one or more additional precursors may be included, such as an inert precursor that may include Ar, He, Xe, Kr, or other materials, such as nitrogen, ammonia, hydrogen, or other precursors.

[0064] Temperature and pressure may also affect the operation of the present technology. For example, in some embodiments, in order to promote film flow, the treatment may be performed at a temperature of less than or about 20°C, less than or about 0°C, less than or about -20°C, less than or about -50°C, less than or about -75°C, less than or about -100°C or less. Throughout the method (including during treatment and etching and conversion), the temperature may be maintained within any of these ranges. For any treatment, the pressure in the chamber may also be maintained relatively low, such as at a chamber pressure of less than or about 20 Torr, and the pressure may be maintained at less than or about 15 Torr, less than or about 10 Torr, less than or about 5 Torr, less than or about 3 Torr, less than or about 2 Torr, less than or about 1 Torr, less than or about 0.1 Torr or less. By performing treatment according to some embodiments of the present technology, improved narrow feature filling using silicon-containing materials may be produced.

[0065] As described above, an etch process to remove material from the feature sidewalls may be performed before or after the material is converted. In some embodiments, after deposition, the material is converted as described above. Process conditions are maintained so that the conversion process is more likely to act on the bottom material 315 and the top material 319. In contrast, the sidewall material 317 is less affected by the conversion process.

[0066] After converting the bottom material 315 and the top material 319, an etching process similar to that described above may be applied to remove the sidewall material 317 while leaving the converted bottom material and the converted top material substantially unaffected.

[0067] Spatially relative terms, such as "under," "below," "below," "above," "upper," and the like may be used herein to facilitate description of the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that, in addition to the orientation depicted in the drawings, spatially relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is flipped, an element described as being "below" or "beneath" other elements or features will be oriented "above" the other elements or features. Thus, the exemplary term "below" may cover both orientations of above and below. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly.

[0068] The use of the terms "a", "an", and "the" and similar reference words in the context of describing the materials and methods discussed herein (particularly in the context of the appended claims) should be understood to include both the singular and the plural, unless otherwise indicated herein or clearly contradicted by the context. The enumeration of ranges of values ​​herein is intended only to be used as a shorthand method of independently referring to each separate value falling within the range, unless otherwise indicated herein, and each separate value is incorporated into the specification as if it were individually enumerated herein. All methods described herein can be performed in any suitable order, unless otherwise indicated herein or clearly contradicted by the context. The use of any and all examples provided herein, or exemplary words (e.g., "such as"), is intended only to better illustrate the materials and methods, and is not intended to limit the scope, unless otherwise claimed. No language in the specification should be understood to indicate that any non-claimed element is important to the practice of the materials and methods of the present disclosure.

[0069] References throughout the specification to "one embodiment," "certain embodiments," "one or more embodiments," or "an embodiment" mean that the particular features, structures, materials, or characteristics described in conjunction with that embodiment are included in at least one embodiment of the present disclosure. Thus, phrases such as "in one or more embodiments," "in certain embodiments," "in an embodiment," or "in an embodiment" that appear throughout the specification do not necessarily refer to the same embodiment of the present disclosure. Furthermore, particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

[0070] Although the present disclosure has been described with reference to specific embodiments, it will be appreciated by those skilled in the art that the described embodiments are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations may be made to the methods and apparatus of the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure may include modifications and variations within the scope of the appended claims and their equivalents.

Claims

1. A method for depositing a silicon-based gap fill, the method comprising the following steps: Depositing a flowable silicon film on a surface having at least one feature therein, the feature having an opening width, one or more sidewalls, and The feature extends a depth from a top surface to a bottom of the substrate, the flowable silicon film being deposited as a top material on the top surface, as a sidewall material on the one or more sidewalls, and as a bottom material on the bottom; etching the sidewall material more selectively than the top material and the bottom material; and The top material and the bottom material are converted to form a converted material.

2. The method of claim 1, wherein the features have an opening width less than or equal to about 10 nm.

3. The method of claim 1 wherein the feature has a ratio of the depth to the opening width in a range of about 3:1 to about 30:

1.

4. The method according to claim 1, wherein the step of depositing the flowable silicon film comprises the following steps: The substrate surface is exposed to a deposition plasma comprising a plasma containing a silicon precursor. 5 . The method of claim 4 , wherein the silicon-containing precursor comprises one or more of the following: silane, disilane, trisilane, or tetrasilane.

6. The method of claim 4, wherein the deposition plasma further comprises one or more of H2, Ar, or He.

7. The method of claim 1 , wherein the step of selectively etching the sidewall material comprises the following steps: The substrate is exposed to a directed plasma comprising H2.

8. The method of claim 1, wherein the step of forming the conversion material comprises the following steps: The substrate surface is exposed to an oxidant plasma, and the conversion material includes silicon oxide.

9. The method of claim 8, wherein the oxidant plasma comprises a cycle of O2 / Ar plasma and Ar / He plasma.

10. The method of claim 1, wherein the substrate is maintained at a temperature of less than or equal to about 200°C.

11. A method for depositing a silicon-based gap fill, the method comprising the following steps: depositing a flowable silicon film on a surface of a substrate having at least one feature therein, the feature having an opening width, one or more sidewalls, and the feature extending a depth from a top surface to a bottom of the substrate, the flowable silicon film being deposited as a top material on the top surface, as a sidewall material on the one or more sidewalls, and as a bottom material on the bottom; selectively converting the top material and the bottom material to form a converted material; and The sidewall material is etched more selectively than the conversion material.

12. The method of claim 11, wherein the features have an opening width less than or equal to about 10 nm.

13. The method of claim 11 wherein the features have a ratio of the depth to the opening width in a range of about 3:1 to about 30:

1.

14. The method of claim 11, wherein the step of depositing the flowable silicon film comprises the steps of: The substrate surface is exposed to a deposition plasma comprising a plasma containing a silicon precursor.

15. The method of claim 14, wherein the silicon-containing precursor comprises one or more of silane, disilane, trisilane, or tetrasilane.

16. The method of claim 14, wherein the deposition plasma further comprises one or more of H2, Ar, or He.

17. The method of claim 11, wherein the step of forming the conversion material comprises the steps of: The substrate surface is exposed to a directed oxidant plasma, and the conversion material includes silicon oxide.

18. The method of claim 17, wherein the oxidant plasma comprises a cycle of O2 / Ar plasma and Ar / He plasma.

19. The method of claim 11, wherein the step of selectively etching the sidewall material comprises the steps of: The substrate is exposed to a plasma comprising H2.

20. The method of claim 11, wherein the substrate is maintained at a temperature of less than or equal to about 200°C.