SiC power MOSFET device aging monitoring circuit and method

Abstract

The invention discloses a SiC power MOSFET device aging monitoring circuit and method, and the monitoring circuit comprises a microprocessor which is used for providing a control signal for the monitoring circuit, and controlling the on and off of the monitoring circuit. And the current sampling module is used for sampling the current of the specific time sequence of the power loop. And the signal operation module is used for carrying out mathematical operation on the collected voltage signal and current signal to obtain characteristic parameters reflecting the failure condition of the bonding wire. And the signal processing module is used for controlling the switching time sequence of the signal operation module and the current sampling module. According to the method, the bonding wire failure process is monitored according to the relationship between the voltages at the two ends of the Kelvin source and the power source and the power loop current and the relationship between the voltages at the two ends of the Kelvin source and the power source and the inductances at the two ends of the Kelvin source and the power source, and the inductances at the two ends of the Kelvin source and the power source are only related to the voltages at the two ends of the Kelvin source and the power loop current; the method is not influenced by other parameters such as junction temperature and bus voltage. According to the method, monitoring is carried out in the device turn-off process, and the potential of real-time online monitoring is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of MOSFET device monitoring, and in particular to a SiC power MOSFET device aging monitoring circuit and method based on an induced voltage across a Kelvin source and a power source during a shutdown process. Background Art

[0002] In recent years, as a wide bandgap semiconductor material, silicon carbide (SiC) has material properties such as high breakdown field strength and high thermal conductivity, and has advantages such as high voltage resistance and fast switching speed. It has good application prospects in high-frequency and high-temperature applications and has significant performance advantages in vehicle converters. However, complex and harsh working conditions make SiC power MOSFET devices more prone to aging, and the resulting failures may cause huge losses.

[0003] Among the various failure situations of SiC power MOSFET, bond wire breakage caused by the mismatch of thermal expansion coefficients between different materials is one of the common reasons. When a bond wire breaks, the current density through other bond wires will increase, which will accelerate the aging process of the bond wire. When all the bond wires are broken, the power equipment stops working, resulting in major system failures and disasters. In addition, due to the higher current density and greater temperature changes of SiC power MOSFET, the bond wire failure of SiC power MOSFET may be more prominent than that of IGBT modules. Therefore, it is very important to monitor the failure process of the device and replace the severely aged SiC power MOSFET devices in advance to effectively ensure the reliable operation of the system.

[0004] Currently, the methods for monitoring the bonding wire status of SiC power MOSFET devices are still under development, and many methods still have many disadvantages. For example, the voltage across the Kelvin source and power source is used for monitoring, and the failure of the bonding wire is reflected by measuring the change in voltage or resistance. However, the change when the bonding wire fails is not obvious enough, which is not conducive to identification, and the effect of temperature on the resistance of the bonding wire will also interfere with the monitoring results. The on-resistance and body diode voltage drop are related to the failure of the bonding wire, and can also be used as parameters to evaluate the aging degree of the bonding wire of the SiC power MOSFET. However, it will be affected by the junction temperature and other aging types, resulting in inaccurate monitoring results. Summary of the invention

[0005] In order to solve the technical problem that the bonding wire status of a SiC power MOSFET device cannot be monitored efficiently and accurately in the prior art, the present invention provides a SiC power MOSFET device aging monitoring circuit and method based on the induced voltage across the Kelvin source and the power source during the shutdown process. The present invention monitors the health status of the bonding wire during the shutdown transient process of the SiC power MOSFET, thereby realizing real-time online monitoring of the SiC power MOSFET; and the proposed characteristic parameter is sensitive to the fracture of the bonding wire, thereby effectively realizing the monitoring of the health status of the bonding wire of the SiC power MOSFET.

[0006] The technical solution adopted by the present invention is:

[0007] The SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process includes: a microprocessor, a signal processing module, a current sampling module, a signal operation module, and a current sampling module;

[0008] The signal output end of the signal processing module is respectively connected to the signal input end of the signal operation module and the signal input end of the current sampling module, the signal input end of the signal processing module is respectively connected to the signal output end of the microprocessor and the Kelvin source of the SiC power MOSFET, and the signal output end of the current sampling module is connected to the signal input end of the signal operation module.

[0009] The microprocessor is used to provide a control signal to the monitoring circuit to control the on and off of the monitoring circuit.

[0010] The current sampling module is used to sample the current of a specific time sequence of the power circuit.

[0011] The signal operation module is used to perform mathematical operations on the collected voltage signal and current signal to obtain characteristic parameters reflecting the failure status of the bonding wire.

[0012] The signal processing module is used to control the switching timing of the signal operation module and the current sampling module.

[0013] The current sampling module includes: a resistor R5, a capacitor C3, a diode D2, an N-channel enhancement type MOSFET2 with a parallel body diode, and an operational amplifier Amp1;

[0014] One end of the resistor R5 is respectively connected to the non-inverting input end of the operational amplifier Amp1, the anode of the freewheeling diode D1 in the dual pulse circuit, and one end of the load inductor L1; the other end of the resistor R5 is respectively connected to the drain of the N-channel enhancement type MOSFET2 in the dual pulse circuit and the inverting input end of the operational amplifier Amp1;

[0015] The output end of the operational amplifier Amp1 is connected to the source of the N-channel enhancement type MOSFET2; the drain of the N-channel enhancement type MOSFET2 is connected to the anode of the diode D2; the cathode of the diode D2 is respectively connected to one end of the capacitor C3 and the denominator input end of the divider Div in the signal operation module; the other end of the capacitor C3 is connected to the ground end.

[0016] The signal operation module includes: resistors R6, R7, capacitor C4, N-channel enhancement type MOSFET3 with parallel body diode, operational amplifier Amp2, single-pole double-throw switch ST2, divider Div;

[0017] One input end of the single-pole double-throw switch ST2 is connected to the Kelvin source of the N-channel enhancement type MOSFET1 in the double pulse circuit, the other input end of the single-pole double-throw switch ST2 is connected to the ground terminal, and the output end of the single-pole double-throw switch ST2 is connected to one end of the resistor R6; the other end of the resistor R6 is respectively connected to the inverting input end of the operational amplifier Amp2, one end of the capacitor C4, and the source of the N-channel enhancement type MOSFET3;

[0018] The other end of the capacitor C4 is connected to the output end of the operational amplifier Amp2; the drain of the N-channel enhancement type MOSFET3 is connected to the output end of the operational amplifier Amp2;

[0019] One end of the resistor R7 is connected to the non-inverting input terminal of the operational amplifier Amp2, and the other end of the resistor R7 is connected to the ground terminal;

[0020] An output terminal of the operational amplifier Amp2 is connected to a numerator input terminal of the divider Div.

[0021] The signal processing module includes: resistors R1, R2, R3, capacitor C1, comparator Comp, single-pole double-throw switch ST1, AND gate And, NOT gates Not1, Not2, DC voltage source V AUX ;

[0022] The input end of the NOT gate Not1 is connected to the control signal Sc sent by the microprocessor, and the output end of the NOT gate Not1 is respectively connected to the control end of the single-pole double-throw switch ST1, an input end of the AND gate And, and the gate of the N-channel enhancement MOSFET2 in the current sampling module;

[0023] DC voltage source V AUX They are respectively connected to one end of the resistor R2 and one input end of the single-pole double-throw switch ST1; the other input end of the single-pole double-throw switch ST1 is connected to the ground end, and the output end of the single-pole double-throw switch ST1 is connected to one end of the resistor R1;

[0024] The other end of the resistor R1 is connected to one end of the capacitor C1 and the inverting input end of the comparator Comp respectively; the other end of the capacitor C1 is connected to the ground end;

[0025] The other end of the resistor R2 is connected to one end of the resistor R3 and the non-inverting input end of the comparator Comp respectively; the other end of the resistor R3 is connected to the ground end;

[0026] The output end of the comparator Comp is connected to the other input end of the AND gate And; the output end of the AND gate And is respectively connected to the input end of the NOT gate Not2 and the control end of the single-pole double-throw switch ST2 in the signal operation module; the output end of the NOT gate Not2 is connected to the gate of the N-channel enhancement MOSFET3 in the signal operation module.

[0027] The aging monitoring method of SiC power MOSFET device based on the induced voltage between the Kelvin source and the power source during the shutdown process includes:

[0028] First, the output of the signal processing module is used as the control signal to control the current sampling module to measure the power loop current i at the time when the SiC power MOSFET device is turned off. c Collect data and continuously output them to the signal operation module;

[0029] Then, the output of the signal processing module is used as the control signal, and the control signal operation module performs the control on v ks_s Integrate in one monitoring cycle and convert v ks_s The integral result and power loop current i c Perform division operation and output characteristic parameter L that can reflect the aging process of bonding wire cm ;

[0030] When the bonding wire fails, its inductance increases, and the inductance between the Kelvin source and the power source will increase, that is, the characteristic parameter L cm increases; and as the number of bond wire breaks increases, the characteristic parameter L cm The degree of change will also be more obvious, thereby better monitoring the failure process of the bonding wire, facilitating early detection and replacement of SiC power MOSFET devices whose bonding wires have been significantly deteriorated, and effectively ensuring the reliable operation of the system in which the device is located.

[0031] The aging monitoring method of SiC power MOSFET device based on the induced voltage between the Kelvin source and the power source during the shutdown process includes the following steps:

[0032] Step 1: Obtain the power loop current i when the SiC power MOSFET device is turned off c , and transmit it to the signal operation module;

[0033] Step 2: Get the voltage v across the Kelvin source and power source ks_s The integration results in one monitoring cycle;

[0034] Step 3: Convert the above signal v ks_s The integral and power loop current i c Perform division calculation to obtain the characteristic parameter L corresponding to the aging of the bonding wire. cm .

[0035] The characteristic parameter L obtained through the above steps cm , which is the inductance between the Kelvin source and the power source. If the power source bonding wire breaks during the long-term operation of the device, its inductance will increase, and the inductance between the Kelvin source and the power source will also increase. Therefore, the characteristic parameter L cm The change in reflects the failure process of the bonding wire, and the device can be replaced before it completely fails to ensure the safe and economical operation of the system.

[0036] In step 1, the output of the signal processing module is used as a control signal to control the current sampling module to detect the power loop current i at the time when the device is turned off. c Collect and continuously output it to the signal operation module.

[0037] In step 2 and step 3, the output of the signal processing module is used as the control signal, and the control signal operation module performs the control on v ks_s Integrate in one monitoring cycle and convert v ks_s The integral result and i obtained in step 1 c Perform division operation and output characteristic parameter L that can reflect the aging process of bonding wire cm .

[0038] The present invention provides a SiC power MOSFET device aging monitoring circuit and method based on the induced voltage between the Kelvin source and the power source during the shutdown process, and the technical effects are as follows:

[0039] 1) The present invention monitors the health status of the bonding wires during the shutdown transient process of the SiC power MOSFET, thereby realizing real-time online monitoring of the device; and the proposed characteristic parameters are sensitive to the fracture of the bonding wires, which can effectively realize the monitoring of the health status of the bonding wires of the SiC power MOSFET.

[0040] 2) The present invention utilizes the voltage v between the Kelvin source and the power source ks_s and power circuit current i c , Kelvin source and power source inductance L cm The relationship between the bonding wire failure process is used to monitor the failure process of the bonding wire. The characteristic parameters of the Kelvin source and the power source inductance L cm Only with v ks_s 、i c It is not affected by other parameters such as junction temperature and bus voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a structural block diagram of the monitoring circuit in the present invention.

[0042] Figure 2 This is a circuit schematic diagram of the current sampling module in the present invention.

[0043] Figure 3 This is a circuit schematic diagram of the signal operation module in the present invention.

[0044] Figure 4 This is a circuit schematic diagram of the signal processing module in the present invention.

[0045] Figure 5 It is the principle diagram of the monitoring circuit in the present invention.

[0046] Figure 6 It is a timing diagram of the monitoring circuit in the present invention.

[0047] Figure 7 This is a simulation diagram of the monitoring circuit in the present invention. DETAILED DESCRIPTION

[0048] Principle analysis:

[0049] The bonding wire of SiC power MOSFET devices contains parasitic inductance. As SiC power MOSFET devices operate for a long time, the power source bonding wire will break, its inductance will increase, and the inductance value between the Kelvin source and the power source will also increase. Therefore, the failure process of the bonding wire can be reflected by monitoring the change of the inductance value between the Kelvin source and the power source, and the device can be replaced before the device completely fails to ensure the safe and economical operation of the system.

[0050] The failure process of the bonding wire is monitored by using the relationship between the voltage at the Kelvin source and the power source and the power loop current and the inductance at the Kelvin source and the power source. The inductance at the Kelvin source and the power source is only related to the voltage at the Kelvin source and the power source and the power loop current, and is not affected by other parameters such as junction temperature and bus voltage. In addition, this method monitors during the device shutdown process and has the potential for real-time online monitoring.

[0051] The aging monitoring method of SiC power MOSFET device based on the induced voltage across the Kelvin source and the power source during the shutdown process is based on the following monitoring idea: the bonding wire of SiC power MOSFET device contains parasitic inductance, and the defects of the bonding wire will increase its impedance, and the inductance value between the Kelvin source and the power source will also increase accordingly. This monitoring method is based on the above facts and uses the voltage v between the Kelvin source and the power source during the shutdown process. ks_s and power circuit current i c , Kelvin source and power source inductance Lcm The relationship between the bonding wire defect state is characterized by the inductance L between the Kelvin source and the power source. cm The health status of the bonding wire of the SiC power MOSFET device with Kelvin source can be monitored by detecting the changes in the bonding wire. The following steps are included:

[0052] Step 1: Obtain the power loop current i when the SiC power MOSFET device is turned off c , and transmit it to the signal operation module;

[0053] Step 2: Get the voltage v across the Kelvin source and power source ks_s The integration results in one monitoring cycle;

[0054] Step 3: Convert the above signal v ks_s The integral and i c Perform division calculation to obtain the characteristic parameter L corresponding to the aging of the bonding wire. cm .

[0055] The characteristic parameter L obtained through the above steps cm , which is the inductance between the Kelvin source and the power source. If the power source bonding wire breaks during the long-term operation of the device, its inductance will increase, and the inductance between the Kelvin source and the power source will also increase. Therefore, the characteristic parameter L cm The change in reflects the failure process of the bonding wire, and the device can be replaced before it completely fails to ensure the safe and economical operation of the system.

[0056] In step 1, the output of the signal processing module is used as a control signal to control the current sampling module to detect the power loop current i at the time when the device is turned off. c Collect and continuously output it to the signal operation module.

[0057] The current sampling module includes: a resistor R5, a capacitor C3, a diode D2, an N-channel enhancement type MOSFET2 with a parallel body diode, and an operational amplifier Amp1;

[0058] One end of the resistor R5 is simultaneously connected to the non-inverting input terminal of the operational amplifier Amp1, the anode of the freewheeling diode D1 in the dual pulse circuit and one end of the load inductor L1, and the other end of the resistor R5 is simultaneously connected to the drain of the N-channel enhancement type MOSFET2 in the dual pulse circuit and the inverting input terminal of the operational amplifier Amp1; the output terminal of the operational amplifier Amp1 is connected to the source of the N-channel enhancement type MOSFET2; the drain of the N-channel enhancement type MOSFET2 is connected to the anode of the diode D2; the cathode of the diode D2 is simultaneously connected to one end of the capacitor C3 and the denominator input terminal of the divider Div in the signal operation module, and the other end of the capacitor C3 is connected to the ground terminal.

[0059] like Figure 5 As shown, the double pulse circuit includes: a capacitor C2, a load inductor L1, a freewheeling diode D1, a resistor R4, a SiC power MOSFET and a SiC power MOSFET driver drv.

[0060] One end of the capacitor C2 is connected to the cathode of the freewheeling diode D1 and one end of the load inductor L1 at the same time, and the other end of the capacitor C2 is connected to the source S of the SiC power MOSFET, one end of R7 in the signal operation module and the ground end at the same time; the other end of the load inductor L1 is connected to the anode of the freewheeling diode D1 and one end of R5 in the current sampling module at the same time; one input end of the SiC power MOSFET driver drv is connected to the control signal Sc sent by the microprocessor, the other input end of the SiC power MOSFET driver drv is connected to the ground end, one output end of the SiC power MOSFET driver drv is connected to one end of the resistor R4, and the other output end of the SiC power MOSFET driver drv is connected to the Kelvin source KS of the SiC power MOSFET and one input end of the single-pole double-throw switch ST2 in the signal operation module at the same time; the other end of the resistor R4 is connected to the gate G of the SiC power MOSFET; the drain of the SiC power MOSFET is connected to the other end of R5 in the current sampling module.

[0061] In step 2 and step 3, the output of the signal processing module is used as the control signal, and the control signal operation module performs the control on v ks_s Integrate in one monitoring cycle and convert v ks_s The integral result and i obtained in step 1 c Perform division operation and output characteristic parameter L that can reflect the aging process of bonding wire cm .

[0062] The signal operation module includes: resistors R6, R7, capacitor C4, N-channel enhancement type MOSFET3 with parallel body diode, operational amplifier Amp2, single-pole double-throw switch ST2, divider Div;

[0063] One input end of the single-pole double-throw switch ST2 is connected to the Kelvin source of the N-channel enhancement type MOSFET1 in the double pulse circuit, the other input end of the single-pole double-throw switch ST2 is connected to the ground end, and the output end of the single-pole double-throw switch ST2 is connected to one end of the resistor R6; the other end of R6 is simultaneously connected to the inverting input end of the operational amplifier Amp2, one end of the capacitor C4 and the source of the N-channel enhancement type MOSFET3; the other end of the capacitor C4 is connected to the output end of the operational amplifier Amp2; the drain of the N-channel enhancement type MOSFET3 is connected to the output end of the operational amplifier Amp2; one end of the resistor R7 is connected to the non-inverting input end of the operational amplifier Amp2, and the other end of the resistor R7 is connected to the ground end; the output end of the operational amplifier Amp2 is connected to the numerator input end of the divider;

[0064] The signal processing module includes: resistors R1, R2, R3, capacitor C1, comparator Comp, single-pole double-throw switch ST1, AND gate And, NOT gates Not1, Not2, DC voltage source V AUX ;

[0065] The input end of the NOT gate Not1 is connected to the control signal Sc sent by the microprocessor, and the output end of the NOT gate Not1 is simultaneously connected to the control end of the single-pole double-throw switch ST1, an input end of the AND gate And, and the gate of the N-channel enhancement MOSFET2 in the current sampling module; the DC voltage source V AUX At the same time, it is connected to one end of resistor R2 and one input end of single-pole double-throw switch ST1; the other input end of single-pole double-throw switch ST1 is connected to the ground end, and the output end of single-pole double-throw switch ST1 is connected to one end of resistor R1; the other end of resistor R1 is simultaneously connected to one end of capacitor C1 and the inverting input end of comparator Comp; the other end of capacitor C1 is connected to the ground end; the other end of resistor R2 is simultaneously connected to one end of resistor R3 and the non-inverting input end of comparator Comp; the other end of resistor R3 is connected to the ground end; the output end of comparator Comp is connected to the other input end of AND gate And; the output end of AND gate And is simultaneously connected to the input end of NOT gate Not2 and the control end of single-pole double-throw switch ST2 in the signal operation module; the output end of NOT gate Not2 is connected to the gate of N-channel enhancement MOSFET3 in the signal operation module.

[0066] like Figure 1 to Figure 5 As shown, the present invention also includes a SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process, including a microprocessor, a current sampling module, a signal operation module, and a signal processing module;

[0067] The signal output end of the signal processing module is respectively connected to the signal input end of the signal operation module and the signal input end of the current sampling module, the signal input end of the signal processing module is respectively connected to the signal output end of the microprocessor and the Kelvin source of the SiC power MOSFET, and the signal output end of the current sampling module is connected to the signal input end of the signal operation module.

[0068] The microprocessor is used to provide a control signal to the monitoring circuit to control the opening and closing of the monitoring circuit;

[0069] The current sampling module is used to sample the current of the power circuit at a specific timing;

[0070] A signal operation module is used to perform mathematical operations on the collected voltage signal and current signal to obtain characteristic parameters reflecting the failure of the bonding wire;

[0071] The signal processing module is used to control the switching timing of the signal operation module and the current sampling module.

[0072] The current sampling module includes: a resistor R5, a capacitor C3, a diode D2, an N-channel enhancement type MOSFET2 with a parallel body diode, and an operational amplifier Amp1;

[0073] One end of the resistor R5 is simultaneously connected to the non-inverting input end of the operational amplifier Amp1, the anode of the freewheeling diode D1 in the dual pulse circuit and one end of the load inductor L1, and the other end of the resistor R5 is simultaneously connected to the drain of the N-channel enhancement type MOSFET2 in the dual pulse circuit and the inverting input end of the operational amplifier Amp1; the output end of the operational amplifier Amp1 is connected to the source of the N-channel enhancement type MOSFET2; the drain of the N-channel enhancement type MOSFET2 is connected to the anode of the diode D2; the cathode of the diode D2 is simultaneously connected to one end of the capacitor C3 and the denominator input end of the divider Div in the signal operation module, and the other end of the capacitor C3 is connected to the ground end;

[0074] The signal operation module includes: resistors R6, R7, capacitor C4, N-channel enhancement type MOSFET3 with parallel body diode, operational amplifier Amp2, single-pole double-throw switch ST2, divider Div;

[0075] One input end of the single-pole double-throw switch ST2 is connected to the Kelvin source of the N-channel enhancement type MOSFET1 in the double pulse circuit, the other input end of the single-pole double-throw switch ST2 is connected to the ground end, and the output end of the single-pole double-throw switch ST2 is connected to one end of the resistor R6; the other end of R6 is simultaneously connected to the inverting input end of the operational amplifier Amp2, one end of the capacitor C4 and the source of the N-channel enhancement type MOSFET3; the other end of the capacitor C4 is connected to the output end of the operational amplifier Amp2; the drain of the N-channel enhancement type MOSFET3 is connected to the output end of the operational amplifier Amp2; one end of the resistor R7 is connected to the non-inverting input end of the operational amplifier Amp2, and the other end of the resistor R7 is connected to the ground end; the output end of the operational amplifier Amp2 is connected to the numerator input end of the divider;

[0076] The signal processing module includes: resistors R1, R2, R3, capacitor C1, comparator Comp, single-pole double-throw switch ST1, AND gate And, NOT gates Not1, Not2, DC voltage source V AUX ;

[0077] The input end of the NOT gate Not1 is connected to the control signal Sc sent by the microprocessor, and the output end of the NOT gate Not1 is simultaneously connected to the control end of the single-pole double-throw switch ST1, an input end of the AND gate And, and the gate of the N-channel enhancement MOSFET2 in the current sampling module; the DC voltage source V AUX At the same time, it is connected to one end of resistor R2 and one input end of single-pole double-throw switch ST1; the other input end of single-pole double-throw switch ST1 is connected to the ground end, and the output end of single-pole double-throw switch ST1 is connected to one end of resistor R1; the other end of resistor R1 is simultaneously connected to one end of capacitor C1 and the inverting input end of comparator Comp; the other end of capacitor C1 is connected to the ground end; the other end of resistor R2 is simultaneously connected to one end of resistor R3 and the non-inverting input end of comparator Comp; the other end of resistor R3 is connected to the ground end; the output end of comparator Comp is connected to the other input end of AND gate And; the output end of AND gate And is simultaneously connected to the input end of NOT gate Not2 and the control end of single-pole double-throw switch ST2 in the signal operation module; the output end of NOT gate Not2 is connected to the gate of N-channel enhancement MOSFET3 in the signal operation module.

[0078] Working principle of the present invention:

[0079] Using the voltage v between the Kelvin source and the power source during the shutdown process ks_s With the power loop current ic, Kelvin source and the inductance L at both ends of the power source cm The failure process of the bonding wire is monitored by the relationship between the two. During the shutdown process of the SiC power MOSFET device, the following relationship exists:

[0080]

[0081] Among them, v ks_s is the voltage across the Kelvin source and power source, R KS_L is the equivalent resistance of the Kelvin source pin, R KS_BW is the equivalent resistance of the Kelvin source bonding wire, i G is the gate current in the drive circuit, L KS_L is the equivalent inductance of the Kelvin pin, L KS_BW is the equivalent inductance of the Kelvin source bond wire, R S_L is the equivalent resistance of the power source pin, R S_BW is the equivalent resistance of the power source bonding wire, i DS is the drain-to-source power current, L S_L is the equivalent inductance of the power source pin, L S_BW is the equivalent inductance of the power source bonding wire;

[0082] Integrating both ends of the above equation with respect to time t, we can obtain:

[0083]

[0084] in

[0085] In the above formula, the gate current i G The integral of time t is the gate charge Q G , which is of the order of nC and can be ignored; since the device turns off very quickly, the time Ts for integrating this process is also very short, so the drain-power source current i DS The value after integrating time t is very small and can be ignored. Therefore, the above formula can be simplified to:

[0086]

[0087] From the above formula, the sum of the equivalent inductance of the Kelvin pin part and the parasitic inductance of the power source bonding wire can be expressed as:

[0088]

[0089] Among them, i DS(0) The sum of the equivalent inductance of the Kelvin pin part and the parasitic inductance of the power source bonding wire is taken as the characteristic parameter, and L cm To express.

[0090] The present invention uses the signal processing module to realize the timing control of other modules of the monitoring system. DS(0)Collect data and output them to the signal operation module; use the signal operation module to ks_s Integrate in one monitoring cycle to obtain The value of and i DS(0) Perform division operation to obtain the characteristic parameter L that can reflect the aging process of the bonding wire. cm .

[0091] The timing diagram of each part of the monitoring circuit is as follows Figure 6 shown.

[0092] t 0 --t 1 In the stage, when Sc is high, Si1 and Si2 are both low, and Si3 is high. The SiC power MOSFET gate driver outputs a forward voltage +Vs to turn on the SiC power MOSFET. L Flows along the dotted line path; N-channel enhancement MOSFET2 is turned off.

[0093] t 1 --t 2 The stage is the state monitoring stage. Sc is low level, Si1 and Si2 are both high level, and Si3 is low level. The SiC power MOSFET gate driver outputs a negative voltage -Vm to turn off the SiC power MOSFET. L The solid line path flows; N-channel enhancement MOSFET2 is turned on, the current sampling module works, collects the current at time t0 and outputs it to the signal operation module; N-channel enhancement MOSFET3 is turned off, the single-pole double-throw switch ST2 is connected to the Kelvin source of the SiC power MOSFET, and the signal operation module converts t 1 to 2 v in time ks_s Integrate it and divide it with the output of the current sampling module to obtain L cm It can be used to characterize the aging of SiC power MOSFET bonding wires.

[0094] t 2 --t 3 In the stage, Sc is still at a low level, Si1 and Si3 are at a high level, and Si2 is at a low level. The SiC power MOSFET is still turned off; the N-channel enhancement MOSFET3 is turned on, the capacitor C3 is discharged, and the single-pole double-throw switch ST2 is connected to the ground terminal; the double-pulse circuit waits for the next switching cycle.

[0095] The effect achieved by the monitoring circuit is as follows Figure 7 As shown. Figure 7 In the figure, i represents the number of failed bonding wires in SiC power MOSFET devices. Figure 7 It can be seen from the figure that when the bonding wire fails, the characteristic parameter L cm The L cm It also increases accordingly. This shows that through the characteristic parameter L cm The change of can reflect the failure process of the bonding wire.

Claims

1. A SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process, characterized in that include: Microprocessor, signal processing module, current sampling module, signal operation module, current sampling module; The signal output end of the signal processing module is respectively connected to the signal input end of the signal operation module and the signal input end of the current sampling module, the signal input end of the signal processing module is respectively connected to the signal output end of the microprocessor and the Kelvin source of the SiC power MOSFET, and the signal output end of the current sampling module is connected to the signal input end of the signal operation module.

2. The SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process according to claim 1, characterized in that: The microprocessor is used to provide a control signal to the monitoring circuit to control the opening and closing of the monitoring circuit; The current sampling module is used to sample the current of a specific time sequence of the power circuit; The signal operation module is used to perform mathematical operations on the collected voltage signal and current signal to obtain characteristic parameters reflecting the failure of the bonding wire; The signal processing module is used to control the switching timing of the signal operation module and the current sampling module.

3. The SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process according to claim 2, characterized in that: The current sampling module includes: a resistor R5, a capacitor C3, a diode D2, an N-channel enhancement type MOSFET2 with a parallel body diode, and an operational amplifier Amp1; One end of the resistor R5 is respectively connected to the non-inverting input end of the operational amplifier Amp1, the anode of the freewheeling diode D1 in the dual pulse circuit, and one end of the load inductor L1; the other end of the resistor R5 is respectively connected to the drain of the N-channel enhancement type MOSFET2 in the dual pulse circuit and the inverting input end of the operational amplifier Amp1; The output end of the operational amplifier Amp1 is connected to the source of the N-channel enhancement type MOSFET2; the drain of the N-channel enhancement type MOSFET2 is connected to the anode of the diode D2; the cathode of the diode D2 is respectively connected to one end of the capacitor C3 and the denominator input end of the divider Div in the signal operation module; the other end of the capacitor C3 is connected to the ground end.

4. The SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process according to claim 3, characterized in that: The signal operation module includes: resistors R6, R7, capacitor C4, N-channel enhancement type MOSFET3 with parallel body diode, operational amplifier Amp2, single-pole double-throw switch ST2, divider Div; One input end of the single-pole double-throw switch ST2 is connected to the Kelvin source of the N-channel enhancement type MOSFET1 in the double pulse circuit, the other input end of the single-pole double-throw switch ST2 is connected to the ground terminal, and the output end of the single-pole double-throw switch ST2 is connected to one end of the resistor R6; the other end of the resistor R6 is respectively connected to the inverting input end of the operational amplifier Amp2, one end of the capacitor C4, and the source of the N-channel enhancement type MOSFET3; The other end of the capacitor C4 is connected to the output end of the operational amplifier Amp2; the drain of the N-channel enhancement type MOSFET3 is connected to the output end of the operational amplifier Amp2; One end of the resistor R7 is connected to the non-inverting input terminal of the operational amplifier Amp2, and the other end of the resistor R7 is connected to the ground terminal; An output terminal of the operational amplifier Amp2 is connected to a numerator input terminal of the divider Div.

5. The SiC power MOSFET device aging monitoring circuit based on the induced voltage between the Kelvin source and the power source during the shutdown process according to claim 4, characterized in that: The signal processing module includes: resistors R1, R2, R3, capacitor C1, comparator Comp, single-pole double-throw switch ST1, AND gate And, NOT gates Not1, Not2, DC voltage source V AUX ; The input end of the NOT gate Not1 is connected to the control signal Sc sent by the microprocessor, and the output end of the NOT gate Not1 is respectively connected to the control end of the single-pole double-throw switch ST1, an input end of the AND gate And, and the gate of the N-channel enhancement MOSFET2 in the current sampling module; DC voltage source V AUX They are respectively connected to one end of the resistor R2 and one input end of the single-pole double-throw switch ST1; the other input end of the single-pole double-throw switch ST1 is connected to the ground end, and the output end of the single-pole double-throw switch ST1 is connected to one end of the resistor R1; The other end of the resistor R1 is connected to one end of the capacitor C1 and the inverting input end of the comparator Comp respectively; the other end of the capacitor C1 is connected to the ground end; The other end of the resistor R2 is connected to one end of the resistor R3 and the non-inverting input end of the comparator Comp respectively; the other end of the resistor R3 is connected to the ground end; The output end of the comparator Comp is connected to the other input end of the AND gate And; the output end of the AND gate And is respectively connected to the input end of the NOT gate Not2 and the control end of the single-pole double-throw switch ST2 in the signal operation module; the output end of the NOT gate Not2 is connected to the gate of the N-channel enhancement MOSFET3 in the signal operation module.

6. A method for monitoring SiC power MOSFET device aging based on the induced voltage between the Kelvin source and the power source during the shutdown process, characterized in that: First, the output of the signal processing module is used as the control signal to control the current sampling module to measure the power loop current i at the time when the SiC power MOSFET device is turned off. c Collect data and continuously output them to the signal operation module; Then, the output of the signal processing module is used as the control signal, and the control signal operation module performs the control on v ks_s Integrate within a monitoring cycle and convert v ks_s The integral result and power loop current i c Perform division operation and output characteristic parameter L that can reflect the aging process of bonding wire cm ; When the bonding wire fails, its inductance increases, and the inductance between the Kelvin source and the power source will increase, that is, the characteristic parameter L cm increases; and as the number of bond wire breaks increases, the characteristic parameter L cm The degree of change will also be more obvious, thereby better monitoring the failure process of the bonding wire.

7. A method for monitoring SiC power MOSFET device aging based on the induced voltage between the Kelvin source and the power source during the shutdown process, characterized in that The following steps are involved: Step 1: Obtain the power loop current i when the SiC power MOSFET device is turned off c , and transmit it to the signal operation module; Step 2: Get the voltage v across the Kelvin source and power source ks_s The integration results in one monitoring cycle; Step 3: Convert the above signal v ks_s The integral and power loop current i c Perform division calculation to obtain the characteristic parameter L corresponding to the aging of the bonding wire. cm ; The characteristic parameter L obtained through the above steps cm , which is the inductance between the Kelvin source and the power source. If the power source bonding wire breaks during the long-term operation of the device, its inductance will increase, and the inductance between the Kelvin source and the power source will also increase. Therefore, the characteristic parameter L cm The change of reflects the failure process of the bonding wire.

8. The SiC power MOSFET device aging monitoring method based on the induced voltage between the Kelvin source and the power source during the shutdown process according to claim 7, characterized in that: In step 1, the output of the signal processing module is used as a control signal to control the current sampling module to detect the power loop current i at the time when the device is turned off. c Collect and continuously output it to the signal operation module.

9. The SiC power MOSFET device aging monitoring method based on the induced voltage between the Kelvin source and the power source during the shutdown process according to claim 7, characterized in that: In step 2 and step 3, the output of the signal processing module is used as the control signal, and the control signal operation module performs the control on v ks_s Integrate within a monitoring cycle and convert v ks_s The integral result and i obtained in step 1 c Perform division operation and output characteristic parameter L that can reflect the aging process of bonding wire cm .

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