Performance-optimized passive DHTRB test circuit, method and product

Abstract

The invention discloses a passive DHTRB test circuit, method and product with optimized performance. The test circuit comprises a power supply, a first test accompanying tube S1, a second test accompanying tube S2, a tested device DUT, a positive overshoot circuit and a negative overshoot circuit. The positive electrode of the power supply is connected to the input end of the positive electrode overshoot circuit, the output end of the positive electrode overshoot circuit is connected with the drain electrode of the first test accompanying tube S1, the source electrode of the first test accompanying tube S1 is connected with the second test accompanying tube S2 and the drain electrode of the tested device DUT, the source electrode of the second test accompanying tube S2 is connected with the input end of the negative electrode overshoot circuit, and the output end of the negative electrode overshoot circuit is connected with the source electrode of the tested device DUT and is connected to the negative electrode of the power supply; when the first test accompanying tube S1 is switched on and the second test accompanying tube S2 is switched off, the positive overshoot circuit outputs forward overshoot voltage to the outside; when the first test accompanying tube S1 is turned off and the second test accompanying tube S2 is turned on, the negative overshoot circuit outputs a reverse overshoot voltage to the outside. According to the invention, the dV / dt performance of the passive DHTRB test can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to a passive DHTRB test circuit, method and product for performance optimization in the field of semiconductor testing. BACKGROUND

[0002] At present, dynamic high temperature reverse bias aging system test (DHTRB test) is indispensable for MOSFET semiconductor device products. This includes passive mode DHTRB test, that is, the DUT does not actively participate in the circuit operation, but passively withstands the test of external high voltage stress. The purpose of the test is to simulate the device under voltage stress and detect its reliability, voltage breakdown resistance and long-term degradation stability, so as to efficiently screen static defects of the device.

[0003] The traditional passive DHTRB test circuit is shown in Figure 1 , which is composed of a first auxiliary measuring tube S1, a second auxiliary measuring tube S2, a bus capacitor , a power supply , line stray inductance and stray resistance, and a DUT. The voltage across the second auxiliary measuring tube S2 is . The voltage signal source is generated by the power supply and the switch tube, which reflects the switching action of the first auxiliary measuring tube S1 and the second auxiliary measuring tube S2. The output frequency of the first auxiliary measuring tube S1 and the second auxiliary measuring tube S2 is synchronized with the switching time sequence through the switching of the first auxiliary measuring tube S1 and the second auxiliary measuring tube S2. The voltage signal source is generated by the power supply and the switch tube, which reflects the switching action of the first auxiliary measuring tube S1 and the second auxiliary measuring tube S2. The output frequency of the first auxiliary measuring tube S1 and the second auxiliary measuring tube S2 is synchronized with the switching time sequence through the switching of the first auxiliary measuring tube S1 and the second auxiliary measuring tube S2. The RL filtered and DUT responsive hysteresis waveforms. In passive DHTRB test, The actual slope of the waveform represents the dV / dt voltage stress intensity of the DUT. The circuit controls the change rate of to indirectly constrain the change of .

[0004] In passive DHTRB test, in order to make the test have enough screening force, the requirement of dV / dt of DUT is higher and higher. The architecture of the above-mentioned traditional test circuit has no more way to improve dV / dt except adjusting the driving parameters of the auxiliary measuring tube and selecting auxiliary measuring tube with higher switching speed. It is limited in higher dV / dt demand occasions and difficult to realize the screening of DUT with high dV / dt requirement. SUMMARY

[0005] The purpose of the present application is to overcome the deficiencies of the prior art, provide a performance-optimized passive DHTRB test circuit, method and product, which can improve the dV / dt performance of passive DHTRB test.

[0006] In a first aspect, the present application provides a performance-optimized passive DHTRB test circuit, which adopts the following technical solution: The test circuit includes a power supply , a first auxiliary measuring tube S1, a second auxiliary measuring tube S2 and a device under test DUT, and further includes a positive overshoot circuit and a negative overshoot circuit; The first auxiliary measuring tube S1, the second auxiliary measuring tube S2 and the device under test DUT are all MOS tubes; The positive electrode of the power supply is connected with the input end of the positive overshoot circuit, the output end of the positive overshoot circuit is connected with the drain electrode of the first auxiliary measuring tube S1, the source electrode of the first auxiliary measuring tube S1 is connected with the drain electrode of the second auxiliary measuring tube S2 and the device under test DUT respectively, the source electrode of the second auxiliary measuring tube S2 is connected with the input end of the negative overshoot circuit, the output end of the negative overshoot circuit is connected with the source electrode of the device under test DUT, and the negative electrode of the power supply is connected ; When the first auxiliary measuring tube S1 is turned on and the second auxiliary measuring tube S2 is turned off, the positive overshoot circuit outputs a forward overshoot voltage to the outside; When the first auxiliary measuring tube S1 is turned off and the second auxiliary measuring tube S2 is turned on, the negative overshoot circuit outputs a reverse overshoot voltage to the outside.

[0007] By adopting the above technical solution, the positive overshoot circuit is connected between the positive electrode of the power supply and the drain electrode of the first auxiliary measuring tube S1, and the negative overshoot circuit is connected between the positive electrode of the power supply and the source electrode of the second auxiliary measuring tube S2, so that a rising peak based on the positive overshoot circuit outputting a forward overshoot voltage to the outside is generated at the rising edge of the voltage across the second auxiliary measuring tube S2, a falling peak based on the negative overshoot circuit outputting a reverse overshoot voltage to the outside is generated at the falling edge of the voltage , the dV / dt when the switching tube switches is improved, so that the controllable voltage stress intensity on the device under test DUT is improved, and the screening force on the device under test DUT is improved.

[0008] As a preferred, the positive overshoot circuit includes a positive overshoot power supply , a positive charge control tube S3 and a positive overshoot capacitor ; The positive charge control tube S3 is a MOS tube; The input end of the positive overshoot circuit is connected with the negative electrode of the positive overshoot power supply and one end of the positive overshoot capacitor respectively, and the positive overshoot power supply The positive electrode is connected to the drain of the positive charge control tube S3, and the positive electrode is connected to the source of the positive charge control tube S3 and the positive overshoot capacitor and the other end is connected to the output of the positive overshoot circuit.

[0009] Preferably, the negative overshoot circuit includes a negative overshoot power supply , negative electrode charging control tube S4 and negative electrode overshoot capacitor ; The negative electrode charging control tube S4 is a MOS tube; The input end of the negative overshoot circuit is connected to the drain of the negative charge control tube S4 and the negative overshoot capacitor respectively. One end of the negative charge control tube S4 is connected to the negative overshoot power supply The negative pole, negative overshoot power supply Positive and negative overshoot capacitors and the other end is connected to the output terminal of the negative overshoot circuit.

[0010] Through the above technical solution, by using the power supply to the positive overcharge capacitor and negative overshoot capacitor It charges and stores energy. When the switch is switched, it provides instantaneous high current by discharging. By combining the capacitor and the power supply polarity, The output terminal generates a high voltage pulse with high dV / dt, which realizes the forward overshoot voltage and reverse overshoot voltage The waveform is adjusted to meet the high dV / dt test requirements of the DUT.

[0011] As a preference, the positive overshoot capacitor The capacitance is less than the bus capacitance ; Negative overshoot capacitor Less than bus capacitance .

[0012] Through the above technical solution, a relatively small-capacitance positive overshoot capacitor is selected. and negative overshoot capacitor The rate of decrease of the forward overshoot voltage depends on the positive overshoot capacitance. The recovery speed of the reverse overshoot voltage depends on the negative overshoot capacitance. The smaller the capacitance value, the In the waveform, a high dV / dt can be achieved without an extremely large overshoot voltage.

[0013] In a second aspect, the present application provides a performance-optimized passive DHTRB testing method, the technical solution of which includes the following steps: Turn on the first accompanying test tube S1; When the first auxiliary tube S1 is turned on, the negative electrode overcharge control tube S4 is turned on to charge the negative electrode overcharge capacitor , and the negative electrode overcharge control tube S4 is turned off after being charged to a preset voltage; The first auxiliary tube S1 is turned off, and the second auxiliary tube S2 is turned on. At this time, the negative electrode overcharge capacitor outputs a reverse overvoltage ; When the second auxiliary tube S2 is turned on, the positive electrode overcharge control tube S3 is turned on to charge the positive electrode overcharge capacitor , and the positive electrode overcharge control tube S3 is turned off after being charged to a preset voltage; The second auxiliary tube S2 is turned off, and the first auxiliary tube S1 is turned on. At this time, the positive electrode overcharge capacitor outputs a forward overvoltage ; The above steps are repeated to output a voltage signal with an overvoltage waveform to the device under test DUT.

[0014] Through the above technical solution, the first auxiliary tube S1 and the second auxiliary tube S2 are periodically switched on and off to realize a square wave voltage signal output; the positive electrode overcharge control tube S3 and the negative electrode overcharge control tube S4 are periodically turned on and off in the timing to charge the positive electrode overcharge capacitor and the negative electrode overcharge capacitor , and to discharge when the first auxiliary tube S1 and the second auxiliary tube S2 are switched, and to superimpose overcharge discharge on the square wave voltage, thereby realizing high dV / dt of DHTRB test.

[0015] As a preferred embodiment, the first auxiliary tube S1 is turned on for , the second auxiliary tube S2 is turned on for , , and an interval dead time is provided therebetween.

[0016] As a preferred embodiment, the first auxiliary tube S1 is turned on for , and the negative electrode overcharge control tube S4 is turned on after a waiting time , and the negative electrode overcharge control tube S4 is turned on for ; the second auxiliary tube S2 is turned on for , and the positive electrode overcharge control tube S3 is turned on after a waiting time , and the positive electrode overcharge control tube S3 is turned on for .

[0017] ​Through the above technical solution, by setting the dead time, direct short circuit is avoided, the switch tube and capacitor are protected, and the uncontrollable ring amplitude of the waveform edge is reduced, the signal quality is improved, and the reliability of the test data is ensured; by determining the turn-on time point and turn-on duration of the first accompanying test tube S1, the second accompanying test tube S2, the positive charge control tube S3, and the negative charge control tube S4, a test voltage signal with a determined frequency is realized, ensuring the implementation of the DHTRB test.

[0018] As a preference, the positive overshoot power supply Voltage value, negative overshoot power supply Voltage value, positive overshoot capacitance The preset voltage and negative overshoot capacitor The preset voltage is adjustable.

[0019] Through the above technical solution, the amplitude of the forward overshoot voltage and the reverse process voltage can be controlled, and the falling speed of the forward overshoot voltage and the recovery speed of the reverse overshoot voltage can be controlled, thereby achieving The waveform is automatically and continuously adjustable to obtain the device under test The dV / dt voltage stress intensity required for a specific test.

[0020] As a preference, before the first accompanying test tube S1 is turned on for the first time, the positive overshoot capacitor Precharge is performed so that when the first test tube S1 is turned on for the first time, the positive electrode overshoots the capacitor Capable of outputting forward overshoot voltage .

[0021] Through the above technical solution, it is achieved that when the first accompanying test tube S1 is turned on for the first time, The rising edge of the voltage signal can generate a positive overshoot voltage waveform, which ensures the integrity of the test waveform signal and improves the reliability of the test.

[0022] In a third aspect, the present application provides a computer program product, which includes a computer program or instructions, so that the computer program or instructions can implement the steps in the above-mentioned performance-optimized passive DHTRB testing method.

[0023] In summary, this application includes at least one of the following beneficial technical effects: 1. This application can be used to test the passive DHTRB with forward and reverse overshoot voltages of The controllable overshoot voltage waveform is actively superimposed on the voltage waveform, which makes the switch tube switch The rising and falling edges of the test generate overshoot voltage spikes, which can significantly improve the dV / dt performance of the test, provide higher dV / dt test voltage stress for the device under test, and improve the screening capability of the device.

[0024] 2. This application can achieve stepless adjustment of the dV / dt performance test, and can adjust and obtain the corresponding dV / dt according to the test requirements, thereby improving the accuracy and convenience of the test. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Schematic diagram of the test circuit for traditional passive DHTRB test; Figure 2 Schematic diagram of a passive DHTRB test circuit for performance optimization in an embodiment of the present application; Figure 3 Flowchart of the performance-optimized passive DHTRB testing method in the embodiment of the present application; Figure 4 A schematic diagram of the circuit control logic and voltage waveform timing of the performance-optimized passive DHTRB test method in an embodiment of the present application; Figure 5 For traditional passive DHTRB test circuit Waveform and Waveform and performance optimized passive DHTRB test circuit of the embodiment of the present application Waveform and Schematic diagram of waveform comparison; Figure 6 This is a schematic diagram of an exemplary electronic device architecture according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] This specific embodiment is merely an explanation of the present application and is not a limitation of the present application. After reading this specification, those skilled in the art may make non-creative modifications to the present embodiment as needed, but as long as they are within the scope of the present application, they are protected by patent law.

[0027] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. It should be noted that in the optional embodiments of the present application, when the embodiments in the present application are applied to specific products or technologies, the object information and other related data involved need to obtain the object's permission or consent, and the collection, use and processing of the relevant data need to comply with the relevant laws, regulations and standards of the relevant countries and regions. In other words, if the embodiments of the present application involve data related to the object, it needs to be obtained through the authorization and consent of the object, the authorization and consent of the relevant departments, and in compliance with the relevant laws, regulations and standards of the country and region. If personal information is involved in the embodiments, the acquisition of all personal information requires the consent of the individual. If sensitive information is involved, the separate consent of the information subject needs to be obtained. The embodiments also need to be implemented with the authorization and consent of the object.

[0028] The embodiments of the present application are described in further detail below with reference to the accompanying drawings.

[0029] Example 1: See also Figure 2 , a performance-optimized passive DHTRB test circuit according to an embodiment of the present application includes a power supply , busbar capacitance , the first test tube S1, the second test tube S2, the device under test DUT, the positive overshoot circuit and the negative overshoot circuit, as well as the line stray inductance and stray resistance. Those skilled in the art will understand that Figure 2 The structure shown in the figure is merely a circuit connection diagram of some devices related to the present application scheme, and does not constitute a limitation on the circuit designed by the present application scheme. The specific electronic devices may include more or fewer devices than shown in the figure, or combine the functions of certain devices, or have different device arrangements.

[0030] The device under test (DUT) is a MOS transistor. The first accompanying test transistor S1 and the second accompanying test transistor S2 are also MOS transistors, serving as high-speed switches in the circuit. Connected to the power supply Both ends of the power supply The positive electrode of the positive overshoot circuit is connected to the input end of the positive overshoot circuit, the output end of the positive overshoot circuit is connected to the drain of the first accompanying test tube S1, the source of the first accompanying test tube S1 is connected to the drain of the second accompanying test tube S2 and the device under test DUT respectively, the source of the second accompanying test tube S2 is connected to the input end of the negative overshoot circuit, the output end of the negative overshoot circuit is connected to the source of the device under test DUT, and is connected to the power supply. of the negative electrode.

[0031] When the first accompanying test tube S1 is turned on and the second accompanying test tube S2 is turned off, At high level; when the first accompanying test tube S1 is turned off and the second accompanying test tube S2 is turned on, The voltage across the second test tube S2 is , the two ends of the device under test DUT are , yes The delayed slow-changing waveform after RL filtering and DUT response. When the first co-test tube S1 is turned on and the second co-test tube S2 is turned off, the positive overshoot circuit outputs a positive overshoot voltage to the outside; when the first co-test tube S1 is turned off and the second co-test tube S2 is turned on, the negative overshoot circuit outputs a reverse overshoot voltage to the outside. Busbar capacitor Used to suppress uncontrollable switching oscillations, absorb high-frequency oscillation energy, and reduce and Edge spikes can protect the DUT from uncontrollable voltage shocks.

[0032] More specifically, the positive overshoot circuit includes a positive overshoot power supply , positive electrode charging control tube S3 and positive electrode overshoot capacitor The positive charge control tube S3 is a MOS tube. The input end of the positive overshoot circuit is connected to the positive overshoot power supply. Negative and positive overshoot capacitors One end of the positive overshoot power supply The positive electrode is connected to the drain of the positive charge control tube S3, and the positive electrode is connected to the source of the positive charge control tube S3 and the positive overshoot capacitor and the other end is connected to the output of the positive overshoot circuit.

[0033] Negative overshoot circuit includes negative overshoot power supply , negative electrode charging control tube S4 and negative electrode overshoot capacitor The negative electrode charge control tube S4 is a MOS tube. The input end of the negative electrode overshoot circuit is connected to the drain of the negative electrode charge control tube S4 and the negative electrode overshoot capacitor respectively. One end of the negative charge control tube S4 is connected to the negative overshoot power supply The negative pole, negative overshoot power supply Positive and negative overshoot capacitors and the other end is connected to the output terminal of the negative overshoot circuit.

[0034] Since the passive DHTRB test needs to generate a steep reverse bias on the DUT, that is, high dV / dt is required, and When the first and second test tubes S1 and S2 are switched at high speed, they can release or absorb large current pulses to the DUT to support the switching action of the switch tube. The rising and falling edge waveforms of the changes apply overshoot voltage, so that the voltage change rate across the DUT meets the test requirements, and the DUT is subjected to dV / dt voltage stress that meets the test requirements. The role of the positive charge control tube S3 and the negative charge control tube S4 is to control the positive overshoot capacitor. and negative overshoot capacitor The charging is controlled to achieve the adjustment of the voltage waveform signal.

[0035] It should also be noted that the rate of decrease of the forward overshoot voltage depends on the positive overshoot capacitance. The recovery speed of the reverse overshoot voltage depends on the negative overshoot capacitance. The size of the positive overshoot capacitor is usually and negative overshoot capacitor Choose relatively small value capacitors to achieve fast discharge and obtain high dV / dt without large overshoot voltage.

[0036] The material of the MOS transistor in this application is selected from single crystal silicon, polycrystalline silicon, or amorphous silicon, and may also be one of the following materials: silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbide (SiC), silicon germanium carbon (SiGeC), gallium arsenide (GaAs), gallium nitride (GaN), and gallium oxide (Ga2O3). For example, in this embodiment, the material of the MOS transistor is silicon carbide.

[0037] Example 2: See also Figure 3 and Figure 4 , the performance-optimized passive DHTRB test method of the embodiment of the present application is described.

[0038] Step 1: Turn on the first companion test tube S1.

[0039] Step 2: When the first accompanying test tube S1 is turned on, the negative electrode charging control tube S4 is turned on to overcharge the negative electrode capacitor. Charging is carried out, and after charging to the preset voltage, the negative electrode charging control tube S4 is disconnected.

[0040] Step 3: Turn off the first test tube S1 and turn on the second test tube S2. Output reverse overshoot voltage .

[0041] Step 4: When the second accompanying test tube S2 is turned on, the positive electrode charging control tube S3 is turned on to overcharge the positive electrode capacitor. Charging is carried out, and after charging to the preset voltage, the positive electrode charging control tube S3 is disconnected.

[0042] Step 5, turn off the second accompanying test tube S2, turn on the first accompanying test tube S1, and return to step 2. At this time, the positive electrode overshoots the capacitor Output forward overshoot voltage .

[0043] Repeat the above steps to output a voltage signal with an overshoot voltage waveform to the device under test (DUT).

[0044] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0045] More specifically, in the above passive DHTRB test method, the conduction time of the first accompanying test tube S1 is , the conduction time of the second accompanying test tube S2 is , and Dead time interval Dead time It can avoid direct short circuit, protect the switch tube and capacitor, and suppress Oscillation, thereby improving the stability and reliability of test data. In the embodiment of the present application, in order to simplify the test and calculation, .

[0046] When the first accompanying test tube S1 is turned on, the time when the second accompanying test tube S2 is turned off can be used to turn on the negative electrode charging control tube S4 to form a charging circuit, so as to charge the negative electrode overcharge capacitor. Charge without Similarly, by turning on the second accompanying test tube S2, the time when the first accompanying test tube S1 is turned off can be used to turn on the positive electrode charging control tube S3 to form a charging circuit, which will affect the positive electrode overshoot capacitor. Charging will not It should be noted that after the first test tube S1 is turned on, a waiting time is required. As the isolation time interval, the negative electrode charging control tube S4 is turned on to ensure that the charging circuit is The test part has no effect, and the conduction time of the negative electrode charging control tube S4 is , To ensure that the time to form the charging circuit falls within the time range of the first test tube S1 being turned on. Similarly, the waiting time after turning on the second test tube S2 is Then turn on the positive electrode charging control tube S3. The conduction time of the positive electrode charging control tube S3 is , . Also in the embodiment of the present application, .

[0047] Users can overshoot the positive power supply Voltage value, negative overshoot power supply The voltage value can be adjusted, and the positive overshoot capacitance can be adjusted The preset voltage and negative overshoot capacitor Preset voltage and charging time The above adjustment can adjust the peak value and the falling speed of the overshoot voltage waveform, thereby achieving stepless and continuous adjustment of dV / dt, which is convenient for fine-tuning the voltage stress of the DUT during the test according to the test objectives and needs.

[0048] In another embodiment, before the first test tube S1 is turned on for the first time, the positive overshoot capacitor Precharge ( Before the moment), when the first test tube S1 is turned on for the first time, the positive electrode overshoots the capacitor Capable of outputting forward overshoot voltage .

[0049] The following combination Figure 4 The control timing diagram of The rising edge is used as an example.

[0050] At t2, the second accompanying test tube S2 is turned on. At t3, the positive electrode charging control tube S3 is turned on, and the positive electrode overshoots the power supply. Overshoot capacitor for positive pole Charge, Charge to the preset voltage and then turn off the positive electrode charging control tube S3.

[0051] At time t4, the first accompanying test tube S1 is turned on. The initial voltage across the two terminals is Then it drops to the platform voltage , forming a rising edge waveform. The principle of the falling edge is similar to that of the rising edge and will not be repeated here. The circled parts in the waveform diagram are the waveforms of the overshoot voltage, which are the rising edge and the falling edge respectively.

[0052] See also Figure 5In the figure, the blue dotted line is the waveform generated by the traditional DHTRB test circuit, and the red solid line is the waveform generated by the technical solution of the embodiment of the present application. It can be seen that there is a significant difference in dV / dt between the two. The slope of the former is significantly higher than the former, indicating that a larger dV / dt voltage stress intensity can be applied to the DUT during the test. Those skilled in the art will appreciate that all or part of the process steps in the above-described method embodiments can be implemented by a computer program instructing the relevant hardware. The program can be stored in a computer-readable storage medium, and when executed, the program can include the process steps in the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM or random access memory (RAM), magnetic disks, or optical disks.

[0053] Example 3: Another embodiment of the present application provides a computer program product, which includes a computer program or instructions, so that the computer program or instructions can implement the steps in the above-mentioned performance-optimized passive DHTRB testing method.

[0054] For example electronic devices that the computer program or instructions employ, see Figure 6 , including a processor, a memory and an external data interface connected through a system bus. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, the computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the electronic device is used to store the control strategies for each switch tube and the charging control tube, and to store the test data of the device under test DUT. The processor of the electronic device is used to provide control capabilities and execute the control programs for each switch tube and the charging control tube. The external data interface of the electronic device is respectively connected to each switch tube and connected to the detection sensor of the device under test.

[0055] Unless otherwise defined, the technical or scientific terms used in this application shall have the usual meanings understood by persons of ordinary skill in the field to which this application belongs. The words "first", "second", "third" and similar terms used in the specification and claims of this application do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "one" or "a" do not indicate a quantity limitation, but rather indicate the existence of at least one. Words such as "include" or "comprise" mean that the elements or objects appearing before "include" or "comprises" cover the elements or objects listed after "include" or "comprises" and their equivalents, and do not exclude other elements or objects. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0056] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A performance-optimized passive DHTRB test circuit, including a power supply V DC , busbar capacitance C bus , a first accompanying test tube S1, a second accompanying test tube S2 and a device under test DUT, characterized in that, It also includes a positive overshoot circuit and a negative overshoot circuit; The first accompanying test tube S1, the second accompanying test tube S2 and the device under test DUT are all MOS tubes; The bus capacitor C bus Connect to the power supply V DC At both ends, the power supply V DC The positive electrode of the positive overshoot circuit is connected to the input end of the positive overshoot circuit, the output end of the positive overshoot circuit is connected to the drain of the first accompanying test tube S1, the source of the first accompanying test tube S1 is connected to the drain of the second accompanying test tube S2 and the device under test DUT respectively, the source of the second accompanying test tube S2 is connected to the input end of the negative overshoot circuit, the output end of the negative overshoot circuit is connected to the source of the device under test DUT, and is connected to the power supply V DC The negative electrode; When the first co-detection tube S1 is turned on and the second co-detection tube S2 is turned off, the positive overshoot circuit outputs a positive overshoot voltage to the outside; When the first co-measurement tube S1 is turned off and the second co-measurement tube S2 is turned on, the negative electrode overshoot circuit outputs a reverse overshoot voltage to the outside.

2. A performance-optimized passive DHTRB test circuit according to claim 1, characterized in that: The positive overshoot circuit includes a positive overshoot power supply V DC+ , positive electrode charging control tube S3 and positive electrode overshoot capacitor C bus+ ; The positive electrode charging control tube S3 is a MOS tube; The input terminals of the positive overshoot circuit are connected to the positive overshoot power supply V DC+ The negative and positive overshoot capacitors C bus+ One end of the positive overshoot power supply V DC+ The positive electrode is connected to the drain of the positive charge control tube S3, and the positive electrode is connected to the source of the positive charge control tube S3 and the positive overshoot capacitor C bus+ and the other end is connected to the output of the positive overshoot circuit.

3. The performance-optimized passive DHTRB test circuit according to claim 1, characterized in that: The negative overshoot circuit includes a negative overshoot power supply V DC- , negative electrode charging control tube S4 and negative electrode overshoot capacitor C bus- ; The negative electrode charging control tube S4 is a MOS tube; The input end of the negative overshoot circuit is connected to the drain of the negative charge control tube S4 and the negative overshoot capacitor C bus- One end of the negative electrode charging control tube S4 is connected to the negative electrode overshoot power supply V DC- The negative pole overshoots the power supply V DC- The positive and negative overshoot capacitors C bus- and the other end is connected to the output terminal of the negative overshoot circuit.

4. A performance-optimized passive DHTRB test circuit according to claim 2 or claim 3, characterized in that: Positive overshoot capacitor C bus+ The capacitance is less than the bus capacitance C bus ; Negative overshoot capacitor C bus- Less than bus capacitance C bus .

5. A performance-optimized passive DHTRB test method, comprising the following steps: Turn on the first accompanying test tube S1; When the first accompanying test tube S1 is turned on, the negative electrode charging control tube S4 is turned on to overcharge the negative electrode capacitor C bus- Charge and disconnect the negative electrode charging control tube S4 after charging to the preset voltage; The first accompanying test tube S1 is turned off and the second accompanying test tube S2 is turned on; at this time, the negative electrode overshoot capacitor C bus- Output reverse overshoot voltage V cbus- ; When the second accompanying test tube S2 is turned on, the positive electrode charging control tube S3 is turned on, and the positive electrode overcharge capacitor C bus+ Charging is carried out, and after charging to the preset voltage, the positive electrode charging control tube S3 is disconnected; The second accompanying test tube S2 is turned off and the first accompanying test tube S1 is turned on; at this time, the positive electrode overshoots the capacitor C bus+ Output forward overshoot voltage V cbus+ ; Repeat the above steps to output a voltage signal with an overshoot voltage waveform to the device under test (DUT).

6. A performance-optimized passive DHTRB testing method according to claim 5, characterized in that: The conduction time of the first companion tube S1 is t a1 The conduction time of the second companion tube S2 is t a2 , t a1 and t a2 There is an interval dead time t c .

7. The performance-optimized passive DHTRB testing method according to claim 6, wherein: Waiting time t after turning on the first test tube S1 d Then turn on the negative electrode charging control tube S4, and the conduction time of the negative electrode charging control tube S4 is t b1 , t d +t b1 <t a1 ; Waiting time t after turning on the second accompanying test tube S2 d Then turn on the positive electrode charging control tube S3, and the conduction time of the positive electrode charging control tube S3 is t b2 , t d +t b2 <t a2 .

8. A performance-optimized passive DHTRB testing method according to claim 5, characterized in that: Positive overshoot power supply V DC+ Voltage value, negative overshoot power supply V DC- Voltage value, positive overshoot capacitor C bus+ The preset voltage and negative overshoot capacitor C bus- The preset voltage is adjustable.

9. A performance-optimized passive DHTRB testing method according to claim 5, characterized in that: Before the first test tube S1 is turned on for the first time, the positive overshoot capacitor C bus+ Precharge is performed so that when the first test tube S1 is turned on for the first time, the positive electrode overshoots the capacitor C bus+ Capable of outputting a forward overshoot voltage V cbus+ .

10. A computer program product, characterized in that The computer program product comprises a computer program or instructions, so that the computer program or instructions can implement the steps of the performance-optimized passive DHTRB test method according to any one of claims 5 to 9.

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