A dynamic configuration system, device, and readable storage medium for a simulation environment

Abstract

This invention proposes a dynamic configuration system, device, and readable storage medium for a simulation environment. The system includes: a basic configuration unit for initializing and configuring CPU cores, configuring a resource management pool, setting core allocation principles for the simulation environment, and setting the hyper-threading on / off mode for a single physical core; a user simulation environment request processing unit for receiving simulation environment requests, adjusting the hyper-threading of CPU cores according to the simulation environment mode, and allocating simulation environments; a resource management pool for storing hyper-threading status information of available CPU cores in the simulation environment and current simulation environment information; a simulation environment release processing unit for receiving simulation environment release requests, obtaining corresponding simulation environment information, restoring the bound logical cores to their initial state according to the simulation environment information, and releasing the simulation environment; and a resource management pool maintenance unit for periodically identifying simulation environment processes that abnormally exit performance mode and performing corrective processing.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and more specifically to a dynamic configuration system, apparatus, and readable storage medium for a simulation environment. Background Technology

[0002] Hyper-threading is a hardware technology that makes a single physical CPU core appear as multiple independent processors, allowing a single physical core to handle multiple threads simultaneously, thereby improving the overall efficiency of the processor. Hyper-threading is particularly suitable for scenarios requiring parallel processing, such as multitasking, server virtualization, big data processing, and high-performance computing. It can significantly improve CPU resource utilization when processing multiple tasks simultaneously by reducing resource idle time.

[0003] Currently, in server environments with multiple users running in parallel, users have different performance requirements for running programs, and the server load varies at different times. When there are many simulation users, enabling hyper-threading allows a single physical core to support more simulation environments through multi-threaded parallelism. However, when there are fewer simulation users or higher simulation performance requirements, enabling hyper-threading may lead to resource contention due to multi-threaded parallelism on physical cores, so hyper-threading should be disabled to avoid impacting the CPU's single-threaded task processing efficiency.

[0004] However, at present, the server manages the enabling or disabling of hyper-threading on a whole CPU basis, and does not support dynamic switching of hyper-threading state during the simulation system operation, nor does it support individual configuration of physical cores bound to the simulation environment. Summary of the Invention

[0005] To address the above problems, the present invention aims to provide a dynamic configuration system, device, and readable storage medium for a simulation environment, which can select different modes of simulation environment according to simulation performance requirements and server load, and achieve more optimized configuration of CPU resources by dynamically configuring the hyper-threading state of the CPU core.

[0006] To achieve the above objectives, the present invention employs the following technical solution:

[0007] In a first aspect, the present invention discloses a dynamic configuration system for a simulation environment, the system running on a server, the system comprising: a basic configuration unit, a user simulation environment request processing unit, a simulation environment release processing unit, a resource management pool, and a resource management pool maintenance unit;

[0008] The basic configuration unit is used to initialize and configure the CPU cores of the server, configure the resource management pool, set the core allocation principle of the simulation environment, and set the hyper-threading on / off mode for a single physical core.

[0009] The user simulation environment application processing unit is used to receive simulation environment applications sent by users, adjust the hyper-threading of CPU cores using the resource management pool according to the simulation environment mode selected by the user, and allocate simulation environments; the simulation environment modes include functional mode and performance mode.

[0010] The resource management pool is used to store the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information; the simulation environment information includes the process ID of the simulation environment process, the simulation environment mode, and the bound logical core number;

[0011] The simulation environment release processing unit is used to receive the simulation environment release request sent by the user, obtain the simulation environment information of the simulation environment from the resource management pool, restore the bound logic core to the initial state according to the simulation environment information, and release the simulation environment.

[0012] The resource management pool maintenance unit is used to periodically check the usage of available logic cores in each simulation environment and the simulation environment information of the resource management pool in order to identify simulation environment processes that have exited abnormally in performance mode and to correct them.

[0013] Furthermore, the basic configuration unit is specifically used for:

[0014] Enable Hyper-Threading in the BIOS and set all logical cores to online.

[0015] Based on the current server's CPU cores, allocate the number of available logical cores to the simulation environment, assign a logical core number to each logical core, and isolate the logical cores; set the mapping relationship between logical cores and physical cores, with each physical core corresponding to two logical cores; write the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information to the resource management pool.

[0016] The core allocation principle for the simulation environment is set as follows: each simulation environment is independently bound to a logical core and does not share logical cores with other simulation environments; when allocating simulation environment processes, an idle logical core is bound.

[0017] The hyper-threading mode for a single physical core is set as follows: by setting one logical core corresponding to each physical core to offline, one logical core corresponds to one physical core, thereby disabling hyper-threading for a single physical core.

[0018] Furthermore, the user simulation environment application processing unit includes:

[0019] The first interactive interface is used to receive simulation environment requests sent by users;

[0020] The mode configuration module is used to determine the physical core of the simulation environment to be executed by executing the physical core configuration mechanism according to the simulation environment mode selected by the user.

[0021] The simulation environment allocation module is used to allocate physical cores to the simulation environment and update the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information in the resource management pool.

[0022] Furthermore, when the user selects the performance mode for the simulation environment, the physical core configuration mechanism is as follows:

[0023] Based on the simulation environment information, find the logical core number bound to all current simulation environment processes;

[0024] Determine the currently idle logical cores based on the logical core numbers bound to all current simulation environment processes;

[0025] If there are no available logic cores, the simulation environment application is considered to have failed, and an error message is returned.

[0026] If there are currently any idle logic cores, obtain the number of the idle logic core;

[0027] Based on the number of the idle logical core, and according to the mapping relationship between the logical core and the physical core, the idle physical core is selected; the two logical cores corresponding to the idle physical core are both in an idle state.

[0028] If no available physical cores can be found, the simulation environment application is considered to have failed, and an error message is returned.

[0029] If an idle physical core can be identified, then determine the numbers of the two logical cores corresponding to the idle physical core, denoted as a and b, where a < b; the two logical cores corresponding to the idle physical core are denoted as logical core a and logical core b; set the state of logical core b to offline;

[0030] Use logic core 'a' as the logic core for running the simulation environment process.

[0031] Furthermore, when the user selects the performance mode for the simulation environment, the physical core configuration mechanism is as follows:

[0032] Based on the simulation environment information, find the logical core number bound to all current simulation environment processes;

[0033] Determine the currently idle logical cores based on the logical core numbers bound to all current simulation environment processes;

[0034] If there are no available logic cores, the simulation environment application is considered to have failed, and an error message is returned.

[0035] If there are currently any idle logic cores, obtain the number of the idle logic core;

[0036] Based on the number of the idle logical core, and according to the mapping relationship between logical cores and physical cores, the physical cores corresponding to the idle logical cores are determined as physical cores to be screened.

[0037] Based on the mapping relationship between logical cores and physical cores, determine whether the other logical core mapped to the physical core to be screened is in use;

[0038] If so, the physical core is bound to the simulation environment process, and the idle logical core mapped to the physical core is used as the logical core for running the simulation environment process;

[0039] If none of the physical cores to be screened are bound to a simulation environment process, the idle logical core with the smallest number will be used as the logical core to run the simulation environment process.

[0040] Furthermore, the simulation environment release processing unit includes:

[0041] The second interactive interface is used to receive simulation environment release requests sent by the user;

[0042] The configuration restore module is used to determine the physical cores bound to the simulation environment based on the simulation environment release request by executing the hyper-threading state recovery mechanism, and restore their hyper-threading state.

[0043] The simulation environment release module is used to release the simulation environment and update the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information in the resource management pool.

[0044] Furthermore, the hyper-threading state recovery mechanism includes:

[0045] The simulation environment information is obtained from the resource management pool. Based on the simulation environment release request, the process ID of the corresponding simulation environment process is found, and the simulation environment mode of the simulation environment process is determined.

[0046] When the simulation environment mode is performance mode, based on the simulation environment information, the logical core number X bound to the simulation environment process is found according to the process number of the simulation environment process; based on the mapping relationship between logical cores and physical cores, the physical core mapped by logical core X is found according to the logical core number X, and the number Y of another logical core mapped by the physical core is determined; the state of logical core Y is set to online.

[0047] Furthermore, the resource management pool maintenance unit is specifically used for:

[0048] At preset intervals, based on simulation environment information, logic cores in an idle state are selected, and logic cores in an offline state are further selected.

[0049] For each logical core in the offline state, determine the physical core corresponding to the logical core in the offline state based on the mapping relationship between logical cores and physical cores;

[0050] Determine another logical core mapped from the physical core, and determine whether that logical core is in an idle state;

[0051] If so, then set the state of the logic core to online;

[0052] If not, then determine the simulation environment mode of the logic core based on the simulation environment information;

[0053] If in performance mode, the logical core will function normally;

[0054] If in functional mode, hyperthreading is enabled for the corresponding physical core.

[0055] Secondly, the present invention also discloses a dynamic configuration device for a simulation environment, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the functions of the dynamic configuration system for the simulation environment as described in any of the above.

[0056] Thirdly, the present invention also discloses a readable storage medium storing a computer program, which, when executed by a processor, implements the function of a dynamic configuration system for the simulation environment as described in any of the above.

[0057] Compared with the prior art, the advantages of this invention are as follows:

[0058] 1. This invention, upon receiving a simulation environment request, can adjust the hyper-threading of CPU cores according to different modes. During this adjustment process, it needs to interact with the resource management pool to obtain the current hyper-threading status of the CPU cores and the core binding status of the existing simulation environment, and allocate the simulation environment after configuration. Simultaneously, upon receiving a user's simulation environment release request, it can obtain the hyper-threading configuration of the cores bound to that simulation environment from the resource management pool and restore it to its initial state via the configuration restore module before releasing the simulation environment. Furthermore, this invention can periodically check the status of the CPU cores and the simulation environment resource pool to ensure they are normal, promptly detecting and correcting abnormal CPU hyper-threading status issues and erroneous stored information in the simulation environment.

[0059] 2. This invention achieves the effect of enabling or disabling hyper-threading by enabling or disabling a logical core corresponding to a physical core. This configuration method enables the simulation process to dynamically allocate CPU resources.

[0060] 3. This invention establishes a simulation environment management method that supports users in selecting different modes according to performance requirements, making it convenient for users to apply for simulation environments with different CPU resource configurations based on performance requirements or the number of server users.

[0061] Therefore, it is evident that the present invention has outstanding substantive features and significant progress compared with the prior art, and the beneficial effects of its implementation are also obvious. Attached Figure Description

[0062] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0063] Figure 1 This is a system structure diagram of a specific embodiment of the present invention.

[0064] Figure 2 This is a flowchart illustrating the physical core configuration mechanism of a specific embodiment of the present invention.

[0065] Figure 3 This is a flowchart illustrating the hyper-threading state recovery mechanism according to a specific embodiment of the present invention.

[0066] Figure 4 This is a schematic diagram of the resource maintenance process according to a specific embodiment of the present invention.

[0067] In the diagram, 1 is the basic configuration unit; 2 is the user simulation environment application processing unit; 3 is the simulation environment release processing unit; 4 is the resource management pool; 5 is the resource management pool maintenance unit; 21 is the first interaction interface; 22 is the mode configuration module; 23 is the simulation environment allocation module; 31 is the second interaction interface; 32 is the configuration restoration module; and 33 is the simulation environment release module. Detailed Implementation

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0069] The key terms used in this invention will be explained below.

[0070] CPU (Central Processing Unit): As the core of a computer system for computation and control, it is the final execution unit for information processing and program execution.

[0071] BIOS (Basic Input Output System): A set of programs embedded in a ROM chip on the motherboard of a computer. It stores the computer's basic input and output programs, system settings information, power-on self-test programs, and system startup programs.

[0072] Physical core: The actual CPU core, with independent circuit elements and L1 and L2 caches, can execute instructions independently.

[0073] Logical core: A core at the logical level within the same physical core.

[0074] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0075] See Figure 1 As shown, this embodiment provides a dynamic configuration system for a simulation environment. The system runs on a server and specifically includes: a basic configuration unit 1, a user simulation environment application processing unit 2, a simulation environment release processing unit 3, a resource management pool 4, and a resource management pool maintenance unit 5.

[0076] Basic configuration unit 1 is used to initialize and configure the CPU cores of the server, configure the resource management pool, set the core allocation principle of the simulation environment, and set the hyper-threading on / off mode of a single physical core.

[0077] In a specific implementation, the basic configuration unit 1 is used to perform basic system configuration, and the configuration content is as follows:

[0078] 1. CPU core initialization configuration:

[0079] (1) Enable Hyper-Threading in the BIOS to put the processor in Hyper-Threading enabled state.

[0080] (2) Set all logic cores to online.

[0081] 2. Resource Management Pool Configuration:

[0082] (1) Based on the current CPU cores of the server, allocate the number and number of available logical cores in the simulation environment and isolate these logical cores.

[0083] (2) Determine the mapping relationship between logical cores and physical cores. Each physical core maps to two logical cores.

[0084] (3) Write the hyper-threading status information of available CPU cores in the simulation environment and the current simulation environment information to the resource management pool; the simulation environment information includes the process number of the existing simulation environment process, the simulation environment mode, the bound logical core number, etc.

[0085] 3. Set the core allocation principles for the simulation environment:

[0086] (1) Each simulation environment is independently bound to a logic core and is not shared with other simulation environments;

[0087] (2) When allocating simulation environment processes, bind idle logic cores.

[0088] 4. Configuration for enabling / disabling hyper-threading on a single physical core:

[0089] Currently, enabling or disabling hyper-threading via BIOS requires a server restart, which can interrupt running simulation tasks, cause data loss or corruption, and potentially lead to unnecessary hardware wear and tear, affecting system stability and availability. To ensure the continuity of the simulation environment and data integrity, frequent power-on and power-off operations should be avoided as much as possible. Therefore, this system chooses to disable hyper-threading at the software level (within the OS), that is, to disable (offline) one logical core corresponding to each physical core, keeping one logical core corresponding to one physical core to achieve the effect of disabling hyper-threading.

[0090] It's important to note that the operating system kernel controls the enabling or disabling of specific CPU cores by writing 1s or 0s to the ` / sys / devices / system / cpu / cpuX / online` file. The hyper-threading enable / disable mentioned later refers to the enabling or disabling of a single physical CPU core configured by the operating system.

[0091] User simulation environment application processing unit 2 is used to receive simulation environment applications sent by users, adjust the hyper-threading of CPU cores using the resource management pool according to the simulation environment mode selected by the user, and allocate simulation environments.

[0092] When applying for a simulation environment, users can choose between two modes: functional mode and performance mode. Functional mode only requires ensuring the correctness, stability, and completeness of the simulation functions; while performance mode expects the system to allocate more CPU computing resources and places higher demands on the performance of the simulation environment.

[0093] In a specific implementation, the user simulation environment application processing unit 2 includes: a first interaction interface 21, a mode configuration module 22, and a simulation environment allocation module 23.

[0094] The first interactive interface 21 is used to receive simulation environment requests sent by users.

[0095] The mode configuration module 22 is used to determine the physical core of the simulation environment to be executed by executing the physical core configuration mechanism according to the simulation environment mode selected by the user.

[0096] The simulation environment allocation module 23 is used to allocate physical cores to the simulation environment and update the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information in the resource management pool.

[0097] Resource management pool 4 is used to store the hyper-threading status information of available CPU cores in the simulation environment and the current simulation environment information; the simulation environment information includes the process ID of the simulation environment process, the simulation environment mode, and the bound logical core number.

[0098] It should be noted that the CPU core or simulation environment information calls involved in the hyper-threading adjustment or recovery process all come from resource management pool 4, which can be implemented through a database or other algorithms.

[0099] The simulation environment release processing unit 3 is used to receive the simulation environment release request sent by the user, obtain the simulation environment information of the simulation environment from the resource management pool, restore the bound logic core to the initial state according to the simulation environment information, and release the simulation environment.

[0100] In a specific implementation, the simulation environment release processing unit 3 includes: a second interaction interface 31, a configuration restoration module 32, and a simulation environment release module 33.

[0101] The second interactive interface 31 is used to receive the simulation environment release request sent by the user.

[0102] The configuration restore module 32 is used to determine the physical core bound to the simulation environment by executing the hyper-threading state recovery mechanism according to the simulation environment release request, and restore its hyper-threading state.

[0103] The simulation environment release module 33 is used to release the simulation environment and update the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information in the resource management pool.

[0104] Resource management pool maintenance unit 5 is used to periodically check the usage of available logic cores in each simulation environment and the simulation environment information of the resource management pool in order to identify simulation environment processes that have exited abnormally in performance mode and to correct them.

[0105] This invention discloses a dynamic configuration system for a simulation environment. During system operation, after the user simulation environment request processing unit 2 receives a simulation environment request through the first interaction interface 21, the mode configuration module 22 adjusts the hyper-threading of the CPU cores according to different modes. During this adjustment process, it needs to interact with the resource management pool 4 to obtain the current hyper-threading state of the CPU cores and the core binding state of the existing simulation environment. The simulation environment allocation module 23 then performs the corresponding configuration, and allocates the simulation environment after configuration. Upon receiving a user simulation environment release request, the second interaction interface 31 of the simulation environment release processing unit 3 obtains the hyper-threading configuration of the cores bound to the simulation environment from the resource management pool 4 and restores it to its initial state via the configuration restoration module 32. Then, the simulation environment release module 33 releases the simulation environment. The main function of the resource management pool maintenance unit 5 is to periodically check whether the status of the CPU cores and the simulation environment resource pool is normal, and to promptly detect and correct abnormal CPU hyper-threading states and erroneous stored information in the simulation environment.

[0106] In a specific implementation, the mode configuration module 22 determines the physical cores for executing the simulation environment based on the simulation environment mode selected by the user by executing the physical core configuration mechanism. The initial state of the CPU cores is that hyper-threading is enabled. The mode configuration module 22 adjusts the hyper-threading state according to the requirements of the simulation environment, and handles it in two cases: performance mode and functional mode by executing the physical core configuration mechanism.

[0107] like Figure 2 As shown, the physical core configuration mechanism is as follows:

[0108] When the user selects performance mode for the simulation environment, the mode configuration module mainly performs the following tasks: finding available physical cores and disabling hyper-threading on those physical cores. The specific steps are as follows:

[0109] S1001: Locate available physical cores:

[0110] First, based on the simulation environment information, the logical core numbers bound to all current simulation environment processes are found; then, based on the logical core numbers bound to all current simulation environment processes, the currently idle logical cores are determined, and further, the idle logical core numbers among the available logical cores in the simulation environment can be determined.

[0111] If there are no available logic cores, the simulation environment request is considered to have failed, and an error message is returned.

[0112] If there are currently any idle logical cores, obtain their numbers. Based on these numbers, and according to the mapping relationship between logical cores and physical cores, select idle physical cores; where both logical cores corresponding to an idle physical core are in an idle state.

[0113] If no available physical cores can be found at this point, the simulation environment application is considered to have failed, and an error message is returned. If an available physical core can be found, the numbers of the two logical cores corresponding to the available physical core are determined and denoted as a and b, respectively, where a < b. The two logical cores corresponding to the available physical cores are denoted as logical core a and logical core b, respectively.

[0114] S1002: Disable hyperthreading for this physical core:

[0115] Since disabling hyperthreading on a physical core is achieved by controlling the enabled or disabled state of its corresponding logical core, first, the state of logical core b is set to offline; then, logical core a is used as the logical core for running the simulation environment process.

[0116] At this point, the simulation environment process can be assigned to logic core a, thus enabling the corresponding physical core to run the simulation environment process in performance mode.

[0117] When the user selects performance mode for the simulation environment, the mode configuration module primarily performs the following tasks: Firstly, it prioritizes using hyper-threaded physical cores to execute the simulation environment. If no such physical core exists, it utilizes an idle physical core. The specific steps are as follows:

[0118] S1003: Locate an available logical core:

[0119] First, based on the simulation environment information, the logical core numbers bound to all current simulation environment processes are identified. Then, based on these logical core numbers, the currently available logical cores are determined. If no free logical cores are available, the simulation environment request is considered to have failed, and an error message is returned.

[0120] If there are currently any idle logical cores, obtain the number of the idle logical core; then, based on the number of the idle logical core, determine the physical core corresponding to the idle logical core according to the mapping relationship between logical cores and physical cores, and use it as the physical core to be screened.

[0121] Then, based on the mapping relationship between logical cores and physical cores, it is determined whether the other logical core mapped to the physical core to be screened is in use.

[0122] If so, it can be determined that the physical core is bound to a simulation environment process, and the idle logical core mapped to that physical core is used as the logical core to run the simulation environment process. That is, based on the mapping relationship between logical cores and physical cores, the physical core it is mapped to is preferentially selected as the idle logical core in use to run the simulation environment process (i.e., another logical core mapped to the same physical core as this logical core has a process bound to it).

[0123] If none of the physical cores to be screened are bound to a simulation environment process, the idle logical core with the smallest number will be used as the logical core to run the simulation environment process.

[0124] At this point, the simulation environment process can be assigned to the selected logic cores, thus enabling the corresponding physical cores to run the simulation environment process in functional mode.

[0125] In a specific implementation, after receiving a simulation environment release request, the simulation environment release processing unit 3 uses the configuration restore module 32 to execute the hyper-threading state recovery mechanism to restore the hyper-threading state of the physical cores bound to the simulation environment. For example... Figure 3 As shown, the hyper-threading state recovery mechanism is as follows:

[0126] First, obtain simulation environment information from the resource management pool, find the process ID of the corresponding simulation environment process based on the simulation environment release request, and determine the simulation environment mode of the simulation environment process.

[0127] When the simulation environment mode is performance mode, based on the simulation environment information, the logical core number X bound to the simulation environment process is found according to the process number of the simulation environment process; based on the mapping relationship between logical cores and physical cores, the physical core mapped by logical core X is found according to the logical core number X, and the number Y of another logical core mapped by the physical core is determined; the state of logical core Y is set to online.

[0128] No action is taken when the simulation environment is in functional mode.

[0129] After the hyper-threading state recovery mechanism finishes executing, the simulation environment is released and the relevant information in the resource management pool is updated.

[0130] In a specific implementation, under normal circumstances, the simulation environment release operation is performed by the user. However, there are other situations where the simulation environment program terminates abnormally, such as insufficient memory, bugs in the simulation program itself, or incorrect initial data. To handle these abnormal situations, this system sets up a resource management pool maintenance unit 5.

[0131] Since the simulation environment configuration in functional mode does not require changing the hyperthreading state of its bound physical cores, abnormal program exit does not affect the bound physical cores. However, the simulation environment configuration in performance mode disables hyperthreading of its bound physical cores, and abnormal program exit cannot restore the cores to their initial state. Therefore, the resource management pool maintenance unit 5 is used to filter out simulation environment processes that exit abnormally in performance mode and correct them. The resource management pool maintenance unit 5 can achieve the above function by executing a resource maintenance process. Figure 4 As shown, the resource maintenance process includes the following steps:

[0132] Step 1: Filter out processor cores that are in an idle state. Specifically, at preset time intervals, based on simulation environment information, filter out logic cores that are in an idle state.

[0133] Step 2: Filter out the n processor cores in offline state. Specifically, among the idle logical cores, filter out the n logical cores in offline state, and set a variable i, initializing i to 1. The following steps filter the n processor cores in offline state one by one.

[0134] Step 3: Find the physical core mapped to the i-th processor core based on the mapping relationship between logical cores and physical cores. Specifically, determine the physical core corresponding to the i-th logical core based on the mapping relationship between logical cores and physical cores.

[0135] Step 4: Locate the other logical core mapped to the same physical core. Specifically, based on the mapping relationship between logical cores and physical cores, determine the other logical core other than the i-th logical core among the two logical cores mapped to the physical core.

[0136] Step 5: Determine if the logic core is in an idle state. If yes, proceed to step 6; otherwise, proceed to step 7.

[0137] Step 6: Enable hyper-threading for the corresponding physical core and proceed to Step 8. Specifically, enable hyper-threading for the corresponding physical core by setting the state of the logical core to online.

[0138] Step 7: Determine whether the simulation environment mode of the logic core is performance mode; if yes, proceed to step 8; otherwise, proceed to step 6.

[0139] Step 8: i=i+1;

[0140] Step 9: Determine if i ≥ n; if yes, end directly; if no, proceed to step 3.

[0141] In the above resource maintenance process, all processor cores that are in an idle state are first screened out.

[0142] Then, filter out all processor cores that are offline, and perform the following filtering on each of these cores:

[0143] 1) Determine the physical core corresponding to the CPU core based on the mapping relationship between logical cores and physical cores;

[0144] 2) Determine the other logical core mapped to this physical core (normally the logical core with the smaller number), and determine if it is an idle CPU core:

[0145] If so, enable hyperthreading for that physical core and continue checking the next core;

[0146] If not, determine whether the simulation environment it is bound to is in performance mode:

[0147] If so, proceed to check the next core;

[0148] If not, enable hyperthreading for that physical core and continue checking the next core.

[0149] Based on the above simulation environment, a dynamic configuration system is constructed. To better illustrate the implementation process of the system's specific functions, a concrete example is provided to explain the operation of each functional unit of the system, as follows:

[0150] 1. A database table structure is designed as a resource management pool to store kernel binding information and schema information of simulation environment processes. For example, the database table structure can be defined as follows:

[0151] id: Auto-incrementing primary key, uniquely identifying each record.

[0152] pid: Process ID.

[0153] command: The name or path of the command in the process.

[0154] cpu_affinity: CPU affinity of a process (information about the CPU cores it is bound to).

[0155] status: The state of the process (e.g., running, terminated, etc.).

[0156] mode: performance mode or feature mode.

[0157] 2. Perform the following operations using the basic configuration unit:

[0158] Enable Hyper-Threading in the BIOS; allocate 8 available logical cores for the current server in the simulation environment, numbered 0-7; each pair of logical cores shares one physical core resource, and assign the four mapped physical cores numbers 0, 1, 2, and 3 respectively. Then, set the mapping relationship between the logical cores and physical cores. The specific mapping relationship is shown in Table 1 below:

[0159] Table 1: Mapping Relationship between Logical Cores and Physical Cores

[0160] Logical core 0 1 2 3 4 5 6 7 Mapped physical kernel 0 0 1 1 2 2 3 3

[0161] At this point, all CPU cores are online, and a simulation environment with up to 8 functional modes can be configured.

[0162] 3. Utilize the user simulation environment to request the processing unit to perform the following operations:

[0163] 3.1 When the user selects performance mode for the simulation environment, the system first searches the database for the logical core numbers currently bound to all simulation processes, identifying logical cores 0, 1, and 2 as bound. Then, based on the initial configuration of all available cores in the simulation environment, it determines the idle logical core numbers 3, 4, 5, 6, and 7. At this point, logical cores 4 and 5 are also mapped to physical core 2 and are both in an idle state, indicating that physical core 2 is idle. Finally, the system sets the state of logical core 5 to offline and designates logical core 4 as the CPU core bound to the running simulation environment, beginning the configuration of the simulation environment and updating the database information.

[0164] 3.2 When the user selects the functional mode of the simulation environment, the system first searches the database for the logical core numbers currently bound to all simulation processes, obtaining the currently bound logical cores 0, 1, and 2. Then, based on the initial configuration of all available cores in the simulation environment, it determines that the idle logical core numbers among the available logical cores are 3, 4, 5, 6, and 7. At this point, it can be determined that logical core 3 is mapped to physical core 1, while logical core 2, which is also mapped to physical core 1, is not idle. Finally, logical core 3 is selected as the CPU core to be bound to the running simulation environment, and the simulation environment configuration begins, updating the database information.

[0165] 4. Utilize the simulation environment to release the processing unit and perform the following operations:

[0166] If the simulation environment release processing unit receives a release request from a simulation process, it identifies that the simulation process is in performance mode and bound to logical core 4. By consulting Table 1, it finds that logical core 4 and logical core 5 both belong to physical core 2, and determines that logical core 5 is in an offline state. Finally, it configures logical core 5 to be online, updates the database, and executes the simulation environment release.

[0167] If the simulation environment release processing unit receives a release request from the simulation process, it will find that the simulation process is in functional mode, directly execute the release of the simulation environment and update the database information.

[0168] 5. Utilize the resource management pool maintenance unit to perform the following operations every 30 minutes:

[0169] 5.1 Query the database and obtain the logic core serial numbers of all current simulation processes. Logic core 0, logic core 1, and logic core 2 are found to be in use.

[0170] 5.2. Then, the processor cores that are in an idle state are calculated to be logical core 3, logical core 4, logical core 5, logical core 6, and logical core 7.

[0171] 5.3. Based on the CPU information, query the processor cores that are in an offline state. Logical core 3 and logical core 5 are found to be in an offline state. Perform the following filtering on logical core 3 and logical core 5:

[0172] First, based on the mapping relationship between logical cores and physical cores, we determine that logical core 3 is mapped to physical core 1, and logical core 5 is mapped to physical core 2.

[0173] At this point, based on logical core 3, another logical core 2 mapped to physical core 1 can be determined. Upon querying, the simulation process bound to logical core 2 is in performance mode and the process is running normally, so we continue to check logical core 5.

[0174] Based on logical core 5, another logical core 4 mapped to physical core 2 can be determined. A process bound to core 4 was found, but the process ID was not found, indicating that the simulation program exited abnormally. Therefore, by configuring logical core 5 to online, physical core 2 was restored to its initial state and the database information was updated.

[0175] Therefore, this invention discloses a dynamic configuration system for a simulation environment, which can selectively configure the performance of the simulation environment and form a relatively complete simulation environment management method and system through a supplementary resource management pool maintenance unit.

[0176] The present invention also provides a dynamic configuration device for a simulation environment, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the dynamic configuration function of the simulation environment as described in any of the above.

[0177] The present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the function of dynamically configuring the simulation environment.

[0178] The processor can be a central processing unit (CPU), or other general-purpose processors, digital signal processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0179] The memory can be used to store the computer program and / or modules. The processor, by running or executing the data stored in the memory, realizes various functions of the blockchain-based refined management system for medical supplies in this invention. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, RAM, plug-in hard disk, smart memory card, secure digital card, flash memory card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0180] If the dynamic configuration system of the simulation environment is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by storing a computer program in a computer-readable storage medium. When executed by a processor, this computer program can implement the steps of the various method embodiments described above. The computer program includes computer program code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory, random access memory, dot carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction.

[0181] The basic concepts of this invention have been described. It is obvious to those skilled in the art that the detailed disclosure above is merely illustrative and does not constitute a limitation of this specification. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this specification. Such modifications, improvements, and corrections are suggested in this specification and therefore remain within the spirit and scope of the exemplary embodiments described herein.

[0182] Furthermore, those skilled in the art will understand that various aspects of this specification can be described and illustrated in several patentable ways or situations, including any new and useful combination of processes, machines, products, or substances, or any new and useful improvements thereof. Accordingly, various aspects of this specification can be implemented entirely by hardware, entirely by software (including firmware, resident software, microcode, etc.), or by a combination of hardware and software. All of the above hardware or software may be referred to as a “data block,” “module,” “engine,” “unit,” “component,” or “system.” Furthermore, various aspects of this specification may be represented as a computer product located on one or more computer-readable media, including computer-readable program code.

[0183] Computer storage media may contain a propagated data signal containing computer program code, for example, on baseband or as part of a carrier wave. This propagated signal may take various forms, including electromagnetic, optical, and suitable combinations thereof. Computer storage media can be any computer-readable medium other than a computer-readable storage medium, which can be connected to an instruction execution system, apparatus, or device to enable communication, propagation, or transmission of a program for use. The program code located on the computer storage medium can be propagated through any suitable medium, including radio, cable, fiber optic cable, RF, or similar media, or any combination of the above media.

[0184] The computer program code required for the operation of each part of this manual can be written in any one or more programming languages, including object-oriented programming languages ​​such as Java, Scala, Smalltalk, Eiffel, JADE, Emerald, C++, C#, VB.NET, Python, etc.; conventional procedural programming languages ​​such as C, Visual Basic, Fortran2003, Perl, COBOL2002, PHP, ABAP; dynamic programming languages ​​such as Python, Ruby, and Groovy; or other programming languages. This program code can run entirely on the user's computer, or as a standalone software package on the user's computer, or partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any network, such as a local area network (LAN) or wide area network (WAN), or connected to an external computer (e.g., via the Internet), or in a cloud computing environment, or used as a service such as Software as a Service (SaaS).

[0185] Furthermore, unless expressly stated in the claims, the order of processing elements and sequences, the use of numbers and letters, or other names described in this specification are not intended to limit the order of the processes and methods described herein. Although various examples have been discussed in the foregoing disclosure of some embodiments of the invention that are currently considered useful, it should be understood that such details are for illustrative purposes only, and the appended claims are not limited to the disclosed embodiments; rather, the claims are intended to cover all modifications and equivalent combinations that conform to the spirit and scope of the embodiments described herein. For example, while the system components described above can be implemented using hardware devices, they can also be implemented solely using software solutions, such as installing the described system on existing servers or mobile devices.

[0186] Similarly, it should be noted that, in order to simplify the description disclosed herein and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of embodiments in this specification may sometimes combine multiple features into a single embodiment, drawing, or description thereof. However, this method of disclosure does not imply that the subject matter of this specification requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of a single embodiment disclosed above.

[0187] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the invention.

[0188] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A dynamic configuration system for a simulation environment, characterized in that, The system runs on a server and includes: a basic configuration unit, a user simulation environment request processing unit, a simulation environment release processing unit, a resource management pool, and a resource management pool maintenance unit. The basic configuration unit is used to initialize and configure the CPU cores of the server, configure the resource management pool, set the core allocation principle of the simulation environment, and set the hyper-threading on / off mode for a single physical core. The user simulation environment request processing unit is used to receive simulation environment requests sent by users, adjust the hyper-threading of CPU cores using the resource management pool according to the simulation environment mode selected by the user, and allocate simulation environments. The simulation environment modes include functional mode and performance mode. When the user selects the simulation environment mode as performance mode, it searches for idle physical cores and disables hyper-threading on those physical cores. When the user selects the simulation environment mode as functional mode, it prioritizes selecting physical cores with hyper-threading to execute the simulation environment. If no such physical core exists, it then uses idle physical cores to execute the simulation environment. The resource management pool is used to store the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information; the simulation environment information includes the process ID of the simulation environment process, the simulation environment mode, and the bound logical core number; The simulation environment release processing unit is used to receive the simulation environment release request sent by the user, obtain the simulation environment information of the simulation environment from the resource management pool, restore the bound logic core to the initial state according to the simulation environment information, and release the simulation environment. The resource management pool maintenance unit is used to periodically check the usage of available logic cores in each simulation environment and the simulation environment information of the resource management pool in order to identify simulation environment processes that have exited abnormally in performance mode and to correct them.

2. The dynamic configuration system for the simulation environment according to claim 1, characterized in that, The basic configuration unit is specifically used for: Enable Hyper-Threading in the BIOS and set all logical cores to online. Based on the current CPU cores of the server, allocate the number of available logical cores to the simulation environment, assign a logical core number to each logical core, and isolate the logical cores. Set the mapping relationship between logical cores and physical cores, with each physical core corresponding to two logical cores; write the hyper-threading status information of the CPU cores available in the simulation environment and the current simulation environment information to the resource management pool; The core allocation principle for the simulation environment is set as follows: each simulation environment is independently bound to a logical core and does not share logical cores with other simulation environments; when allocating simulation environment processes, an idle logical core is bound. The hyper-threading mode for a single physical core is set as follows: by setting one logical core corresponding to each physical core to offline, one logical core corresponds to one physical core, thereby disabling hyper-threading for a single physical core.

3. The dynamic configuration system for the simulation environment according to claim 2, characterized in that, The user simulation environment request processing unit includes: The first interactive interface is used to receive simulation environment requests sent by users; The mode configuration module is used to determine the physical core of the simulation environment to be executed by executing the physical core configuration mechanism according to the simulation environment mode selected by the user. The simulation environment allocation module is used to allocate physical cores to the simulation environment and update the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information in the resource management pool.

4. The dynamic configuration system for the simulation environment according to claim 3, characterized in that, When the user selects performance mode as the simulation environment mode, the physical core configuration mechanism is as follows: Based on the simulation environment information, find the logical core number bound to all current simulation environment processes; Determine the currently idle logical cores based on the logical core numbers bound to all current simulation environment processes; If there are no available logic cores, the simulation environment application is considered to have failed, and an error message is returned. If there are currently any idle logic cores, obtain the number of the idle logic core; Based on the number of the idle logical core, and according to the mapping relationship between the logical core and the physical core, the idle physical core is selected; the two logical cores corresponding to the idle physical core are both in an idle state. If no available physical cores can be found, the simulation environment application is considered to have failed, and an error message is returned. If an idle physical core can be identified, then the numbers of the two logical cores corresponding to the idle physical core are determined and denoted as a and b, respectively, where a < b; the two logical cores corresponding to the idle physical core are denoted as logical core a and logical core b, respectively. Set the state of logic core b to offline; Use logic core 'a' as the logic core for running the simulation environment process.

5. The dynamic configuration system for the simulation environment according to claim 4, characterized in that, When the user selects the functional mode of the simulation environment, the physical core configuration mechanism is as follows: Based on the simulation environment information, find the logical core number bound to all current simulation environment processes; Determine the currently idle logical cores based on the logical core numbers bound to all current simulation environment processes; If there are no available logic cores, the simulation environment application is considered to have failed, and an error message is returned. If there are currently any idle logic cores, obtain the number of the idle logic core; Based on the number of the idle logical core, and according to the mapping relationship between logical cores and physical cores, the physical cores corresponding to the idle logical cores are determined as physical cores to be screened. Based on the mapping relationship between logical cores and physical cores, determine whether the other logical core mapped to the physical core to be screened is in use; If so, the physical core is bound to the simulation environment process, and the idle logical core mapped to the physical core is used as the logical core for running the simulation environment process; If none of the physical cores to be screened are bound to a simulation environment process, the idle logical core with the smallest number will be used as the logical core to run the simulation environment process.

6. The dynamic configuration system for the simulation environment according to claim 5, characterized in that, The simulation environment release processing unit includes: The second interactive interface is used to receive simulation environment release requests sent by the user; The configuration restore module is used to determine the physical cores bound to the simulation environment based on the simulation environment release request by executing the hyper-threading state recovery mechanism, and restore their hyper-threading state. The simulation environment release module is used to release the simulation environment and update the hyper-threading status information of the available CPU cores in the simulation environment and the current simulation environment information in the resource management pool.

7. The dynamic configuration system for the simulation environment according to claim 6, characterized in that, The hyper-threading state recovery mechanism includes: The simulation environment information is obtained from the resource management pool. Based on the simulation environment release request, the process ID of the corresponding simulation environment process is found, and the simulation environment mode of the simulation environment process is determined. When the simulation environment mode is performance mode, based on the simulation environment information, the logical core number X bound to the simulation environment process is found according to the process number of the simulation environment process; based on the mapping relationship between logical cores and physical cores, the physical core mapped by logical core X is found according to the logical core number X, and the number Y of another logical core mapped by the physical core is determined; the state of logical core Y is set to online.

8. The dynamic configuration system for the simulation environment according to claim 7, characterized in that, The resource management pool maintenance unit is specifically used for: At preset intervals, based on simulation environment information, logic cores in an idle state are selected, and logic cores in an offline state are further selected. For each logical core in the offline state, determine the physical core corresponding to the logical core in the offline state based on the mapping relationship between logical cores and physical cores; Determine another logical core mapped from the physical core, and determine whether that logical core is in an idle state; If so, then set the state of the logic core to online; If not, then determine the simulation environment mode of the logic core based on the simulation environment information; If in performance mode, the logical core will function normally; If in functional mode, hyperthreading is enabled for the corresponding physical core.

9. A dynamic configuration device for a simulation environment, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the function of a dynamic configuration system for the simulation environment as described in any one of claims 1 to 8.

10. A readable storage medium, characterized in that: The readable storage medium stores a computer program that, when executed by a processor, implements the functions of the dynamic configuration system of the simulation environment as described in any one of claims 1 to 8.

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