Test method for error correction service of storage device, storage medium and electronic device
By reading and transforming data in the storage device and using error correction services to perform error correction operations, the problem of inability to effectively verify error correction capabilities in the prior art is solved, and the stability testing of the storage device error correction service is realized.
Patent Information
- Application Number
- CN202411313073.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2044-09-19
AI Technical Summary
The prior art cannot effectively verify the error correction capabilities of the error correction service of the storage device, resulting in the inability to stably trigger various types of errors, and thus the inability to effectively verify the error correction function.
By reading all data in the target storage unit, performing transformation operations, restoring the data, and using the target error correction service to perform error correction operations, various errors are simulated, thereby testing the ability of the error correction service.
It realizes the stable triggering of various types of errors, effectively verify the error correction capabilities of the error correction service of the storage device, and ensures the normal operation of the error correction function.
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Figure CN119292820A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the computer field, and more specifically, to a storage device error correction service testing method, a storage medium, and an electronic device. Background Art
[0002] With the widespread application of storage devices (e.g., solid state drives (SSDs)) in the field of computer storage, their performance and reliability issues have gradually attracted attention, and an effective error correction function of a storage device can ensure data integrity and reliability. Various errors may occur during the use of storage devices, such as program errors when writing data to flash memory, erase errors when erasing data in flash memory, and read errors when reading data from flash memory. Manufacturers of storage devices must have the ability to avoid various abnormal errors through software algorithms to ensure the normal operation of storage devices.
[0003] Since these errors do not occur frequently and the probability of occurrence is very low, the related art cannot stably trigger various types of errors, resulting in the problem that the error correction capability of the error correction service of the storage device cannot be effectively verified. Summary of the invention
[0004] The embodiments of the present application provide a method and apparatus for testing an error correction service of a storage device, so as to at least solve the problem in the related art that the error correction capability of the error correction service of the storage device cannot be effectively verified.
[0005] According to one embodiment of the present application, a method for testing an error correction service of a storage device is provided, which is applied to an error correction test device, wherein the error correction test device is connected to multiple error correction services, and the multiple error correction services are respectively connected to multiple storage devices, and the error correction services are used to detect and repair abnormal data in the above-mentioned storage devices, including: storing all data read from a target storage unit into a target cache, and deleting all data stored in the above-mentioned target storage unit, wherein the above-mentioned target storage unit is any storage unit included in the multiple storage devices; reading N-bit first data from the above-mentioned target cache based on a preset error correction test type, and performing a transformation operation on the above-mentioned N-bit first data to obtain N-bit second data, wherein the above-mentioned N-bit first data is one of all the data in the above-mentioned target storage unit; data, N is a natural number greater than or equal to 1; re-storing the N-bit second data and the M-bit first data into the target storage unit, wherein the M-bit first data and the N-bit first data constitute all the data in the target storage unit cached in the target storage unit, and M is a natural number greater than or equal to 1; in the case where the target storage unit responds to the received data operation instruction, performing an error correction operation on the target storage unit through a target error correction service to obtain an error correction result, wherein the target error correction service is an error correction service corresponding to the target storage unit among the multiple error correction services, and the error correction operation includes detecting and repairing the N-bit second data in the target storage unit; and testing the error correction capability of the target error correction service based on the error correction result.
[0006] In an exemplary embodiment, before storing all data read from the target storage unit into the target cache and deleting all data stored in the above-mentioned target storage unit, the above-mentioned method also includes: obtaining the logical address of the above-mentioned target storage unit, wherein the above-mentioned logical address is used to represent the virtual address for accessing the above-mentioned target storage unit; searching for a physical address matching the logical address of the above-mentioned target storage unit in a target mapping table, wherein the above-mentioned target mapping table includes a mapping relationship between the above-mentioned logical address and the above-mentioned physical address; in response to a received data read instruction, obtaining all the above-mentioned data stored in the above-mentioned target storage unit according to the above-mentioned physical address and through communication established with the target storage device, wherein the above-mentioned target storage device is a storage device including the above-mentioned target storage unit among the multiple storage devices mentioned above.
[0007] In an exemplary embodiment, the plurality of storage devices are solid-state hard disks, the target storage unit is any one of the plurality of storage units in the target solid-state hard disk, the target solid-state hard disk is any one of the plurality of solid-state hard disks, and the storing of all data read from the target storage unit into the target cache and deleting all data stored in the target storage unit include: determining the data volume of all data read from the target storage unit; searching for a cache space matching the data volume from the cache space allocated in the target solid-state hard disk to obtain the target cache, or sending a cache allocation instruction to the target solid-state hard disk to instruct the target solid-state hard disk to allocate cache space in real time according to the data volume to obtain the target cache; caching all data read from the target storage unit into the target cache; and when it is determined that all data read from the target storage unit has been cached into the target cache, deleting all data stored in the target storage unit in one of the following ways: formatting the target storage unit; setting the data storage attribute of the target storage unit to clear all data stored in the target storage unit.
[0008] In an exemplary embodiment, based on a preset error correction test type, N bits of first data are read from the target cache, and a transformation operation is performed on the N bits of first data to obtain N bits of second data, including: determining the device type of the target storage device where the target storage unit is located; obtaining an error correction test request from the error correction test device according to the device type, wherein the error correction test request is used to request an error correction test for the storage unit in the target storage device; determining the preset error correction test type from the error correction test request; determining an error correction threshold corresponding to the preset error correction test type, and reading the N bits of first data from the target cache according to the error correction threshold, wherein, when the preset error correction test type belongs to an uncorrectable error type, the N bits are greater than the error correction threshold, and when the preset error correction test type belongs to a correctable error type, the N bits are less than or equal to the error correction threshold; performing at least one of the following operations on the N bits of first data: The first data of the N-bit computer program product is transformed into the N-bit second data by performing a transformation operation: determining an error correction threshold value corresponding to the above-mentioned preset error correction test type; determining the bit position to be inverted in the above-mentioned N-bit first data according to the above-mentioned error correction threshold value; inverting the above-mentioned bit position to be inverted to obtain the above-mentioned N-bit second data; converting the above-mentioned N-bit first data into data of a preset base to obtain the above-mentioned N-bit second data, wherein the above-mentioned preset base includes a plurality of data formats; performing a shift operation on the above-mentioned N-bit first data to perform the above-mentioned transformation operation on the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data; performing a preset logical operation according to the bit positions in the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data, wherein the above-mentioned preset logical operation includes an operation between the bit positions in the above-mentioned N-bit first data; performing a modulus operation on the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data; performing a data normalization operation on the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data.
[0009] In an exemplary embodiment, before re-storing the N-bit second data and the M-bit first data in the target storage unit, the method further includes: recombining the N-bit second data and the M-bit first data to obtain target data; inputting the target data into a check code generation program to generate a cyclic redundancy check code for the target data through the check code generation program, wherein the cyclic redundancy check code is used to allow data operations to be performed on the target data when the target storage unit responds to the data operation request.
[0010] In an exemplary embodiment, performing an error correction operation on the target storage unit through a target error correction service to obtain an error correction result includes: recording the number of data operation exceptions, the number of abnormal data, and the amount of error correction performed on the abnormal data by the target error correction service when performing the error correction operation on the target storage unit through the target error correction service to obtain the error correction result; performing the error correction operation on the target storage unit through the target error correction service to obtain the error correction result, further includes: reading the N-bit first data from the target cache; comparing the error correction result with the N-bit first data to obtain a comparison result; and detecting and repairing the N-bit second data in the target storage unit through other error correction services based on the comparison result.
[0011] In an exemplary embodiment, the error correction capability of the target error correction service is tested based on the error correction result, including: obtaining from the error correction result the number of data operation exceptions, the number of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data in the process of performing the error correction operation on the target storage unit through the target error correction service; calculating the occurrence rate of the abnormal data and the success rate of the target error correction service on the abnormal data when the target error correction service performs the error correction operation on the target storage unit based on the number of error corrections and the error correction amount; obtaining other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units, wherein the other storage units are storage units other than the target storage unit in the plurality of storage devices; calculating the target occurrence rate and target success rate of the target error correction service using the occurrence rate and the success rate corresponding to the target storage unit and the other occurrence rates and other success rates corresponding to the other storage units; and obtaining the error correction capability of the target error correction service based on the target occurrence rate and the target success rate analysis.
[0012] According to another embodiment of the present application, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.
[0013] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above method embodiments when running.
[0014] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0015] Through the present application, a transformation operation is performed on the N-bit first data that has been backed up in the target storage unit in combination with a preset error correction test type and an error correction threshold of the storage device, and new N-bit second data and M-bit first data are obtained and their corresponding check codes are recalculated. Then, an error correction operation is performed on the target storage unit using a target error correction service, and the error correction capability of the target error correction service is tested based on the error correction result. Therefore, various errors existing in various data can be simulated, thereby achieving the effect of stably triggering various types of errors, and further solving the problem in the related art that the error correction capability of the error correction service of the storage device cannot be effectively verified. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is a hardware environment diagram of a test method for a storage device error correction service according to an embodiment of the present application;
[0017] Figure 2 is a flow chart of a method for testing a storage device error correction service according to an embodiment of the present application;
[0018] Figure 3 is a structural block diagram of an error correction service according to an embodiment of the present application;
[0019] Figure 4 is a schematic diagram of a flow chart of operating data stored in a data block according to an embodiment of the present application;
[0020] Figure 5 It is a structural block diagram of a test device for storage device error correction service according to an embodiment of the present application. DETAILED DESCRIPTION
[0021] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0022] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.
[0023] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 Schematic diagram of the hardware environment of a storage device error correction service testing method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.
[0024] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the test method of the storage device error correction service in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0025] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.
[0026] In this embodiment, a method for testing an error correction service of a storage device is provided, which is applied to an error correction test device. The error correction test device is connected to multiple error correction services, and the multiple error correction services are respectively connected to multiple storage devices. The error correction services are used to detect and repair abnormal data in the storage device. Figure 2 is a flow chart of a method for testing a storage device error correction service according to an embodiment of the present application. Figure 2 As shown, the process includes the following steps:
[0027] Step S202, storing all data read from the target storage unit into the target cache, and deleting all data stored in the target storage unit, wherein the target storage unit is any storage unit included in the plurality of storage devices;
[0028] Optionally, the target storage unit in this embodiment is used to store data, which may be, but is not limited to, a hard disk drive, a solid state drive, a memory stick, an optical disk, a USB flash drive, a cloud storage service, etc.
[0029] Step S204, reading N-bit first data from the target cache based on a preset error correction test type, and performing a transformation operation on the N-bit first data to obtain N-bit second data, wherein the N-bit first data is data in all data in the target storage unit, and N is a natural number greater than or equal to 1;
[0030] Optionally, the preset error correction test type in this embodiment is used to verify the integrity and reliability of the data, which can be an uncorrectable error type, such as damage to the storage unit storing the data, etc.; it can also be a correctable error type, such as data format error, data redundancy, etc.
[0031] Optionally, N in the N-bit second data in this embodiment is a value related to the error correction threshold of the storage device set according to the above-mentioned preset error correction test type; for example, in the case that the storage device is an SSD, if the error correction threshold of the SSD is 80 bits, the first data is 160 bits, when the preset error correction test type is a type of uncorrectable error, when the transformation operation is performed on the 160-bit first data, the number of bits of the obtained second data is 90 bits (greater than the error correction threshold), and when the preset error correction test type is a type of correctable error, when the transformation operation is performed on the 160-bit first data, the number of bits of the obtained second data is 40 bits (less than or equal to the error correction threshold).
[0032] Step S206, re-storing both the N-bit second data and the M-bit first data in the target storage unit, wherein the M-bit first data and the N-bit first data constitute all the data in the target storage unit cached in the target storage unit, and M is a natural number greater than or equal to 1;
[0033] Optionally, the M-bit first data in this embodiment is data that has not been transformed in the above operation. For example, when a transformation operation is performed on 160-bit first data and the number of bits of the obtained second data is 90 bits, the M bits in the M-bit first data at this time are 70 bits.
[0034] Step S208, when the target storage unit responds to the received data operation instruction, performing an error correction operation on the target storage unit through the target error correction service to obtain an error correction result, wherein the target error correction service is an error correction service corresponding to the target storage unit among the multiple error correction services, and the error correction operation includes detecting and repairing the N-bit second data in the target storage unit;
[0035] Optionally, the error correction testing service in this embodiment can be applied, but not limited to, in the hardware manufacturing process, using the error correction testing service to detect and repair defects in hardware components and detect the factory quality of the hardware; applied in the software development process, using the error correction testing service to ensure that the software product has no errors or defects before release.
[0036] Step S210, testing the error correction capability of the target error correction service based on the error correction result.
[0037] Optionally, error correction services are used to detect and correct errors that occur during data transmission, storage or processing.
[0038] For example, Figure 3 As shown, the error correction modules included in the error correction service may be: a storage device self-repair (SmartRead Retry, referred to as SRR) module, a low-density parity check (Low Density Parity Check Code, referred to as LDPC) soft decoding module, a disk array reconstruction module, a bad block management module, a data cleaning module and a first reading module, etc. Among them, the SRR module is used to automatically try to re-read the data when an error is detected when reading data. If the first reading fails, the SRR module RR will try to use different reading strategies or adjust reading parameters to increase the probability of correct data reading; the LDPC soft decoding module is used to detect and correct errors in data transmission or storage, and use probability information to improve the accuracy of error correction; when one or more hard disks in the disk array fail, the disk array reconstruction module is responsible for rebuilding the data to maintain the integrity of the array and the accessibility of the data. The common operation is to recover the data from the remaining hard disks and reallocate it to new hard disks; the bad block management module is responsible for identifying and isolating bad blocks (i.e., data blocks that cannot be read or written normally) on the storage medium to prevent data damage or loss. At the same time, it will also record the location of the bad blocks and avoid using these areas when writing data; the data cleaning module is responsible for maintaining the integrity of data on the storage device, by deleting useless or damaged data, freeing up space and improving storage efficiency; the first read module is used to process the situation when the data on the storage device is read for the first time, involving initializing the reading process, checking the integrity of the data, or performing necessary preprocessing operations when the data is first loaded into the memory.
[0039] Alternatively, if Figure 3As shown, in the case where the target storage unit responds to the received data operation instruction, the target error correction service performs an error correction operation on the above target storage unit to obtain the error correction result. The steps taken in this process include but are not limited to: the error correction service will first try to use the SRR module, that is, when an abnormality is detected, the corresponding parameters are used to perform data error correction processing according to the state of the current target storage unit; if the SRR cannot correct the data error, the LDPC soft solution module is entered, and the unprocessed or processed original data in the current target storage unit needs to be read, and the soft solution process is completed in conjunction with the number of LDPC soft solution iterations; if the LDPC soft solution fails, the reconstruction process is entered, and the target storage unit with problems is excluded according to the bad target storage unit table to obtain the current valid disk stripe size; if the unchecked error message appears again during the reading of the disk stripe, a direct reply of "Work Manager Reconstruction Failed" is made. Specifically, if the target error correction service performs an error correction operation on the above-mentioned target storage unit, and some errors that cannot be repaired by conventional error detection and correction techniques occur in the process of obtaining the error correction result, the target error correction service will write the data in the target storage unit related to the error into the spare storage unit and associate the target logical address corresponding to the target storage unit with the physical address of the spare storage unit to complete the data migration; if the target error correction service performs an error correction operation on the above-mentioned target storage unit, and some errors that can be repaired by conventional error detection and correction techniques occur in the process of obtaining the error correction result, the target error correction service will directly perform the error correction operation, and the data after error correction will overwrite the current data where the error occurs.
[0040] Optionally, the error correction results in this embodiment include but are not limited to: the number of data operation exceptions that occur when the error correction operation is performed on the target storage unit through the target error correction service, the amount of abnormal data, the amount of error correction performed on the abnormal data by the target error correction service, the time taken for the error correction service to perform the error correction operation on the target storage unit, etc.
[0041] Through the above steps, the N-bit first data that has been backed up is transformed in the target storage unit in combination with the preset error correction test type and the error correction threshold of the storage device to obtain new N-bit second data and M-bit first data and recalculate their corresponding check codes, and then the target error correction service is used to perform an error correction operation on the target storage unit, and the error correction capability of the target error correction service is tested according to the error correction result. Therefore, various types of errors can be stably triggered, further solving the problem in the related art that the error correction capability of the error correction service of the storage device cannot be effectively verified.
[0042] In an exemplary embodiment, before storing all data read from the target storage unit into the target cache and deleting all data stored in the target storage unit, the method further includes: obtaining the logical address of the target storage unit, wherein the logical address is used to represent the virtual address for accessing the target storage unit; searching for a physical address matching the logical address of the target storage unit in a target mapping table, wherein the target mapping table includes a mapping relationship between the logical address and the physical address; and in response to a received data read instruction, obtaining all the data stored in the target storage unit according to the physical address and through communication established with the target storage device, wherein the target storage device is a storage device including the target storage unit among the plurality of storage devices.
[0043] Optionally, when the storage device is an SSD and the target storage unit is a data block, the steps of reading all data from the target storage unit, i.e., reading all data from the data block, in this embodiment are: obtaining the logical address of the data block according to the logical address recorded in the program block; then searching the logical-to-physical address mapping table (here is the L2P mapping table) in the SSD for a physical address that matches the logical address of the above data block; finding the actual location of the data block in the SSD according to the physical address of the data block; and reading all data in the data block.
[0044] Optionally, when the storage device is an SSD and the target storage unit is a data block, the steps of deleting all data stored in the data block include but are not limited to: marking the data block as deletable so that the system can detect that the data on the data block can be overwritten; overwriting the data on the data block with invalid data or empty data to ensure that the original data cannot be recovered; updating the metadata of the file system to mark that the data on the data block has been deleted; and also erasing the storage medium to ensure that the data cannot be recovered.
[0045] Optionally, the data read instruction used in this embodiment may contain, but is not limited to: the address of the target data block corresponding to the data read operation, the number of bytes to be read in this read operation, the format of the data, etc.
[0046] Through the above steps, the logical address of the target storage unit is converted into a physical address, which is convenient for responding to the received data reading instruction and can locate the location of data storage more quickly, thereby speeding up the data reading speed and further ensuring the accuracy of data reading.
[0047] In an exemplary embodiment, multiple storage devices are solid-state hard disks, the target storage unit is any storage unit among multiple storage units in the target solid-state hard disk, the target solid-state hard disk is any solid-state hard disk among multiple solid-state hard disks, all data read from the target storage unit are stored in the target cache, and all data stored in the target storage unit are deleted, including: determining the data volume of all data read from the above-mentioned target storage unit; searching for cache space matching the above-mentioned data volume from the cache space allocated in the above-mentioned target solid-state hard disk to obtain the above-mentioned target cache, or sending a cache allocation instruction to the above-mentioned target solid-state hard disk to instruct the above-mentioned target solid-state hard disk to allocate cache space in real time according to the above-mentioned data volume to obtain the above-mentioned target cache; all data read from the above-mentioned target storage unit are cached to the above-mentioned target cache; when it is determined that all data read from the above-mentioned target storage unit has been cached to the above-mentioned target cache, all data stored in the above-mentioned target storage unit are deleted in one of the following ways: formatting the above-mentioned target storage unit; setting the data storage attribute of the above-mentioned target storage unit to clear all data stored in the above-mentioned target storage unit.
[0048] Optionally, the contents included in the cache allocation instruction sent to the target solid-state drive in this embodiment include but are not limited to: specifying the size of the storage space to be allocated to the cache, specifying the location to which the solid-state drive needs to allocate the cache, and the strategy used by the solid-state drive for cache allocation, such as a least recently used strategy or a first-in-first-out strategy.
[0049] Optionally, in this embodiment, the steps performed when searching for a cache space that matches the amount of data from the cache space allocated in the target solid-state hard disk include but are not limited to: checking the cache space size of the target solid-state hard disk, comparing the data amount of all data obtained in the previous step with the cache space size to determine whether there is enough space to store the current data; if the current data amount is less than or equal to the cache space size of the solid-state hard disk, the data can be directly stored in the hard disk, if the current data amount is greater than the cache space size, it is necessary to consider cleaning up other data on the hard disk or dividing the data into multiple parts for storage; finally, confirming that the data has been successfully stored in the cache space of the target solid-state hard disk, and performing necessary backup operations to ensure the security of the data. For example, when the storage device is an SSD and the target storage unit is a data block, the amount of data in the read data block is 160 bits, and a cache allocation instruction is sent to the target solid-state hard disk, the cache allocation instruction carries a storage space designated to be allocated to the cache of 160 bits, and the strategy used by the solid-state hard disk for cache allocation is the least recently used strategy.
[0050] Through the above steps, all the data read from the target storage unit is stored in the target solid-state hard disk, and then all the data stored in the above target storage unit is deleted. Storing data in the solid-state hard disk can increase the speed of data access, reduce the read and write delay of the device, and improve the overall performance and response speed.
[0051] In an exemplary embodiment, N bits of first data are read from a target cache based on a preset error correction test type, and a transformation operation is performed on the N bits of first data to obtain N bits of second data, including: determining a device type of a target storage device where the target storage unit is located; obtaining an error correction test request from the error correction test device according to the device type, wherein the error correction test request is used to request an error correction test for the storage unit in the target storage device; determining the preset error correction test type from the error correction test request; determining an error correction threshold corresponding to the preset error correction test type, and reading the N bits of first data from the target cache according to the error correction threshold, wherein, in the case where the preset error correction test type belongs to an uncorrectable error type, the N bits are greater than the error correction threshold, and in the case where the preset error correction test type belongs to a correctable error type, the N bits are less than or equal to the error correction threshold; performing a transformation operation on the N bits of first data in at least one of the following ways: A transformation operation is performed on a data to obtain an N-bit second data: an error correction threshold corresponding to the above-mentioned preset error correction test type is determined; the bit to be inverted in the above-mentioned N-bit first data is determined according to the above-mentioned error correction threshold; the above-mentioned bit to be inverted is inverted to obtain the above-mentioned N-bit second data; the above-mentioned N-bit first data is converted into data of a preset base to obtain the N-bit second data, wherein the above-mentioned preset base includes a plurality of data formats; a shift operation is performed on the above-mentioned N-bit first data to perform the above-mentioned transformation operation on the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data; a preset logic operation is performed on the bit in the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data, wherein the above-mentioned preset logic operation includes an operation between the bit in the above-mentioned N-bit first data; a modulus operation is performed on the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data; a data normalization operation is performed on the above-mentioned N-bit first data to obtain the above-mentioned N-bit second data.
[0052] Optionally, the device type of the target storage device in this embodiment includes but is not limited to: a hard disk drive (HDD), a solid state drive (SSD), an optical drive, a flash drive, a tape drive, etc.
[0053] Optionally, the error correction test request in this embodiment includes, but is not limited to: specifying the address of a storage unit in a target storage device to be tested for error correction, the error correction test type, an error correction threshold of the target storage device, etc.
[0054] Through the above steps, the data to be read is determined according to the error correction test type by utilizing the device type of the target storage device where the above target storage unit is located and the error correction test request, and the data size for performing the transformation operation can be controlled, thereby generating different types of error correction test types, simulating various errors that may occur when users use the system in real scenarios, and effectively verifying the error correction service.
[0055] In an exemplary embodiment, before re-storing the N-bit second data and the M-bit first data into the target storage unit, it also includes: recombining the above-mentioned N-bit second data and the above-mentioned M-bit first data to obtain the target data; inputting the above-mentioned target data into a check code generation program to generate a cyclic redundancy check code for the above-mentioned target data through the above-mentioned check code generation program, wherein the above-mentioned cyclic redundancy check code is used to allow data operations to be performed on the above-mentioned target data when the above-mentioned target storage unit responds to the above-mentioned data operation request.
[0056] Optionally, in this embodiment, when recombining the N-bit second data and the M-bit first data to obtain the target data, the combination operation is performed according to the relative positions of the N-bit second data and the M-bit first data before the row transformation operation, wherein the combination operation may be, but is not limited to, a splicing operation. For example, when the storage device is an SSD and the target storage unit is a data block, the first data is 160 bits, and when the preset error correction test type is an uncorrectable error type, when the transformation operation is performed on the 160-bit first data, the number of bits of the obtained second data is 90 bits (greater than the error correction threshold), and 70 bits of first data are obtained at the same time, and the 90-bit second data and the 70-bit first data are spliced together, wherein the above splicing operation is performed according to the relative positions of the 90-bit transformed second data and the 70-bit unchanged first data before the first data transformation operation, that is, if the 90-bit transformed second data before the first data transformation operation is stored in the data block partition 1, the spliced 90-bit second data still corresponds to the data block partition 1.
[0057] Optionally, in this embodiment, when the cyclic redundancy check code of the target data is generated by the check code generation program, the check code generation program can select CRC polynomials such as CRC-8, CRC-16, CRC-32 to generate a fixed value of CRC; the check code generation program also uses the CRC register, and initializes the CRC register to a fixed initial value (all 0 or all 1); then the check code generation program processes the data, inputs the data into the CRC register one by one according to the bit sequence, and for each bit of data, performs an XOR operation on the value of the CRC register and the bit of data; after the data processing is completed, the value of the CRC register is used as the generated CRC check code.
[0058] Through the above steps, the cyclic redundancy check code of the target data is generated by the check code generation program, which realizes the verification of data transmission when the target storage unit responds to the above data operation request, ensures the accuracy of data during transmission, and allows data operations to be performed on the target data.
[0059] In an exemplary embodiment, performing an error correction operation on a target storage unit through a target error correction service to obtain an error correction result includes: recording the number of data operation exceptions that occur when performing an error correction operation on the target storage unit through the target error correction service, the amount of abnormal data, and the amount of error correction performed on the abnormal data by the target error correction service to obtain the error correction result; performing an error correction operation on the target storage unit through the target error correction service to obtain the error correction result, further includes: reading the N-bit first data from the target cache; comparing the error correction result with the N-bit first data to obtain a comparison result; and detecting and repairing the N-bit second data in the target storage unit through other error correction services based on the comparison result.
[0060] Optionally, in this embodiment, N bits of first data are read from the target cache; the error correction result is compared with the N bits of first data to obtain a comparison result including: if the error correction result is some error that can be repaired by conventional error detection and correction technology, it is directly compared with the N bits of first data, if the data are the same, the comparison result is recorded as consistent, otherwise it is recorded as inconsistent; if the error correction result is some error that cannot be repaired by conventional error detection and correction technology, the physical address of the storage unit associated with it is read through the target logical address corresponding to the target storage unit, the data in the above storage unit is read, and it is compared with the N bits of first data, if the data are the same, the comparison result is recorded as consistent, otherwise it is recorded as inconsistent.
[0061] Optionally, in this embodiment, the steps of detecting and repairing the N-bit second data in the target storage unit through other error correction services based on the comparison results are similar to the error correction steps of the target error correction service, which have been described above and will not be repeated here.
[0062] Optionally, the contents that may be included in the error correction result in this embodiment have been described above and will not be repeated here.
[0063] Through the above steps, the target error correction service performs an error correction operation on the target storage unit to obtain an error correction result and compares it with the N-bit first data. The effectiveness of the target error correction service can be determined based on the comparison result, intuitively demonstrating the error correction effect of the target error correction service.
[0064] In an exemplary embodiment, the error correction capability of a target error correction service is tested based on an error correction result, including: obtaining from the error correction result the number of data operation exceptions, the number of abnormal data, and the amount of error correction performed on the abnormal data by the target error correction service in the process of performing the error correction operation on the target storage unit through the target error correction service; calculating the occurrence rate of the abnormal data and the success rate of the target error correction service in correcting the abnormal data when the target error correction service performs the error correction operation on the target storage unit based on the number of error corrections and the error correction amount; obtaining other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units, wherein the other storage units are storage units other than the target storage unit in the plurality of storage devices; calculating the target occurrence rate and target success rate of the target error correction service using the occurrence rate and the success rate corresponding to the target storage unit and the other occurrence rates and other success rates corresponding to the other storage units; and obtaining the error correction capability of the target error correction service based on the target occurrence rate and the target success rate analysis.
[0065] Optionally, in this embodiment, data operation anomalies include but are not limited to data corruption, data duplication, data overflow, etc.
[0066] Optionally, in this embodiment, in addition to analyzing the target error correction service based on the target occurrence rate and the target success rate to obtain the error correction capability of the target error correction service, the error correction capability of the target error correction service may also be obtained by combining the bit error rate and the error correction time.
[0067] Through the above steps, the occurrence rate of abnormal data obtained by the target error correction service performing error correction operations on the target storage unit and other storage units, the success rate of the target error correction service in correcting the abnormal data, other occurrence rates and other success rates are calculated, and the data of the error correction results of the target error correction service in different read error scenarios are recorded. The error correction capability of the target error correction service is objectively demonstrated in the form of data, further verifying the effectiveness of the error correction service.
[0068] The following is an explanation of the operation performed on the N-bit first data in the target storage unit in the embodiment of the present application in conjunction with an optional example. Figure 4 As shown, it is a flowchart of operating on the data stored in the data block. In this optional example, the storage device is an SSD, the target storage unit is a data block, and the data block stores bit-type data.
[0069] S401, reading bit data information in a data block and storing 160 bits of data information read from the data block into other data blocks in the SSD that do not participate in this error correction test;
[0070] S402, erasing bit information in the data block;
[0071] S403, performing a transformation operation on 160 bits of data according to a preset error type of correctable errors and a 90-bit error correction threshold of the SSD, randomly selecting 40 bits of data in the data block to perform a flip operation, and leaving the remaining 120 bits of data unchanged;
[0072] S404, combining the flipped 40-bit data and the unflipped 120-bit data according to the relative position of the data before the flipping operation to obtain target data, and inputting the target data into a check code generation program to generate a cyclic redundancy check code for the target data through the check code generation program, wherein the check code generation program uses a CRC-16 polynomial to generate the check code;
[0073] S405, re-write the flipped 40-bit data and the unflipped 120-bit data into their corresponding data blocks.
[0074] Through this optional example, operations are performed on the data in the data block to generate new data, thereby simulating the execution process of the error correction service in different scenarios, facilitating the subsequent error correction service to perform error correction operations and verifying the error correction capability of the error correction service of the storage device.
[0075] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the above methods of each embodiment of the present application.
[0076] In this embodiment, a test device for storage device error correction service is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.
[0077] Figure 5 is a structural block diagram of a test device for storage device error correction service according to an embodiment of the present application, such as Figure 5 As shown, the device comprises:
[0078] A first deleting module 502 is used to store all data read from a target storage unit into a target cache and delete all data stored in the target storage unit, wherein the target storage unit is any storage unit included in the plurality of storage devices;
[0079] A first transformation module 504 is configured to read N-bit first data from the target cache based on a preset error correction test type, and perform a transformation operation on the N-bit first data to obtain N-bit second data, wherein the N-bit first data is data in all data in the target storage unit, and N is a natural number greater than or equal to 1;
[0080] A first storage module 506, configured to store the N-bit second data and the M-bit first data in the target storage unit again, wherein the M-bit first data and the N-bit first data constitute all the data in the target storage unit cached in the target storage unit, and the M is a natural number greater than or equal to 1;
[0081] A first error correction module 508 is configured to, when the target storage unit responds to the received data operation instruction, perform an error correction operation on the target storage unit through a target error correction service to obtain an error correction result, wherein the target error correction service is an error correction service corresponding to the target storage unit among the plurality of error correction services, and the error correction operation includes detecting and repairing the N-bit second data in the target storage unit;
[0082] The first testing module 510 is used to test the error correction capability of the target error correction service based on the error correction result.
[0083] In an exemplary embodiment, the first deletion module 502 includes: a first acquisition unit, used to acquire the logical address of the target storage unit; a first search unit, used to search the target mapping table for a physical address that matches the logical address of the target storage unit; and a second acquisition unit, used to respond to a received data read instruction, and acquire all the data stored in the target storage unit according to the physical address and through communication established with the target storage device.
[0084] In an exemplary embodiment, multiple storage devices are all solid-state hard disks, the target storage unit is any storage unit among multiple storage units in the target solid-state hard disk, and the target solid-state hard disk is any solid-state hard disk among the multiple solid-state hard disks. The first deletion module 502 includes: a first determination unit, used to determine the data volume of all data read from the target storage unit; a second search unit, used to search for a cache space matching the data volume from the cache space allocated in the target solid-state hard disk to obtain the target cache, or send a cache allocation instruction to the target solid-state hard disk to instruct the target solid-state hard disk to allocate cache space in real time according to the data volume to obtain the target cache; a first cache unit, used to cache all data read from the target storage unit to the target cache; a first deletion unit, used to delete all data stored in the target storage unit in one of the following ways when it is determined that all data read from the target storage unit has been cached to the target cache: formatting the target storage unit; setting the data storage attribute of the target storage unit to clear all data stored in the target storage unit.
[0085] In an exemplary embodiment, the first transformation module 504 includes: a second determination unit, configured to determine the device type of the target storage device where the target storage unit is located; a third acquisition unit, configured to acquire an error correction test request from the error correction test device according to the device type, wherein the error correction test request is used to request an error correction test to be performed on the storage unit in the target storage device; the third determination unit, configured to determine the preset error correction test type from the error correction test request; a first reading unit, configured to determine an error correction threshold corresponding to the preset error correction test type, and read the N-bit first data from the target cache according to the error correction threshold; a first transformation unit, configured to perform a transformation operation on the N-bit first data in at least one of the following ways to obtain the N-bit second data: determining the error correction threshold corresponding to the preset error correction test type; value; determine the bit to be inverted in the N-bit first data according to the error correction threshold; invert the bit to be inverted to obtain the N-bit second data; convert the N-bit first data into data of a preset radix to obtain the N-bit second data, wherein the preset radix includes a variety of data formats; perform a shift operation on the N-bit first data to perform the transformation operation on the N-bit first data to obtain the N-bit second data; perform a preset logic operation on the bit in the N-bit first data to obtain the N-bit second data, wherein the preset logic operation includes an operation between the bits in the N-bit first data; perform a modulus operation on the N-bit first data to obtain the N-bit second data; perform a data normalization operation on the N-bit first data to obtain the N-bit second data.
[0086] In an exemplary embodiment, the first storage module 506 includes: a first combination unit, used to recombine the N-bit second data and the M-bit first data to obtain target data; a first generation unit, used to input the target data into a check code generation program to generate a cyclic redundancy check code for the target data through the check code generation program.
[0087] In an exemplary embodiment, the first error correction module 508 includes: a first recording unit, used to record the number of data operation exceptions, the number of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data when the error correction operation is performed on the target storage unit through the target error correction service, to obtain the error correction result; a first comparison unit, used to read the N-bit first data from the target cache; compare the error correction result with the N-bit first data to obtain a comparison result; and detect and repair the N-bit second data in the target storage unit through other error correction services based on the comparison result.
[0088] In an exemplary embodiment, the first test module 510 includes: a fourth acquisition unit, which is used to obtain from the error correction result the number of data operation exceptions, the number of abnormal data, and the error correction amount of the abnormal data recorded in the process of performing the error correction operation on the target storage unit through the target error correction service; a first calculation unit, which is used to calculate the occurrence rate of the abnormal data and the success rate of the target error correction service for correcting the abnormal data when the target error correction service performs the error correction operation on the target storage unit based on the number of errors corrected by the target error correction service and the error correction amount; a fifth acquisition unit, which is used to obtain other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units; a second calculation unit, which is used to calculate the target occurrence rate and target success rate of the target error correction service by using the occurrence rate and success rate corresponding to the target storage unit and the other occurrence rates and other success rates corresponding to the other storage units; and a first analysis unit, which is used to analyze and obtain the error correction capability of the target error correction service based on the target occurrence rate and the target success rate.
[0089] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.
[0090] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.
[0091] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.
[0092] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0093] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.
[0094] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.
[0095] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.
[0096] The embodiments of the present application also provide a computer program, which includes computer instructions, which are stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of any one of the above method embodiments.
[0097] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.
[0098] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.
[0099] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.
Claims
1. A method for testing a storage device error correction service, characterized in that: Applied to an error correction test device, the error correction test device is connected to a plurality of error correction services, the plurality of error correction services are respectively connected to a plurality of storage devices, the error correction services are used to detect and repair abnormal data in the storage devices, the method comprises: storing all data read from a target storage unit into a target cache, and deleting all data stored in the target storage unit, wherein the target storage unit is any storage unit included in the plurality of storage devices; Reading N-bit first data from the target cache based on a preset error correction test type, and performing a transformation operation on the N-bit first data to obtain N-bit second data, wherein the N-bit first data is data in all data in the target storage unit, and N is a natural number greater than or equal to 1; Restore the N-bit second data and the M-bit first data into the target storage unit, wherein the M-bit first data and the N-bit first data constitute all the data in the target storage unit cached in the target storage unit, and M is a natural number greater than or equal to 1; In a case where the target storage unit responds to the received data operation instruction, performing an error correction operation on the target storage unit through a target error correction service to obtain an error correction result, wherein the target error correction service is an error correction service corresponding to the target storage unit among the plurality of error correction services, and the error correction operation includes detecting and repairing the N-bit second data in the target storage unit; The error correction capability of the target error correction service is tested based on the error correction result.
2. The method according to claim 1, characterized in that Before storing all data read from the target storage unit in the target cache and deleting all data stored in the target storage unit, the method further includes: Acquire a logical address of the target storage unit, wherein the logical address is used to represent a virtual address for accessing the target storage unit; Searching a target mapping table for a physical address that matches the logical address of the target storage unit, wherein the target mapping table includes a mapping relationship between the logical address and the physical address; In response to the received data read instruction, all the data stored in the target storage unit are obtained according to the physical address and through communication established with the target storage device, wherein the target storage device is a storage device including the target storage unit among the multiple storage devices.
3. The method according to claim 1, characterized in that The plurality of storage devices are all solid-state hard disks, the target storage unit is any storage unit among the plurality of storage units in the target solid-state hard disk, the target solid-state hard disk is any solid-state hard disk among the plurality of solid-state hard disks, and all data read from the target storage unit is stored in the target cache, and all data stored in the target storage unit is deleted, including: Determining the data volume of all data read from the target storage unit; Searching for a cache space matching the data volume from the cache space allocated in the target solid-state hard disk to obtain the target cache, or sending a cache allocation instruction to the target solid-state hard disk to instruct the target solid-state hard disk to allocate cache space in real time according to the data volume to obtain the target cache; Cache all data read from the target storage unit into the target cache; In the case where it is determined that all data read from the target storage unit has been cached in the target cache, all data stored in the target storage unit is deleted by one of the following methods: formatting the target storage unit; setting the data storage attribute of the target storage unit to clear all data stored in the target storage unit.
4. The method according to claim 1, characterized in that Reading N-bit first data from the target cache based on a preset error correction test type, and performing a transformation operation on the N-bit first data to obtain N-bit second data, including: Determine the device type of the target storage device where the target storage unit is located; Obtaining an error correction test request from the error correction test device according to the device type, wherein the error correction test request is used to request an error correction test to be performed on a storage unit in the target storage device; Determining the preset error correction test type from the error correction test request; Determine an error correction threshold corresponding to the preset error correction test type, and read the N-bit first data from the target cache according to the error correction threshold, wherein, when the preset error correction test type belongs to an uncorrectable error type, N is greater than the error correction threshold, and when the preset error correction test type belongs to a correctable error type, N is less than or equal to the error correction threshold; Performing a transformation operation on the N-bit first data in at least one of the following ways to obtain N-bit second data: Determining an error correction threshold corresponding to the preset error correction test type; Determine the bit to be inverted in the N-bit first data according to the error correction threshold; Invert the bit to be inverted to obtain the N bits of the second data; Convert the N-bit first data into data of a preset radix to obtain the N-bit second data, wherein the preset radix includes multiple data formats; Performing a shift operation on the N-bit first data to perform the transformation operation on the N-bit first data to obtain the N-bit second data; Performing a preset logic operation on the bits in the N-bit first data to obtain the N-bit second data, wherein the preset logic operation includes an operation between the bits in the N-bit first data; Performing a modulo operation on the N-bit first data to obtain the N-bit second data; A data normalization operation is performed on the N-bit first data to obtain the N-bit second data.
5. The method according to claim 1, characterized in that Before re-storing the N-bit second data and the M-bit first data into the target storage unit, the method further includes: Recombining the N-bit second data and the M-bit first data to obtain target data; The target data is input into a check code generation program to generate a cyclic redundancy check code for the target data through the check code generation program, wherein the cyclic redundancy check code is used to allow data operations to be performed on the target data when the target storage unit responds to a data operation request.
6. The method according to claim 1, characterized in that Performing an error correction operation on the target storage unit through the target error correction service, obtaining an error correction result includes: Recording the number of data operation exceptions, the amount of abnormal data, and the amount of error correction performed by the target error correction service on the abnormal data when the target error correction service performs an error correction operation on the target storage unit, and obtaining the error correction result; After performing an error correction operation on the target storage unit through the target error correction service and obtaining an error correction result, the method further includes: reading the N-bit first data from the target cache; comparing the error correction result with the N-bit first data to obtain a comparison result; and detecting and repairing the N-bit second data in the target storage unit through other error correction services based on the comparison result.
7. The method according to claim 1, characterized in that Testing the error correction capability of the target error correction service based on the error correction result includes: Acquire, from the error correction result, the number of data operation exceptions, the amount of abnormal data, and the error correction amount performed by the target error correction service on the abnormal data, recorded in the process of performing the error correction operation on the target storage unit by the target error correction service; Based on the number of errors corrected by the target error correction service and the error correction amount, calculating the occurrence rate of the abnormal data when the target error correction service performs the error correction operation on the target storage unit and the success rate of the target error correction service in correcting the abnormal data; Obtaining other occurrence rates and other success rates obtained by the target error correction service performing the error correction operation on other storage units, wherein the other storage units are storage units other than the target storage unit in the plurality of storage devices; Calculate the target occurrence rate and target success rate of the target error correction service by using the occurrence rate and the success rate corresponding to the target storage unit, and the other occurrence rates and other success rates corresponding to the other storage units; The error correction capability of the target error correction service is obtained based on the target occurrence rate and the target success rate analysis.
8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 7 when executed by a processor.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 7 are implemented.
10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 7 are implemented.
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