Adaptive analog equalization device, system and algorithm

Abstract

The present invention relates to the field of communication technology, and provides an adaptive analog equalization device, system and algorithm, the device comprising: a first analog equalization unit, a second analog equalization unit, a filtering unit and a frequency discrimination comparison unit; the first end of the first analog equalization unit is used to receive a signal to be equalized; the second end of the first analog equalization unit is connected to the first end of the second analog equalization unit and is used to output an equalized signal; the second end of the first analog equalization unit is connected to the first end of the frequency discrimination comparison unit; the second end of the second analog equalization unit is connected to the second end of the frequency discrimination comparison unit; the third end of the frequency discrimination comparison unit is connected to the first end of the filtering unit; the second end of the filtering unit is connected to the third end of the first analog equalization unit. The device is used to improve the adaptability of the analog equalizer.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to an adaptive analog equalization device, system and algorithm. Background Art

[0002] In the related art, when the channel attenuation reaches a certain level, it will affect the communication quality. At this time, an equalizer is used in the communication transceiver to compensate for the channel attenuation. The equalizer can be implemented by digital or analog methods. Among them, the analog equalizer is widely used because of its simple implementation, low power consumption and no need for clock.

[0003] However, channel attenuation is affected by many factors, such as cable length in wired communication, material and process of cables and connectors, temperature and humidity. It is necessary to manually adjust the parameters of the equalizer according to the characteristics of the channel, which is cumbersome and inefficient. Therefore, an adaptive analog equalization device, system and algorithm are urgently needed to improve the above problems. Summary of the invention

[0004] The object of the present invention is to provide an adaptive analog equalizer device, system and algorithm, which are used to improve the adaptability of the analog equalizer.

[0005] In a first aspect, the present invention provides an adaptive analog equalization device, comprising: a first analog equalization unit, a second analog equalization unit, a filtering unit and a frequency discrimination comparison unit; the first end of the first analog equalization unit is used to receive a signal to be equalized, and the first analog equalization unit is used to perform a first equalization process on the signal to be equalized to generate a first signal; the second end of the first analog equalization unit is connected to the first end of the second analog equalization unit, and the second analog equalization unit is used to perform a second equalization process on the first signal to generate a second signal; the second end of the first analog equalization unit is connected to the first end of the frequency discrimination comparison unit; the second end of the second analog equalization unit is connected to the second end of the frequency discrimination comparison unit; the frequency discrimination comparison unit is used to receive the first signal and the second signal, perform frequency discrimination processing, and generate a third signal; the third end of the frequency discrimination comparison unit is connected to the first end of the filtering unit, and the filtering unit is used to filter the third signal to generate a control signal; the frequency discrimination comparison unit includes a discriminator, a first comparator and a second comparator; the first analog equalization unit The second end of the unit is connected to the first end of the first comparator; the second end of the second analog equalizing unit is connected to the first end of the second comparator; the first end of the discriminator is connected to the second end of the first comparator; the second end of the discriminator is connected to the second end of the second comparator; the first comparator is used to provide a first comparison signal to the discriminator when the equalized signal generated by the first analog equalizing unit meets the first reference threshold; the second comparator is used to provide a second comparison signal to the discriminator when the signal generated by the second analog equalizing unit meets the second reference threshold; the third end of the discriminator is connected to the first end of the filtering unit; the discriminator is used to generate the third signal based on the first comparison signal and / or the second comparison signal; the second end of the filtering unit is connected to the third end of the first analog equalizing unit, the first analog equalizing unit is used to receive the control signal, and perform a third equalization process based on the control parameters in the control signal and the signal to be equalized to generate an equalized signal; the second end of the first analog equalizing unit is also used to output the equalized signal.

[0006] Optionally, the first analog equalizing unit is set as a first analog equalizer with adjustable parameters; the signal output by the second end of the first analog equalizer is determined by the signal received by the first end of the first analog equalizer and the signal received by the third end of the first analog equalizer; the second end of the filtering unit is used to transmit a control signal to the third end of the first analog equalizer to adjust the operating parameters of the first analog equalizer; when the signal to be equalized is received again, the first analog equalizer generates an updated equalized signal based on the operating parameters.

[0007] Optionally, the first analog equalization unit is configured as a multi-port circuit having a first end for differential input, a second end for differential output, and a third end for inputting a control signal.

[0008] Optionally, the second analog equalization unit is configured as a circuit with at least two ports, having a first port for differential input and a second port for differential output.

[0009] Optionally, the frequency discriminator is configured as a digital frequency discriminator or a phase frequency discriminator; and the comparator is configured as a digital comparator or an operational amplifier.

[0010] Optionally, the filtering unit is configured as a loop filter; the first end of the loop filter is connected to the third end of the frequency discrimination and comparison unit; the second end of the loop filter is connected to the third end of the first analog equalization unit; and the loop filter is implemented by analog or digital means.

[0011] Optionally, when the loop filter is implemented by analogy, the loop filter is composed of pure analog circuits; in this case, the entire analog equalization device operates in the analog domain.

[0012] Optionally, when the loop filter is implemented digitally, the discriminator and the comparator operate in the digital domain, and the discriminator is used to generate a digital signal to be filtered; the loop filter filters the digital signal to be filtered in the digital domain, generates a filtered digital signal and transmits it to the first analog equalization unit.

[0013] In a second aspect, the present invention provides an adaptive analog equalization system, comprising the device described in any one of the first aspects, and also comprising a receiving unit and a transmitting unit; the receiving unit is connected to the first end of the first analog equalization unit, and the receiving unit is used for the receiving unit to obtain the signal to be equalized; the transmitting unit is connected to the second end of the first analog equalization unit, and the transmitting unit is used to transmit the equalized signal.

[0014] Optionally, the transmitting unit includes a switching circuit and a transmitting circuit; the first end of the switching circuit is connected to the second end of the first analog equalizing unit; the second end of the switching circuit is connected to the transmitting circuit; the switching circuit is used to continuously detect the equalized signal to calculate the change; when the change is within a preset range, the switching circuit enters a closed-circuit state to enable the transmitting circuit to enter a working state; when the change of the equalized signal is outside the preset range, the switching circuit enters a closed-circuit state to enable the transmitting circuit to leave the working state.

[0015] In a third aspect, the present invention provides an adaptive analog equalization algorithm, which is applied to the device described in any one of the first aspects, including: controlling the first analog equalization unit to receive the signal to be equalized, performing a first equalization process on the signal to be equalized, and generating a first signal; controlling the second analog equalization unit to receive the first signal, performing a second equalization process on the first signal, and generating a second signal; controlling the discrimination comparison unit to receive the first signal and the second signal, performing discrimination process, and generating a third signal; controlling the filtering unit to receive the third signal, performing filtering process on the third signal, generating a control signal, and sending the control signal to the first analog equalization unit; the control signal includes a control parameter for adjusting the first analog equalization unit; controlling the first analog equalization unit to receive the control signal, performing a third equalization process based on the control parameter in the control signal and the signal to be equalized, and generating an equalized signal.

[0016] The beneficial effect of the present invention is that by comparing the output signals of the first analog equalization unit and the second analog equalization unit and dynamically adjusting the parameters according to the information, the device can automatically adapt to the channel change and achieve the best equalization effect. This adaptive mechanism enables the circuit to maintain stable performance under different working conditions, without manual operation and with higher efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the structure of an adaptive analog equalizer provided by the present invention;

[0018] Figure 2 A schematic structural diagram of a first analog equalization unit provided by the present invention;

[0019] Figure 3 A schematic diagram of the structure of a second analog equalization unit provided by the present invention;

[0020] Figure 4 A schematic diagram of a frequency response curve of a second analog equalizing unit provided by the present invention;

[0021] Figure 5 The eye diagram of the first signal to be equalized provided by the present invention;

[0022] Figure 6 The eye diagram of the second signal to be equalized provided by the present invention;

[0023] Figure 7 The eye diagram of the third signal to be equalized provided by the present invention;

[0024] Figure 8 The eye diagram of the first equalized signal provided by the present invention;

[0025] Fig. 9 The eye diagram of the second equalized signal provided by the present invention;

[0026] Fig.10 The eye diagram of the third equalized signal provided by the present invention;

[0027] Fig.11 A schematic diagram of the structure of an adaptive analog equalization system provided by the present invention;

[0028] Fig.12 A schematic diagram of a flow chart of an adaptive analog equalization algorithm provided by the present invention.

[0029] Description of reference numerals in the figures:

[0030] 10. Adaptive analog equalization device; 1. First analog equalization unit; 2. Second analog equalization unit; 3. Filter unit; 4. Frequency discrimination comparison unit; 401. First comparator; 402. Second comparator;

[0031] 20. Adaptive analog equalization system; 21. Receiving unit; 22. Transmitting unit; 221. Switching circuit; 222. Transmitting circuit. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0033] In view of the problems existing in the existing technology, such as Figure 1As shown, the first embodiment provides an adaptive analog equalization device 10, including: a first analog equalization unit 1, a second analog equalization unit 2, a filtering unit 3 and a discrimination comparison unit 4; the first end of the first analog equalization unit 1 is used to receive a signal to be equalized, and the first analog equalization unit 1 is used to perform a first equalization process on the signal to be equalized to generate a first signal; the second end of the first analog equalization unit 1 is connected to the first end of the second analog equalization unit 2, and the second analog equalization unit 2 is used to perform a second equalization process on the first signal to generate a second signal; the second end of the first analog equalization unit 1 is connected to the first end of the discrimination comparison unit 4; the second end of the second analog equalization unit 2 is connected to the second end of the discrimination comparison unit 4; the discrimination comparison unit 4 is used to receive the signal to be equalized. The first signal and the second signal are subjected to frequency discrimination processing to generate a third signal; the third end of the frequency discrimination comparison unit 4 is connected to the first end of the filtering unit 3, and the filtering unit 3 is used to filter the third signal to generate a control signal; the frequency discrimination comparison unit 4 is used to receive the first signal and the second signal, perform frequency discrimination processing, and generate a third signal; the second end of the filtering unit 3 is connected to the third end of the first analog equalizing unit 1, and the filtering unit 3 is used to filter the third signal to generate a control signal; the first analog equalizing unit 1 is used to receive the control signal, and perform a third equalization processing based on the control parameters in the control signal and the signal to be equalized to generate an equalized signal; the second end of the first analog equalizing unit 1 is also used to output the equalized signal.

[0034] This embodiment compares the output signals of the first analog equalization unit 1 and the second analog equalization unit 2, and dynamically adjusts the parameters according to the information, so that the device can automatically adapt to channel changes and achieve the best equalization effect. This adaptive mechanism enables the circuit to maintain stable performance under different working conditions, without manual operation and with higher efficiency.

[0035] In some embodiments, the first analog equalizing unit 1 is set as a first analog equalizer with adjustable parameters; the signal output by the second end of the first analog equalizer is determined by the signal received by the first end of the first analog equalizer and the signal received by the third end of the first analog equalizer; the second end of the filtering unit 3 is used to transmit a control signal to the third end of the first analog equalizer to adjust the working parameters of the first analog equalizer; when the signal to be equalized is received again, the first analog equalizer generates an updated equalized signal based on the working parameters.

[0036] In some specific embodiments, the first analog equalization unit 1 is configured as a multi-port circuit having a first terminal for differential input, a second terminal for differential output, and a third terminal for inputting a control signal.

[0037] like Figure 2 As shown, in some examples, the first analog equalization unit 1 includes an adjustable resistor R S , adjustable capacitor C S , a first amplifier circuit and a second amplifier circuit; the first amplifier circuit includes a first resistor R1, a first transistor T1, a first current source I1 and a first capacitor C1; the emitter of the first transistor T1 is connected to the first end of the first current source I1, and the second end of the first current source I1 is grounded; the collector of the first transistor T1 is connected to the first end of the first resistor R1 and the first end of the first capacitor C1, and the second end of the first capacitor C1 is grounded; the second amplifier circuit includes a second resistor R2, a second transistor T2, a second current source I2 and a second capacitor C2. The emitter of the second transistor T2 is connected to the first end of the second current source I2, and the second end of the second current source I2 is grounded; the collector of the second transistor T2 is connected to the first end of the second resistor R2 and the first end of the second capacitor C2, and the second end of the second capacitor C2 is grounded. The adjustable resistor R S Adjustable capacitor C S Connected in parallel between the first transistor T1 and the second transistor T2. The second end of the first resistor R1 and the second end of the second resistor R2 are commonly connected to the first end of the first analog equalization unit 1; the first end of the first capacitor C1 and the first end of the second capacitor C2 are commonly connected to the second end of the first analog equalization unit 1; the base of the first transistor T1 and the base of the second transistor T2 are commonly connected to the third end of the first analog equalization unit 1.

[0038] It is worth noting that in this embodiment, by using an adjustable resistor R S and adjustable capacitor C S , the parameters of the circuit can be flexibly adjusted according to the actual situation to achieve better signal equalization effect. This means that when facing different types of signals or channel conditions, performance can be optimized by simply changing the values ​​of these components.

[0039] In some embodiments, the second analog equalization unit 2 is configured as a circuit with at least two ports, having a first port for differential input and a second port for differential output. In some specific embodiments, the second analog equalization unit 2 is configured as a passive low-pass filter or an active low-pass filter.

[0040] It is worth noting that through differential input and output, noise and interference can be effectively reduced, and the quality and stability of the signal can be improved. Passive low-pass filters and active low-pass filters can play their advantages in different application scenarios to ensure the purity of the signal. The simple reliability and low power consumption characteristics of passive filters are suitable for occasions with high reliability requirements. The high gain and adjustability of active filters can adapt to more complex signal processing requirements and improve the overall performance of the system.

[0041] like Figure 3 As shown, in some examples, the passive low-pass filter includes a third resistor R3, a third capacitor C3, a fourth resistor R4, a fourth capacitor C4 and a common node. The first end of the third resistor R3, the first end of the third capacitor C3, the first end of the fourth resistor R4 and the first end of the fourth capacitor C4 are all connected to the common node; the second end of the third resistor R3 and the second end of the third capacitor C3 are both connected to the first end of the second analog equalization unit 2; the fourth resistor R4 and the fourth capacitor C4 are both grounded. The common node is connected to the second end of the second analog equalization unit 2.

[0042] It is worth noting that the passive low-pass filter of this embodiment can effectively attenuate the high-frequency components in the input signal to a very low level, while allowing the low-frequency components to pass. As a result, only signals below the cut-off frequency will be passed to the downstream circuit, while signals above the cut-off frequency will be greatly weakened. Some nonlinear circuits are prone to harmonic distortion when processing high-frequency signals. The low-pass filter can reduce these harmonic components, thereby improving the purity of the signal.

[0043] In some specific embodiments, the frequency response curve of the passive low-pass filter is as follows: Figure 4 As shown, the horizontal axis is the angular frequency and the vertical axis is the gain amplitude. Since the passive low-pass filter is composed of two RC networks connected in series, each RC network has its own cut-off frequency. Therefore, the entire filter will have two turning points, corresponding to the first turning angular frequency A and the second turning angular frequency B. The first turning angular frequency A satisfies:

[0044]

[0045] Among them, R3||R4 represents the equivalent resistance of the third resistor R3 and the fourth resistor R4 in parallel; C3||C4 represents the equivalent capacitance of the third capacitor C3 and the fourth capacitor C4 in parallel; at the first turning angle frequency A, the gain of the passive low-pass filter begins to decrease because the impedance of the capacitor decreases with increasing frequency, resulting in more signals being shunted away.

[0046] The second corner frequency B of the passive low-pass filter satisfies:

[0047]

[0048] This is the result of the first RC network acting alone. Above the second corner frequency B, the filter gain no longer decreases.

[0049] In some embodiments, the discrimination and comparison unit 4 includes a discriminator, a first comparator 401 and a second comparator 402; the second end of the first analog equalizing unit 1 is connected to the first end of the first comparator 401; the second end of the second analog equalizing unit 2 is connected to the first end of the second comparator 402; the first end of the discriminator is connected to the second end of the first comparator 401; the second end of the discriminator is connected to the second end of the second comparator 402; the first comparator 401 is used to provide a first comparison signal to the discriminator when the equalized signal generated by the first analog equalizing unit 1 meets the first reference threshold; the second comparator 402 is used to provide a second comparison signal to the discriminator when the signal generated by the second analog equalizing unit 2 meets the second reference threshold; the third end of the discriminator is connected to the first end of the filtering unit 3; the discriminator is used to generate the third signal based on the first comparison signal and / or the second comparison signal.

[0050] It is worth noting that the first comparator 401 and the second comparator 402 receive the equalized signals from the first analog equalization unit 1 and the second analog equalization unit 2, respectively, and compare them with their respective reference thresholds. If the signal meets the corresponding threshold condition, the comparator will trigger and send the corresponding comparison signal to the discriminator. After receiving the comparison signals provided by the first comparator 401 and the second comparator 402, the discriminator will further process and analyze these signals. The tasks it may perform include but are not limited to identifying the frequency characteristics of the signal, determining the validity of the signal, or judging whether the signal meets the predetermined standards. By performing multi-level processing and screening on the signal, it is ensured that the final output signal not only meets the preset technical specifications, but also can restore the content of the original information to the maximum extent.

[0051] In some specific embodiments, the first comparison signal and the second comparison signal are both set as voltage signals, and the first reference threshold and the second reference threshold are both voltage values. Since the voltage signal is more stable in high-precision measurement, it is suitable for use in signal processing systems that require high precision. Since the voltage signal performs well in a low-noise environment, it is suitable for use in noise-sensitive applications. Since the voltage signal is easy to process through a standard operational amplifier and comparator, the circuit design is simplified.

[0052] In some other specific embodiments, the first comparison signal and the second comparison signal are both set as current signals, and the first reference threshold and the second reference threshold are both current values. The current signal has a small attenuation during long-distance transmission and is suitable for applications requiring long-distance transmission. The current signal is less sensitive to electromagnetic interference and is suitable for applications with complex electromagnetic environments.

[0053] In some embodiments, the discriminator is configured as a digital discriminator or a phase discriminator; the comparator is configured as a digital comparator or an operational amplifier. It is worth noting that the digital discriminator includes a counter. The phase discriminator includes an edge-sensitive charge-discharge circuit. The edge-sensitive charge-discharge circuit means that the charge-discharge process in the circuit depends on the edge of the input signal. This circuit design enables the phase discriminator to accurately detect the phase change of the input signal.

[0054] In some embodiments, the filtering unit 3 is configured as a loop filter; the first end of the loop filter is connected to the third end of the frequency discrimination comparison unit 4; the second end of the loop filter is connected to the third end of the first analog equalization unit 1; the loop filter is implemented by analog or digital means.

[0055] In some specific embodiments, when the loop filter is implemented by analogy, the loop filter is composed of pure analog circuits; in this case, the analog equalization device as a whole operates in the analog domain.

[0056] It is worth noting that, since the scheme of this embodiment works completely in the analog domain, it is not necessary to analyze or rely on the specific spectrum characteristics of the signal. This means that even if the transmitted signal is not an ideal random signal, the system can work normally. It directly processes the signal waveform, not its spectrum components, and therefore will not fail due to changes in the signal spectrum. The whole process does not require digital sampling of the signal, and there is no synchronization problem between the sampling clock and the signal clock. This avoids the problems that may be encountered based on statistical distribution algorithms, that is, the misestimation that may be caused when there is a certain regular relationship between the sampling clock and the signal clock. Since the scheme does not involve statistical calculations of the number of signal transitions, it is not affected by the signal sequence. Both high and low transition density signal sequences can be effectively processed. Therefore, it does not require an additional time reference to measure the signal rate, thereby simplifying the design and improving the robustness of the system. In short, this embodiment takes advantage of analog signal processing, avoids some restrictions of traditional digital processing schemes, and provides a more flexible and robust solution to improve signal transmission quality.

[0057] In some other specific embodiments, when the loop filter is implemented digitally, the discriminator and the comparator operate in the digital domain, and the discriminator is used to generate a digital signal to be filtered; the loop filter filters the digital signal to be filtered in the digital domain, generates a filtered digital signal and transmits it to the first analog equalization unit 1.

[0058] In some embodiments, the input eye diagram under different channel loss conditions is as follows: Figure 5 Figure 6 and Figure 7 As shown, the eye opening gradually decreases and the envelope gradually blurs, which indicates that the quality of the input signal is deteriorating as the channel attenuation increases.

[0059] The eye diagram of the output signal processed by the adaptive equalizer of this embodiment is as follows Figure 8 Fig. 9 and Fig.10 The eye openings of these output signals do not change significantly, even when the input signal is significantly attenuated, which shows that the adaptive equalizer can effectively compensate for the attenuation and noise caused by the channel and maintain good signal integrity.

[0060] like Fig.11 As shown, the second embodiment provides an adaptive analog equalization system 20, including the device described in any one of the above embodiments, and also including a receiving unit 21 and a transmitting unit 22; the receiving unit 21 is connected to the first end of the first analog equalization unit 1, and the receiving unit 21 is used for the receiving unit 21 to obtain the signal to be equalized; the transmitting unit 22 is connected to the second end of the first analog equalization unit 1, and the transmitting unit 22 is used to transmit the equalized signal.

[0061] In some specific embodiments, the transmitting unit 22 includes a switching circuit 221 and a transmitting circuit 222; the first end of the switching circuit 221 is connected to the second end of the first analog equalizing unit 1; the second end of the switching circuit 221 is connected to the transmitting circuit 222; the switching circuit 221 is used to continuously detect the equalized signal to calculate the change; when the change is within a preset range, the switching circuit 221 enters a closing state to enable the transmitting circuit 222 to enter a working state; when the change of the equalized signal is outside the preset range, the switching circuit 221 enters a closed state to enable the transmitting circuit 222 to leave the working state.

[0062] It is worth noting that the system can dynamically adjust the working state of the transmitting circuit 222 according to the change amount of the equalized signal, ensure transmission under the condition of good signal quality, and improve the adaptive ability of the system. When the quality of the equalized signal is poor, the system can automatically stop transmitting to avoid erroneous signal transmission and improve the reliability of the system. By controlling the working state of the transmitting circuit 222, unnecessary signal transmission can be reduced and interference with the surrounding environment can be reduced. When the signal quality is poor, the system automatically stops transmitting, reducing unnecessary energy consumption and improving the energy efficiency of the system. The switch circuit 221 continuously detects the change amount of the equalized signal to ensure that the system is always in the best working state and improve the stability of the system.

[0063] In some embodiments, the system is configured as a communication transceiver for wired or wireless communication.

[0064] like Fig.12 and Figure 1 As shown, the third embodiment provides an adaptive analog equalization algorithm, which is applied to the device described in any one of the above embodiments, including: controlling the first analog equalization unit 1 to receive the signal to be equalized, performing a first equalization process on the signal to be equalized, and generating a first signal; controlling the second analog equalization unit 2 to receive the first signal, performing a second equalization process on the first signal, and generating a second signal; controlling the discrimination comparison unit 4 to receive the first signal and the second signal, performing discrimination process, and generating a third signal; controlling the filtering unit 3 to receive the third signal, performing a filtering process on the third signal, generating a control signal, and sending the control signal to the first analog equalization unit 1; the control signal includes a control parameter for adjusting the first analog equalization unit; controlling the first analog equalization unit 1 to receive the control signal, performing a third equalization process based on the control parameter in the control signal and the signal to be equalized, and generating an equalized signal.

[0065] In some specific embodiments, the first analog equalization unit 1 is controlled to receive the signal to be equalized and generate the first signal. This is the starting point of the entire processing flow, and the signal to be equalized is processed for the first time at this stage. The second analog equalization unit 2 is controlled to receive the first signal and generate the second signal. This step is to perform secondary processing on the result of the first processing to further optimize the signal quality. The frequency discrimination comparison unit 4 is controlled to receive the first signal and the second signal and generate a third signal. The frequency discrimination comparison unit 4 is used to compare the signals processed at two different stages and generate a new signal as the basis for the next operation. The filter unit 3 is controlled to receive the third signal and generate a control signal. The filter unit 3 plays a key filtering role here. It extracts effective control information from the third signal to form a control signal. Finally, the first analog equalization unit 1 is controlled to receive the control signal and generate an equalized signal based on the signal and the signal to be equalized. This is a closed-loop process, which gradually approaches the ideal signal quality through continuous iteration and adjustment.

[0066] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. An adaptive analog equalizer, characterized in that: include: A first analog equalizing unit, a second analog equalizing unit, a filtering unit and a frequency discrimination and comparison unit; The first end of the first analog equalization unit is used to receive a signal to be equalized, and the first analog equalization unit is used to perform a first equalization process on the signal to be equalized to generate a first signal; the second end of the first analog equalization unit is connected to the first end of the second analog equalization unit, and the second analog equalization unit is used to perform a second equalization process on the first signal to generate a second signal; The second end of the first analog equalization unit is connected to the first end of the discrimination comparison unit; the second end of the second analog equalization unit is connected to the second end of the discrimination comparison unit; the discrimination comparison unit is used to receive the first signal and the second signal, perform discrimination processing, and generate a third signal; The third end of the frequency discrimination and comparison unit is connected to the first end of the filtering unit, and the filtering unit is used to filter the third signal to generate a control signal; the frequency discrimination and comparison unit includes a discriminator, a first comparator and a second comparator; the second end of the first analog equalization unit is connected to the first end of the first comparator; the second end of the second analog equalization unit is connected to the first end of the second comparator; the first end of the discriminator is connected to the second end of the first comparator; the second end of the discriminator is connected to the second end of the second comparator; the first comparator is used to provide a first comparison signal to the discriminator when the equalized signal generated by the first analog equalization unit meets the first reference threshold; the second comparator is used to provide a second comparison signal to the discriminator when the signal generated by the second analog equalization unit meets the second reference threshold; the third end of the discriminator is connected to the first end of the filtering unit; The frequency discriminator is used to generate the third signal based on the first comparison signal and / or the second comparison signal; The second end of the filtering unit is connected to the third end of the first analog equalizing unit. The first analog equalizing unit is used to receive the control signal, perform a third equalization process based on the control parameters in the control signal and the signal to be equalized, and generate an equalized signal. The second end of the first analog equalizing unit is also used to output the equalized signal.

2. The device according to claim 1, characterized in that The first analog equalization unit is configured as a first analog equalizer with adjustable parameters; The signal outputted by the second terminal of the first analog equalizer is determined by the signal received by the first terminal of the first analog equalizer and the signal received by the third terminal of the first analog equalizer; The second end of the filtering unit is used to transmit a control signal to the third end of the first analog equalizer to adjust the working parameters of the first analog equalizer; when the signal to be equalized is received again, the first analog equalizer generates an updated equalized signal based on the working parameters.

3. The device according to claim 2, characterized in that The first analog equalization unit is configured as a multi-port circuit having a first terminal for differential input, a second terminal for differential output, and a third terminal for inputting a control signal.

4. The device according to claim 1 or 3, characterized in that: The second analog equalization unit is configured as a circuit with at least two ports, having a first port for differential input and a second port for differential output.

5. The device according to claim 1, characterized in that The frequency discriminator is configured as a digital frequency discriminator or a phase frequency discriminator; The comparator is configured as a digital comparator or an operational amplifier.

6. The device according to claim 1, characterized in that The filtering unit is configured as a loop filter; The first end of the loop filter is connected to the third end of the frequency discrimination comparison unit; the second end of the loop filter is connected to the third end of the first analog equalization unit; The loop filter is implemented by analogy or digitally.

7. The device according to claim 6, characterized in that When the loop filter is implemented by analogy, the loop filter is composed of pure analog circuits; at this time, the analog equalization device as a whole operates in the analog domain.

8. The device according to claim 6, characterized in that When the loop filter is implemented digitally, the discriminator and the comparator operate in the digital domain, and the discriminator is used to generate a digital signal to be filtered; the loop filter performs filtering processing on the digital signal to be filtered in the digital domain, generates a filtered digital signal and transmits it to the first analog equalization unit.

9. An adaptive analog equalization system, characterized in that: The device according to any one of claims 1 to 8, further comprising a receiving unit and a transmitting unit; The receiving unit is connected to the first end of the first analog equalization unit, and the receiving unit is used to obtain the signal to be equalized; The transmitting unit is connected to the second end of the first analog equalizing unit, and the transmitting unit is used to transmit the equalized signal.

10. The system according to claim 9, characterized in that The transmitting unit includes a switching circuit and a transmitting circuit; The first end of the switch circuit is connected to the second end of the first analog equalization unit; the second end of the switch circuit is connected to the transmitting circuit; The switch circuit is used to continuously detect the equalized signal to calculate the variation; when the variation is within a preset range, the switch circuit enters a closing state to enable the transmitting circuit to enter a working state; When the variation of the equalized signal is outside a preset range, the switch circuit enters a closed circuit state to make the transmitting circuit out of the working state.

11. An adaptive analog equalization algorithm, applied to the device according to any one of claims 1 to 8, characterized in that: include: Controlling the first analog equalization unit to receive a signal to be equalized, performing a first equalization process on the signal to be equalized, and generating a first signal; Controlling the second analog equalizing unit to receive the first signal, and performing a second equalization process on the first signal to generate a second signal; Control the frequency discrimination comparison unit to receive the first signal and the second signal, perform frequency discrimination processing, and generate a third signal; Controlling the filtering unit to receive the third signal, filter the third signal, generate a control signal, and send the control signal to the first analog equalizing unit; the control signal includes a control parameter for adjusting the first analog equalizing unit; The first analog equalization unit is controlled to receive the control signal, and a third equalization process is performed based on the control parameter in the control signal and the signal to be equalized to generate an equalized signal.

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