Image data processing method, processing chip and image forming apparatus
By using differential data processing methods, the image data output from the scanning simulation front end is sorted and detected, which solves the problems of low data transmission efficiency and insufficient anti-interference capability of image forming equipment, and achieves efficient image data processing and compatibility.
Patent Information
- Application Number
- CN202411389124.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2044-09-30
AI Technical Summary
Existing image forming equipment has low efficiency in image data processing and transmission, and insufficient anti-interference capability, especially when using TTL mode.
The differential data processing method is adopted. By acquiring the differential data output from the scanning simulation front end, the data is sorted and detected according to the preset configuration information, including the detection of validity and color information, and the processed image data is output.
It improves the efficiency of image data transmission and processing, and enhances the compatibility with different types of scanning simulation front ends and the reliability of data processing.
Smart Images

Figure CN119299574B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of data processing, in particular to an image data processing method, a processing chip and an image forming device. BACKGROUND
[0002] Most of the image forming devices in the prior art still use TTL (Transistor-Transistor Logic) to transmit image data, which has low transmission efficiency and low anti-interference ability. Therefore, the processing chip of the image forming device in the prior art still has problems in data processing and transmission. SUMMARY
[0003] Therefore, the present application provides an image data processing method, a processing chip and an image forming device, which can improve the data processing efficiency.
[0004] In a first aspect, an embodiment of the present application provides an image data processing method, which is applied to a processing chip, and includes:
[0005] obtaining differential data output by a scanning analog front end;
[0006] sorting parameters in the differential data according to preset configuration information to obtain to-be-detected image data after sorting;
[0007] detecting the to-be-detected image data for validity and color information, and outputting processed image data.
[0008] In some embodiments, the configuration information is set according to a type of the scanning analog front end.
[0009] In some embodiments, the configuration information includes:
[0010] a number of the differential data;
[0011] a number of pixel data in the differential data and a position of the pixel data;
[0012] a number of control information in the differential data and a position of the control information.
[0013] In some embodiments, the sorting parameters in the differential data according to preset configuration information to obtain to-be-detected image data after sorting includes:
[0014] performing serial-parallel conversion on the differential data to obtain parallel output data;
[0015] sorting parameters in the parallel output data in corresponding positions according to the configuration information to obtain the to-be-detected image data.
[0016] In some embodiments, the control information includes to-be-tested header information, to-be-tested validity information, and to-be-tested color information; the configuration information further includes configuration header information, configuration validity information, and configuration color information.
[0017] The detection of the validity and color information of the to-be-tested image data and the output of the processed image data include:
[0018] Detecting whether the to-be-tested header information of the to-be-tested image data matches the configuration header information in the configuration information;
[0019] Detecting whether the to-be-tested validity information of the to-be-tested image data matches the configuration validity information in the configuration information;
[0020] If yes, determining that the to-be-tested image data is valid data;
[0021] According to the configuration color information in the configuration information, performing color detection on the to-be-tested color information in the valid data, and outputting processed image data after the detection is completed.
[0022] In some embodiments, the method further includes: if any of the above detections is no, the to-be-tested image data is invalid data and is discarded.
[0023] In a second aspect, an embodiment of the present application provides a processing chip, including:
[0024] A differential data interface is configured to acquire differential data output by a scanning analog front end;
[0025] A data processor is configured to sort parameters in the differential data according to preset configuration information to obtain to-be-tested image data after sorting is completed, and detect validity and color information of the to-be-tested image data and output processed image data.
[0026] In some embodiments, the configuration information is set according to a type of the scanning analog front end.
[0027] In some embodiments, the configuration information includes:
[0028] A number of logs of the differential data;
[0029] A number of bits of pixel data in the differential data and a position of the pixel data;
[0030] A number of bits of control information in the differential data and a position of the control information.
[0031] In some embodiments, the data processor includes:
[0032] a serial-parallel conversion module, configured to perform serial-parallel conversion on the differential data to obtain parallel output data;
[0033] a data sorting module, configured to sort parameters in the parallel output data in corresponding positions according to the configuration information to obtain the to-be-detected image data.
[0034] In some embodiments, the data processor further comprises:
[0035] a phase-locked loop module, configured to output a frequency multiplication clock signal to enable the serial-parallel conversion module to perform serial-parallel conversion on the differential data, and output a delay-locked loop identification signal and a received data processing clock signal to enable the data sorting module to perform parameter sorting to obtain the to-be-detected image data after detecting that the differential clock signal output by the scanning analog front end is stable.
[0036] In some embodiments, the control information comprises to-be-detected header information, to-be-detected validity information, and to-be-detected color information; and the configuration information further comprises configuration header information, configuration validity information, and configuration color information.
[0037] The data processor comprises:
[0038] a header detection module, configured to detect whether the to-be-detected header information of the to-be-detected image data matches the configuration header information in the configuration information.
[0039] a pixel processing module, configured to detect whether the to-be-detected validity information of the to-be-detected image data matches the configuration validity information in the configuration information, and when the to-be-detected header information matches the configuration header information and the to-be-detected validity information matches the configuration validity information, determine that the to-be-detected image data is valid data, and perform color detection on to-be-detected color information in the valid data according to the configuration color information in the configuration information, and output processed image data after the color detection is completed.
[0040] In a third aspect, an embodiment of the present application provides an image forming device, comprising: at least one processing chip; and at least one memory in communication connection with the processing chip, wherein: the memory stores program instructions executable by the processing chip, and the processing chip invokes the program instructions to execute the method according to the first aspect or any one of the first aspect.
[0041] The image data processing method, processing chip, and image forming device provided by the present application have at least the following technical effects:
[0042] Based on the obtained differential data of the scanning analog front-end output, the differential data is sorted according to preset configuration information to obtain image data to be detected, and the processed image data is output after detection is completed. The embodiments of the present application are applicable to processing chips, and can process differential data output by a scanning analog front-end through preset configuration information, improve compatibility of a plurality of different types of scanning analog front-ends, and improve data processing efficiency and reliability. BRIEF DESCRIPTION OF DRAWINGS
[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0044] Figure 1 A flowchart of an image data processing method provided by the embodiments of the present application;
[0045] Figure 2 A flowchart of another image data processing method provided by the embodiments of the present application;
[0046] Figure 3 A specific flowchart of an image data processing method provided by the embodiments of the present application;
[0047] Figure 4 A signal schematic diagram of an image data processing provided by the embodiments of the present application;
[0048] Figure 5 A format schematic diagram of an image data frame provided by the embodiments of the present application;
[0049] Figure 6 A format schematic diagram of an invalid data frame provided by the embodiments of the present application;
[0050] Figure 7 A format schematic diagram of a start data frame provided by the embodiments of the present application;
[0051] Figure 8 A format schematic diagram of a valid format frame provided by the embodiments of the present application;
[0052] Figure 9 A format schematic diagram of a valid format frame provided by the embodiments of the present application;
[0053] Figure 10 A format schematic diagram of a valid format frame provided by the embodiments of the present application;
[0054] Figure 11A structural schematic diagram of an image forming device provided by an embodiment of the present application is shown in FIG. 1.
[0055] Figure 12 A structural schematic diagram of an image forming device provided by an embodiment of the present application is shown in FIG. 1. DETAILED DESCRIPTION
[0056] In order to better understand the technical solutions of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0057] It should be clear that the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.
[0058] The terms used in the embodiments of the present application are only for the purpose of describing the specific embodiments, and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.
[0059] It should be understood that the term "and / or" used herein is only to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in this paper generally represents that the front and rear associated objects are in an "or" relationship.
[0060] The image forming device is a device for forming an image on an imaging medium based on an imaging principle, including but not limited to a printer, a copier, a fax machine, a scanner, a multifunction device, an electrostatic printing device and other devices that can realize the image forming function.
[0061] The image forming device mostly contains a scanning component, such as a scanning analog front end of a CCD or CMOS image sensor. When the image forming device performs a copying or scanning job, the scanning component performs image acquisition on the job and outputs image data. At present, the image data output by the scanning component of the image forming device is mainly transmitted in a TTL mode, which affects the transmission efficiency. If the scanning component of the image forming device is changed to output image data in an LVDS (Low Voltage Differential Signaling) mode, how to process the image data becomes a problem to be solved. In order to solve the problem, the embodiments of the present application provide an image data processing method, which can improve the transmission efficiency of image data and can provide support for subsequent image forming jobs.
[0062] Referring toFigure 1 A flow chart of an image data processing method provided by an embodiment of the present application. Figure 1 The method is applied to a processing chip, and the processing steps of the method include:
[0063] 101, obtaining differential data output by a scanning analog front end.
[0064] 102, sorting parameters in the differential data according to preset configuration information to obtain image data to be detected after sorting.
[0065] 103, detecting the image data to be detected for validity and color information.
[0066] 104, outputting processed image data.
[0067] The differential data is image data in LVDS format.
[0068] The configuration information is set according to the type of the scanning analog front end. The corresponding configuration information is set according to different types of scanning analog front ends, and then the differential data is adaptively identified and processed when the differential data is received, so as to meet the multiple requirements of subsequent image processing on the data. Furthermore, it can be adapted to the differential data output by different types of scanning analog front ends to help compatible with the acquisition and processing of multiple differential data. The configuration is flexible and easy to implement, thereby improving the efficiency of image data transmission and processing and improving the system performance.
[0069] The configuration information can include the number of bits of the differential data. In addition, the image data to be detected includes pixel data and control information. The configuration information can be configured in advance to include the number of bits and the position of the pixel data to be included in the image data to be detected, and the number of bits and the position of the control information. It can be understood that the number of bits of the pixel data refers to the number of bit positions occupied by the pixel data in a frame of the image data to be detected, which is equivalent to the number of bits of the pixel data in the differential data output by the scan analog front end. The position of the pixel data can be the position of the bit positions occupied by the pixel data in the differential data, the position in the image to be detected, or the position in the data after intermediate conversion (such as serial-parallel conversion) of the differential data. The number of bits of the control information refers to the number of bit positions occupied by the control information in a frame of the image data to be detected, which is equivalent to the number of bits of the control information in the differential data output by the scan analog front end. The position of the control information can be the position of the bit positions occupied by the control information in the differential data, the position in the image to be detected, or the position in the data after intermediate conversion (such as serial-parallel conversion) of the differential data. Further, the bit positions occupied by the control information can be used to represent the line head information, validity information, and color information. Among them, the line head information can be used to determine whether the image data to be detected of each frame is data of the same line, the validity information is used to determine whether the image data to be detected is valid data, and the color information is used to represent the color of the image data to be detected.
[0070] In step 102, the parameters in the differential data can be sorted in the corresponding positions according to the configuration information to obtain the image data to be detected matching the configuration information. After obtaining the image data to be detected, the validity of the image data to be detected and the color information in the image data to be detected can be detected according to the configuration information, and the processed image data is output.
[0071] The embodiment of the present application is based on the differential data output by the image sensor, sorts the differential data according to the preset configuration information to obtain the image data to be detected, and outputs the processed image data after detection. The embodiment of the present application is suitable for image forming equipment, can process the differential data output by the image sensor through the preset configuration information, and can improve the compatibility of the scan analog front end of various types, and the data processing efficiency and reliability.
[0072] Referring to Figure 2 The flowchart of another image data processing method provided by the embodiment of the present application is shown in FIG. 2. As shown in FIG. 2, the processing steps of the method include: Figure 2
[0073] 201, obtaining the differential data output by the scan analog front end.
[0074] 202, performing serial-parallel conversion on the differential data to obtain parallel output data.
[0075] 203, sorting the parameters in the parallel output data into corresponding positions according to preset configuration information to obtain the to-be-detected image data.
[0076] The control information of the to-be-detected image data includes to-be-detected header information, to-be-detected validity information and to-be-detected color information. The preset configuration information includes configuration header information, configuration validity information and configuration color information.
[0077] 204, detecting whether the to-be-detected header information of the to-be-detected image data matches the configuration header information in the configuration information. If yes, step 205 is performed; if not, the to-be-detected image data is invalid pixel data and is discarded.
[0078] 205, detecting whether the to-be-detected validity information of the to-be-detected image data matches the configuration validity information in the configuration information. If yes, the to-be-detected image data is valid data and step 206 is performed. If not, the to-be-detected image data is invalid data and is discarded.
[0079] 206, detecting the to-be-detected color information of the to-be-detected image data according to the configuration color information to obtain processed image data.
[0080] 207, sending the processed image data to an AXI (Advanced eXtensible Interface) bus in a burst mode.
[0081] The preset configuration information includes: the number of differential data, the number of bits of pixel data and the position of the pixel data in the parallel output data, the number of bits of control information and the position of the control information in the parallel output data. Specifically, the control information can include header information, validity information and color information. The header information can include a horizontal synchronization signal and a same-line indication signal, and the positions of the horizontal synchronization signal and the same-line indication signal in the parallel output information. The validity information can include a validity flag and the position of the validity flag in the parallel output information. The color information can include a color flag and the position of the color flag in the parallel output information.
[0082] In step 203, the parameters in the parallel output data can be sorted into corresponding positions according to the configuration information to obtain the to-be-detected image data.
[0083] In steps 204-206, validity and color information of the image data to be detected can be detected according to the configuration information. The line head information in the image data to be detected can be used to detect whether the image data to be detected in the current frame is the start of a new line of pixel data, or can be used to detect whether the current frame is the same line of pixel data as the previous frame. The validity information in the image data to be detected can be used to determine whether the image data to be detected in the current frame is valid. The color information in the image data to be detected can be used to determine the color represented by the image data to be detected in the current frame. After the color of the image data to be detected is determined, the image data to be detected is output as processed image data to the AXI bus and finally written into the system memory.
[0084] Referring to Figure 3 , a specific flowchart of an image data processing method provided by an embodiment of the present application is shown. As Figure 3 shown, the image data processing process of the embodiment of the present application includes:
[0085] 301, a differential clock signal is output by a scan analog front end.
[0086] As Figure 4 shown, the scan analog front end continuously outputs a differential clock signal CLK_P / CLK_N at a certain frequency. After the phase-locked loop module detects the differential clock signal at a stable frequency, a DLL_LOCK signal (i.e., a delay-locked loop identification signal) is output, and the DLL_LOCK signal is used to indicate that the output clock of the scan analog front end has stabilized. As Figure 4 shown, the DLL_LOCK signal remains high to indicate that the output clock of the scan analog front end has stabilized.
[0087] 302, three pairs of differential data are output by the scan analog front end.
[0088] As Figure 4 shown, under the differential clock signal, the scan analog front end outputs three pairs of differential data, namely DATA_P / DATA_N[0], DATA_P / DATA_N[1] and DATA_P / DATA_N[2]. As Figure 4 shown, DATA_P / DATA_N[0], DATA_P / DATA_N[1] and DATA_P / DATA_N[2] are transmitted bit by bit, and 7 bits of data are transmitted in each differential clock cycle.
[0089] 303, the differential data is converted from serial to parallel.
[0090] As Figure 4As shown, the DATA_P / DATA_N[0], DATA_P / DATA_N[1] and DATA_P / DATA_N[2] are converted into 3 groups of parallel output data DATA_RA, DATA_RB and DATA_RC respectively. The DATA_RA, DATA_RB and DATA_RC output 7b it data in parallel in each output clock (CLK_OUT, i.e. the received data processing clock) cycle, which are DATA_RA[6:0], DATA_RB[6:0] and DATA_RC[6:0] respectively. Correspondingly, in each CLK_OUT cycle, one frame of parallel output data includes 21b it, i.e. DATA_RA[6:0], DATA_RB[6:0] and DATA_RC[6:0].
[0091] 304, sorting the parameters in the 3 pairs of parallel output data according to the configuration information.
[0092] The configuration information includes: the number of pairs of differential data is 3; the number of pixel data contained in the output data of each frame of the scanning analog front end is 16b it, and the 16b it is located in {DATA_RA[6:3] and DATTA_RB[6:0], DATA_RC[4:0]} of the parallel output data; the number of control information contained in the output data of each frame is 5b it, and the 5b it is located in DATA_RA[2:0] and DATA_RC[6:5]. Among them, DATA_RC[5] of the control information indicates whether the pixel data is valid, and DATA_RC[6] and DATA_RA[0] of the control information represent color. Specifically, 00 represents red data, 01 represents green data, and 10 represents blue data. DATA_RA[1] represents a horizontal synchronization signal, which is used to indicate a start signal of a row of content output, and DATA_RA[2] is a same-row indication signal, which is used to indicate that the current frame and the previous frame belong to pixel data of the same row.
[0093] The image data to be detected after sorting according to the above configuration information is shown in Figure 5 As shown, one frame of image data to be detected includes 21b it, of which 16b it is pixel data and 5b it is control information. As shown in Figure 5 In one frame of image data to be detected, the pixel data occupies b it positions D0 to D15, and the control information occupies the remaining 5b it. The meanings of the b it positions occupied by the control information are as follows:
[0094] The CHA channel b it0 and the CHC channel b it6 are used to represent color.
[0095] CHA channel bit1 HS is used to represent a line synchronization signal, which is used to indicate a start signal of a line content start output.
[0096] CHA channel bit2 HD is used to represent a same line indication signal, which is used to indicate pixel data of a same line. When scanning an image, the image sensor scans a line of work content, and the corresponding output pixel data is usually one frame of HS, followed by N frames of HD. After the pixel data of the same line is transmitted, the next line HS and N frames of HD are output. That is, according to the HS and HD, the pixel data of the same line can be received.
[0097] CHC channel bit5 VD is a validity flag, which is used to indicate whether the pixel data of the current frame is valid.
[0098] 305, detecting whether the line head information on the CHA channel bit1 and bit2 of the image data to be detected matches the configuration information. If it matches, step 306 is executed; if it does not match, the current image data to be detected is discarded.
[0099] The line head HS and HD in the configuration information can take values of 1, 0 to represent data of the same line, values of 0, 0 to represent a start frame, and values of 1, 1 to represent that the line head does not match the configuration information.
[0100] As shown in FIG. 3, the HS and HD on the CHA channel bit1 and bit2 are 1, 1 respectively, so that the line head of the current data frame does not match the configuration information, the current data frame is invalid pixel data and is discarded. Figure 6 As shown in FIG. 3, the HS and HD on the CHA channel bit1 and bit2 are 0, 0 respectively, so that the current data frame is a start frame, the line head information matches the configuration information, and step 306 is continued. Figure 7 As shown in FIG. 3, the HS and HD on the CHA channel bit1 and bit2 are 1, 0 respectively, so that the line head information matches the configuration information, and step 306 is continued. Figures 8-10
[0101] 306, detecting the VD on the CHC channel bit5 of the image data to be detected. If the VD is 0, it indicates that the image data to be detected is valid pixel data and step 307 is executed; otherwise, the image data to be detected is invalid pixel data and is discarded.
[0102] As shown in FIG. 3, the VD on the CHC channel bit5 is 1, indicating that the current data frame is invalid pixel data. Figure 6 As shown in FIG. 3, the VD on the CHC channel bit5 is 0, indicating that the current data frame is valid pixel data. Figures 7-10
[0103] 307. Detect the values of the CHC channel bit6 and CHA channel bit0 of the image data to be detected in order to determine the color of the image data to be detected.
[0104] in, Figure 7 The start frame is a signal that initiates image data processing, eliminating the need to detect its color information.
[0105] like Figure 8 As shown, the values of bit6 in the CHC channel and bit0 in the CHA channel are 00, indicating that the color of the current frame is red, that is, the pixel data stored in bits D0 to D15 is red pixel data. In one example, D0 to D15 can store red pixel data R0[0]-R0[7] and R1[0]-R1[7]. Figure 9 As shown, the values of bit6 in the CHC channel and bit0 in the CHA channel are 0 and 1, indicating that the color of the current frame is green. That is, the pixel data stored in bits D0 to D15 is green pixel data. In one example, D0 to D15 can store green pixel data G0[0]-G0[7] and G1[0]-G1[7]. Figure 10 As shown, the value of bit6 in the CHC channel and bit0 in the CHA channel is 10, indicating that the color of the current frame is blue. That is, the pixel data stored in bits D0 to D15 is blue pixel data. In one example, D0 to D15 can store blue pixel data B0[0]-B0[7] and B1[0]-B1[7].
[0106] exist Figures 8-10 In the example, the three frames of image data contain information for two pixels. For example, pixel 1 corresponds to R0[0:7]-G0[0:7]-B0[0:7], and pixel 2 corresponds to R1[0:7]-G1[0:7]-B1[0:7]. In this example, two pixel information can be transmitted through three frames of image data. It can be understood that the pixel information carried by D0-D15 in each frame of image data can be configured as needed to achieve the purpose of flexibly transmitting pixel information.
[0107] 308, Cache the processed image data.
[0108] Among these methods, the processed image data can be cached according to certain rules based on the detected color information. For example, the processed image data can be cached in RGB or BGR order.
[0109] 309, when the amount of cached data reaches a certain value, the cached data is sent to the AXI bus in a burst form based on the first-in first-out principle, and finally written into the system memory. When the processed image data is output, the data can be output in a pixel-by-pixel, line-by-line, or color plane manner.
[0110] The method of the embodiment of the application supports input and processing conversion of multiple pairs of LVDS data. Moreover, the method of the embodiment of the application supports multiple working modes, such as one pixel per frame, two pixels per three frames, and the like. Figures 8-10 When the data is output, the data output format of the embodiment of the application is flexible and configurable, such as pixel-by-pixel, line-by-line, or color plane.
[0111] Referring to Figure 11 , a structural schematic diagram of a processing chip is provided in the embodiment of the application. As shown in Figure 11 , the processing chip comprises a differential data interface and a data processor. The differential data interface is configured to acquire differential data output by a scanning analog front end. The data processor is configured to sort parameters in the differential data according to preset configuration information to obtain processed image data after sorting; and perform validity and color information detection on the processed image data, and output the processed image data.
[0112] In some embodiments, the configuration information can be set according to the type of the scanning analog front end.
[0113] In some embodiments, the configuration information comprises the number of pairs of differential data, the number of bits and the position of pixel data in the differential data, and the number of bits and the position of control information in the differential data.
[0114] In some embodiments, as shown in Figure 11 , the data processor specifically comprises a phase-locked loop module, a serial-to-parallel conversion module, a data sorting module, a line head detection module, a pixel processing module, a data cache module, and a data output module. The scanning analog front end continuously outputs a differential clock signal CLK_P / CLK_N at a certain frequency.
[0115] The phase-locked loop module is configured to output a frequency multiplication clock signal to enable the serial-parallel conversion module to perform serial-parallel conversion on the differential data and output a delay-locked loop identification signal (DLL_LOCK signal) and a received data processing clock signal (CLK_OUT signal) to enable the data sorting module to perform parameter sorting to obtain the image data to be detected after detecting that the differential clock signal output by the scanning analog front end is stable.
[0116] The serial-parallel conversion module is configured to perform serial-parallel conversion on the differential data to obtain parallel output data.
[0117] The data sorting module is configured to sort the parameters in the parallel output data in corresponding positions according to the configuration information to obtain the image data to be detected.
[0118] The configuration information further includes configuration header information, configuration validity information and configuration color information.
[0119] The header detection module is configured to detect whether the to-be-detected header information of the image data to be detected matches the configuration header information in the configuration information.
[0120] The pixel processing module is configured to detect whether the to-be-detected validity information of the image data to be detected matches the configuration validity information in the configuration information, and when the to-be-detected header information matches the configuration header information and the to-be-detected validity information matches the configuration validity information, determine that the image data to be detected is valid data, and perform color detection on the to-be-detected color information in the valid data according to the configuration color information in the configuration information.
[0121] The data buffer module is configured to buffer the processed image data.
[0122] The data output module is configured to send the buffered processed image data to the AXI bus in a burst form when the processed image data in the data buffer module reaches a set condition.
[0123] In this embodiment, the data output module is a memory access module, i.e., an SDMA module, which can select whether to configure an enable burst operation to configure the maximum burst number and configure a single burst length according to the congestion of the system bus, so that the data output module can send the buffered processed image data to the AXI bus in a burst form when the processed image data in the data buffer module reaches a set condition.
[0124] The image forming device of the embodiment of the present applicationapplicationexecute the image data processing method of the embodiment shown above. The parts not described in detail in this embodiment can refer to the related description of the method embodiment. The execution process and technical effects of this technical solution are described in the embodiment of the method and will not be described here again.
[0125] Referring to Figure 12 Figure 1 is a schematic diagram of an image forming device according to an embodiment of the present application. As shown in Figure 1, the image forming device 600 can include a processing chip 601, a memory 602 and a communication unit 603. These components communicate via one or more buses. Those skilled in the art will understand that the structure of the image forming device shown in the figure does not constitute a limitation on the embodiments of the present application. It can be a bus structure or a star structure. It can include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements. Figure 12
[0126] The communication unit 603 is configured to establish a communication channel, so that the image forming device can communicate with other devices. It receives user data from other devices or sends user data to other devices.
[0127] The processing chip 601 is the control center of the image forming device. It connects various parts of the image forming device via various interfaces and lines, executes software programs, instructions and / or modules stored in the memory 602, and calls data stored in the memory, to perform various functions of the image forming device and / or process data. The processing chip 601 can be composed of an integrated circuit (IC), for example, a single package IC or multiple package ICs connected together. For example, the processor 601 can include a central processing unit (CPU), a microcontroller unit (MCU), etc.
[0128] The memory 602 is configured to store execution instructions for the processor 601. The memory 602 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk.
[0129] When the execution instructions in the memory 602 are executed by the processor 601, the image forming device 600 can execute the image data processing method according to the embodiments of the present application.
[0130] In particular implementations, the present application further provides a computer storage medium, wherein the computer storage medium can store a program, and the program can include some or all of the steps in the embodiments of the image data processing method of the image forming device provided by the present application when executed. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM), a random access memory (RAM), or the like.
[0131] In particular implementations, the present application further provides a computer program product, wherein the computer program product contains executable instructions, and when the executable instructions are executed on a computer, the computer executes some or all of the steps in the embodiments of the image data processing method of the image forming device provided by the present application.
[0132] The embodiments of the present application further provide a non-transitory computer readable storage medium, wherein the non-transitory computer readable storage medium stores computer instructions, and the computer instructions cause the computer to execute the method provided by the embodiments of the present application.
[0133] Those skilled in the art can clearly understand that the technologies in the embodiments of the present application can be realized by means of software and necessary general hardware platforms. Based on such understanding, the technical solutions in the embodiments of the present application can be embodied in the form of a software product, which can be stored in a storage medium, such as a ROM / RAM, a magnetic disc, an optical disc, or the like, and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments of the present application.
[0134] The same or similar parts among the various embodiments in the present specification can be referred to each other. In particular, for the device embodiments and the terminal embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.
Claims
1. An image data processing method, characterized by, The method is applied to a processing chip, and comprises: acquiring differential data output by a scanning analog front end; sorting parameters in the differential data according to preset configuration information to obtain to-be-detected image data after sorting; detecting validity and color information of the to-be-detected image data and outputting processed image data; the to-be-detected image data comprises control information, and the control information comprises to-be-detected header information, to-be-detected validity information and to-be-detected color information; the configuration information comprises configuration header information, configuration validity information and configuration color information; the detecting validity and color information of the to-be-detected image data and outputting processed image data comprises: detecting whether the to-be-detected header information of the to-be-detected image data matches the configuration header information in the configuration information; detecting whether the to-be-detected validity information of the to-be-detected image data matches the configuration validity information in the configuration information; if yes, determining that the to-be-detected image data is valid data; performing color detection on to-be-detected color information in the valid data according to the configuration color information in the configuration information, and outputting processed image data after the detection.
2. The method of claim 1, wherein, The configuration information is set according to a type of the scanning analog front end.
3. The method of claim 1, wherein, The configuration information further comprises: a number of logs of the differential data; a number of bits of pixel data in the differential data and a position of the pixel data; a number of bits of control information in the differential data and a position of the control information.
4. The method according to any one of claims 1 to 3, characterized in that, The sorting parameters in the differential data according to preset configuration information to obtain to-be-detected image data after sorting comprises: performing serial-parallel conversion on the differential data to obtain parallel output data; sorting parameters in the parallel output data in corresponding positions according to the configuration information to obtain the to-be-detected image data.
5. The method of claim 1, wherein, The method further comprises: if any of the detections is no, the to-be-detected image data is invalid data and is discarded.
6. A processing chip, comprising: comprise: a differential data interface configured to acquire differential data output by a scanning analog front end; a data processor configured to sort parameters in the differential data according to preset configuration information to obtain to-be-detected image data after sorting, and to detect validity and color information of the to-be-detected image data and output processed image data; the to-be-detected image data comprises control information, and the control information comprises to-be-detected header information, to-be-detected validity information and to-be-detected color information; the configuration information comprises configuration header information, configuration validity information and configuration color information; the data processor comprises: a header detection module configured to detect whether the to-be-detected header information of the to-be-detected image data matches the configuration header information in the configuration information; The pixel processing module is configured to detect whether the to-be-tested validity information of the to-be-tested image data matches the configuration validity information in the configuration information, and when the to-be-tested header information matches the configuration header information and the to-be-tested validity information matches the configuration validity information, determine that the to-be-tested image data is valid data, and perform color detection on to-be-tested color information in the valid data according to the configuration color information in the configuration information.
7. The processing chip of claim 6, wherein, The configuration information is set according to a type of the scanning analog front end.
8. The processing chip of claim 6, wherein, The configuration information further includes: a number of bits and a position of pixel data in the differential data; a number of bits and a position of control information in the differential data. The data processor includes:
9. The processing chip of claim 6, wherein, a serial-to-parallel conversion module configured to perform serial-to-parallel conversion on the differential data to obtain parallel output data; a data sorting module configured to sort parameters in the parallel output data in corresponding positions according to the configuration information to obtain the to-be-tested image data. The data processor further includes:
10. The processing chip of claim 9, wherein, a phase-locked loop module configured to output a frequency multiplication clock signal to enable the serial-to-parallel conversion module to perform serial-to-parallel conversion on the differential data and output a delay-locked loop identification signal and a received data processing clock signal to enable the data sorting module to sort parameters to obtain the to-be-tested image data after detecting that a differential clock signal output by the scanning analog front end is stable. include:
11. An image forming apparatus characterized by comprising: at least one processing chip; and at least one memory in communication connection with the processing chip, wherein: the memory stores program instructions executable by the processing chip, and the processing chip invokes the program instructions to execute the method according to any one of claims 1 to 5.
Citation Information
Patent Citations
Method and system for preventing and detecting hazardously misleading information on safety-critical display
CN112135775A
Data processing method and device, image forming method and device, equipment and storage medium
CN118233579A