Load balancing method, device, equipment and medium for multi-level systolic array

Abstract

The present application discloses a load balancing method, device, equipment and medium for a multi-level systolic array, and relates to the technical field of computer architecture. The method comprises: real-time monitoring of the load of each level in the systolic array, wherein each level is arranged from high to low, and the height of the level is positively correlated with the complexity of the task that the level can handle; traversing each level except the highest level, and determining the high-level load of a target level that is one level higher than the current level; calculating the difference between the load of the current level and the high-level load, and if the difference is greater than a preset inter-layer threshold, transferring the task in the current level to the target level. Based on real-time monitoring data, the present application allocates and adjusts computing resources in arrays of different levels through a multi-level systolic array design and a dynamic load balancing strategy, thereby reducing performance degradation and energy consumption increase caused by uneven resource allocation, thereby maintaining the high efficiency of the systolic array while enhancing its flexibility and adaptability.

Description

Technical Field

[0001] The present application relates to the field of computer architecture technology, and in particular to a load balancing method, device, equipment and medium for a multi-level systolic array. Background Art

[0002] A systolic array, also known as a pulse array, is a parallel computing structure composed of multiple identical processing elements (PEs) according to specific interconnection rules. These processing elements can be basic computing units in hardware circuits, such as adders, multipliers, etc.

[0003] Although systolic arrays perform well in specific scenarios, their inherent fixed single-layer structure has become a key factor limiting their widespread application. In practical applications where computing task requirements change frequently, the fixed systolic array architecture makes it difficult to flexibly adjust resources according to the dynamic requirements of the task. This leads to two major problems: one is insufficient resource utilization, that is, in certain tasks, some computing resources may be idle and fail to be effectively utilized; the other is the degradation of computing performance. When the task requirements do not match the fixed structure of the systolic array, the overall computing efficiency will be affected, thereby reducing the overall performance of the system. Therefore, how to maintain the high efficiency of the systolic array while enhancing its flexibility and adaptability has become a technical problem that needs to be solved urgently.

[0004] The above contents are only used to assist in understanding the technical solution of the present application and do not constitute an admission that the above contents are prior art. Summary of the invention

[0005] The main purpose of the present application is to provide a load balancing method, device, equipment and medium for a multi-level systolic array, aiming to solve the technical problem of how to enhance the flexibility and adaptability of the systolic array while maintaining its high efficiency.

[0006] To achieve the above objectives, the present application proposes a load balancing method for a multi-level systolic array, the method comprising:

[0007] Real-time monitoring of the load of each level in the systolic array, wherein the levels are arranged from high to low, and the level of the level is positively correlated with the complexity of the tasks that the level can handle;

[0008] Traversing each of the levels except the highest level, and determining a high-level load of a target level that is one level higher than the current level;

[0009] The difference between the load of the current layer and the load of the higher layer is calculated, and if the difference is greater than a preset inter-layer threshold, the tasks in the current layer are transferred to the target layer.

[0010] In one embodiment, after the step of real-time monitoring the load of each level in the systolic array, the method further comprises:

[0011] For each of the layers, a load change amount of the layer within a preset monitoring period is calculated in real time according to the load;

[0012] Calculating the resource demand of each of the levels according to each of the loads and each of the load changes, wherein the sum of the resource demand is less than a preset total resource capacity;

[0013] The computing resources of the systolic array are allocated to each of the levels according to each of the resource requirements.

[0014] In one embodiment, the method further comprises:

[0015] For each of the levels, obtaining the task priority of each target task in the level;

[0016] Allocate each of the target tasks to each of the computing units according to the priority of each of the tasks and the amount of computing resources of each of the computing units in the hierarchy, wherein the priority of the task is positively correlated with the amount of computing resources.

[0017] In one embodiment, after the step of allocating each of the target tasks to each of the computing units, the method further includes:

[0018] Obtaining the unit resource demand of each of the computing units;

[0019] When the sum of the resource requirements of each unit is greater than the resource requirements of the level, for each computing unit, the time slices of each target task are calculated according to the task priorities and preset weights of the tasks of each unit in the computing unit, wherein the sum of the time slices is less than the monitoring period;

[0020] The unit tasks are executed in turn according to the time slices.

[0021] In one embodiment, after the step of real-time monitoring the load of each level in the systolic array, the method further comprises:

[0022] Traversing each of the levels, and when the load of the current level is less than a preset first load threshold, reducing the operating voltage and operating frequency of the current level;

[0023] When the load of the current level is greater than a preset second load threshold, the operating voltage and operating frequency of the current level are restored, wherein the second load threshold is greater than the first load threshold.

[0024] In one embodiment, the method further comprises:

[0025] The overall performance of the systolic array is calculated according to the corresponding level weights preset for each level, each load and each resource demand, wherein the overall performance is used to characterize the overall efficiency of the systolic array.

[0026] In addition, to achieve the above-mentioned purpose, the present application also proposes a load balancing device for a multi-level systolic array, and the load balancing device for the multi-level systolic array includes:

[0027] A load monitoring module, used to monitor the load of each level in the systolic array in real time, wherein the levels are arranged from high to low, and the level is positively correlated with the complexity of the tasks that the level can handle;

[0028] The load balancing module is used to traverse each of the levels except the highest level, determine the high-level load of the target level that is one level higher than the current level; calculate the difference between the load of the current level and the high-level load, and if the difference is greater than a preset inter-layer threshold, transfer the tasks in the current level to the target level.

[0029] In addition, to achieve the above-mentioned objectives, the present application also proposes a load balancing device for a multi-level systolic array, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the load balancing method for the multi-level systolic array as described above.

[0030] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by the processor, the steps of the load balancing method of the multi-level systolic array as described above are implemented.

[0031] In addition, to achieve the above objectives, the present application also provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of the load balancing method for the multi-level systolic array as described above are implemented.

[0032] The present application provides a load balancing method for a multi-level systolic array. The present application monitors the load conditions of each level in the systolic array in real time, and then calculates the difference in load between each level. If the load difference exceeds a preset inter-level threshold, the tasks of the lower level are transferred to the higher level to balance the load between the levels.

[0033] In summary, the present application allocates and adjusts computing resources in arrays at different levels based on real-time monitoring data through multi-level systolic array design and dynamic load balancing strategy, thereby reducing performance degradation and increased energy consumption caused by uneven resource allocation, thereby maintaining the high efficiency of the systolic array while enhancing its flexibility and adaptability. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 A flow chart of a load balancing method for a multi-level systolic array provided in Embodiment 1 of the present application;

[0037] Figure 2 A detailed flow chart of an embodiment of a load balancing method for a multi-level systolic array of the present application;

[0038] Figure 3 A flow chart of a second embodiment of a load balancing method for a multi-level systolic array of the present application;

[0039] Figure 4 This is a schematic diagram of the module structure of a load balancing device for a multi-level systolic array according to an embodiment of the present application;

[0040] Figure 5 Schematic diagram of the device structure of the hardware operating environment involved in the load balancing method of the multi-level systolic array in the embodiment of the present application.

[0041] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0042] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0043] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0044] The main solution of the embodiment of the present application is: real-time monitoring of the load of each level in the pulsating array, wherein the levels are arranged from high to low, and the height of the level is positively correlated with the complexity of the tasks that the level can handle; traversing each level except the highest level, and determining the high-level load of the target level that is one level higher than the current level; calculating the difference between the load of the current level and the high-level load, and if the difference is greater than a preset inter-layer threshold, transferring the task in the current level to the target level.

[0045] In this embodiment, for the convenience of description, the load balancing device of the multi-level systolic array is used as the execution subject for explanation below.

[0046] A systolic array, also known as a pulse array, is a parallel computing structure composed of multiple identical processing elements (PEs) according to specific interconnection rules. These processing elements can be basic computing units in hardware circuits, such as adders, multipliers, etc.

[0047] Although systolic arrays perform well in specific scenarios, their inherent fixed structure has become a key factor limiting their widespread application. In practical applications where computing task requirements change frequently, the fixed systolic array architecture makes it difficult to flexibly adjust resources according to the dynamic requirements of the task. This leads to two major problems: one is insufficient resource utilization, that is, in certain tasks, some computing resources may be idle and fail to be effectively utilized; the other is the degradation of computing performance. When the task requirements do not match the fixed structure of the systolic array, the overall computing efficiency will be affected, thereby reducing the overall performance of the system. Therefore, how to maintain the high efficiency of the systolic array while enhancing its flexibility and adaptability has become a technical problem that needs to be solved urgently.

[0048] In response to the above problems, the present application provides a load balancing method for a multi-level systolic array. The present application monitors the load conditions of each level in the systolic array in real time, and then calculates the load differences between the levels. If the load difference exceeds a preset inter-layer threshold, the tasks of the lower level are transferred to the higher level to balance the load between the levels.

[0049] In summary, the present application allocates and adjusts computing resources in arrays at different levels based on real-time monitoring data through multi-level systolic array design and dynamic load balancing strategy, thereby reducing performance degradation and increased energy consumption caused by uneven resource allocation, thereby maintaining the high efficiency of the systolic array while enhancing its flexibility and adaptability.

[0050] It should be noted that the execution subject of this embodiment may be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, a load balancing device of a multi-level systolic array, etc. The following takes a load balancing device of a multi-level systolic array as an example to illustrate this embodiment and the following embodiments.

[0051] Based on this, the present application embodiment provides a load balancing method for a multi-level systolic array, referring to Figure 1 , Figure 1 1 is a flow chart of a first embodiment of a load balancing method for a multi-level systolic array of the present invention.

[0052] In this embodiment, the load balancing method of the multi-level systolic array includes steps S10 to S30:

[0053] Step S10, real-time monitoring of the load of each level in the systolic array, wherein the levels are arranged from high to low, and the level is positively correlated with the complexity of the tasks that the level can handle;

[0054] It should be noted that, in this embodiment, the systolic array architecture is composed of multiple isomorphic PEs and is a hierarchical structure. PE sends data to adjacent PEs (in some two-dimensional structures, there may also be data channels in the diagonal direction). In the hierarchical systolic array, the low level refers to the PE level closer to the data input end. These PEs are mainly responsible for receiving and processing the original data from the main processor or other data sources. Since they are in the initial stage of data processing, they are usually used to perform more basic data processing operations, such as data decoding, format conversion, etc. Corresponding to the low level, the high level refers to the PE level closer to the data output end. These PEs are mainly responsible for receiving the processing results from the low-level PEs and performing further data processing or calculations. Since they are in the later stage of data processing, they are usually used to perform more complex and advanced data processing operations.

[0055] In this embodiment, the current load of each level in the systolic array is continuously monitored. These levels are arranged from high to low according to the ability to handle task complexity, that is, the higher the level, the more complex the task that can be handled.

[0056] Step S20, traversing each of the levels except the highest level, and determining a high-level load of a target level that is one level higher than the current level;

[0057] In this embodiment, starting from the lowest level of the systolic array and traversing upwards level by level (excluding the highest level), for each current level, the current load of the previous level (ie, the target level) is searched and determined.

[0058] Step S30, calculating the difference between the load of the current layer and the load of the higher layer, and if the difference is greater than a preset inter-layer threshold, transferring the tasks in the current layer to the target layer.

[0059] In this embodiment, for each current layer, the difference between its load and the load of the previous layer (target layer) is calculated. If the difference exceeds a preset inter-layer threshold (this threshold is set according to the overall performance of the systolic array and task requirements), some or all tasks in the current layer are transferred to the target layer for execution.

[0060] Specifically, the real-time load of the k-th level is defined as f_k(t)=∑_{i=1}^{n_k}w_i*u_{i,k}(t), where w_i is the weight of the i-th task and u_{i,k}(t) is the utilization of the computing unit at time t.

[0061] Define the load difference between layers ΔL_{k,k+1}=|f_k-f_{k+1}|. When ΔL_{k,k+1}>T (threshold), transfer the tasks of the low-load layer to the high-load layer.

[0062] By calculating the load difference between layers and setting thresholds, the device can automatically and intelligently adjust the distribution of tasks between different layers, effectively avoiding the situation where some layers are overloaded while other layers are idle, thereby improving the resource utilization and overall performance of the systolic array. At the same time, this dynamic scheduling method also helps to improve the flexibility and adaptability of the systolic array, enabling it to better cope with the needs of various complex tasks.

[0063] Further, in a feasible implementation mode, please refer to Figure 2 , Figure 2 A detailed flow chart of a load balancing method for a multi-level systolic array according to an embodiment of the present invention is shown in FIG. Figure 2 As shown, after the above step S10, the method may further include steps A10 to A30:

[0064] Step A10, for each of the layers, calculating in real time according to the load a load change of the layer within a preset monitoring period;

[0065] In this embodiment, based on the real-time monitoring of the load of each level, the load change of each level within a preset monitoring period (such as every minute, every hour, etc.) is further calculated. The change reflects the dynamic trend of the level load, which helps the device to more accurately predict the resource demand in the future.

[0066] Step A20, calculating the resource demand of each of the levels according to each of the loads and each of the load changes, wherein the sum of the resource demand is less than a preset total resource capacity;

[0067] In this embodiment, the current load and load change of each level are comprehensively considered, and the resource demand of each level is calculated through a certain algorithm (such as weighted average, exponential smoothing, etc.). This resource demand reflects the level of demand for computing resources at the level in the future. At the same time, the device ensures that the sum of the resource demand of all levels does not exceed the preset total resource capacity to avoid conflicts and waste in the resource allocation process.

[0068] Step A30, allocating computing resources of the systolic array to each of the levels according to each of the resource requirements.

[0069] In this embodiment, the computing resources (such as CPU, memory, storage, etc.) of the systolic array are allocated to each level in a certain proportion or quantity according to the resource demand of each level. This allocation process can be dynamic, that is, the allocation of computing resources is adjusted in real time according to the changes in the resource demand of each level.

[0070] Specifically, after calculating the real-time load of each level, calculate the load change rate Δf_k(t)=f_k(t)-f_k(t-Δt) to determine the load change trend of each level. Assume that the resource demand function of each level is R_k(f_k)=α_k*f_k+β_k*Δf_k, where α_k and β_k are adjustment coefficients. Ensure that the resource allocation of each level meets the total capacity constraint ∑_{k=1}^mR_k(f_k)≤C, where C is the total capacity of system resources.

[0071] Through the above steps, we can more comprehensively understand the load dynamics and resource requirements of each level in the systolic array, so as to more accurately schedule tasks and allocate resources. This not only improves the work efficiency and resource utilization of the systolic array, but also enhances its flexibility and adaptability, enabling it to better cope with the needs of various complex tasks.

[0072] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 3 , Figure 3 FIG. 1 is a flow chart of a second embodiment of a load balancing method for a multi-level systolic array of the present invention. Figure 3 As shown, the method may further include steps B10 to B20:

[0073] Step B10, for each of the levels, obtaining the task priority of each target task in the level;

[0074] In this embodiment, for each level, the task priority of each target task in the level is further obtained. The task priority can be determined according to various factors such as the urgency, importance, and user needs of the task.

[0075] Step B20, allocating each of the target tasks to each of the computing units according to the priority of each of the tasks and the amount of computing resources of each of the computing units in the hierarchy, wherein the task priority is positively correlated with the amount of computing resources.

[0076] In this embodiment, each target task is assigned to the most appropriate computing unit by comprehensively considering the priority of each task and the computing resources of each computing unit in the hierarchy (such as CPU usage, memory occupancy, etc.). In this process, the device ensures that the task priority is positively correlated with the computing resources, that is, high-priority tasks are assigned to computing units with more sufficient resources to ensure that they can be executed smoothly.

[0077] Specifically, within each level L_k, the load management module schedules tasks based on load data, with the constraint ∑_{j=1}^{n_k}x_{j}*p_j≤R_k(f_k), where x_j is the task assignment variable and p_j is the task priority. By calculating the priority and complexity of the task, high-priority tasks are assigned to units with more resources to ensure maximum computing efficiency.

[0078] By allocating tasks based on task priority and computing resources, tasks can be balanced and efficiently executed among the computing units of the systolic array. This allocation method not only improves the task execution efficiency of the systolic array, but also ensures that high-priority tasks are processed first, improving user satisfaction and system response speed. At the same time, by making rational use of computing resources, the device also reduces the risk of idle and wasted resources.

[0079] Based on the first embodiment and / or the second embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those of the first embodiment and / or the second embodiment can be referred to the above description, and will not be described in detail later. On this basis, after the above step S30, the method further includes steps C10 to C30:

[0080] Step C10, obtaining the unit resource demand of each of the computing units;

[0081] In this embodiment, after the tasks are assigned to each computing unit, the unit resource demand of each computing unit is further obtained. This demand reflects the expected demand of the computing unit for computing resources in the future and can be calculated comprehensively based on factors such as the current load of the computing unit, the length of the task queue, and the task priority.

[0082] Step C20, when the sum of the resource requirements of each unit is greater than the resource requirements of the level, for each computing unit, the time slices of each target task are calculated according to the task priority and preset weight of each unit task in the computing unit, wherein the sum of each time slice is less than the monitoring period;

[0083] In this embodiment, if it is detected that the sum of the resource requirements of all computing units exceeds the resource requirements of the hierarchy, it is necessary to further allocate time slices to the tasks based on time division multiplexing to ensure that the system can run stably and all tasks can be processed to a certain extent. For the target tasks in each computing unit, the length of the time slice that each target task should obtain is calculated according to its preset priority and weight. The calculation of the time slice length needs to ensure that the sum of the time slices of all target tasks does not exceed the preset monitoring period (i.e., the time unit used by the system to allocate time slices), while trying to meet the needs of high priority and weighted tasks.

[0084] Step C30, executing each of the unit tasks in turn according to each of the time slices.

[0085] In this embodiment, after the time slices of each target task are calculated, the target tasks are executed in turn according to the time slices.

[0086] Specifically, when the resource demand exceeds the resource demand of the level, the time division multiplexing module shares time slices among multiple tasks to minimize resource contention. The time slice τ_j of each task is determined by its weight w_j and priority p_j, satisfying the condition τ_j∝w_j*p_j.

[0087] Define the time slice allocation constraint ∑τ_j≤Δt, where Δt is the monitoring period. The time division multiplexing module increases the time slice allocation of tasks when the load is high and reduces the time slice when the load is low, ensuring the flexibility of resource allocation.

[0088] The time division multiplexing module dynamically allocates the execution time slices of the computing units according to the task allocation results of the task scheduling module, and transmits the output results to the dynamic power management module.

[0089] By executing the target tasks in turn according to time slices, the system can achieve fair scheduling and efficient execution between tasks under limited resources. This helps to improve the overall computing efficiency and resource utilization of the systolic array while ensuring the stability and reliability of the system.

[0090] Based on the first to third embodiments of the present application, in the fourth embodiment of the present application, the same or similar contents as those of the first to third embodiments can be referred to the above description, and will not be repeated in the following. On this basis, after the above step S10, the method can also include steps D10 to D20:

[0091] Step D10, traversing each of the levels, and when the load of the current level is less than a preset first load threshold, reducing the operating voltage and operating frequency of the current level;

[0092] In this embodiment, based on real-time monitoring of the load of each level, all levels are traversed, and the operating voltage and operating frequency are adjusted according to the load of the current level. When the load of the current level is less than the preset first load threshold, the device will reduce the operating voltage and operating frequency of the level. This first load threshold is a lower threshold used to determine whether the level is in a low load state, so that there is an opportunity for energy saving optimization.

[0093] Step D20, when the load of the current level is greater than a preset second load threshold, restore the operating voltage and operating frequency of the current level, wherein the second load threshold is greater than the first load threshold.

[0094] In this embodiment, when the load of the current level is greater than the preset second load threshold, the device will restore the operating voltage and operating frequency of the level to normal. This second load threshold is a higher threshold used to determine whether the level is in a high load state, so that sufficient computing power needs to be restored to meet the task requirements. At the same time, in order to ensure the stability and response speed of the system, when the level load exceeds the second load threshold, the device will immediately restore its operating voltage and operating frequency without having to wait for the load to rise further.

[0095] Specifically, at the low load level, power consumption is optimized by reducing the voltage V_k and frequency f_k. The power consumption is calculated as P_k(t)=V_k^2*f_k. The system dynamically adjusts V_k and f_k according to the level load to ensure the minimum power consumption that meets the performance requirements. When the level load f_k(t) is lower than the threshold T_low, the resource adjustment module reduces the voltage and frequency; when the load f_k(t) exceeds T_high, the normal voltage and frequency are restored.

[0096] Through the above steps, the operating voltage and operating frequency can be dynamically adjusted according to the load conditions of each level, thereby achieving energy-saving optimization and performance balance.

[0097] Based on the first to fourth embodiments of the present application, in the fifth embodiment of the present application, the same or similar contents as those of the first to fourth embodiments can be referred to the above description, and will not be repeated in the following. On this basis, the method can also include step E10:

[0098] Step E10, calculating the overall performance of the systolic array according to the corresponding level weights preset for each level, the loads and the resource requirements, wherein the overall performance is used to characterize the overall efficiency of the systolic array.

[0099] In this embodiment, the overall performance of the systolic array is calculated based on the preset level weights of each level, the load of each level, and the resource demand. This overall performance index is used to characterize the overall efficiency of the systolic array, which reflects the overall performance of the systolic array under given task and resource conditions. The level weights can be set according to factors such as the importance, complexity, and resource consumption of each level in the computing task.

[0100] Specifically, the overall system performance index E=∑_{k=1}^{m}γ_k*(f_k / R_k) is defined, γ_k is the level weight, and E is used to evaluate resource utilization efficiency and computing performance. When the system performance E is lower than the threshold E_min, the feedback module transmits the signal to the load monitoring module and the load balancing module to adjust the task allocation strategy; when E reaches the expected value, the current configuration is maintained.

[0101] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the load balancing method of the multi-level systolic array of the present application. More simple transformations based on this technical concept are all within the scope of protection of the present application.

[0102] The present application also provides a load balancing device for a multi-level systolic array, please refer to Figure 4 , the load balancing device of the multi-level systolic array includes:

[0103] A load monitoring module 10 is used to monitor the load of each level in the systolic array in real time, wherein the levels are arranged from high to low, and the level is positively correlated with the complexity of the tasks that the level can handle;

[0104] Specifically, the load monitoring module 10 includes:

[0105] Mathematical model: Define the real-time load of the k-th level as f_k(t)=∑_{i=1}^{n_k}w_i*u_{i,k}(t), where w_i is the weight of the i-th task and u_{i,k}(t) is the utilization of the computing unit at time t.

[0106] Load trend: Calculate the load change rate Δf_k(t)=f_k(t)-f_k(t-Δt) to determine the load change trend of each level.

[0107] Dependencies: The load monitoring module provides real-time load data for the load balancing module, the intra-layer load management module, and the resource dynamic adjustment module, and is the basis for the adaptive adjustment of the entire system.

[0108] The load balancing module 20 is used to traverse each of the levels except the highest level, determine the high-level load of the target level that is one level higher than the current level; calculate the difference between the load of the current level and the high-level load, and if the difference is greater than a preset inter-layer threshold, transfer the tasks in the current level to the target level.

[0109] Optionally, the load balancing module 20 is further configured to:

[0110] For each of the levels, a load change amount of the level within a preset monitoring period is calculated in real time according to the load;

[0111] Calculating the resource demand of each of the levels according to each of the loads and each of the load changes, wherein the sum of the resource demand is less than a preset total resource capacity;

[0112] The computing resources of the systolic array are allocated to each of the levels according to each of the resource requirements.

[0113] Specifically, the load balancing module 20 includes:

[0114] Load balancing formula: Assume that the resource demand function of each layer is R_k(f_k)=α_k*f_k+β_k*Δf_k, where α_k and β_k are adjustment coefficients. Ensure that the resource allocation of each layer meets the total capacity constraint ∑_{k=1}^mR_k(f_k)≤C, where C is the total capacity of system resources.

[0115] Cross-layer task migration condition: define the load difference between layers ΔL_{k,k+1}=|f_k-f_{k+1}|. When ΔL_{k,k+1}>T (threshold), transfer the tasks of the low-load layer to the high-load layer.

[0116] Dependency: The load balancing module relies on the real-time data of the load monitoring module and automatically adjusts task migration according to the load at each level to balance the load distribution at each level.

[0117] Optionally, the load balancing device of the multi-level systolic array further includes:

[0118] The intra-layer load management module is used to obtain the task priority of each target task in each layer; and allocate each target task to each computing unit according to the task priority and the computing resource amount of each computing unit in the layer, wherein the task priority is positively correlated with the computing resource amount.

[0119] Specifically, the intra-layer load management module includes:

[0120] Task scheduling model: In each level L_k, the load management module schedules tasks based on the load data, with the constraint ∑_{j=1}^{n_k}x_{j}*p_j≤R_k(f_k), where x_j is the task allocation variable and p_j is the task priority.

[0121] Priority allocation: By calculating the priority and complexity of the tasks, high-priority tasks are allocated to units with more resources to ensure maximum computing efficiency.

[0122] Dependency: The intra-layer load management module relies on the task migration information provided by the load balancing module to facilitate detailed allocation based on the real-time load and provide load information for the resource dynamic adjustment module.

[0123] Optionally, the load balancing device of the multi-level systolic array is further used for:

[0124] Obtaining the unit resource demand of each of the computing units;

[0125] When the sum of the resource requirements of each unit is greater than the resource requirements of the level, for each computing unit, the time slices of each target task are calculated according to the task priorities and preset weights of the tasks of each unit in the computing unit, wherein the sum of the time slices is less than the monitoring period;

[0126] The unit tasks are executed in turn according to the time slices.

[0127] Optionally, the load balancing device of the multi-level systolic array further includes:

[0128] The resource dynamic adjustment module is used to traverse each of the levels and, when the load of the current level is less than a preset first load threshold, reduce the operating voltage and operating frequency of the current level; when the load of the current level is greater than a preset second load threshold, restore the operating voltage and operating frequency of the current level, wherein the second load threshold is greater than the first load threshold.

[0129] Specifically, the resource dynamic adjustment module includes:

[0130] Power consumption optimization model: At low load levels, power consumption is optimized by reducing voltage V_k and frequency f_k. The power consumption is calculated as P_k(t)=V_k^2*f_k. The system dynamically adjusts V_k and f_k according to the load level to ensure the lowest power consumption that meets performance requirements.

[0131] Dynamic adjustment strategy: When the hierarchical load f_k(t) is lower than the threshold T_low, the resource adjustment module reduces the voltage and frequency; when the load f_k(t) exceeds T_high, the normal voltage and frequency are restored.

[0132] Dependencies: The resource dynamic adjustment module relies on the load data of the load management module within the layer to ensure dynamic power consumption adjustment under different layer load conditions, and at the same time pass the power consumption data to the feedback control module.

[0133] Optionally, the load balancing device of the multi-level systolic array further includes:

[0134] A feedback control module is used to calculate the overall performance of the systolic array according to the corresponding level weights preset for each level, each load and each resource demand, wherein the overall performance is used to characterize the overall efficiency of the systolic array.

[0135] Specifically, the feedback control module includes:

[0136] Performance index calculation: define the overall system performance index E=∑_{k=1}^{m}γ_k*(f_k / R_k), where γ_k is the level weight and E is used to evaluate resource utilization efficiency and computing performance.

[0137] Closed-loop feedback mechanism: When the system performance E is lower than the threshold E_min, the feedback module transmits the signal to the load monitoring module and the load balancing module to adjust the task allocation strategy; when E reaches the expected value, the current configuration is maintained.

[0138] Dependency: As the core of the closed-loop feedback mechanism, the feedback control module summarizes and analyzes the status data of each module, and dynamically adjusts the system's resource allocation strategy based on performance indicators to ensure optimal load balancing and energy efficiency.

[0139] The load balancing device for a multi-level systolic array provided by the present application adopts the load balancing method for a multi-level systolic array in the above embodiment, which can solve the technical problem of how to maintain the high efficiency of the systolic array while enhancing its flexibility and adaptability. Compared with the prior art, the beneficial effects of the load balancing device for a multi-level systolic array provided by the present application are the same as the beneficial effects of the load balancing method for a multi-level systolic array provided by the above embodiment, and other technical features in the load balancing device for a multi-level systolic array are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0140] The present application provides a load balancing device for a multi-level systolic array, and the load balancing device for the multi-level systolic array includes: at least one processor; and a memory that is communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can execute the load balancing method for the multi-level systolic array in the above-mentioned embodiment 1.

[0141] Reference below Figure 5, which shows a schematic diagram of the structure of a load balancing device of a multi-level systolic array suitable for implementing the embodiment of the present application. The load balancing device of the multi-level systolic array in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 5 The load balancing device of the multi-level systolic array shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0142] like Figure 5 As shown, the load balancing device of the multi-level systolic array may include a processing device 1001 (such as a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. Various programs and data required for the operation of the load balancing device of the multi-level systolic array are also stored in RAM1004. The processing device 1001, ROM1002 and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 1003 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 1009. The communication device 1009 can allow the load balancing device of the multi-level systolic array to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows a load balancing device of a multi-level systolic array with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.

[0143] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0144] The load balancing device for a multi-level systolic array provided by the present application adopts the load balancing method for a multi-level systolic array in the above embodiment, which can solve the technical problem of how to maintain the high efficiency of the systolic array while enhancing its flexibility and adaptability. Compared with the prior art, the beneficial effects of the load balancing device for a multi-level systolic array provided by the present application are the same as the beneficial effects of the load balancing method for a multi-level systolic array provided by the above embodiment, and other technical features in the load balancing device for a multi-level systolic array are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0145] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0146] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0147] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the load balancing method for the multi-level systolic array in the above-mentioned embodiment.

[0148] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0149] The computer-readable storage medium may be included in the load balancing device of the multi-level systolic array; or may exist independently without being assembled into the load balancing device of the multi-level systolic array.

[0150] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by the load balancing device of the multi-level systolic array, the load balancing device of the multi-level systolic array: monitors the load of each level in the systolic array in real time, wherein each level is arranged from high to low, and the height of the level is positively correlated with the complexity of the task that the level can handle; traverses each level except the highest level, and determines the high-level load of the target level that is one level higher than the current level; calculates the difference between the load of the current level and the high-level load, and if the difference is greater than a preset inter-layer threshold, transfers the task in the current level to the target level.

[0151] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0152] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0153] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0154] The readable storage medium provided in the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the load balancing method for the multi-level systolic array, and can solve the technical problem of how to enhance the flexibility and adaptability of the systolic array while maintaining its high efficiency. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in the present application are the same as the beneficial effects of the load balancing method for the multi-level systolic array provided in the above embodiment, and will not be elaborated here.

[0155] The present application also provides a computer program product, including a computer program, which implements the steps of the load balancing method for the multi-level systolic array as described above when the computer program is executed by a processor.

[0156] The computer program product provided by the present application can solve the technical problem of how to maintain the high efficiency of the systolic array while enhancing its flexibility and adaptability. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the load balancing method of the multi-level systolic array provided by the above embodiment, which will not be described in detail here.

[0157] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A load balancing method for a multi-level systolic array, characterized in that: The method comprises: Real-time monitoring of the load of each level in the systolic array, wherein the levels are arranged from high to low, and the level of the level is positively correlated with the complexity of the tasks that the level can handle; For each of the layers, a load change amount of the layer within a preset monitoring period is calculated in real time according to the load; Calculating the resource demand of each of the levels according to each of the loads and each of the load changes, wherein the sum of the resource demand is less than a preset total resource capacity; Allocating computing resources of the systolic array to each of the levels according to each of the resource requirements; Traversing each of the levels except the highest level, and determining a high-level load of a target level that is one level higher than the current level; The difference between the load of the current layer and the load of the higher layer is calculated, and if the difference is greater than a preset inter-layer threshold, the tasks in the current layer are transferred to the target layer.

2. The load balancing method for a multi-level systolic array as claimed in claim 1, characterized in that: The method further comprises: For each of the levels, obtaining the task priority of each target task in the level; Allocate each of the target tasks to each of the computing units according to the priority of each of the tasks and the amount of computing resources of each of the computing units in the hierarchy, wherein the priority of the task is positively correlated with the amount of computing resources.

3. The load balancing method for a multi-level systolic array as claimed in claim 2, characterized in that: After the step of allocating each of the target tasks to each of the computing units, the method further includes: Obtaining the unit resource demand of each of the computing units; When the sum of the resource requirements of each unit is greater than the resource requirements of the level, for each computing unit, the time slices of each target task are calculated according to the task priorities and preset weights of the tasks of each unit in the computing unit, wherein the sum of the time slices is less than the monitoring period; The unit tasks are executed in turn according to the time slices.

4. The load balancing method for a multi-level systolic array as claimed in claim 1, characterized in that: After the step of real-time monitoring the load of each level in the systolic array, the method further comprises: Traversing each of the levels, and when the load of the current level is less than a preset first load threshold, reducing the operating voltage and operating frequency of the current level; When the load of the current level is greater than a preset second load threshold, the operating voltage and operating frequency of the current level are restored, wherein the second load threshold is greater than the first load threshold.

5. The load balancing method for a multi-level systolic array as claimed in claim 1, characterized in that: The method further comprises: The overall performance of the systolic array is calculated according to the corresponding level weights preset for each level, each load and each resource demand, wherein the overall performance is used to characterize the overall efficiency of the systolic array.

6. A load balancing device for a multi-level systolic array, characterized in that: The device comprises: A load monitoring module, used to monitor the load of each level in the systolic array in real time, wherein the levels are arranged from high to low, and the level is positively correlated with the complexity of the tasks that the level can handle; A load balancing module is used to calculate, for each of the layers, the load change of the layer within a preset monitoring period in real time according to the load; calculate the resource demand of each layer according to each load and each load change, wherein the sum of each resource demand is less than a preset total resource capacity; allocate the computing resources of the pulsation array to each layer according to each resource demand; traverse each layer except the highest layer to determine the high-level load of the target layer that is one level higher than the current layer; calculate the difference between the load of the current layer and the high-level load, and if the difference is greater than a preset inter-layer threshold, transfer the task in the current layer to the target layer.

7. A load balancing device for a multi-level systolic array, characterized in that: The device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the load balancing method for a multi-level systolic array according to any one of claims 1 to 5.

8. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the load balancing method for a multi-level systolic array as described in any one of claims 1 to 5 are implemented.

9. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the load balancing method for a multi-level systolic array according to any one of claims 1 to 5 are implemented.

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