Display panel and display device

Abstract

This invention provides a display panel and a display device, relating to the field of display technology, for providing a display panel including at least two functional component areas. The display panel includes a display area and at least two functional component areas, the display area at least partially surrounding the functional component areas, and the at least two functional component areas at least partially overlapping along a first direction; the display area includes a plurality of first signal lines, at least a portion of which extend along the first direction; the plurality of first signal lines are arranged along a second direction, the second direction intersecting the first direction; the first signal lines include first-type signal lines and second-type signal lines; the first-type signal lines at least partially surround the at least two functional component areas; along the first direction, at least one second-type signal line is broken on both sides of one of the functional component areas.

Description

[Technical Field]

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. [Background Technology]

[0002] With the diversification of display panel designs, a solution has emerged that involves creating through-holes within the display area to house components such as cameras. Since these through-holes interrupt some signal lines, determining how to configure the signal lines corresponding to at least two through-holes has become a key research focus for researchers. [Summary of the Invention]

[0003] In view of this, embodiments of the present invention provide a display panel and a display device for providing a display panel including at least two functional component areas.

[0004] On one hand, embodiments of the present invention provide a display panel, including a display area and at least two functional component areas, wherein the display area at least partially surrounds the functional component areas, and along a first direction, the at least two functional component areas at least partially overlap.

[0005] The display area includes multiple first signal lines, at least a portion of which extend along a first direction; the multiple first signal lines are arranged along a second direction, which intersects with the first direction;

[0006] The first signal line includes first-class signal lines and second-class signal lines;

[0007] A first type of signal line at least partially surrounds at least two functional component areas; along a first direction, at least one second type of signal line is broken on both sides of one of the functional component areas.

[0008] On the other hand, embodiments of the present invention provide a display device including the display panel described above.

[0009] The display panel and display device provided in the embodiments of the present invention can ensure that the signals transmitted by the first type of signal lines are normally transmitted on both sides of the functional component area along the first direction by having the first type of signal lines at least partially surround at least two functional component areas, and ensure the normal operation of the sub-pixels located on both sides of the functional component area.

[0010] Furthermore, by disconnecting the second type of signal line on both sides of one of the functional component areas, the embodiments of the present invention can reduce the number of first connecting lines for connecting the second type of signal line in the corresponding functional component area. When the first connecting line is set in the first non-display area between the functional component area and the display area, the setting method provided by the embodiments of the present invention is beneficial to reducing the width of the corresponding first non-display area. [Attached Image Description]

[0011] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of a portion of a display panel provided in an embodiment of the present invention;

[0013] Figure 2 A schematic diagram of a portion of another display panel provided in an embodiment of the present invention;

[0014] Figure 3 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0015] Figure 4 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0016] Figure 5 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0017] Figure 6 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0018] Figure 7 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0019] Figure 8 A circuit diagram of a sub-pixel provided in an embodiment of the present invention;

[0020] Figure 9 This is a schematic diagram of the working timing of a pixel driving circuit provided in an embodiment of the present invention;

[0021] Figure 10 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0022] Figure 11 A schematic diagram of yet another display panel provided in an embodiment of the present invention;

[0023] Figure 12 A schematic diagram of yet another display panel provided in an embodiment of the present invention;

[0024] Figure 13 This invention provides a timing diagram of two pixel driving circuit rows in a pixel driving circuit group.

[0025] Figure 14 A schematic diagram of a functional signal line provided in an embodiment of the present invention;

[0026] Figure 15 A schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0027] Figure 16 for Figure 15 The diagram shows a timing diagram of a pixel driving circuit.

[0028] Figure 17 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0029] Figure 18 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0030] Figure 19 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0031] Figure 20 for Figure 8 and Figure 15 A schematic cross-sectional view of the third and fifth transistors in the pixel driving circuit shown;

[0032] Figure 21 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention;

[0033] Figure 22 This is an enlarged schematic diagram of a portion of a display panel provided in an embodiment of the present invention;

[0034] Figure 23 An enlarged schematic diagram of a portion of another display panel provided as an example of the present invention;

[0035] Figure 24 A schematic cross-sectional view of a first connecting line provided in an embodiment of the present invention;

[0036] Figure 25 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0037] Figure 26 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0038] Figure 27 A schematic diagram of a portion of a display panel provided in another embodiment of the present invention;

[0039] Figure 28 A schematic diagram of a portion of another display panel provided in an embodiment of the present invention;

[0040] Figure 29 A schematic diagram of a portion of another display panel provided in an embodiment of the present invention;

[0041] Figure 30 A schematic diagram of a portion of another display panel provided in an embodiment of the present invention;

[0042] Figure 31 This is a schematic diagram of a display device provided in an embodiment of the present invention.

Detailed Implementation Methods

[0043] To better understand the technical solution of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0044] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0045] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0046] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0047] It should be understood that although the terms "first," "second," etc., may be used to describe functional component areas in the embodiments of the present invention, these functional component areas should not be limited to these terms. These terms are only used to distinguish the various functional component areas from one another. For example, without departing from the scope of the embodiments of the present invention, a first functional component area may also be referred to as a second functional component area, and similarly, a second functional component area may also be referred to as a first functional component area.

[0048] This invention provides a display panel, such as... Figure 1 As shown, Figure 1This is a schematic diagram of a display panel provided in an embodiment of the present invention. The display panel includes a display area AA and at least two functional component areas DA. The display area AA at least partially surrounds the functional component areas DA, and the at least two functional component areas DA at least partially overlap along a first direction h1. In this embodiment of the present invention, the light transmittance of the functional component areas DA is greater than the optical transmittance of the display area AA. The display area AA includes a plurality of sub-pixels P. Exemplarily, the functional component areas DA do not include sub-pixels P.

[0049] In this embodiment of the invention, the functional component area DA can be configured in various ways. For example, the functional component area DA may include through-holes or blind holes. Through-holes penetrate the display panel in the thickness direction and can be obtained by cutting the display panel. Blind holes do not penetrate the display panel in the thickness direction and can be configured by avoiding the functional component area DA with sub-pixels to achieve a functional component area DA with higher light transmittance.

[0050] For example, the shapes of the at least two functional component regions DA described above may be the same or different. For example, embodiments of the present invention may also set the areas of the at least two functional component regions DA to be the same or different.

[0051] like Figure 1 As shown, the display area AA includes multiple first signal lines 1, at least a portion of which extend along a first direction h1; the multiple first signal lines 1 are arranged along a second direction h2, which intersects with the first direction h1. The first signal lines 1 are electrically connected to multiple sub-pixels P arranged along the first direction h1.

[0052] In this embodiment of the invention, the first signal line 1 includes a first type of signal line 11 and a second type of signal line 12. Both the first type of signal line 11 and the second type of signal line 12 correspond to functional component areas DA. In other words, along the first direction, both the first type of signal line 11 and the second type of signal line 12 at least partially overlap with the functional component areas DA. Specifically, in this embodiment of the invention, the first type of signal line 11 at least partially surrounds at least two functional component areas DA. Along the first direction h1, at least one second type of signal line 12 is broken on both sides of one of the functional component areas DA.

[0053] The display panel provided in this embodiment of the invention can ensure that the signals transmitted by the first type of signal lines 11 are normally transmitted on both sides of the functional component area DA along the first direction h1 by having the first type of signal lines 11 at least partially surround at least two functional component areas DA, thereby ensuring the normal operation of the sub-pixels located on both sides of the functional component area DA.

[0054] Furthermore, in this embodiment of the invention, the second type of signal line 12 is disconnected on both sides of one of the functional component areas DA, eliminating the need for connecting lines to connect the second type of signal lines 12 located on both sides of one of the functional component areas DA. If connecting lines to the second type of signal lines 12 are provided on the periphery of at least two functional component areas DA, it would significantly increase the load on the second type of signal lines, causing uneven load distribution between the second type of signal lines located in the corresponding functional component area DA and those not located in the corresponding functional component area DA. On the other hand, it would significantly increase the space occupied by the connecting lines, increasing the density of the second type of signal lines 12 and increasing the risk of signal crosstalk. Therefore, by disconnecting the second type of signal line 12 on both sides of one of the functional component areas DA, this embodiment of the invention can balance the load differences of the second type of signal lines 12 located at different positions on the display panel, reducing the space occupied by the connecting lines and avoiding signal crosstalk.

[0055] For example, such as Figure 1 As shown, the display panel includes a dummy line L extending along a second direction h2. Along a first direction h1, the display area AA includes a first edge S1 and a second edge S2, with the distance from the first edge S1 to the dummy line L being d1 and the distance from the second edge S2 to the dummy line L being d2, where 0.9 ≤ d1 / d2 ≤ 1.1. It can be understood that the distances from the dummy line L to the first edge S1 and the second edge S2 are approximately equal. The aforementioned at least two functional component areas DA include a first functional component area DA1 and a second functional component area DA2. The dummy line L passes through the first functional component area DA1. Along the first direction h1, the second type of signal line 12 is disconnected on both sides of the first functional component area DA1. This arrangement allows the load of the two second type of signal lines 12 disconnected on both sides of the first functional component area DA1 to tend to be consistent, which can improve the display uniformity of the sub-pixels connected to the two second type of signal lines 12 disconnected on both sides of the first functional component area DA1.

[0056] Optional, such as Figure 2 As shown, Figure 2 This is a schematic diagram of another display panel provided in an embodiment of the present invention. At least two functional component areas DA include a first functional component area DA1 and a second functional component area DA2. Along a first direction h1, the length of the display area is B, and the distance between the edge of the first functional component area DA1 and the edge of the display area AA is A, where B / 4 ≤ A ≤ B / 2. For example, as shown... Figure 2As shown, the display area AA includes a first edge S1 and a second edge S2 disposed opposite to each other along a first direction h1. The distance between the first functional component area DA1 and the first edge S1 can be A as described above. Alternatively, the distance between the first functional component area DA1 and the second edge S2 can be A as described above. In this embodiment of the invention, the second type of signal line 12 is disconnected on both sides of the first functional component area DA1 along the first direction h1. This embodiment of the invention avoids the first functional component area DA1 being too close to the first edge S1 and also avoids the first functional component area DA1 being too far from the first edge S1 by ensuring that the distance A between the first functional component area DA1 and the edge of the display area AA satisfies B / 4≤A≤B / 2; optionally, the value of A can be B / 3, ensuring that either of the two optical component areas can achieve a break-line setting corresponding to an optical area when the distance satisfies the value of A, thus expanding the selectivity of the break-line setting.

[0057] For example, such as Figure 3 As shown, Figure 3 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. At least two functional component areas DA include a first functional component area DA1 and a second functional component area DA2. Along the first direction h1, the length d1 of the first functional component area DA1 is greater than the length d2 of the second functional component area DA2. Along the first direction h1, the second type of signal line 12 is broken on both sides of the first functional component area DA1. Because the first functional component area DA1 is longer, the signal lines extending along the second direction h2 that are cut off (…) Figure 3 The number of (not shown) is also relatively large. In this embodiment of the invention, by disconnecting the second type of signal line 12 on both sides of the first functional component area DA1 which has a large length, the number of connecting lines that need to be set around the first functional component area DA1 to connect the second type of signal line 12 can be reduced, which is beneficial to reducing the width of the first non-display area NA1 around the first functional component area DA1.

[0058] For example, for the first functional component area DA1 with a larger length in the first direction h1, the embodiment of the present invention may also set it to pass through the above-mentioned dummy line L of the display panel, and / or, the embodiment of the present invention may also make the distance A between the first functional component area DA1 with a larger length in the first direction h1 and one edge of the display area AA satisfy B / 4≤A≤B / 2.

[0059] For example, such as Figure 1 , Figure 2 and Figure 3 As shown, the first signal line 1 includes a first connecting line 10, which electrically connects the first signal lines 1 located on both sides of at least one functional component region DA. For example, along the second direction h2, the first connecting line 10 at least partially overlaps with the functional component region DA.

[0060] For example, such as Figure 1 , Figure 2 and Figure 3 As shown, the first connection line 10 includes a first type connection line 101 and a second type connection line 102. The first type connection line 101 belongs to the first type signal line 11, and the second type connection line 102 belongs to the second type signal line 12. That is, the first type signal line 11 includes the first type connection line 101, and the first type connection line 101 is electrically connected to the first type signal lines 11 located on both sides of the functional component area DA. The second type signal line 12 includes the second type connection line 102, and the second type connection line 102 is connected to the second type signal lines 12 located on both sides of one of the functional component areas DA.

[0061] In embodiments of the present invention, such as Figure 1 , Figure 2 and Figure 3 As shown, the number of first-type connection lines 101 is greater than the number of second-type connection lines 102. Specifically, the first connection line 10 includes at least two first-type connection lines 101, and the first connection line 10 includes at least one second-type connection line 102. The at least two first-type connection lines 101 are respectively configured to correspond to at least two functional component areas DA. For example... Figure 1 , Figure 2 and Figure 3 As shown, when the display panel includes a first functional component area DA1 and a second functional component area DA2, one first-type connection line 101 is electrically connected to the first-type signal lines 11 located on both sides of the first functional component area DA1, and the other first-type connection line 101 is electrically connected to the first-type signal lines 11 located on both sides of the second functional component area DA2. When the second-type signal lines 12 are disconnected on both sides of the first functional component area DA1, the second-type connection line 102 is electrically connected to the second-type signal lines 12 located on both sides of the second functional component area DA2.

[0062] For example, such as Figure 1 , Figure 2 and Figure 3 As shown, the display panel also includes a first non-display area NA1 located between the functional component area DA and the display area AA along the second direction h2; at least a portion of the first connecting line 10 is located in the first non-display area NA1. For example, as... Figure 1 , Figure 2 and Figure 3 As shown, at least a portion of the first connecting line 10 extends along the edge of the nearest functional component area DA. For example, when at least a portion of the edge of the functional component area DA includes an arc, at least a portion of the first connecting line 10 may also be configured as an arc.

[0063] For example, in embodiments of the present invention, at least a portion of the aforementioned first connecting line 10 may be disposed in the display area AA. This arrangement helps to narrow the width of the first non-display area NA1. Figure 4 As shown, Figure 4 This is a schematic diagram of a partial area of ​​a display panel according to another embodiment of the present invention. The first connecting line 10 includes a first type of connecting line 101 and a second type of connecting line 102. At least a portion of the first type of connecting line 101 is located in display area AA, and at least a portion of the second type of connecting line 102 is located in display area AA. Alternatively, in this embodiment of the invention, one of the first type of connecting line 101 and the second type of connecting line 102 may be located in display area AA, and the other in a first non-display area NA1; this is not illustrated in the accompanying drawings.

[0064] When at least a portion of the first connecting line 10 is disposed in the display area AA, exemplarily, in combination with Figure 4 As shown, the first connecting line 10 includes a first segment 1001 and a second segment 1002 electrically connected, wherein the first segment 1001 and the second segment 1002 extend in different directions. For example, as... Figure 4 As shown, the first segment 1001 extends along the first direction h1, and the second segment 1002 extends along the second direction h2. Optionally, the first segment 1001 and the second segment 1002 may be located in the same film layer; or they may be located in different film layers, and the two may be connected by vias.

[0065] For example, such as Figure 5 As shown, Figure 5 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. The display panel further includes a second non-display area NA2, which is disposed on the side of the display area AA away from the functional component area DA; at least a portion of the first connecting line 10 is located in the second non-display area NA2. Figure 5 The diagram shows a configuration where the first segment 1001 of the first type of connecting line 101 is located in the second non-display area NA2, and the first segment 1001 and the second segment 1002 of the second type of connecting line 102 are located in the display area AA. This configuration avoids interference from other signal lines transmitting different signals located in the display area AA.

[0066] For example, the display panel includes multiple first signal lines 1 corresponding to the functional component area DA, and along the second direction h2, multiple first connecting lines 10 included in the multiple first signal lines 1 are located on the same side of the functional component area DA. Figure 6 As shown, Figure 6This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. The display panel includes a first functional component area DA1 and a second functional component area DA2. The display panel includes three first signal lines 1 corresponding to the first functional component area DA1 and the second functional component area DA2. Two of the three first signal lines 1 are first type signal lines 11, and the other is a second type signal line 12. The second type signal line 12 is disconnected on both sides of the first functional component area DA1, and the portions of the second type signal line 12 on both sides of the second functional component area DA2 are electrically connected by first connecting lines 10. In the first functional component area DA1, both first connecting lines 10 are located on the upper side of the first functional component area DA1. In the second functional component area DA2, all three first connecting lines 10 are located on the upper side of the second functional component area DA2. Of course, in this embodiment of the present invention, multiple first connecting lines 10 can also be arranged on the lower side of the first functional component area DA1 and the second functional component area DA2, which will not be illustrated in the accompanying drawings.

[0067] It should be noted that, in the appendix Figure 6 The first connecting line 10 shown in the diagram is disposed in the first non-display area NA1. Of course, the embodiments of the present invention are not limited to the above positions. The first connecting line 10 described in the above embodiments can also be disposed in the second non-display area NA2, or in the display area AA, or in at least two positions in the first non-display area NA1, the second non-display area NA2 and the display area AA.

[0068] Alternatively, along the second direction h2, in this embodiment of the invention, a portion of the first connecting lines 10 included in the first signal lines 1 may be disposed on one side of the functional component area DA, and another portion of the first connecting lines 10 included in the first signal lines 1 may be disposed on the other side of the functional component area DA. For example... Figure 7 As shown, Figure 7This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. The display panel includes a first functional component area DA1 and a second functional component area DA2. The display panel includes three first signal lines 1 corresponding to the first functional component area DA1 and the second functional component area DA2. Two of the three first signal lines 1 are first-type signal lines 11, and the remaining one is a second-type signal line 12. The second-type signal line 12 is disconnected on both sides of the first functional component area DA1, and portions of the second-type signal line 12 on both sides of the second functional component area DA2 are electrically connected by first connecting lines 10. In the first functional component area DA1, one first connecting line 10 is located on the upper side of the first functional component area DA1, and the other first connecting line 10 is located on the lower side of the first functional component area DA1. In the second functional component area DA2, two first connecting lines 10 are located on the upper side of the second functional component area DA2, and the other first connecting line 10 is located on the lower side of the second functional component area DA2. Of course, in the second functional component area DA2, in this embodiment of the invention, two of the first connecting lines 10 may be disposed on the lower side of the second functional component area DA2, and the other first connecting line 10 may be disposed on the upper side of the second functional component area DA2. This embodiment of the invention does not limit the number of first connecting lines.

[0069] In this embodiment of the invention, the first connecting line 10 can also be set at at least one of the first non-display area NA1, the second non-display area NA2, and the display area AA. This application embodiment does not impose any restrictions.

[0070] Optionally, along the second direction h2, in this embodiment of the invention, the number of first connecting lines 10 located on both sides of the functional component area DA can be set to be equal, so that the width of the first non-display area NA1 on both sides of the functional component area DA tends to be consistent.

[0071] For example, in combination Figure 8 As shown, Figure 8 This is a circuit diagram of a sub-pixel P provided in an embodiment of the present invention. The sub-pixel P includes a pixel driving circuit 400 and a light-emitting element 500 electrically connected. The pixel driving circuit 400 includes a driving transistor M0, a light-emitting control module 41, a gate reset module 42, a data writing module 43, a threshold compensation module 44, and a light-emitting element reset module 45.

[0072] The control electrode of the driving transistor M0 is electrically connected to the first node N1, the first electrode of the driving transistor M0 is electrically connected to the second node N2, and the second electrode of the driving transistor M0 is electrically connected to the third node N3.

[0073] The light-emitting control module 41 includes a first sub-control module 411 and a second sub-control module 412. The input terminal of the first sub-control module 411 is electrically connected to the first power supply voltage line PVDD, and its output terminal is electrically connected to the first electrode of the driving transistor M0. The input terminal of the second sub-control module 412 is electrically connected to the second electrode of the driving transistor M0, and its output terminal is electrically connected to the first electrode of the light-emitting element 500. The second electrode of the light-emitting element 500 is electrically connected to the second power supply voltage line PVEE. The control terminals of both the first sub-control module 411 and the second control module 412 are electrically connected to the light-emitting control signal line EM.

[0074] The control terminal of the gate reset module 42 is electrically connected to the first scan control signal line SN1, the input terminal is electrically connected to the first reset signal line Ref1, and the output terminal is electrically connected to the gate of the driving transistor M0.

[0075] The control terminal of the data writing module 43 is electrically connected to the second scan control signal line SP, the input terminal is electrically connected to the data signal line Vdata, and the output terminal is electrically connected to the first pole of the driving transistor M0.

[0076] The control terminal of the threshold compensation module 44 is electrically connected to the third scan control signal line SN2, the input terminal is electrically connected to the second pole of the driving transistor M0, and the output terminal is electrically connected to the gate of the driving transistor M0.

[0077] The control terminal of the light-emitting element reset module 45 is electrically connected to the fourth scan control signal line SP*, the input terminal is electrically connected to the second reset signal line Ref2, and the output terminal is electrically connected to the first electrode of the light-emitting element 500.

[0078] For example, such as Figure 8 As shown, the first sub-control module 411 includes a first transistor M1, the second sub-control module 412 includes a second transistor M2, the gate reset module 42 includes a third transistor M3, the data writing module 43 includes a fourth transistor M4, the threshold compensation module 44 includes a fifth transistor M5, and the light-emitting element reset module 45 includes a sixth transistor M6. The pixel driving circuit 400 also includes a storage capacitor Cst. The first plate of the storage capacitor Cst is electrically connected to the first node N1, and the second plate is electrically connected to the first power supply voltage line PVDD.

[0079] For example, the third transistor M3 and the fifth transistor M5 can be oxide transistors, such as indium gallium zinc oxide (IGZO) transistors, to give the third transistor M3 and the fifth transistor M5 a smaller off-state leakage current and improve the potential stability of the first node N1. In particular, when the display panel is displayed in low-frequency mode, the potential of the first node N1 needs to be maintained for a longer time. Setting the third transistor M3 and the fifth transistor M5, which are electrically connected to the first node N1, as indium gallium zinc oxide transistors can ensure the brightness uniformity of the light-emitting element 500 under low-frequency display.

[0080] like Figure 9 As shown, Figure 9 This is a schematic diagram of the working timing of a pixel driving circuit provided in an embodiment of the present invention. The working process of the pixel driving circuit includes a reset stage t1, a charging stage t2, and a light emission stage t3.

[0081] During the reset phase t1, the first scan control signal line SN1 controls the third transistor M3 to turn on, and the first reset signal provided by the first reset signal line Ref1 resets the first node N1 through the third transistor M3.

[0082] During the charging phase t2, the second scan control signal line SP controls the fourth transistor M4 to turn on, and the data voltage Vdata provided by the data voltage terminal Vdata... data The fourth transistor M4 writes to the second node N2. This turns on the driving transistor M0. During this phase, the third scan control signal line SN2 controls the fifth transistor M5 to turn on. Throughout this process, the potential of the first node N1 continuously changes until the potential V of the first node N1 reaches its maximum. N1 Change to V N1 =V data -|V th |,V th This is the threshold voltage for driving transistor M0. Optionally, in this stage, the fourth scan control signal line SP* controls the sixth transistor M6 to turn on, and the second reset signal provided by the second reset signal line Ref2 resets the light-emitting element 500 through the sixth transistor M6. Exemplarily, the first reset signal and the second reset signal can be equal. Exemplarily, the signal provided by the fourth scan control signal line SP* can be the same as the signal provided by the second scan control signal line SP. For example, the fourth scan control signal line SP* and the second scan control signal line SP can be electrically connected.

[0083] During the light-emitting stage t3, the first transistor M1, the second transistor M2, and the driving transistor M0 are turned on, while the third transistor M3, the fourth transistor M4, and the fifth transistor M5 are all turned off, and the light-emitting element 500, which is electrically connected to the pixel driving circuit 400, is lit.

[0084] For example, the second type of signal line 12 described above includes a control signal line. A control signal line refers to a signal line electrically connected to the control electrode of a portion of the transistors in the pixel driving circuit 400 described above.

[0085] For example, such as Figure 10 As shown, Figure 10 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. The display panel further includes a second non-display area NA2, which at least partially surrounds the display area AA. The second non-display area NA2 includes a first type of driving circuit 31 and a second type of driving circuit 32. The first type of driving circuit 31 is electrically connected to the aforementioned first type of signal line 11 and is located on one side of the display area AA along a first direction h1. The second type of driving circuit 32 is electrically connected to the control signal line 121 and is arranged on both sides of the display area AA along the first direction h1. That is, the second type of driving circuit 32 adopts a bilateral driving method, while the first type of driving circuit 31 adopts a single-sided driving method. By setting the second type of driving circuit 32 to a bilateral driving method, the present invention can reduce the voltage drop of the signal provided by the second type of driving circuit 32 on the control signal line 121, avoid large delays in the signal provided by the second type of driving circuit 32, and ensure signal accuracy. Furthermore, by disconnecting the control signal line 121 at the location of one of the functional component areas DA, the control signal lines 121 located on both sides of the functional component area DA can receive signals through the two second-type driving circuits 32 located on both sides of the display area AA, thereby ensuring the normal driving of the sub-pixels P located on both sides of the functional component area DA.

[0086] For example, in combination Figure 11 and Figure 12 As shown, Figure 11 and Figure 12The following are schematic diagrams of two other display panels provided in embodiments of the present invention. The display area AA includes multiple pixel driving circuit groups 4 arranged along a second direction h2. Each pixel driving circuit group 4 includes at least two pixel driving circuit rows 40 arranged along the second direction h2. Each pixel driving circuit row 40 includes multiple pixel driving circuits 400 arranged along a first direction h1. A first-type driving circuit 31 includes multiple cascaded first-type driving units 310, and a second-type driving circuit 32 includes multiple cascaded second-type driving units 320. The same first-type driving unit 310 is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4 via at least two first-type signal lines 11. That is, the first-type driving circuit 31 can be a driving circuit employing a one-to-many driving method in embodiments of the present invention. The same second-type driving unit 320 is electrically connected to the same pixel driving circuit row 40 via a second-type signal line 12. That is, the second-type driving circuit 32 can be a driving circuit employing a one-to-one driving method in embodiments of the present invention.

[0087] like Figure 11 As shown, the display panel includes a light-emitting control circuit EM_V, a first scan control circuit SN1_V, a second scan control circuit SP_V, a third scan control circuit SN2_V, and a fourth scan control circuit SP*_V. The light-emitting control circuit EM_V is electrically connected to the light-emitting control signal line EM; the first scan control circuit SN1_V is electrically connected to the first scan control signal line SN1; the second scan control circuit SP_V is electrically connected to the second scan control signal line SP; the third scan control circuit SN2_V is electrically connected to the third scan control signal line SN2; and the fourth scan control circuit SP*_V is electrically connected to the fourth scan control signal line SP*.

[0088] In this embodiment of the invention, the first type of signal line 11 includes at least one of the following: a light emission control signal line EM, a first scan control signal line SN1, a third scan control signal line SN2, and a fourth scan control signal line SP*. Correspondingly, as... Figure 11 As shown, the first type of driving circuit 31 includes at least one of the following: a light-emitting control circuit EM_V, a first scan control circuit SN1_V, a third scan control circuit SN2_V, and a fourth scan control circuit SP*_V. The control signal line 121 includes a second scan control signal line SP. Correspondingly, as... Figure 11 As shown, the second type of driving circuit 32 includes a second scan control circuit SP_V. That is, in this embodiment of the invention, at least one of the light emission control signal line EM, the first scan control signal line SN1, the third scan control signal line SN2, and the fourth scan control signal line SP* can be kept continuous at each functional component area DA, while the second scan control signal line SP can be disconnected at one of the functional component areas DA.

[0089] For example, in combination Figure 8 and Figure 13 As shown, Figure 13 The present invention provides a timing diagram of two pixel driving circuit rows in a pixel driving circuit group. The two pixel driving circuit rows receive the same light emission control signal, the same first scan control signal, the same third scan control signal, and the same fourth scan control signal. The two pixel driving circuit rows are electrically connected to two second scan driving units respectively. Figure 13 In this diagram, EM represents the signal of the light emission control signal line connected to these two pixel driving circuit rows, SN1 represents the signal of the first scan control signal line connected to these two pixel driving circuit rows, SN2 represents the signal of the third scan control signal line connected to these two pixel driving circuit rows, SP* represents the signal of the fourth scan control signal line connected to these two pixel driving circuit rows, SP_1 represents the signal of the second scan control signal line connected to one of the pixel driving circuit rows, and SP_2 represents the signal of the second scan control signal line connected to the other pixel driving circuit row. Figure 13 As can be seen, the pulse widths of the signals provided by the second scan control signal line SP_1 and the second scan control signal line SP_2 are both smaller than the pulse width of the signal provided by the light emission control signal line EM. The pulse widths of the signals provided by the second scan control signal line SP_1 and the second scan control signal line SP_2 are both smaller than the pulse width of the signal provided by the first scan control signal line SN1. The pulse widths of the signals provided by the second scan control signal line SP_1 and the second scan control signal line SP_2 are both smaller than the pulse width of the signal provided by the third scan control signal line SN2. The pulse widths of the signals provided by the second scan control signal line SP_1 and the second scan control signal line SP_2 are both smaller than the pulse width of the signal provided by the fourth scan control signal line SP*.

[0090] In this embodiment of the invention, by configuring the control signal line 121 to include a second scan control signal line SP, that is, by disabling the second scan control signal line SP at one of the functional component areas DA, and by using a bilateral driving method for the second scan control circuit SP_V, the attenuation of the signal transmitted by the second scan control signal line SP can be reduced during the transmission of the second scan control signal on the second scan control signal line SP, thereby ensuring the accurate output of the signal with a small pulse width transmitted by the second scan control signal line SP.

[0091] For example, such as Figure 12As shown, the display panel also includes at least one first connection line 51, and the first type of signal line 11 that transmits the same signal and is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4 is electrically connected to the same first connection line 51. The first connection line 51 is electrically connected to the first type of connection line 101 provided in the corresponding functional component area DA.

[0092] Specifically, the first type of signal line 11, which transmits the same signal and is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4, is electrically connected to the same first connection line 51, including:

[0093] The light emission control signal line EM, which is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4, is electrically connected to the same first connection line 51; the first scan control signal line SN1, which is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4, is electrically connected to the same first connection line 51; the third scan control signal line SN2, which is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4, is electrically connected to the same first connection line 51; and the fourth scan control signal line SP*, which is electrically connected to at least two pixel driving circuit rows 40 in the same pixel driving circuit group 4, is electrically connected to the same first connection line 51.

[0094] This configuration reduces the number of first-type connection lines 101. When the first-type connection lines 101 are placed in the first non-display area NA1, it helps to reduce the width of the first non-display area NA1. When the first-type connection lines 101 are placed in the display area AA, it helps to reduce mutual interference between the first-type connection lines 101 and other types of signals transmitted in the display area AA. Figure 11 and Figure 12 A pixel driving circuit group 4 includes two pixel driving circuit rows 40 as an example.

[0095] Optionally, the second type of signal line 12 described above also includes functional signal lines used to transmit constant signals. Functional signal lines refer to signal lines electrically connected to at least a portion of the input terminals of the transistors in the pixel driving circuit 400. For example, as... Figure 14 As shown, Figure 14This is a schematic diagram of a functional signal line 122 provided in an embodiment of the present invention. At least a portion of the functional signal line 122 extends along a first direction h1. A portion of the functional signal line 122 is disconnected at one of the functional component areas DA. Optionally, the display panel may also provide a functional signal connection line (not shown) extending along a second direction h2 to connect the functional signal line 122 that is disconnected at one of the functional component areas DA. Alternatively, in this embodiment of the present invention, functional signal buses (not shown) may be respectively provided in the non-display areas located on both sides of the display area AA.

[0096] For example, in an embodiment of the present invention, the functional signal line 122 includes the aforementioned first reset signal line Ref1. That is, in an embodiment of the present invention, the first reset signal line Ref1 can be disconnected on both sides of at least one functional component area DA. By disconnecting the first reset signal line Ref1 on both sides of one of the functional component areas DA, the present invention can avoid setting too many connecting lines around the functional component area DA, which is beneficial to reducing the width of the first non-display area NA1 around the functional component area DA.

[0097] For example, the functional signal line 122 includes a second reset signal line Ref2. That is, in embodiments of the present invention, the second reset signal line Ref2 can be disconnected on both sides of one of the functional component areas DA.

[0098] For example, such as Figure 15 As shown, Figure 15 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention. The pixel driving circuit 400 further includes a bias adjustment module 46, which is electrically connected to the aforementioned fourth scan control signal line SP* and adjustment signal line DVH. For example, as shown... Figure 15 As shown, the bias adjustment module 46 includes a sixth transistor M6. The gate of the sixth transistor M6 is electrically connected to the fourth scan control signal line SP*. The first terminal of the bias adjustment module 46 is electrically connected to the adjustment signal line DVH. The second terminal of the sixth transistor M6 is electrically connected to the first terminal of the driving transistor M0.

[0099] Combination Figure 16 As shown, Figure 16 for Figure 15 The diagram shows a timing diagram of a pixel driving circuit. In addition to the reset phase t1, charging phase t2, and light emission phase t3, the pixel driving circuit also includes a modulation phase t4. The modulation phase t4 is located between the charging phase t2 and the light emission phase t3. In the modulation phase t4, the fourth scan control signal line SP* controls the sixth transistor M6 to turn on. The bias voltage provided by the adjustment signal line DVH is written to the first terminal of the driving transistor M0 through the sixth transistor M6, adjusting the bias state of the driving transistor M0.

[0100] For example, the aforementioned functional signal line 122 includes an adjustment signal line DVH. That is, in this embodiment of the invention, the adjustment signal line DVH can be disconnected on both sides of one of the functional component areas DA. This configuration reduces the number of connecting lines required to connect the adjustment signal line DVH at the corresponding functional component area DA, which is beneficial for reducing the width of the first non-display area NA1 on both sides of the functional component area DA.

[0101] It should be noted that, Figure 15 The illustration showing the bias adjustment module 46 and the light-emitting element reset module 45 being electrically connected to the fourth scan control signal line SP* is merely illustrative. When the modulation stage t4 is positioned between the charging stage t2 and the light-emitting stage t3, and when the reset operation of the light-emitting element is performed before the light-emitting stage t3, the bias adjustment module 46 and the light-emitting element reset module 45 can also be electrically connected to other different signal lines. For example, when the types of the sixth transistor M6 and the third transistor M3 are set to the same, this embodiment of the invention can also connect both the sixth transistor M6 and the third transistor M3 to the aforementioned first scan control signal line SN1; this embodiment of the invention is not limited in this respect.

[0102] For example, the second type of signal line 12 includes N functional signal lines 122. In this embodiment of the invention, the N functional signal lines 122 are electrically connected to M second type of connection lines 102, where 1 ≤ M ≤ N; M and N are both integers. Figure 17 As shown, Figure 17 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention, wherein M=1, N=2, that is, the display panel includes two functional signal lines 122 corresponding to the functional component area DA, and these two functional signal lines 122 are electrically connected by a second type of connection line 102. This arrangement reduces the number of connection lines around the functional component area DA and reduces the width of the first non-display area NA1 surrounding the functional component area DA.

[0103] Or, such as Figure 18 As shown, Figure 18 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention, wherein M=N=2, that is, the display panel includes two functional signal lines 122 corresponding to the functional component area DA, and these two functional signal lines 122 are electrically connected by two second-type connection lines 102. This arrangement allows the functional signal lines 122 located on both sides of the functional component area DA along the first direction h1 to be connected through more branches, which helps to reduce signal attenuation of the functional signals during transmission.

[0104] When the first type of signal line 11 is configured to include a light emission control signal line EM, a first scan control signal line SN1, a third scan control signal line SN2, and a fourth scan control signal line SP*, for example, as follows: Figure 19 As shown, Figure 19 This is a schematic diagram of a portion of a display panel provided in another embodiment of the present invention. Along the second direction h2, the first scan control signal line SN1, the second scan control signal line SP, the third scan control signal line SN2, the light emission control signal line EM, the fourth scan control signal line SP*, the second reset signal line Ref2, the adjustment signal line DVH, and the first reset signal line Ref1 are arranged in sequence.

[0105] Optional, such as Figure 20 As shown, Figure 20 This is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention. The display panel includes a first metal layer T0, a second metal layer T1, a third metal layer TC, a fourth metal layer TG, and a fifth metal layer T2 stacked along the thickness direction of the display panel.

[0106] like Figure 20 As shown, Figure 20 This is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention. The display panel further includes a first semiconductor layer I1 and a second semiconductor layer I2. Optionally, the first semiconductor layer I1 includes polysilicon, and the second semiconductor layer I2 includes indium gallium zinc oxide. For example, as shown... Figure 20 As shown, the third transistor M3 includes a first gate G31 and a second gate G32 arranged along the thickness direction of the display panel. Along the thickness direction of the display panel, the active layer of the third transistor M3 is located in the second semiconductor layer I2, which is situated between the first gate G31 and the second gate G32. This dual-gate configuration, including the first gate G31 and the second gate G32, is beneficial for improving the operating performance of the third transistor M3. For example, as... Figure 20 As shown, the first gate G31 is located in the fourth metal layer TG, and the second gate G32 is located in the third metal layer TC.

[0107] For example, such as Figure 20 As shown, the display panel also includes a sixth metal layer T3 and a seventh metal layer TR. For example, the seventh metal layer TR can be used to form the electrodes of the light-emitting element.

[0108] Optional, such as Figure 21 As shown, Figure 21This is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention. The first scan control signal line SN1 includes a first sub-line X1 and a second sub-line X2. The first sub-line X1 is located in the third metal layer TC, and the second sub-line X2 is located in the fourth metal layer TG. The first sub-line X1 is electrically connected to the first gate G31 of the third transistor M3, and the second sub-line X2 is electrically connected to the second gate G32 of the third transistor M3. The first sub-line X1 and the second sub-line X2 are located in the non-display areas on both sides of the display area AA. Figure 21 All points (not shown) are electrically connected. That is, the first scan control signal line SN1 includes a first sub-line X1 and a second sub-line X2 connected in parallel.

[0109] Optional, such as Figure 21 As shown, the second scan control signal line SP is located in the second metal layer T1.

[0110] For example, continue to refer to Figure 20 As shown, the fifth transistor M5 includes a first gate G51 and a second gate G52 arranged along the thickness direction of the display panel. Along the thickness direction of the display panel, the active layer I5 of the fifth transistor M5 is located between the first gate G51 and the second gate G52. This dual-gate configuration, including the first gate G51 and the second gate G52, is beneficial for improving the operating performance of the fifth transistor M5. For example, as... Figure 20 As shown, the first gate G51 is located in the fourth metal layer TG, and the second gate G52 is located in the third metal layer TC.

[0111] Correspondingly, such as Figure 21 As shown, the third scan control signal line SN2 includes a first sub-line X1 and a second sub-line X2 connected in parallel. The first sub-line X1 is located in the third metal layer TC, and the second sub-line X2 is located in the fourth metal layer TG.

[0112] Optional, such as Figure 21 As shown, the light emission control signal line EM, the fourth scan control signal line SP*, and the first reset signal line Ref1 are located in the second metal layer T1.

[0113] For example, such as Figure 21 As shown, in this embodiment of the invention, the second reset signal line Ref2 can be disposed on the fifth metal layer T2. Exemplarily, the fifth metal layer T2 may include a material with good conductivity. By disposing the second reset signal line Ref2 on the fifth metal layer T2, this embodiment of the invention can reduce the resistance of the second reset signal line Ref2, which is beneficial for signal transmission on the second reset signal line Ref2. Exemplarily, the material of the fifth metal layer T2 includes one or more of molybdenum, titanium, aluminum, and copper. Optionally, the fifth metal layer T2 includes titanium-aluminum-titanium.

[0114] For example, such as Figure 21As shown, the aforementioned adjustment signal line DVH is located in the fourth metal layer TG.

[0115] For example, when setting each of the above-mentioned first contact wires 51, for example, such as Figure 22 As shown, Figure 22 This is an enlarged schematic diagram of a portion of a display panel according to an embodiment of the present invention. In this embodiment, the first connection wire 51 electrically connected to the first scan control signal line SN1, the first connection wire 51 electrically connected to the third scan control signal line SN2, the first connection wire 51 electrically connected to the light emission control signal line EM, the first connection wire 51 electrically connected to the fourth scan control signal line SP*, the first connection wire 51 electrically connected to the adjustment signal line DVH, and the first connection wire 51 electrically connected to the first reset signal line Ref1 are all disposed on the fifth metal layer T2. This arrangement reduces the resistance of each of the first connection wires 51. Figure 22 In this context, different fill patterns represent different metal layers.

[0116] For example, such as Figure 22 As shown, in this embodiment of the invention, the first bonding wire 51, which is electrically connected to the second reset signal line Ref2, can be disposed on a first metal layer T0 that is different from the fifth metal layer T2.

[0117] Or, such as Figure 23 As shown, Figure 23 This is an enlarged schematic diagram of a portion of a display panel provided in another example of the present invention. In this embodiment of the present invention, the first connection wire 51 electrically connected to the second reset signal line Ref2 can also be disposed on the fifth metal layer T2 with good conductivity. That is, the first connection wire 51 electrically connected to the second reset signal line Ref2 is disposed on the same layer as other first connection wires 51 to reduce the resistance of the first connection wire 51 electrically connected to the second reset signal line Ref2 and simplify the manufacturing process of the display panel.

[0118] For example, when setting the first connecting lines 10 described above, the second type of connecting lines 102 can be disposed on the fourth metal layer TG. Optionally, along a direction perpendicular to the plane of the display panel, the second type of connecting lines 102 can at least partially overlap with the traces located on the second metal layer T1 to reduce the space occupied by the connecting lines.

[0119] For example, along the second direction h2, embodiments of the present invention can have at least a portion of the first connecting lines 10 alternately distributed on at least two metal layers. With this arrangement, while ensuring good insulation of the first connecting lines 10 transmitting different signals, the distance between two first connecting lines 10 located in different metal layers can be set smaller, and when the first connecting lines 10 are disposed in the first non-display area NA1 surrounding the functional component area DA, the width of the first non-display area NA1 can be reduced.

[0120] For example, in this embodiment of the invention, the width of the first connection line 10 located in one metal layer can be set to 1.6 μm, and the width of the first connection line 10 located in another metal layer can be set to 1.7 μm. The distance between two adjacent first connection lines 10 in the two metal layers can be set to 1.6 μm or 1.5 μm. For example, in the two metal layers, the line widths of the alternately arranged first connection lines 10 are 1.6 μm and 1.7 μm, that is, first connection lines with a line width of 1.6 μm and first connection lines with a line width of 1.7 μm are alternately arranged; the line spacing between two adjacent alternately arranged first connection lines 10 is 1.6 μm and 1.5 μm, that is, line spacing of 1.6 μm and line spacing of 1.5 μm are alternately arranged. By setting the alternately arranged first connection lines with different line widths and different line spacings, the load uniformity of signal lines in different film layers can be achieved.

[0121] Optionally, in this embodiment of the invention, the first type of connection line 101 corresponding to the first scan control signal line SN1, the first type of connection line 101 corresponding to the light emission control signal line EM, the first type of connection line 101 corresponding to the third scan control signal line SN2, and the first type of connection line 101 corresponding to the fourth scan control signal line SP* can be respectively disposed on the second metal layer T1 and the third metal layer TC. Optionally, in this embodiment of the invention, the first type of connection line 101 corresponding to the first scan control signal line SN1, the light emission control signal line EM, the first type of connection line 101 corresponding to the third scan control signal line SN2, and the first type of connection line 101 corresponding to the fourth scan control signal line SP* can be alternately routed on the second metal layer T1 and the third metal layer TC.

[0122] Optionally, in this embodiment of the invention, the line width of the first type of connection line 101 located on the second metal layer T1 can be 1.6 μm, the line width of the first type of connection line 101 located on the third metal layer TC can be 1.7 μm, and the distance between the orthographic projections of the first type of connection line 101 located on the second metal layer T1 and the adjacent first type of connection line 101 located on the third metal layer TC on the plane where the display panel is located can be 1.6 μm.

[0123] For example, in combination Figure 22 and Figure 24As shown, Figure 24 This is a cross-sectional schematic diagram of a first connection line provided in an embodiment of the present invention. The first type of connection line 101 corresponding to the first scan control signal line SN1, the second type of connection line 102 corresponding to one second scan control signal line SP, the first type of connection line 101 corresponding to the third scan control signal line SN2, the first type of connection line 101 corresponding to the light emission control signal line EM, the first type of connection line 101 corresponding to the fourth scan control signal line SP*, the second type of connection line 102 corresponding to another second scan control signal line SP, the first type of connection line 101 corresponding to the adjustment signal line DVH, and the first type of connection line 101 corresponding to the first reset signal line Ref1 are alternately arranged in the fourth metal layer TG and the second metal layer T1. Along the direction perpendicular to the plane of the display panel, the distance between the fourth metal layer TG and the second metal layer T1 is relatively large. By selecting these two metal layers to set the aforementioned first connection lines 10, this embodiment of the present invention helps to reduce crosstalk between first connection lines 10 transmitting different signals.

[0124] For example, in combination Figure 22 and Figure 24 As shown, in this embodiment of the invention, the second type of connection line 102 corresponding to the second reset signal line Ref2 can be located in the first metal layer T0.

[0125] For example, in combination Figure 23 and Figure 25 As shown, Figure 25 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. A first type of connection line 101 corresponding to a first scan control signal line SN1, a second type of connection line 102 corresponding to a second scan control signal line SP, a third scan control signal line SN2, a first type of connection line 101 corresponding to a light emission control signal line EM, a first type of connection line 101 corresponding to a fourth scan control signal line SP*, a second type of connection line 102 corresponding to an adjustment signal line DVH, a second type of connection line 102 corresponding to a first reset signal line Ref1, and another second type of connection line 102 corresponding to a second scan control signal line SP and a second type of connection line 102 corresponding to a second reset signal line Ref2 are alternately arranged in a first metal layer T0, a second metal layer T1, and a fourth metal layer TG. This arrangement fully utilizes the space occupied by these three metal layers, avoids placing too many connection lines in the same metal layer, and increases the distance between two adjacent first connection lines in the same metal layer within a certain space, which helps reduce crosstalk and the possibility of signal short circuits.

[0126] For example, continue to refer to Figure 19As shown, along the second direction h2, the first type of connection line 101 corresponding to the first scan control signal line SN1, the second type of connection line 102 corresponding to one of the second scan control signal lines SP_1 electrically connected to the same pixel driving circuit group 4, the first type of connection line 101 corresponding to the third scan control signal line SN2, the first type of connection line 101 corresponding to the light emission control signal line EM, the first type of connection line 101 corresponding to the fourth scan control signal line SP*, the second type of connection line 102 corresponding to another second scan control signal line SP_2 electrically connected to the same pixel driving circuit group 4, the second type of connection line 102 corresponding to the second reset signal line Ref2, the second type of connection line 102 corresponding to the adjustment signal line DVH, and the second type of connection line 102 corresponding to the first reset signal line Ref1 are arranged in sequence.

[0127] For example, such as Figure 26 As shown, Figure 26 This is a schematic diagram of a portion of a display panel provided in another embodiment of the present invention. Along the second direction h2, the following are arranged in sequence: a first type of connection line 101 corresponding to the first scan control signal line SN1; a second type of connection line 102 corresponding to one of the second scan control signal lines SP_1 electrically connected to the same pixel driving circuit group 4; a first type of connection line 101 corresponding to the third scan control signal line SN2; a first type of connection line 101 corresponding to the light emission control signal line EM; a first type of connection line 101 corresponding to the fourth scan control signal line SP*; a second type of connection line 102 corresponding to the adjustment signal line DVH; a second type of connection line 102 corresponding to the first reset signal line Ref1; a second type of connection line 102 corresponding to another second scan control signal line SP_2 electrically connected to the same pixel driving circuit group 4; and a second type of connection line 102 corresponding to the second reset signal line Ref2.

[0128] For example, see again Figure 11 As shown, the first type of driving circuit 31 includes a first-side driving circuit 311 and a second-side driving circuit 312. Along the first direction h1, the display area AA is located between the first-side driving circuit 311 and the second-side driving circuit 312. At least a portion of the first type of signal line 11 is electrically connected to the first-side driving circuit 311, and at least another portion of the first type of signal line 11 is electrically connected to the second-side driving circuit 312.

[0129] For example, such as Figure 11 As shown, the first-side driving circuit 311 includes a first scanning control circuit SN1_V and a light emission control driving circuit EM_V; the first scanning control circuit SN1_V is electrically connected to the first scanning control signal line SN1; the light emission control driving circuit EM_V is electrically connected to the light emission control signal line EM.

[0130] The second-side drive circuit 312 includes a third scan control circuit SN2_V and a fourth scan control circuit SP*_V; the third scan control circuit SN2_V is electrically connected to the third scan control signal line SN2; and the fourth scan control circuit SP*_V is electrically connected to the fourth scan control signal line SP*.

[0131] For example, such as Figure 27 As shown, Figure 27 This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention. The display area AA further includes a plurality of second signal lines 2, at least a portion of which extend along a second direction h2; the plurality of second signal lines 2 are arranged along a first direction h1; and at least a portion of the second signal lines 2 surround the functional component area DA. Exemplarily, the second signal lines 2 include a first power supply voltage line PVDD.

[0132] For example, such as Figure 27 As shown, the second signal line 2 includes a second connecting line 20, which connects the second signal lines 2 located on both sides of the functional component area DA.

[0133] For example, such as Figure 27 As shown, at least a portion of the second connecting line 20 is located in the display area AA.

[0134] For example, such as Figure 27 As shown, at least a portion of the second connecting line 20 is located between the functional component area DA and the second non-display area NA2 arranged along the first direction h1; the second non-display area NA2 at least partially surrounds the display area AA. And / or, at least a portion of the second connecting line 20 is located between two adjacent functional component areas DA.

[0135] For example, such as Figure 28 As shown, Figure 28 This is a schematic diagram of a portion of a display panel provided in another embodiment of the present invention, wherein a portion of the second connecting line 20 is located in a first non-display area NA1 surrounding the functional component area DA. Exemplarily, at least a portion of the second connecting line 20 may extend along the edge of the functional component area DA.

[0136] For example, such as Figure 29 As shown, Figure 29 This is a schematic diagram of a portion of a display panel provided in another embodiment of the present invention. The display panel also includes a second non-display area NA2 that at least partially surrounds the display area AA. The second non-display area NA2 includes a connection bus 8, which is electrically connected to a plurality of second signal lines 2 located in the display area AA.

[0137] For example, such as Figure 30 As shown, Figure 30This is a schematic diagram of a portion of a display panel according to another embodiment of the present invention, wherein a functional component area DA includes a first sub-functional component area DA11 and a second sub-functional component area DA12 arranged along a first direction h1. For example, as shown... Figure 30 As shown, the display panel includes a first functional component area DA1 and a second functional component area DA2. Along the first direction h1, the length of the first functional component area DA1 is greater than the length of the second functional component area DA2. The first functional component area DA1 includes a first sub-functional component area DA11 and a second sub-functional component area DA12.

[0138] For example, in an embodiment of the present invention, at least a portion of the second signal line 2 is disposed between the first sub-functional component area DA11 and the second sub-functional component area DA12. For example, the second signal line 2 located between the first sub-functional component area DA11 and the second sub-functional component area DA12 may extend along the second direction h2, or it may extend along other directions, for example, along the edge of the first sub-functional component area DA11 or the second sub-functional component area DA12. The embodiments of the present invention do not limit this.

[0139] For example, the area between the first sub-functional component area DA11 and the second sub-functional component area DA12 is a non-display area not used for displaying images. In this embodiment of the invention, by extending a portion of the second signal line 2 between the first and second sub-functional component areas DA11 and DA12, this non-display area can be utilized effectively. Furthermore, this arrangement reduces the number of second connecting lines 20 surrounding the first sub-functional component area DA11, which helps to reduce the difference in extension length between the second connecting lines 20 surrounding the first sub-functional component area DA11 and those between the second connecting lines 20 between the first and second sub-functional component areas DA11 and DA12. This effectively reduces the load difference between different second connecting lines 20 and helps improve load uniformity.

[0140] This invention also provides a display device, such as... Figure 31 As shown, Figure 31 This is a schematic diagram of a display device provided in an embodiment of the present invention. The display device includes the display panel 100 described above. The specific structure of the display panel 100 has been described in detail in the above embodiments and will not be repeated here. Of course, Figure 31 The display device shown is for illustrative purposes only. The display device can be any electronic device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader or television.

[0141] For example, the functional component area DA mentioned above includes optical components, such as cameras and iris sensors.

[0142] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A display panel, characterized in that, It includes a display area and at least two functional component areas, the display area at least partially surrounds the functional component areas, the at least two functional component areas at least partially overlap along a first direction, and sub-pixels are arranged in the display area between the at least two functional component areas; The display area includes a plurality of first signal lines, at least a portion of which extend along the first direction; the plurality of first signal lines are arranged along a second direction, which intersects the first direction; The first signal line includes a first type of signal line and a second type of signal line; The first type of signal line at least partially surrounds at least two of the functional component regions; along the first direction, the second type of signal line at least partially surrounds one of the functional component regions and is disconnected on both sides of the other functional component region.

2. The display panel according to claim 1, characterized in that, The display panel includes a dummy line extending along the second direction. Along the first direction, the display area includes a first edge and a second edge opposite to each other. The distance from the first edge to the dummy line is d1, and the distance from the second edge to the dummy line is d2, wherein 0.9 ≤ d1 / d2 ≤ 1.

1. The at least two functional component areas include a first functional component area and a second functional component area, and the dummy line passes through the first functional component area; along the first direction, the second type of signal line is broken on both sides of the first functional component area.

3. The display panel according to claim 1, characterized in that, At least two of the functional component areas include a first functional component area and a second functional component area. Along the first direction, the distance between the first functional component area and the edge of the display area is A, and the length of the display area is B, where B / 4 ≤ A ≤ B / 2. Along the first direction, the second type of signal line is disconnected on both sides of the first functional component area.

4. The display panel according to claim 1, characterized in that, The at least two functional component areas include a first functional component area and a second functional component area; along the first direction, the length of the first functional component area is greater than the length of the second functional component area; along the first direction, the second type of signal line is broken on both sides of the first functional component area.

5. The display panel according to claim 1, characterized in that, The first signal line includes a first connecting line, which is electrically connected to the first signal line located on both sides of at least one of the functional component areas; The first connecting line includes a first type of connecting line, the first type of signal line includes the first type of connecting line, and the first type of connecting line is electrically connected to the first type of signal line located on both sides of the functional component area; The first connecting line includes a second type of connecting line, the second type of signal line includes a second type of connecting line, and the second type of connecting line connects the second type of signal lines located on both sides of one of the functional component areas.

6. The display panel according to claim 5, characterized in that, The display panel further includes a first non-display area located between the functional component area and the display area; at least a portion of the first connecting line is located in the first non-display area.

7. The display panel according to claim 5, characterized in that, At least a portion of the first connecting line is located in the display area.

8. The display panel according to claim 7, characterized in that, The first connecting line includes a first segment and a second segment that are electrically connected, and the first segment and the second segment extend in different directions.

9. The display panel according to claim 5, characterized in that, The display panel further includes a second non-display area, which is disposed on the side of the display area away from the functional component area. At least a portion of the first connecting line is located in the second non-display area.

10. The display panel according to claim 5, characterized in that, The display panel includes multiple first signal lines corresponding to the functional component area, and along the second direction, the multiple first connecting lines included in the multiple first signal lines are located on the same side of the functional component area.

11. The display panel according to claim 5, characterized in that, The display panel includes multiple first signal lines corresponding to the functional component area. Along the second direction, a portion of the first signal lines, including the first connecting lines, are located on one side of the functional component area, while another portion of the first signal lines, including the first connecting lines, are located on the other side of the functional component area.

12. The display panel according to claim 5, characterized in that, The second type of signal lines includes control signal lines; The display panel further includes a second non-display area, which at least partially surrounds the display area. The second non-display area includes: A first type of driving circuit is electrically connected to a first type of signal line, and along the first direction, the first type of driving circuit is located on one side of the display area; The second type of driving circuit is electrically connected to the control signal line and is arranged on both sides of the display area along the first direction.

13. The display panel according to claim 12, characterized in that, The display area includes a plurality of pixel driving circuit groups arranged along the second direction, the pixel driving circuit group includes at least two pixel driving circuit rows arranged along the second direction, and the pixel driving circuit row includes a plurality of pixel driving circuits arranged along the first direction. The first type of driving circuit includes multiple cascaded first type driving units, and the same first type driving unit is electrically connected to at least two pixel driving circuits in the same pixel driving circuit group through at least two first type signal lines. The display panel further includes a first connection wire, wherein the first type of signal lines electrically connected to at least two of the pixel driving circuit rows in the same pixel driving circuit row group are electrically connected to the same first connection wire, and the first connection wire is electrically connected to the first type of connection line.

14. The display panel according to claim 12, characterized in that, The display area includes a pixel driving circuit, the pixel driving circuit includes driving transistors, and: The light-emitting control module has its control terminal electrically connected to the light-emitting control signal line; The gate reset module has its control terminal electrically connected to the first scan control signal line and its input terminal electrically connected to the first reset signal line. The data writing module has its control terminal electrically connected to the second scan control signal line; The threshold compensation module has its control terminal electrically connected to the third scan control signal line; The first type of signal line includes at least one of the light emission control signal line, the first scan control signal line, and the third scan control signal line; The control signal line in the second type of signal line includes the second scan control signal line.

15. The display panel according to claim 5, characterized in that, The display area includes a pixel driving circuit; The second type of signal line also includes a functional signal line for transmitting a constant signal, which is electrically connected to at least a portion of the input terminals of the pixel driving circuit.

16. The display panel according to claim 5, characterized in that, The display area includes a pixel driving circuit, which includes a driving transistor and a gate reset module, the input of which is electrically connected to a first reset signal line. The second type of signal line includes the first reset signal line.

17. The display panel according to claim 5, characterized in that, The display area includes a pixel driving circuit, which includes a driving transistor and a light-emitting element reset module. The input terminal of the light-emitting element reset module is electrically connected to a second reset signal line. The second type of signal line includes the second reset signal line.

18. The display panel according to claim 5, characterized in that, The display area includes a pixel driving circuit, which includes a driving transistor and a bias adjustment module. The input terminal of the bias adjustment module is electrically connected to the adjustment signal line. The second type of signal line includes the adjustment signal line.

19. The display panel according to claim 15, characterized in that, The second type of signal line includes N of the aforementioned functional signal lines; N functional signal lines are electrically connected to M second-type connection lines, where 1 ≤ M ≤ N; M and N are both integers.

20. The display panel according to claim 14, characterized in that, The display panel includes a first metal layer, a second metal layer, a third metal layer, a fourth metal layer, and a fifth metal layer stacked along the thickness direction of the display panel; The first scan control signal line includes a first sub-line and a second sub-line connected in parallel, the first sub-line being located in the third metal layer and the second sub-line being located in the fourth metal layer; The second scan control signal line is located in the second metal layer; The third scan control signal line includes a first sub-line and a second sub-line connected in parallel, the first sub-line being located in the third metal layer and the second sub-line being located in the fourth metal layer; The light emission control signal line is located in the second metal layer; The first reset signal line is located in the second metal layer.

21. The display panel according to claim 20, characterized in that, The pixel driving circuit further includes a light-emitting element reset module and a bias adjustment module. The light-emitting element reset module is electrically connected to the second reset signal line; the bias adjustment module is electrically connected to the fourth scan control signal line and the adjustment signal line. The fourth scan control signal line is located in the second metal layer; The second reset signal line is located in the fifth metal layer; The adjustment signal line is located in the fourth metal layer.

22. The display panel according to claim 21, characterized in that, The first type of signal line includes a first type of connection line, which connects the first type of signal lines located on both sides of the functional component area; The display area includes a plurality of pixel driving circuit groups arranged along the second direction, the pixel driving circuit group includes at least two pixel driving circuit rows arranged along the second direction, and the pixel driving circuit row includes a plurality of pixel driving circuits arranged along the first direction. The first type of driving circuit includes multiple cascaded first type driving units, and the same first type driving unit is electrically connected to at least two pixel driving circuits in the same pixel driving circuit group through at least two first type signal lines. The display panel further includes a first connection wire, and the first type of signal line electrically connected to at least two of the pixel driving circuit rows in the same pixel driving circuit row group is electrically connected to the same first connection wire, and the first connection wire is electrically connected to the first type of connection line. The first connection wire electrically connected to the first scan control signal line, the first connection wire electrically connected to the third scan control signal line, the first connection wire electrically connected to the light emission control signal line, the first connection wire electrically connected to the fourth scan control signal line, the first connection wire electrically connected to the adjustment signal line, and the first connection wire electrically connected to the first reset signal line are all located in the fifth metal layer.

23. The display panel according to claim 22, characterized in that, The first contact wire electrically connected to the second reset signal line is located in the first metal layer.

24. The display panel according to claim 22, characterized in that, The first bridging wire, which is electrically connected to the second reset signal line, is located in the fifth metal layer.

25. The display panel according to claim 21, characterized in that, Along the second direction, at least a portion of the first connecting line is alternately distributed on at least two metal layers.

26. The display panel according to claim 25, characterized in that, The first type of connection line corresponding to the first scan control signal line, the second type of connection line corresponding to one of the second scan control signal lines, the first type of connection line corresponding to the third scan control signal line, the first type of connection line corresponding to the light emission control signal line, the first type of connection line corresponding to the fourth scan control signal line, the second type of connection line corresponding to another second scan control signal line, the first type of connection line corresponding to the adjustment signal line, and the first type of connection line corresponding to the first reset signal line are alternately arranged in the fourth metal layer and the second metal layer.

27. The display panel according to claim 26, characterized in that, The second type of connection line corresponding to the second reset signal line is located in the first metal layer.

28. The display panel according to claim 25, characterized in that, The first type of connection line corresponding to the first scan control signal line, the second type of connection line corresponding to one of the second scan control signal lines, the first type of connection line corresponding to the third scan control signal line, the first type of connection line corresponding to the light emission control signal line, the first type of connection line corresponding to the fourth scan control signal line, the second type of connection line corresponding to the adjustment signal line, the second type of connection line corresponding to the first reset signal line, the second type of connection line corresponding to another second scan control signal line, and the second type of connection line corresponding to the second reset signal line are alternately arranged in the first metal layer, the second metal layer, and the fourth metal layer.

29. The display panel according to claim 25, characterized in that, The width of the first connecting line located in one of the metal layers is 1.6 μm; the width of the first connecting line located in the other metal layer is 1.7 μm; the distance between two adjacent first connecting lines in the two metal layers is 1.6 μm or 1.5 μm.

30. The display panel according to claim 21, characterized in that, Along the second direction, the first type of connection line corresponding to the first scan control signal line, the second type of connection line corresponding to one of the second scan control signal lines electrically connected to the same row group of the pixel driving circuit, the first type of connection line corresponding to the third scan control signal line, the first type of connection line corresponding to the light emission control signal line, the first type of connection line corresponding to the fourth scan control signal line, the second type of connection line corresponding to another second scan control signal line electrically connected to the same row group of the pixel driving circuit, the second type of connection line corresponding to the second reset signal line, the second type of connection line corresponding to the adjustment signal line, and the second type of connection line corresponding to the first reset signal line are arranged in sequence.

31. The display panel according to claim 21, characterized in that, Along the second direction, the first type of connection line corresponding to the first scan control signal line, the second type of connection line corresponding to one of the second scan control signal lines electrically connected to the same row group of the pixel driving circuit, the first type of connection line corresponding to the third scan control signal line, the first type of connection line corresponding to the light emission control signal line, the first type of connection line corresponding to the fourth scan control signal line, the second type of connection line corresponding to the adjustment signal line, the second type of connection line corresponding to the first reset signal line, the second type of connection line corresponding to another second scan control signal line electrically connected to the same row group of the pixel driving circuit, and the second type of connection line corresponding to the second reset signal line are arranged in sequence.

32. The display panel according to claim 12, characterized in that, The first type of driving circuit includes a first-side driving circuit and a second-side driving circuit, and along the first direction, the display area is located between the first-side driving circuit and the second-side driving circuit; At least a portion of the first type of signal lines are electrically connected to the first-side drive circuit, and at least another portion of the first type of signal lines are electrically connected to the second-side drive circuit.

33. The display panel according to claim 32, characterized in that, The first side driving circuit includes a first scanning control circuit and a light emission control driving circuit; the first scanning control circuit is electrically connected to the first scanning control signal line; the light emission control driving circuit is electrically connected to the light emission control signal line. The second-side driving circuit includes a third scan control circuit and a fourth scan control circuit; the third scan control circuit is electrically connected to the third scan control signal line; the fourth scan control circuit is electrically connected to the fourth scan control signal line.

34. The display panel according to claim 1, characterized in that, The display area also includes a plurality of second signal lines, at least a portion of which extend along the second direction; the plurality of second signal lines are arranged along the first direction; and at least a portion of which surround the functional component area.

35. The display panel according to claim 34, characterized in that, The second signal line includes the first power supply voltage line.

36. The display panel according to claim 34, characterized in that, The second signal line includes a second connecting line, which connects the second signal lines located on both sides of the functional component area.

37. The display panel according to claim 36, characterized in that, At least a portion of the second connecting line is located in the display area.

38. The display panel according to claim 36, characterized in that, At least a portion of the second connecting line is located between the functional component area and the second non-display area along the first direction; the second non-display area at least partially surrounds the display area; And / or, At least a portion of the second connecting line is located between two adjacent functional component areas.

39. The display panel according to claim 34, characterized in that, The display panel further includes a second non-display area that at least partially surrounds the display area, the second non-display area including a connection bus that is electrically connected to a plurality of second signal lines located in the display area.

40. The display panel according to claim 35, characterized in that, One of the functional component areas includes a first sub-functional component area and a second sub-functional component area arranged along the first direction.

41. The display panel according to claim 40, characterized in that, At least a portion of the second signal line is disposed between the first sub-functional component area and the second sub-functional component area.

42. A display device, characterized in that, Includes the display panel as described in any one of claims 1-41.

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