Information processing apparatus and control method

Abstract

The invention provides an information processing device which reduces data change of an SSD in a state of not being supplied with power, and ensures read-out of data of the SSD for a certain period of time. An information processing device is provided with: an SSD (Solid State Drive) which is configured from a multi-bit cell in which a plurality of bits of data are stored in one memory cell, and which includes an electrically rewritable non-volatile memory unit; and a main control unit configured to execute processing based on data stored in the SSD, the SSD includes a storage control unit configured to control access to the nonvolatile storage unit, and when the multi-bit data is stored in the multi-bit cell, the storage control unit executes storage processing capable of changing a deviation range of a threshold voltage.

Description

Technical Field

[0001] This invention relates to an information processing apparatus and a control method. Background Art

[0002] In recent years, SSDs (Solid State Drives) have become increasingly common in information processing devices such as personal computers, replacing HDDs (Hard Disk Drives) (see, for example, Patent Document 1). Furthermore, in order to increase capacity, SSDs are known to include flash memory, which uses storage cells such as MLC (Multiple Level Cell), TLC (Triple Level Cell), and QLC (Quad Level Cell) that can store multiple bits of data from a single storage cell (hereinafter referred to as multi-bit cells).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2020-154674

[0004] However, while existing information processing devices can achieve large-capacity SSDs by using multiple units, there is a tendency for data retention time to decrease. Furthermore, in existing information processing devices, for example, through replacement with newer devices, even when the SSD reaches End of Life (EOL), there is sometimes a requirement to guarantee data readability for a certain period. However, in existing information processing devices, due to the use of multiple units, it may be impossible to guarantee data readability for a certain period when the SSD is not powered, for example, after it reaches EOL. Summary of the Invention

[0005] The present invention was made to solve the above-mentioned problems, and its purpose is to provide an information processing device and control method that can reduce data changes of SSD and ensure the readability of SSD data for a certain period of time when no power is supplied.

[0006] To address the aforementioned problems, one aspect of the present invention is an information processing apparatus comprising: an SSD (Solid State Drive) configured as a multi-bit unit storing multiple bits of data in a single storage unit, including an electrically rewritable non-volatile memory section; and a main control unit that performs processing based on the data stored in the SSD, wherein the SSD includes a storage control unit that controls access to the non-volatile memory section, and performs storage processing capable of changing the deviation amplitude of a threshold voltage when storing the multiple bits of data in the multi-bit unit.

[0007] Alternatively, in another aspect of the present invention, the storage control unit stores the multi-bit data in a specific region with a narrower deviation from the threshold voltage compared to other regions. The specific region is a region set by the main control unit within the storage region of the non-volatile storage unit.

[0008] Alternatively, in another embodiment of the present invention, the SSD in the aforementioned information processing apparatus includes a location information storage unit that stores logical location information of a specific region in the non-volatile storage unit. When data is stored at a logical location specified by the main control unit, i.e., a designated logical location, the storage control unit determines whether the designated logical location is the specific region based on the logical location information stored in the location information storage unit. If the designated logical location is the specific region, the data is stored at the designated logical location using a high-quality storage mode. Compared to a normal storage mode, the high-quality storage mode has a narrower deviation range of the threshold voltage.

[0009] Alternatively, in the above-mentioned information processing apparatus, when the specified logical location is not the above-mentioned specific region, the storage control unit performs the storage processing in the above-mentioned normal storage mode, wherein the deviation range of the threshold voltage is wider than that in the above-mentioned high-quality storage mode and the period required for storage of the above-mentioned multi-bit cells, i.e., the storage period is shorter than that in the above-mentioned high-quality storage mode.

[0010] Alternatively, in one embodiment of the present invention, the storage control unit in the above-described information processing apparatus performs the following in the high-quality storage mode: an application process, which applies a voltage for storing data to the multi-bit unit during a predetermined period obtained by segmentation application; a confirmation process, which, after the application process, confirms whether the threshold voltage falls within the deviation range of the threshold voltage; and a repetition process, which repeats the application process and the confirmation process before the threshold voltage falls within the deviation range of the threshold voltage.

[0011] Alternatively, in another embodiment of the present invention, when the main control unit of the above-mentioned information processing device becomes EOL (End of Life), it sets up a specific area in the non-volatile storage unit and stores important data that needs to be read out in the future in the specific area.

[0012] Another aspect of the present invention is a control method for an information processing device. This information processing device includes: an SSD (Solid State Drive) configured as a multi-bit unit storing multiple bits of data in a single storage unit, comprising an electrically rewritable non-volatile memory section; and a main control unit that performs processing based on the data stored in the SSD. The control method includes the following steps: the SSD's storage control unit controls access to the non-volatile memory section; and when storing the multiple bits of data in the multi-bit unit, performing storage processing capable of changing the deviation amplitude of a threshold voltage.

[0013] According to the present invention, it is possible to reduce data changes in the SSD when no power is supplied, and to ensure the readability of SSD data for a certain period of time. Attached Figure Description

[0014] Figure 1 This diagram illustrates an example of the main hardware structure of the information processing apparatus and SSD in this embodiment.

[0015] Figure 2 This is a functional block diagram illustrating an example of the functional structure of the information processing apparatus in this embodiment.

[0016] Figure 3 This is a diagram showing an example of an area of ​​the SSD of the information processing device in this embodiment.

[0017] Figure 4 This is a diagram illustrating an example of the distribution of Vth in the normal storage mode of the SSD of the information processing device of this embodiment.

[0018] Figure 5 This is a diagram illustrating an example of the distribution of Vth in the high-quality storage mode of the SSD of the information processing device of this embodiment.

[0019] Figure 6 This is a flowchart illustrating an example of the permanent partition setting process of the information processing apparatus of this embodiment.

[0020] Figure 7 This is a flowchart illustrating an example of the information processing apparatus of this embodiment performing storage processing on an SSD.

[0021] Figure 8 This is a flowchart illustrating an example of storage processing in a high-quality storage mode of the information processing apparatus of this embodiment.

[0022] Description of Reference Numerals

[0023] 1...Information processing unit; 10...Main control unit; 11...CPU; 12...Main memory; 13...Video subsystem; 14...Display unit; 21...Chipset; 22...BIOS memory; 31...Embedded controller (EC); 32...Input unit; 33...Power supply circuit; 40...SSD; 41...Flash memory; 42...SSD controller; 50...Storage unit; 51...Region range storage unit; 101...AP processing unit; 102...SSD device driver unit; 410...SSD storage unit; 411...Management information storage unit; 412...Mode information storage unit; 413...Data storage unit; 420...Memory control unit; 421...Region setting processing unit; 422...Write processing unit; 423...Read processing unit. Detailed Implementation

[0024] Hereinafter, an information processing apparatus and control method according to one embodiment of the present invention will be described with reference to the accompanying drawings.

[0025] Figure 1 This is a diagram illustrating an example of the main hardware structure of the information processing device 1 and the SSD 40 according to the first embodiment.

[0026] like Figure 1 As shown, the information processing device 1 is, for example, a notebook computer, which includes a CPU 11, a main memory 12, a video subsystem 13, a display unit 14, a chipset 21, a BIOS memory 22, an embedded controller 31, an input unit 32, a power supply circuit 33, and an SSD 40.

[0027] The CPU (Central Processing Unit) 11 performs various arithmetic operations through program control, and controls the entire information processing device 1.

[0028] Main memory 12 is a writable memory used as a read-in area for the CPU 11's executable program or as a work area for writing processing data to the executable program. Main memory 12 is, for example, composed of multiple DRAM (Dynamic Random Access Memory) chips. The executable program includes an OS (operating system), various drivers for hardware operations on peripheral devices, various services / utilities, applications, etc.

[0029] The video subsystem 13 is a subsystem for implementing functions related to image display and includes a video controller. The video controller processes drawing commands from the CPU 11, writes the processed drawing information into the video memory, and reads the drawing information from the video memory and outputs it as drawing data (display data) to the display unit 14.

[0030] The display unit 14 is, for example, a liquid crystal display, which displays a screen based on the drawing data (display data) output from the video subsystem 13.

[0031] The chipset 21 features controllers for USB (Universal Serial Bus), Serial ATA (AT Attachment), SPI (Serial Peripheral Interface), PCI (Peripheral Component Interconnect), PCI-Express, and LPC (Low Pin Count) buses, and can connect multiple devices. Figure 1 In this example, the BIOS memory 22 and SSD 40 are connected to the chipset 21. Furthermore, in this embodiment, the CPU 11 and chipset 21 correspond to the main control unit 10.

[0032] The BIOS (Basic Input Output System) memory 22 is composed of electrically rewritable non-volatile memory such as EEPROM (Electrically Erasable Programmable Read Only Memory) or Flash ROM. The BIOS memory 22 stores the BIOS and system firmware used to control the embedded controller 31, etc.

[0033] The embedded controller 31 is a one-chip microcomputer that monitors and controls various devices (peripheral devices, sensors, etc.) regardless of the system state of the information processing device 1. Furthermore, the embedded controller 31 has power management functions for controlling the power supply circuit 33. In addition, the embedded controller 31 is composed of a CPU, ROM, RAM, etc. (not shown), and has multiple channels of A / D input terminals, D / A output terminals, timers, and digital input / output terminals. The embedded controller 31 controls the operation of input units 32 and power supply circuits 33, for example, connected to these input / output terminals.

[0034] The input unit 32 is, for example, an input device such as a keyboard, or a pointing device such as a touchpad.

[0035] The power supply circuit 33 includes, for example, a DC / DC converter, a charging / discharging unit, an AC / DC adapter, etc., and converts the DC voltage supplied from an external power source or from a battery via the AC / DC adapter into multiple voltages required to operate the information processing device 1. Furthermore, the power supply circuit 33 supplies power to various parts of the information processing device 1 based on control from the embedded controller 31.

[0036] The SSD (Solid State Drive) 40 is a memory drive device with rewritable non-volatile memory that stores the operating system, various drivers, various services / utilities, applications, and various data. The information processing device 1 uses the data stored in the SSD 40 to perform various information processing tasks. The SSD 40 is connected to the chipset 21, for example, via a serial ATA or PCI-Express bus.

[0037] In addition, the SSD40 has multiple flash memory modules 41 and an SSD controller 42.

[0038] Flash memory 41 is, for example, NAND flash memory. Flash memory 41 may include memory cells with floating gates, or memory cells with charge trapping technology that trap electrons in a charge trapping layer and store data without floating gates. Furthermore, the memory cells of flash memory 41 are multi-bit cells that store multiple bits of data in a single memory cell, such as MLC (Multiple Level Cell), TLC (Triple Level Cell), and QLC (Quad Level Cell). Here, a multi-bit cell is a memory cell that allows a single memory cell to store data equivalent to multiple bits by setting multiple data write thresholds.

[0039] The SSD controller 42 may be a processor, including components such as a CPU, ROM, and RAM (not shown), which uniformly controls the SSD 40. The SSD controller 42 may perform control processing of the main interface (main I / F) with the chipset 21, control processing of the memory interface (memory I / F) with the flash memory 41, and data management processing of the flash memory 41.

[0040] SSD controller 42, for example, controls the storage processing of data to multiple units (write processing of data) and the reading processing of data from multiple units.

[0041] Next, refer to Figure 2 The functional structure of the information processing device 1 in this embodiment will be described.

[0042] Figure 2This is a functional block diagram illustrating an example of the functional structure of the information processing apparatus 1 in this embodiment.

[0043] like Figure 2 As shown, the information processing device 1 includes a main control unit 10, an SSD 40, and a storage unit 50. Furthermore, the SSD 40 includes an SSD storage unit 410 and a memory control unit 420.

[0044] The SSD storage unit 410 is, for example, a storage unit implemented by the flash memory 41 of the SSD 40, and includes a management information storage unit 411, a mode information storage unit 412, and a data storage unit 413.

[0045] The management information storage unit 411 is, for example, a storage unit implemented by flash memory 41, which stores management information of SSD 40. The management information storage unit 411 stores, for example, translation table information of physical address and logical address (e.g., LBA: Logical Block Addressing) of flash memory 41, management information of free area and used area of ​​flash memory 41, and area range information (LBA information (Logical Block Addressing) of permanent partitions) representing the range of permanent partition areas, as described later.

[0046] The mode information storage unit 412 is, for example, a storage unit implemented by flash memory 41, which stores write control information for the normal storage mode (normal write mode) and the high-quality storage mode (high-quality write mode), as described later. The write control information includes, for example, the application period (application time) of the segmented write voltage and the deviation range (allowable range) of Vth.

[0047] Furthermore, a typical storage mode has a wider allowable deviation range (Vth) than a high-quality storage mode and requires shorter write times. Conversely, a high-quality storage mode has a narrower allowable deviation range (Vth) than a typical storage mode and requires longer write times.

[0048] The data storage unit 413 is, for example, a storage unit implemented by flash memory 41, which stores various types of data. The data storage unit 413, for example, stores various types of data from the information processing device 1. Here, see... Figure 3 The data area of ​​data storage unit 413 is described.

[0049] Figure 3 This is a diagram showing an example of a region of the SSD40 of the information processing apparatus 1 in this embodiment. Figure 3 In the example shown, the data storage unit 413 is allocated into an EFI area (Extensible Firmware Interface area), an OS area, a user data area, and a permanent partition.

[0050] The EFI area, A1, stores the EFI program. The OS area, A2, stores OS programs such as Windows (registered trademark). The user data area, A3, stores various programs and data processed on the OS.

[0051] In addition, a permanent partition, such as area A4 set when the information processing device 1 reaches end-of-life (EOL), is a data area that stores important data needed for future retrieval. A permanent partition is an example of a specific area set by the main control unit, as described later.

[0052] Furthermore, each area of ​​the data storage unit 413 can be accessed from the main control unit 10 using LBA (Logical Block Address). Figure 3 In the example shown, area A1 from LBA0 to LBAX1 is the EFI area, and area A2 from LBAX1 to LBAX2 is the OS area. Additionally, area A3 from LBAX2 to LBAX3 is the user data area, and area A4 from LBAX3 to LBAX4 is a permanent partition (specific area).

[0053] Return to Figure 2 As explained, the memory control unit 420 (an example of a memory control unit) is a functional unit implemented, for example, by causing the CPU (not shown) of the SSD controller 42 to execute a program stored in a ROM (not shown). The memory control unit 420 controls access to the SSD storage unit 410.

[0054] For example, when the SSD storage unit 410 stores multiple bits of data in multiple cells, the memory control unit 420 performs storage processing that can change the deviation range of Vth (threshold voltage). The memory control unit 420 stores multiple bits of data in a permanent partition (specific area) set by the main control unit 10 in the storage area of ​​the SSD storage unit 410, so that the deviation range of Vth is narrower than that of other areas.

[0055] The memory control unit 420 includes a region setting processing unit 421, a write processing unit 422, and a read processing unit 423.

[0056] The region setting processing unit 421 sets various partitions (storage areas) according to the request of the main control unit 10. The region setting processing unit 421 stores the set partitions (storage areas) in the management information storage unit 411. For example, the region setting processing unit 421 sets a permanent partition (specific area) according to the request of the main control unit 10, and stores the region range information (LBA range information) of the permanent partition in the management information storage unit 411.

[0057] The write processing unit 422 performs data storage processing (write processing) on ​​multiple cells of the SSD storage unit 410. Based on the setting information of each mode stored in the mode information storage unit 412, the write processing unit 422 performs storage processing (write processing) that changes the offset range of Vth and the write time required for writing. The write processing unit 422 has a normal storage mode and a high-quality storage mode. For the aforementioned permanent partition (specific area), the write processing unit 422 performs storage processing in high-quality storage mode; for other areas (e.g., user data areas), it performs storage processing in normal storage mode.

[0058] When storing data in the LBA designated by the main control unit 10, the write processing unit 422 determines whether the designated LBA is a permanent partition based on the LBA information stored in the management information storage unit 411. If the designated LBA is a permanent partition (specific area), the write processing unit 422 stores the data in the designated LBA using a high-quality storage mode. Otherwise, if the designated LBA is not a permanent partition (specific area), the write processing unit 422 stores the data in the designated LBA using a normal storage mode.

[0059] In high-quality storage mode, the write processing unit 422 performs an application process that applies a voltage for storing data to multiple cells during a predetermined period obtained by dividing the application period. After the application process, it performs a confirmation process to check whether Vth is within the deviation range of Vth. The write processing unit 422 performs a repetitive process of application and confirmation before Vth is within the deviation range of Vth in high-quality storage mode.

[0060] The read processing unit 423 reads the data of the specified LBA specified by the main control unit 10 based on the management information stored in the management information storage unit 411, and outputs it to the main control unit 10.

[0061] Next, use Figure 4 as well as Figure 5 The differences in storage processing for multiple units between the conventional storage mode and the high-quality storage mode described above will be explained.

[0062] Figure 4 This is a diagram showing an example of the distribution of Vth in the normal storage mode of the SSD 40 of the information processing device 1 of this embodiment.

[0063] exist Figure 4 In the chart, the horizontal axis represents Vth under typical storage patterns and the corresponding storage processing (write processing) for each data point, while the vertical axis represents the number of cells. Additionally, in... Figure 4In the diagram, waveform W11 represents the Vth distribution when the data "001" is stored in multiple units according to the usual storage mode; waveform W12 represents the Vth distribution when the data "010" is stored in multiple units according to the usual storage mode; waveform W13 represents the Vth distribution when the data "011" is stored in multiple units according to the usual storage mode; and waveform W14 represents the Vth distribution when the data "100" is stored in multiple units according to the usual storage mode.

[0064] The write processing unit 422, through a normal storage mode, processes the data to be written (stored), such as... Figure 4 The waveforms W11 to W14 are shown, and the data storage processing is performed with a distribution of deviation amplitude D1 having Vth.

[0065] Furthermore, when reading data from the multi-bit unit, the readout processing unit 423 determines the data as "001" when Vth is between voltage Vt1 and voltage Vt2, and as "010" when Vth is between voltage Vt2 and voltage Vt3. Similarly, when reading data from the multi-bit unit, the readout processing unit 423 determines the data as "011" when Vth is between voltage Vt3 and voltage Vt4, and as "100" when Vth is between voltage Vt4 and voltage Vt5.

[0066] Additionally, waveform W13E represents an example where Vth shifts downwards due to degradation of multi-bit cells and the passage of time since data writing. In this case, Vth is lower than voltage Vt3 in some multi-bit cells, thus causing data changes.

[0067] in addition, Figure 5 This is a diagram illustrating an example of the distribution of Vth in the high-quality storage mode of the SSD 40 of the information processing apparatus 1 of this embodiment.

[0068] exist Figure 5 In the chart, the horizontal axis represents Vth under high-quality storage mode and the corresponding storage processing (write processing) for each data type, while the vertical axis represents the number of cells. Additionally, in Figure 5 In the diagram, waveform W21 represents the Vth distribution when the data "001" is stored in multiple units according to the high-quality storage mode; waveform W22 represents the Vth distribution when the data "010" is stored in multiple units according to the high-quality storage mode; waveform W23 represents the Vth distribution when the data "011" is stored in multiple units according to the high-quality storage mode; and waveform W24 represents the Vth distribution when the data "100" is stored in multiple units according to the high-quality storage mode.

[0069] The write processing unit 422, through a high-quality storage mode, processes the written data (stored data), such as... Figure 5 As shown in waveforms W21 to W24, data storage processing is performed with a distribution having a deviation amplitude D2 of Vth. Furthermore, the deviation amplitude D2 of Vth in high-quality storage mode is narrower than the deviation amplitude D1 of Vth in normal storage mode.

[0070] Return to Figure 2 As explained, the storage unit 50 is a storage unit implemented, for example, by the main memory 12 or the SSD 40, which stores various information used by the information processing device 1. The storage unit 50 includes a regional storage unit 51.

[0071] The region range storage unit 51 is, for example, a storage unit implemented by the main memory 12, which stores information representing the range of the LBA of the aforementioned permanent partition (specific region).

[0072] The main control unit 10 is a functional unit that executes programs stored in the main memory 12 via the CPU 11 and chipset 21, performing various OS-based processing. For example, the main control unit 10 performs various processing based on data stored in the SSD 40. The main control unit 10 includes an AP processing unit 101 and an SSD device driver unit 102.

[0073] AP processing unit 101 is a functional unit that processes applications running on the OS. For example, when the information processing device 1 (this device) reaches end-of-life (EOL), AP processing unit 101 sets a permanent partition (specific area) in the SSD storage unit 410 of SSD 40 and stores important data that needs to be read in the future in the permanent partition (specific area).

[0074] When the AP processing unit 101 sets a permanent partition (specific area), it causes the area range storage unit 51 to store information representing the range of LBAs for the permanent partition (specific area). Furthermore, when writing important data to the permanent partition (specific area), the AP processing unit 101 identifies the range of LBAs for the permanent partition (specific area) based on the information stored in the area range storage unit 51.

[0075] In addition, the AP processing unit 101 accesses the SSD 40 via the SSD device driver unit 102, which will be described later.

[0076] The SSD device driver unit 102 is a functional unit that implements a device driver for accessing the SSD 40. The SSD device driver unit 102 sends a write request to the SSD 40 to store (write) data in a specified LBA, causing the specified LBA to be stored. Additionally, the SSD device driver unit 102 sends a read request to the SSD 40 to read data from a specified LBA, thus reading the data from the specified LBA.

[0077] Next, the operation of the information processing device 1 of this embodiment will be described with reference to the accompanying drawings. Figure 6 This is a flowchart illustrating an example of the permanent partition setting process of the information processing apparatus 1 in this embodiment.

[0078] like Figure 6 As shown, the main control unit 10 of the information processing device 1 first accepts the specified range of the permanent partition and stores it in the area range storage unit 51 (step S101). For example, the AP processing unit 101 of the main control unit 10 stores the range of the permanent partition received from the input unit 32 in the area range storage unit 51.

[0079] Next, the AP processing unit 101 requests the SSD 40 to generate a permanent partition (step S102). The AP processing unit 101 requests the SSD device driver unit 102 to generate a permanent partition, and the SSD device driver unit 102 sends a request to the SSD 40 to generate a permanent partition.

[0080] Next, the SSD 40 generates the area for the permanent partition (step S103). The area setting processing unit 421 of the SSD 40 sets the area for the permanent partition according to the permanent partition generation request received from the SSD device driver unit 102. The area setting processing unit 421 stores the LBA range of the permanent partition area specified by the generation request in the management information storage unit 411, and generates the area for the permanent partition.

[0081] Next, the AP processing unit 101 stores the data in the area of ​​the permanent partition (step S104). The AP processing unit 101 sends a request to the write processing unit 422 of the SSD 40 via the SSD device driver unit 102 to store important data in the LBA of the permanent partition stored in the area-range storage unit 51. The write processing unit 422 stores the important data in the area of ​​the permanent partition of the SSD storage unit 410. After processing in step S104, the AP processing unit 101 ends the processing.

[0082] Next, refer to Figure 7 The storage processing of the information processing device 1 to the SSD 40 will be described.

[0083] Figure 7 This is a flowchart illustrating an example of the storage processing of the information processing apparatus 1 to the SSD 40 in this embodiment.

[0084] like Figure 7As shown, the memory control unit 420 of the SSD 40 determines, based on the storage request (write request) from the main control unit 10, whether the specified LBA (specified LBA) to be written to is within the range of the permanent partition (step S201). The write processing unit 422 of the memory control unit 420 determines whether the specified LBA is within the range of the permanent partition based on the information representing the range of LBAs of the permanent partition stored in the management information storage unit 411. If the specified LBA is within the range of the permanent partition (step S201: Yes), the write processing unit 422 proceeds to step S202. Otherwise, if the specified LBA is outside the range of the permanent partition (step S201: No), the write processing unit 422 proceeds to step S203.

[0085] In step S202, the write processing unit 422 performs storage processing (write processing) in high-quality storage mode. The write processing unit 422 obtains the setting information for the high-quality storage mode from the mode information storage unit 412, and executes the write processing based on the setting information. Figure 5 The storage processing (write processing) is performed in a high-quality storage mode as shown. After the processing in step S202, the write processing unit 422 ends the processing.

[0086] Additionally, in step S203, the write processing unit 422 performs storage processing (write processing) in normal storage mode. The write processing unit 422 obtains the normal storage mode setting information from the mode information storage unit 412, and executes the write processing based on the setting information. Figure 4 The storage process (write process) follows the typical storage mode shown. After the processing in step S203, the write processing unit 422 ends the processing.

[0087] Next, refer to Figure 8 The details of the above step S202, namely the storage processing of high-quality storage mode, will be explained.

[0088] Figure 8 This is a flowchart illustrating an example of storage processing in the high-quality storage mode of the information processing apparatus 1 of this embodiment.

[0089] like Figure 8 As shown, the write processing unit 422 of the memory control unit 420 applies a write voltage during a predetermined period to write data to the memory cell (step S301). During the application period (predetermined period) of the high-quality memory mode stored in the mode information storage unit 412, the write processing unit 422 applies a write voltage to multiple cells of a specified LBA.

[0090] Next, the write processing unit 422 reads the data and detects Vth (step S302). The write processing unit 422 performs read confirmation and detects the written Vth.

[0091] Next, the write processing unit 422 determines whether the deviation of Vth corresponding to the data is within the range (step S303). The write processing unit 422 determines whether the detected Vth is within the range (allowable range) of the deviation of Vth corresponding to the written data (confirmation process). If the detected Vth is within the range of the deviation of Vth corresponding to the written data (step S303: Yes), the write processing unit 422 ends the storage process (write process). Otherwise, if the detected Vth is not within the range of the deviation of Vth corresponding to the written data (step S303: No), the write processing unit 422 returns the process to step S301.

[0092] Thus, before Vth falls within the deviation range corresponding to the written data, the write processing unit 422 repeats steps S301 and S302. As a result, the write processing unit 422 performs the above-described... Figure 5 The write of the deviation magnitude D2 of Vth as shown.

[0093] Furthermore, the write processing unit 422 can also perform the above-mentioned operations in normal storage mode, making the range of the specified period and the deviation of Vth wider than in high-quality storage mode. Figure 8 The same process applies. Alternatively, the write processing unit 422 can also perform storage processing (write processing) during the application of a preset write voltage in normal storage mode.

[0094] As described above, the information processing apparatus 1 of this embodiment includes an SSD 40 and a main control unit 10. The SSD 40 is configured as a multi-bit unit that stores multiple bits of data in a single storage cell, and includes an electrically rewritable SSD storage unit 410 (non-volatile storage unit). The main control unit 10 performs processing based on the data stored in the SSD 40. The SSD 40 includes a memory control unit 420, which controls access to the SSD storage unit 410 and performs storage processing that can change the deviation range of Vth (threshold voltage) when storing multiple bits of data in the multi-bit unit.

[0095] Therefore, when storing multiple bits of data in multiple units, the information processing apparatus 1 of this embodiment can perform storage processing that can change the deviation amplitude of Vth (threshold voltage). Thus, depending on the storage location, it can switch to high-quality storage processing and extend data retention (data holding period). Therefore, the information processing apparatus 1 of this embodiment can, for example, reduce data changes in the SSD and ensure data readability of the SSD 40 for a certain period of time when it is not powered, such as after it reaches end-of-life (EOL).

[0096] Furthermore, in existing information processing devices, when powered on, management processes are performed periodically to confirm and correct data changes in multiple units; however, such management processes are not performed when powered off. Therefore, in existing information processing devices, for example, when powered off after reaching end-of-life (EOL), it is difficult to guarantee the readability of data from the SSD 40 for a certain period. In contrast, the information processing device 1 of this embodiment, by switching to high-quality storage processing, can guarantee the readability of data from the SSD 40 for a certain period even when powered off.

[0097] In addition, in this embodiment, the memory control unit 420 stores multiple bits of data in a permanent partition (specific area) set by the main control unit 10 in the storage area of ​​the SSD storage unit 410, so that the deviation of Vth is narrower than that of other areas.

[0098] Therefore, the information processing apparatus 1 of this embodiment sets a permanent partition (specific area), and the deviation of Vth is narrower than that of other areas relative to the permanent partition (specific area), thus reducing the data variation of SSD in the permanent partition (specific area).

[0099] In this embodiment, the SSD 40 includes a management information storage unit 411 (location information storage unit) that stores LBA (Logical Base Allocation) information of permanent partitions in the SSD storage unit 410. When storing data in an LBA (Designated Logical Base Allocation) specified by the main control unit 10, the memory control unit 420 determines whether the designated LBA is a permanent partition based on the LBA information stored in the management information storage unit 411. If the designated LBA is a permanent partition, the memory control unit 420 stores data in the designated LBA using a high-quality storage mode with a narrower Vth deviation range than the normal storage mode.

[0100] Therefore, the information processing device 1 of this embodiment can switch between high-quality storage mode and normal storage mode storage processing depending on whether the partition is permanent.

[0101] In addition, in this embodiment, when the specified LBA is not a permanent partition, the memory control unit 420 performs storage processing in the normal storage mode in which the deviation range of Vth is wider than that in the high-quality storage mode, and the storage period required for storing to multiple units is shorter than that in the high-quality storage mode.

[0102] Therefore, by switching between storage processing in the normal storage mode and storage processing in the high-quality storage mode, the information processing apparatus 1 of this embodiment can achieve both high performance with a shortened storage processing period (write period) and long-term guarantee of data retention (data retention period) due to the narrow deviation of Vth.

[0103] In this embodiment, the memory control unit 420 performs an application process, a confirmation process, and a repeated process in high-quality storage mode. During the application process, the memory control unit 420 applies a voltage for storing data to multiple data cells during a predetermined period that divides the application period. During the confirmation process, after the application process, the memory control unit 420 confirms whether Vth is within the deviation range of Vth. During the repeated process, the memory control unit 420 repeats the application process and the confirmation process until Vth is within the deviation range of Vth.

[0104] Therefore, the information processing device 1 of this embodiment divides multiple units within a specified period, applies a voltage to store the data, and repeats the process while confirming Vth. Thus, it is possible to perform high-quality storage processing with a narrowing deviation range of Vth through a simple method.

[0105] In addition, in this embodiment, when the information processing device 1 (this device) becomes EOL, the main control unit 10 sets a permanent partition (specific area) in the SSD storage unit 410 and stores important data that needs to be read in the future in the permanent partition.

[0106] Therefore, when the information processing device 1 of this embodiment reaches end-of-life (EOL), it sets a permanent partition (specific area) to store important data in a high-quality storage mode, thus enabling long-term retention (data retention period) of important data after EOL. Consequently, the information processing device 1 of this embodiment can guarantee the retrieval of important data from the SSD 40 for a certain period.

[0107] Furthermore, the control method of this embodiment is the control method of the information processing device 1, which includes: an SSD 40, configured as a multi-bit unit that stores multiple bits of data in a single storage unit, including an electrically rewritable SSD storage unit 410; and a main control unit 10, which performs processing based on the data stored in the SSD 40. The control method includes a memory control step. In the memory control step, the memory control unit 420 of the SSD 40 controls access to the SSD storage unit 410, and when storing multiple bits of data in a multi-bit unit, performs storage processing that can change the deviation range of Vth.

[0108] Therefore, the control method of this embodiment achieves the same effect as the information processing device 1 described above. For example, in a state where no power is supplied, such as after the device has reached end-of-life (EOL), it can reduce the data changes of the SSD and ensure the readout of the SSD 40 for a certain period of time.

[0109] Furthermore, the present invention is not limited to the embodiments described above, and modifications can be made without departing from the spirit of the present invention.

[0110] For example, in the above embodiments, the information processing device 1 is described as a notebook computer (mobile computer), but it is not limited to this. For example, it may also be other information processing devices such as desktop computers, tablet terminals, etc.

[0111] Furthermore, in the above embodiment, an example of setting a permanent partition (specific area) for the information processing device 1 at EOL has been described, but it is not limited to this. It is also possible to set a permanent partition (specific area) as a region for storing important data in normal use.

[0112] Furthermore, in the above embodiment, an example of using the information processing device 1 to switch between two storage processing modes, namely normal storage mode and high-quality storage mode, has been described. However, depending on the application, storage mode switching with three or more Vth deviation ranges can also be set and used.

[0113] Furthermore, in the above embodiment, the information processing device 1 is set with a permanent partition as an example of a specific area, but it is not limited to this. For example, it may be a non-partitioned area or other areas.

[0114] Alternatively, in the above embodiments, a portion of the processing of the memory control unit 420 of the SSD 40 may also be performed by the information processing device 1 (e.g., the main control unit 10, the embedded controller 31).

[0115] Furthermore, in the above embodiments, examples of multi-bit units being any one of MLC, TLC, and QLC have been described, but it is not limited to these, and other multi-bit units may also be used.

[0116] Furthermore, in the above embodiments, a personal computer-based structure with an embedded controller 31 for the information processing device 1 has been described as an example, but it is not limited to this, and a structure without an embedded controller 31 may also be used. Additionally, the OS of the information processing device 1 is not limited to Windows (registered trademark); for example, it may also be applied to other OSes such as Android (registered trademark) and iOS (registered trademark).

[0117] Furthermore, each of the structures in the aforementioned information processing device 1 and SSD 40 has an internal computer system. Moreover, programs for implementing the functions of each structure in the information processing device 1 and SSD 40 can be recorded on a computer-readable recording medium, and the processing in each structure of the information processing device 1 and SSD 40 can be performed by having the computer system read and execute the program recorded on the recording medium. Here, "having the computer system read and execute the program recorded on the recording medium" includes installing programs into the computer system. The term "computer system" here includes hardware such as an operating system and peripheral devices.

[0118] Furthermore, a "computer system" can also include multiple computer devices connected via networks including the Internet, WAN, LAN, and dedicated lines. Additionally, "computer-readable recording media" refers to portable media such as floppy disks, optical disks, ROMs, and CD-ROMs, as well as storage devices such as hard drives built into computer systems. Thus, recording media storing programs can be non-transitory recording media such as CD-ROMs.

[0119] Furthermore, the recording medium also includes internal or external recording media that can be accessed from a distribution server for distributing the program. Additionally, the program can be divided into multiple parts and downloaded at different times, forming a structure comprised of the various components of the information processing device 1 and the SSD 40, with each part distributed via a different distribution server. Moreover, the term "computer-readable recording medium" also includes structures that retain the program for a certain period, such as a server in the case of sending the program over a network or volatile memory (RAM) within a computer system acting as a client. Furthermore, the program described above can also be a structure used to implement the aforementioned functions. Further, it can also be a so-called differential file (differential program) that can be implemented by combining the aforementioned functions with a program already recorded in the computer system.

[0120] Alternatively, some or all of the above functions can be implemented as integrated circuits such as LSI (Large Scale Integration). The functions described above can be processed independently or partially or completely integrated. Furthermore, the method of integrated circuit implementation is not limited to LSI; it can also be implemented using dedicated circuits or general-purpose processors. Additionally, if advancements in semiconductor technology lead to integrated circuit technologies that replace LSI, integrated circuits based on these technologies can also be used.

Claims

1. An information processing device comprising: SSD (Solid State Drive) is composed of a multi-bit cell in which a single storage cell stores a plurality of bits of data, and includes an electrically rewritable nonvolatile storage unit; and A main control unit executes processing based on the data stored in the SSD, The SSD includes a storage control unit that controls access to the nonvolatile storage unit and executes a storage process that can change a variation width of a threshold voltage when storing the multi-bit data in the multi-bit cell.

2. The information processing device according to claim 1, wherein: The storage control unit stores the multi-bit data in a specific area so that the variation width of the threshold voltage is narrower than that of other areas, and the specific area is an area set by the main control unit in the storage area of ​​the nonvolatile storage unit.

3. The information processing device according to claim 2, wherein: The SSD includes a position information storage unit that stores logical position information of the specific area in the nonvolatile storage unit. When the storage control unit stores data at a logical position designated by the main control unit, i.e., a designated logical position, the storage control unit determines whether the designated logical position is the specific area based on the logical position information stored in the position information storage unit. When the designated logical position is the specific area, the data is stored at the designated logical position through a high-quality storage mode. Compared with a normal storage mode, the deviation of the threshold voltage in the high-quality storage mode is narrower.

4. The information processing device according to claim 3, wherein: When the designated logical position is not the specific area, the storage control unit performs the storage processing in the normal storage mode, in which the deviation amplitude of the threshold voltage is wider than that of the high-quality storage mode and the storage period is shorter than that of the high-quality storage mode, and the storage period is the period required for storage in the multi-bit cell.

5. The information processing device according to claim 3, wherein: The storage control unit, in the high-quality storage mode, executes: applying a voltage storing data to the multi-bit cell during a predetermined period obtained by dividing the application period; a confirmation process of confirming whether the threshold voltage is within the deviation range of the threshold voltage after the applying process; as well as The repetition process repeats the application process and the confirmation process until the threshold voltage falls within the variation width of the threshold voltage.

6. The information processing device according to any one of claims 2 to 5, wherein: When the information processing device reaches EOL (End Of Life), the main control unit sets the specific area in the nonvolatile storage unit and stores important data required for later reading in the specific area.

7. A control method is a control method of an information processing device, wherein the information processing device comprises: SSD (Solid State Drive) is composed of a multi-bit cell in which a single storage cell stores a plurality of bits of data, and includes an electrically rewritable nonvolatile storage unit; and A main control unit executes processing based on the data stored in the SSD, The control method comprises: The storage control unit of the SSD controls access to the nonvolatile storage unit and executes a storage process capable of changing a variation width of a threshold voltage when storing the multi-bit data in the multi-bit cell.

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