Power controller and power conversion apparatus including same

Abstract

One embodiment relates to control of a power conversion device, and in order to minimize the influence of noise flowing into a feedback loop, a control technique can be provided that allows AC components of an error signal to be reflected into a SAW signal to cancel each other. According to the present embodiment, the influence of noise flowing into the feedback loop of the power conversion device on the output voltage of the power conversion device can be minimized, and the output voltage of the power conversion device can be stably adjusted.

Description

Technical Field

[0001] Embodiments relate to a power conversion device, and more particularly, to control of a power conversion device. Background Art

[0002] The display device includes a power conversion device. The power conversion device mainly performs the function of converting and supplying the system power supplied from the commercial power supply or the battery to match the characteristics of the components included in the display device. For example, when the voltage of the system power and the operating voltage of the component are different, the power conversion device converts the voltage of the system power and supplies it to each component.

[0003] The power conversion device includes a feedback loop for regulating an output voltage supplied to a component to a specific level. If noise is introduced into the feedback loop, the output voltage may not be regulated to a specific level and may fluctuate.

[0004] Since the display device generates a large amount of noise during the pixel driving process, there is a high possibility that the noise will be introduced into the feedback loop of the power conversion device. Therefore, various studies are being conducted to minimize the influence of noise in the power conversion device. Summary of the invention

[0005] Technical issues

[0006] In this context, an embodiment aims to provide a technique for minimizing the effect of noise in a power conversion device. In particular, an embodiment aims to provide a technique for minimizing the effect of noise flowing into a feedback loop of a power conversion device on the output voltage of the power conversion device.

[0007] The technical problems of this embodiment are not limited to the contents described in this item, but also include contents that can be understood through the description of the present invention.

[0008] Technical Solution

[0009] To achieve the above-mentioned purpose, according to one aspect of an embodiment, a power controller includes: an error signal generator, which is configured to generate an error signal based on a difference between a reference voltage and a sensed voltage of a power conversion device including a power semiconductor; a SAW signal generator, which is configured to generate a first SAW signal; a SAW signal modulator, which is configured to generate a second SAW signal by reflecting an alternating current (AC) component of the error signal to the first SAW signal; and a power width modulation (PWM) signal generator, which is configured to generate a PWM signal by comparing the second SAW signal and the error signal to control the power semiconductor.

[0010] According to another aspect of the embodiment, a power conversion device includes: a power semiconductor; and a power controller, which is configured to supply a gate signal to a gate of the power semiconductor to regulate the output of the power conversion device, and includes a capacitor, wherein the capacitor is arranged between a line of an error signal generated according to a difference between a reference voltage and a sensing voltage of the power conversion device and a line of a SAW signal.

[0011] The output of the power conversion device may be supplied to a display driving device that drives pixels at a constant frame rate.

[0012] Effects of the Invention

[0013] As described above, according to the embodiment, the influence of noise in the power conversion device can be minimized. In particular, according to the embodiment, the influence of noise introduced into the feedback loop of the power conversion device on the output voltage of the power conversion device can be minimized, and the output voltage of the power conversion device can be stably adjusted.

[0014] The additional applicable scope of the embodiment will become apparent from the following detailed description. However, since those skilled in the art can clearly understand various changes and modifications within the spirit and scope of the embodiments, it should be understood that the detailed description and specific embodiments (eg, preferred embodiments) are given only as examples. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a configuration diagram of a display device according to one embodiment.

[0016] Figure 2 is a configuration diagram of a power conversion device according to one embodiment.

[0017] Figure 3 is a configuration diagram of a controller according to one embodiment.

[0018] Figure 4 It is the main waveform diagram of the controller without signal modulator.

[0019] Figure 5 is a diagram showing that an AC component of an error signal is reflected in a signal according to one embodiment.

[0020] Figure 6 is a main waveform diagram of a controller with a signal modulator according to one embodiment.

[0021] Figure 7 is a configuration diagram of a signal generator and a signal modulator according to one embodiment.

[0022] Figure 8 is a diagram showing an example in which a buffer is further included in the controller according to one embodiment.

[0023] The size, shape, and number of components shown in the drawings may be different from the actual ones. In addition, even if the same component is depicted in different sizes, shapes, and values ​​between the drawings, this is only an example in the drawings, and the same component may have the same size, shape, and value between the drawings. DETAILED DESCRIPTION

[0024] Hereinafter, the embodiments disclosed in this specification will be described in detail with reference to the accompanying drawings. Regardless of the figure marks, the same or similar components will be assigned the same reference numerals, and their redundant descriptions will be omitted. Considering the ease of writing the specification, the suffixes "module" and "part" used for the components in the following description may be assigned or used interchangeably, and they do not have different meanings or functions in themselves. In addition, the accompanying drawings are intended to facilitate easy understanding of the embodiments disclosed in this specification, and the technical concepts disclosed in this specification are not limited by the accompanying drawings. In addition, when an element such as a layer, a region, or a substrate is referred to as being "on" another element, this includes that it may be directly on another element or that other intermediate elements may exist between them.

[0025] Hereinafter, a SAW signal generator may be used interchangeably with a ramp signal generator. A SAW signal modulator may be referred to as an alternating current (AC) component synthesizer, an AC component adder, etc. A PWM signal generator may be referred to as a pulse signal generator.

[0026] Figure 1 is a configuration diagram of a display device according to one embodiment.

[0027] Reference Figure 1 According to an embodiment, a display device 100 may include a power conversion device 110, a timing controller 120, a source driver 130, a gate driver 140, and a display panel 150. The display driving device may be configured by at least one of the timing controller 120, the source driver 130, and the gate driver 140.

[0028] The power conversion device 110 may supply power to the timing controller 120 , the source driver 130 , the gate driver 140 , and the display panel 150 .

[0029] The power conversion device 110 may supply a first driving voltage (VTM) to the timing controller 120. The timing controller 120 may perform an operation on the image data using the first driving voltage (VTM).

[0030] The power conversion device 110 may supply the second driving voltage (VSD) to the source driver 130. The source driver 130 may drive the pixels (P) arranged on the display panel 150 using the second driving voltage (VSD).

[0031] The power conversion device 110 may supply the third driving voltage (VGD) to the gate driver 140. The gate driver 140 may generate the scan signal (SCN) using the third driving voltage (VGD).

[0032] The power conversion device 110 may supply power suitable for the display panel 150 according to the type of the display panel 150. If the display panel 150 is a liquid crystal display (LCD) panel, the power conversion device 110 may supply a common voltage to a common electrode disposed on the display panel 150.

[0033] If the display panel 150 is an organic light emitting diode (OLED) panel, the power conversion device 110 may supply a base voltage to a cathode electrode of the OLED disposed on the display panel 150 , and may supply a pixel driving voltage to an anode electrode of the OLED.

[0034] The timing controller 120 may process image data received from an external device to be suitable for characteristics of the display panel 150, and transmit the processed image data (RGB) to the source driver 130. The timing controller 120 may transmit a data control signal (DCS) to the source driver 130 to control, set and / or manage the source driver 130.

[0035] The timing controller 120 may transmit a gate control signal (GCS) to the gate driver 140 to control the scanning timing of the display panel 150. The timing controller 120 may transmit a power control signal (PCS) to the power conversion device 110 to control the power conversion device 110.

[0036] Image data (RGB), data control signal (DCS), gate control signal (GCS) and power control signal (PCS) may be transmitted in frames. For example, when the frame rate is 120 Hz, each signal may be transmitted every 1 / 120 second. For example, if the frame rate is 240 Hz, each signal may be transmitted every 1 / 240 second. Such periodic signal transmission of timing controller 120 may be a noise source for power conversion device 110.

[0037] The source driver 130 may convert the grayscale value of each pixel (P) included in the image data (RGB) into a data voltage (VD) and supply it to the corresponding pixel (P) through each of a plurality of data lines on the display panel 150. The data voltage (VD) may include an analog data voltage.

[0038] The source driver 130 may transmit a data voltage (VD) in units of lines. Here, the line may be one of a plurality of gate lines on the display panel 150.

[0039] For example, the gate driver 140 may select one of the plurality of gate lines using a scan signal (SCN). That is, a specific gate line may be selected by supplying a scan signal (SCN) generated by the gate driver 140 to one of the plurality of gate lines. In response to the scan signal (SCN) supplied to the specific gate line, the thin film transistors of the respective pixels (P) connected to the specific gate line may be turned on. Therefore, the gate line selection may be determined by the scan signal (SCN) supplied by the gate driver 140.

[0040] For example, the source driver 130 may simultaneously supply the data voltage (VD) to the pixels (P) connected to a specific gate line.

[0041] The supply of the data voltage (VD) consumes a relatively large amount of power. Such a large amount of power consumption may occur on a line basis and may be recognized by the power conversion device 110 as a noise source.

[0042] These various noises in the display device 100 will be introduced into the feedback loop of the power conversion device 110. Therefore, the power conversion device 110 according to one embodiment includes a controller to minimize the influence of these noises on the output voltage regulation. Here, the output voltage can be a first driving voltage (VTM), a second driving voltage (VSD), a third driving voltage (VGD), etc.

[0043] Figure 2 is a configuration diagram of a power conversion device according to one embodiment.

[0044] Reference Figure 2 , the power conversion device 110 may include a power management device 210 and a power stage 220. The power management device 210 may be formed as a power management integrated circuit (Power Management Integrated Circuit) integrated in the form of an IC.

[0045] The power conversion device 110 may include an inductor (L), an output capacitor (Co), a first power semiconductor (SW), a second power semiconductor (D), and the like.

[0046] Large passive components such as an inductor (L) and an output capacitor (Co) may be placed in the power stage 220, and a first power semiconductor (SW) and a second power semiconductor (D) that may be included in an integrated circuit may be built into the power management device 210. Alternatively, the second power semiconductor (D) may be placed in the power stage 220 as needed.

[0047] The first power semiconductor (SW) may be a transistor such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and the second power semiconductor (D) may be a diode. According to an embodiment, the second power semiconductor (D) may also be a controllable transistor, in which case the power conversion device 110 may be referred to as a synchronous type.

[0048] In the following embodiments, unless otherwise specified, a power semiconductor may mean a first power semiconductor (SW) that is a transistor.

[0049] According to the arrangement and connection relationship of the inductor (L), the output capacitor (Co), the first power semiconductor (SW) and the second power semiconductor (D), the power conversion device 110 may be referred to as a buck converter, a boost converter, a buck-boost converter, a flyback converter, etc., but the embodiments are not limited to these specific types of converters. The embodiments may be applied to any device that converts power using a power semiconductor. For convenience of explanation, a boost converter is described below as an example.

[0050] When the first power semiconductor (SW) is turned on, the input voltage (VIN) is applied to the inductor (L), and the electric energy is stored in the inductor (L). When the first power semiconductor (SW) is turned off, the electric energy stored in the inductor (L) can be stored in the output capacitor (Co) through the second power semiconductor (D), thereby forming an output voltage (VO). At this time, the magnitude of the output voltage (VO) can be adjusted according to the turn-on time of the first power semiconductor (SW).

[0051] The power management device 210 may include a controller 212 and a switch circuit 214. The switch circuit 214 may include a first power semiconductor (SW). The controller 212 may periodically turn on and off the first power semiconductor (SW) of the switch circuit 214 to adjust the output voltage (VO).

[0052] Controller 212 may generate a gate signal (VGA) of the first power semiconductor (SW) using a sense voltage (VFB) and a sense current (ISW) of power conversion device 110. Gate signal (VGA) may be referred to as a regulation control signal, a power control signal, an output control signal, etc.

[0053] The sensing voltage (VFB) may be generated by at least two feedback resistors (Rfb) arranged at the output terminal of the power stage 220 and connected in series with each other. The output voltage (VO) may be divided by these two or more feedback resistors (Rfb), and the divided voltage may be detected as the sensing voltage (VFB). For example, the sensing voltage (VFB) may be detected from the node between adjacent feedback resistors (Rfb). The sensing current (ISW) may be generated by a sensing resistor (Rsw) connected in series with the first power semiconductor (SW). That is, the sensing current (ISW) may be detected from the node between the first power semiconductor (SW) and the sensing resistor (Rsw). The sensing voltage (VFB) may correspond to the output voltage (VO) of the power conversion device 110. The sensing current (ISW) may correspond to the current flowing in the inductor (L) and the output current of the power conversion device 110.

[0054] The controller 212 may use the sense voltage (VFB) to adjust the output voltage (VO) of the power conversion device 110 to a specific size. The controller 212 may use the sense current (ISW) to adjust the output current of the power conversion device 110 to a specific size. Here, regulation may mean adjusting, changing, modulating, or controlling the output voltage (VO) or the sense current (ISW).

[0055] As voltage control, the controller 212 may use the sense voltage (VFB) to adjust the output voltage (VO) of the power conversion device 110. The controller 212 that uses the sense current (ISW) and the sense voltage (VFB) to adjust the output of the power conversion device 110 may be referred to as current control. For ease of explanation, the following description focuses on an example of voltage control.

[0056] In addition, the sensing voltage (VFB) may be detected by a feedback resistor (Rfb) placed at the output terminal of the power conversion device 110. In addition, if noise occurs in a load connected to the output side of the output voltage (VO), the noise is introduced into the sensing voltage (VFB) through the feedback resistor (Rfb).

[0057] Although not shown in the figure, noise may be introduced through other paths. For example, noise may be introduced through a control loop compensation circuit included in the controller 212 .

[0058] A controller according to one embodiment may include a component for eliminating the influence of noise introduced from the outside (for example, noise introduced by a sensing voltage (VFB) or by a control loop compensation circuit). In this case, the controller may be as follows Figure 2The controller may be included in the power management device 210 as shown, or may be provided separately without being included in the power management device 210. In this case, the controller may be referred to as a power controller. In the following description, unless otherwise specified, the controller may mean a power controller.

[0059] Figure 3 is a configuration diagram of a controller according to one embodiment.

[0060] Reference Figure 2 and Figure 3 , the controller 212 may include an error signal generator 310, a SAW signal generator 320, a SAW signal modulator 330, a PWM signal generator 340, and a gate controller 350. The SAW signal generator 320 and the SAW signal modulator 330 may be referred to as a first SAW signal generator and a second SAW signal generator, respectively, but are not limited thereto.

[0061] The error signal generator 310 may generate an error signal (Ve) according to a difference between a sense voltage (VFB) detected from an output terminal of the power conversion device (specifically, the power stage 220 ) and a reference voltage (Vref).

[0062] The error signal generator 310 may include an error amplifier (EA), a control loop compensation circuit 312 , and the like.

[0063] The error amplifier (EA) can amplify and output the difference between the sense voltage (VFB) and the reference voltage (Vref). The amplification ratio of the error amplifier (EA) affects the control loop gain. By adjusting the amplification ratio of the error amplifier (EA), the control loop gain can be increased or decreased.

[0064] The output of the error amplifier (EA) may be transmitted to a control loop compensation circuit 312. The control loop compensation circuit 312 may be a circuit for compensating a control loop gain. For example, the control loop compensation circuit 312 may include a plurality of capacitors to form a state. For example, the control loop compensation circuit 312 may configure a proportional integral derivative (PID) control circuit using a plurality of capacitors and a plurality of resistors.

[0065] The output voltage of the output terminal of the error amplifier (EA) connected to the control loop compensation circuit 312 may be the error signal (Ve). Alternatively, the output terminal of the error amplifier (EA) may be connected to a buffer described below, etc., and the output voltage of the output terminal of the buffer may be the error signal (Ve).

[0066] The SAW signal generator 320 may generate a SAW signal (SAW). The SAW signal is so named because its waveform resembles a sawtooth shape. In contrast, a signal that is compared with an error signal (Ve) to generate a PWM signal is also referred to as a SAW signal.

[0067] The PWM signal generator 340 may generate a PWM signal (PWM) to control the power semiconductor (SW) by comparing the SAW signal (SAW) and the error signal (Ve).

[0068] The gate controller 350 may generate a gate signal (VGA) according to the PWM signal (PWM) and supply the gate signal (VGA) to the power semiconductor (SW).

[0069] Furthermore, as described above, noise may be introduced into the sense voltage (VFB), and the noise may be transmitted to the error signal (Ve) through the error amplifier (EA).

[0070] Alternatively, noise may be introduced by the control loop compensation circuit 312 and the noise may be transmitted through the error amplifier (EA) as an error signal (Ve).

[0071] The possibility of such noise introduction is high if the sensing voltage (VFB) or the control loop compensation circuit 312 has terminals exposed outside the integrated circuit, but even if this is not the case, noise may be introduced as the error signal (Ve) through various paths.

[0072] Under normal operation, when the power conversion device 110 reaches a stable state, the error signal (Ve) may basically have a direct current (DC) form. However, if noise is introduced into the error signal (Ve), that is, when it operates abnormally, the error signal (Ve) may appear in an alternating current (AC) form.

[0073] The signal modulator 330 may reflect the AC component (Ve_ac) of the error signal (Ve) to the SAW signal to minimize the influence of noise. In this way, the error signal (Ve) may include the AC component (Ve_ac), and the SAW signal may include the AC component (Ve_ac). The AC component (Ve_ac) included in the error signal (Ve) and the AC component (Ve_ac) included in the SAW signal may be offset by the PWM signal generator 340. Therefore, the PWM signal (PWM) is not affected. In other words, since the PWM signal (PWM) does not include the AC component (Ve_ac), the gate signal (VGA) generated based on the PWM signal (PWM) does not include noise.

[0074] In order to understand the function of the SAW signal modulator 330 , a main waveform in a controller without the SAW signal modulator 330 is compared with a main waveform in a controller with the SAW signal modulator 330 .

[0075] Figure 4 It is the main waveform diagram of the controller without SAW signal modulator.

[0076] Reference Figure 4 , the rising edge of the gate signal (VGA) can be formed according to the setting signal (SET). The falling edge of the gate signal (VGA) can be formed according to the rising edge of the PWM signal (PWM). The setting signal (SET) appears at regular intervals, which are also called switching cycles. The period during which the gate signal (VGA) has a high level (hereinafter referred to as the "on-period") becomes the on-time of the power semiconductor (SW), and the output of the power conversion device is controlled according to the ratio of the on-period of the gate signal (VGA) in the switching cycle.

[0077] In the case of normal operation, that is, when the output is stable, the on-period of the gate signal (VGA) can be maintained constant in each switching cycle. Figure 4 As illustrated in the second switching cycle of , in the case of abnormal operation, that is, when noise is introduced into the error signal (Ve), the on-period of the gate signal (VGA) may vary.

[0078] The falling edge of the gate signal (VGA) may be formed according to the rising edge of the PWM signal (PWM). The rising edge of the PWM signal (PWM) may occur at the moment when the SAW signal (SAW') becomes greater than the error signal (Ve). For example, if the error signal (Ve) has a higher level than the SAW signal (SAW'), the PWM signal (PWM) may have a low level. For example, if the error signal (Ve) has a lower level than the SAW signal (SAW'), the PWM signal (PWM) may have a high level. According to the operating method, the rising edge of the PWM signal (PWM) may occur at each moment when the SAW signal (SAW') becomes greater than the error signal (Ve).

[0079] In addition, if Figure 4 In the second switching cycle shown, when the error signal (Ve) includes an AC component (Ve_ac) due to noise, the moment when the SAW signal (SAW') becomes greater than the error signal (Ve) may vary. Therefore, the width of the on-period of the gate signal (VGA) also varies. Figure 4 As shown, the width of the on period (T1, T3) of the gate signal (VGA) in the first switching cycle and the third switching cycle without noise is different from the width of the on period (T2) of the gate signal (VGA) in the second switching cycle with noise.

[0080] When the switching cycle starts, the level of the SAW signal (SAW') may gradually increase and then decrease at the rising edge of the reset signal (RESET). Next, the SAW signal (SAW') may increase again at the falling edge of the reset signal (RESET). The falling edge of the reset signal (RESET) may be the beginning of each switching cycle. Specifically, the SAW signal (SAW') may increase in a section between a falling edge of the first reset signal and a rising edge of a second reset signal adjacent to the first reset signal, and the SAW signal (SAW') may decrease in a section between a rising edge of the second reset signal and a falling edge of the second reset signal.

[0081] In addition, if Figure 3 As shown, the controller according to one embodiment can solve the above problem by reflecting the AC component (Ve_ac) of the error signal (Ve) into the SAW signal via the SAW signal modulator 330 ( Figure 4 ).

[0082] Figure 5 FIG. 1 is a diagram showing how the AC component of the error signal is reflected in the SAW signal in one embodiment.

[0083] Reference Figure 3 and Figure 5 , the controller may generate an original SAW signal (SAW') and extract an AC component (Ve_ac) from the error signal (Ve). The controller may synthesize the extracted AC component (Ve_ac) with the generated original SAW signal (SAW') to generate a SAW signal (SAW). Here, synthesis may mean an addition operation.

[0084] Unlike the original SAW signal (SAW'), the SAW signal generated in this manner may also include an AC component (Ve_ac) corresponding to noise. Here, the original SAW signal (SAW') and the SAW signal (SAW) may be referred to as a first SAW signal and a second SAW signal, respectively, but are not limited thereto.

[0085] Figure 6 is a main waveform diagram of a controller having a SAW signal modulator according to one embodiment.

[0086] Reference Figure 3 and Figure 6 , the rising edge of the gate signal (VGA) may be formed according to the setting signal (SET). The falling edge of the gate signal (VGA) may be formed according to the rising edge of the PWM signal (PWM). The setting signal (SET) may appear at regular intervals.

[0087] The falling edge of the gate signal (VGA) may be formed according to the rising edge of the PWM signal (PWM). The rising edge of the PWM signal (PWM) may occur at the moment when the SAW signal becomes greater than the error signal (Ve). For example, if the error signal (Ve) has a higher level than the SAW signal, the PWM signal (PWM) may have a low level. For example, if the error signal (Ve) has a lower level than the SAW signal, the PWM signal (PWM) may have a high level. According to the operation method, whenever the SAW signal becomes greater than the error signal (Ve), the rising edge of the PWM signal (PWM) may be generated.

[0088] As described above, the AC component (Ve_ac) of the error signal (Ve) may be reflected in the SAW signal. In the case where the error signal (Ve) includes the AC component (Ve_ac) due to noise (e.g. Figure 6 In the second switching cycle shown in FIG. 1 ), the SAW signal may also include an AC component (Ve_ac) through the SAW signal modulator 330 .

[0089] Due to noise, both the error signal (Ve) and the SAW signal to be compared may include an AC component (Ve_ac). In particular, if Figure 5 As shown, since the SAW signal is generated by synthesizing the AC component (Ve_ac) with the original SAW signal (SAW'), in the segment where the AC component (Ve_ac) exists, the waveform of the SAW signal may be greater than the waveform of the original SAW signal (SAW') by the amount of the AC component (Ve_ac). Therefore, even if noise is generated, it may be generated at a time point earlier than the rising edge of the PWM signal (PWM). In other words, the time point at which the level of the SAW signal becomes higher than the level of the error signal (Ve) in the segment where noise is generated can be advanced. Therefore, the width of the PWM signal (PWM) in the segment where noise is generated may be substantially the same as the width of the PWM signal (PWM) in the segment where no noise is generated. Therefore, the width of the conduction period (T1, T2, T3) of the gate signal (VGA) in each switching cycle becomes substantially the same.

[0090] Figure 7 is a configuration diagram of a signal generator and a signal modulator according to one embodiment.

[0091] Reference Figure 2 , Figure 3 and Figure 7 , the signal generator 320 may include a current source (IS), an integrating capacitor (CI), and a reset switch (TR).

[0092] The current source (IS) and the integral capacitor (CI) constitute a ramp signal generator. The current of a constant magnitude from the current source (IS) can charge the integral capacitor (CI). Therefore, the voltage of the integral capacitor (CI) can be increased in the form of a ramp signal. When the reset switch (TR) is turned on, the voltage of the integral capacitor (CI) can be reset to a reset voltage (Vr). The reset switch (TR) can be periodically turned on and then turned off by a reset signal (RESET). According to the cycle of the reset signal (RESET), the ramp signal generator (IS and CI) can periodically generate a ramp signal. According to the cycle, the integral capacitor (CI) can be reset to a specific voltage.

[0093] The ramp signal generated by the ramp signal generator (IS and CI) can be Figure 3 The original SAW signal shown (reference Figure 3 The SAW signal generator 320 may use the ramp signal to generate a SAW signal. Therefore, the SAW signal may be referred to as a ramp signal.

[0094] In the ramp signal generator (IS and CI), a current source (IS) is connected to one side of an integrating capacitor (CI), and a line supplied with an error signal (Ve) may be connected to the other side of the integrating capacitor (CI).

[0095] The SAW signal modulator 330 may include an integration capacitor (CI). The integration capacitor (CI) may be used as a DC blocking capacitor. The SAW signal modulator 330 may reflect the AC component to the SAW signal through the DC blocking capacitor. Since the SAW signal is formed on one side of the DC blocking capacitor and is connected to the other side of the DC blocking capacitor by a line supplied with an error signal (Ve) (i.e., a line connected to the output terminal of the error amplifier (EA)), the DC component of the error signal (Ve) is blocked by the DC blocking capacitor, and only the AC component is reflected to the SAW signal.

[0096] As described above, this embodiment can be applied to current control as well as voltage control. When applied to current control, the SAW signal generator 320 can generate a SAW signal by synthesizing the sense current (ISW) of the power conversion device 110 into a ramp signal.

[0097] Figure 8 is a diagram showing an example in which a buffer is further included in the controller according to one embodiment.

[0098] Reference Figure 8 , the controller 800 may include an error signal generator 810, a SAW signal generator 320, a SAW signal modulator 330, a PWM signal generator 340, a gate controller 350, and the like.

[0099] The error signal generator 810 may generate an error signal (Ve) according to a difference between a reference voltage (Vref) and a sense voltage (VFB) of the power conversion device 110 including a power semiconductor (SW).

[0100] The error signal generator 810 may include an error amplifier (EA), a control loop compensation circuit 312 , a buffer 814 , and the like.

[0101] The error amplifier (EA) can amplify and output the difference between the sense voltage (VFB) and the reference voltage (Vref). The amplification ratio of the error amplifier (EA) can affect the control loop gain. The amplification ratio of the error amplifier (EA) can be adjusted to increase or decrease the control loop gain.

[0102] The output (EAO) of the error amplifier (EA) may be transmitted to the control loop compensation circuit 312. The control loop compensation circuit 312 may be a circuit for compensating the control loop gain. For example, the control loop compensation circuit 312 may include a plurality of capacitors to form a state. For example, the control loop compensation circuit 312 may configure a PID control circuit using a plurality of capacitors and a plurality of resistors.

[0103] The output voltage (EAO) is output from the output terminal of the error amplifier (EA) connected to the control loop compensation circuit 312, and the output voltage (EOA) may be generated as an error signal (Ve) through the buffer 814. That is, the error signal generator 810 amplifies and outputs the difference between the sense voltage (VFB) and the reference voltage (Vref) using the error amplifier (EA), buffers the output voltage (EAO) of the error amplifier (EA) using the buffer 814, and generates the error signal (Ve) as the output of the buffer 814.

[0104] The buffer 814 may be a component having a large input impedance and a small output impedance. When the buffer 814 is used, the effect of the signal modulator 330 on the control loop gain may be minimized.

[0105] The SAW signal modulator 330 may be placed between the output side of the buffer 814 and the SAW signal generator 320. The control loop compensation circuit 312 may be connected to the input side of the buffer 814. The SAW signal modulator 330 may include a capacitor, such as an integrating capacitor ( Figure 7 CI), and the influence of the capacitor included in the SAW signal modulator 330 on the control loop compensation circuit 312 can be minimized according to the separation of the buffer 814.

[0106] about Figures 3 to 7 The SAW signal generator 320 , the SAW signal modulator 330 , the PWM signal generator 340 , and the gate controller 350 are described, and thus a detailed description thereof will be omitted.

[0107] As described above, according to the embodiment, the influence of noise in the power conversion device can be minimized. In particular, according to the embodiment, the influence of noise introduced into the feedback loop of the power conversion device on the output voltage of the power conversion device can be minimized, and the output voltage of the power conversion device can be stably adjusted.

[0108] The above detailed description should not be interpreted as limiting in all aspects, but should be regarded as illustrative. The scope of the embodiments should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent scope of the embodiments are included in the scope of the embodiments.

Claims

1. A power controller, comprising: an error signal generator configured to generate an error signal according to a difference between a reference voltage and a sense voltage of a power conversion device including a power semiconductor; a SAW signal generator configured to generate a first SAW signal; a SAW signal modulator configured to generate a second SAW signal by reflecting an alternating current (AC) component of the error signal to the first SAW signal; as well as A power width modulation (PWM) signal generator is configured to generate a PWM signal to control the power semiconductor by comparing the second SAW signal with the error signal. 2 . The power controller according to claim 1 , further comprising a gate controller configured to generate a gate signal according to the PWM signal and supply the gate signal to the power semiconductor.

3. The power controller according to claim 1, wherein: The SAW signal modulator includes a direct current (DC) blocking capacitor, and is configured to reflect the AC component to the first SAW signal through the DC blocking capacitor.

4. The power controller according to claim 1, wherein: The SAW signal generator includes a ramp signal generator that periodically generates a ramp signal as the first SAW signal, and The SAW signal modulator is configured to generate the second SAW signal using the ramp signal.

5. The power controller according to claim 4, wherein: The ramp signal generator includes a current source and an integrating capacitor, and wherein the current source is connected to one side of the integration capacitor, and the other side of the integration capacitor is connected to a line supplied with the error signal.

6. The power controller according to claim 4, wherein: The integrating capacitor is periodically reset to a constant voltage.

7. The power controller according to claim 4, wherein: The SAW signal generator is configured to generate the first SAW signal by synthesizing a sense current of the power conversion device with the ramp signal.

8. The power controller according to claim 1, wherein: The error signal generator includes an error amplifier and a buffer, the error amplifier being configured to amplify and output a difference between the sensing voltage and the reference voltage, and the buffer being configured to buffer an output of the error amplifier, and Wherein, the output of the buffer is generated as the error signal.

9. The power controller according to claim 8, wherein: The SAW signal modulator is arranged between the output side of the buffer and the SAW signal generator.

10. The power controller according to claim 9, wherein: The error signal generator also includes a control loop compensation circuit connected to an input side of the buffer.

11. The power controller according to claim 2, wherein: The gate controller is configured to form a rising edge of the gate signal according to a setting signal, and to form a falling edge of the gate signal according to a rising edge of the PWM signal.

12. The power controller according to claim 1, wherein: The power conversion device is a buck converter or a boost converter including two power semiconductors.

13. A power conversion device, comprising: Power semiconductors; as well as a power controller configured to supply a gate signal to a gate of the power semiconductor to regulate an output of the power conversion device, and the power controller includes a capacitor, The capacitor is arranged between a line of an error signal generated according to a difference between a reference voltage and a sense voltage of the power conversion device and a line of a SAW signal.

14. The power conversion device according to claim 13, wherein: The power controller is configured to generate a first SAW signal using a current source and the capacitor, and wherein one side of the capacitor is connected to the current source and the other side of the capacitor is connected to a line of the error signal.

15. The power conversion device according to claim 14, wherein: The power controller is configured to generate the first SAW signal by synthesizing a voltage at one side of the capacitor and a sense current of the power conversion device.

16. The power conversion device according to claim 14, wherein: The power controller comprises: an error amplifier configured to amplify and output a difference between the sense voltage and the reference voltage; and a buffer configured to buffer the output of the error amplifier, and Wherein, the output of the buffer is generated as the error signal.

17. The power conversion device according to claim 16, wherein: The capacitor is arranged between a line formed on an output side of the buffer and a line of the SAW signal.

18. The power conversion device according to claim 13, wherein: A control loop compensation circuit is connected to the error signal line.

19. The power conversion device according to claim 13, wherein: The output of the power conversion device is supplied to a display driving device which drives pixels at a constant frame rate.

20. The power conversion device according to claim 13, wherein: The capacitor includes a DC blocking capacitor that blocks a DC component and transmits an AC component.

Images