Electronic device

Abstract

The invention provides an electronic device. The electronic device comprises a substrate, a plurality of first signal lines, a plurality of first driving lines and a plurality of first conduction lines, the substrate includes an actuation region. The plurality of first signal lines are arranged in the actuating area and extend along a first direction. The plurality of first driving lines are arranged in the actuating area and extend along a second direction. The first direction is different from the second direction. One tail end of one of the plurality of first driving lines is electrically connected with one of the plurality of first signal lines through the through hole. The plurality of first conducting wires are arranged in the actuating area and extend along a second direction. One of the plurality of first conductive lines is located on an extension line of the one of the plurality of first driving lines. A distance is formed between a tail end of one of the plurality of first conduction lines and a tail end of one of the plurality of first driving lines.

Description

Technical Field

[0001] The present disclosure relates to an electronic device, and more particularly to a configuration design of a gate line. Background Art

[0002] Electronic devices have become an indispensable product in modern life. However, as the appearance of electronic devices tends to be light, thin, short and small, current display devices still fail to meet consumers' expectations in all aspects. For example, gate lines and data lines are arranged in different directions (e.g., vertically), so the border area of ​​the non-display area still occupies a large space. Therefore, developing a structural design that can meet the appearance trend of electronic devices is one of the topics that the industry is currently committed to researching. Summary of the invention

[0003] The present disclosure provides an electronic device, comprising: a substrate, a plurality of first signal lines, a plurality of first drive lines, and a plurality of first conductive lines. The substrate comprises an active area. The plurality of first signal lines are arranged in the active area and extend along a first direction. The plurality of first drive lines are arranged in the active area and extend along a second direction. The first direction is different from the second direction. One end of one of the plurality of first drive lines is electrically connected to one of the plurality of first signal lines through a through hole. The plurality of first conductive lines are arranged in the active area and extend along the second direction. One of the plurality of first conductive lines is located on an extension line of the one of the plurality of first drive lines. There is a spacing between one end of the one of the plurality of first conductive lines and the end of the one of the plurality of first drive lines.

[0004] In order to make the features and advantages of the present disclosure more obvious and understandable, some embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 Showing a circuit diagram of an electronic device according to a first embodiment of some embodiments of the present disclosure;

[0006] Figure 2 The first embodiment according to some embodiments of the present disclosure is shown, corresponding to Figure 1 A partial plan view of

[0007] Figure 3 A schematic plan view showing a second embodiment according to some embodiments of the present disclosure;

[0008] Figure 4 The second embodiment according to some embodiments of the present disclosure is shown, corresponding to Figure 3 A schematic cross-sectional view of the section line A1-A1';

[0009] Figure 5Showing a circuit diagram of an electronic device according to a third embodiment of some embodiments of the present disclosure;

[0010] Figure 6 The third embodiment according to some embodiments of the present disclosure is shown, corresponding to Figure 5 A partial plan view of

[0011] Figure 7 The third embodiment according to some embodiments of the present disclosure is shown, corresponding to Figure 6 A schematic cross-sectional view of the section line A2-A2';

[0012] Figure 8 Showing a circuit diagram of an electronic device according to a fourth embodiment of some embodiments of the present disclosure;

[0013] Fig. 9 The fourth embodiment according to some embodiments of the present disclosure is shown, corresponding to Figure 8 A partial plan view of

[0014] Fig.10 The fourth embodiment according to some embodiments of the present disclosure is shown, corresponding to Fig. 9 A schematic cross-sectional view of the section line A3-A3';

[0015] Fig.11 Showing a circuit diagram of an electronic device according to a fifth embodiment of some embodiments of the present disclosure;

[0016] Fig.12 The fifth embodiment according to some embodiments of the present disclosure is shown, corresponding to Fig.11 A partial plan view of

[0017] Fig.13 The fifth embodiment according to some embodiments of the present disclosure is shown, corresponding to Fig.12 A schematic cross-sectional view of section line A4-A4';

[0018] Fig.14 Showing a circuit diagram of an electronic device according to a sixth embodiment of some embodiments of the present disclosure;

[0019] Fig.15 The sixth embodiment according to some embodiments of the present disclosure is shown, corresponding to Fig.14 A partial plan view of

[0020] Fig.16 The sixth embodiment according to some embodiments of the present disclosure is shown, corresponding to Fig.15 Schematic cross-sectional view along the section line A5-A5'.

[0021]

Explanation of symbols

[0022] 10,20,30,40,50,60:Electronic devices

[0023] 100:Substrate

[0024] AA: Action Area

[0025] A1-A1',A2-A2',A3-A3',A4-A4',A5-A5': hatching line

[0026] C: Second transmission line

[0027] D: Data cable

[0028] DI, DI1, DI2, DI3: Dielectric layer

[0029] GH,GH1,GH2,GHn:Signal line

[0030] GV, GV1, GV2, GVn: drive line

[0031] DSL, DSL1, DSL2, DSLn: First Transmission Line

[0032] S,S1,S2,Sn: Spacing

[0033] T, T1, T2, Tn: Through hole

[0034] TFT: Thin Film Transistor

[0035] P: Pixel electrode

[0036] V: Common electrode

[0037] X: First direction

[0038] Y: Second direction

[0039] Z: height direction DETAILED DESCRIPTION

[0040] The following is a detailed description of the electronic device of the embodiment of the present disclosure. It should be understood that the following description provides many different embodiments for implementing different aspects of some embodiments of the present disclosure. The specific components and arrangements described below are only for simple and clear description of some embodiments of the present disclosure. Of course, these are only used as examples and are not limitations of the present disclosure. In addition, similar and / or corresponding numbers may be used in different embodiments to indicate similar and / or corresponding components to clearly describe the present disclosure. However, the use of these similar and / or corresponding numbers is only for the purpose of simply and clearly describing some embodiments of the present disclosure, and does not represent any correlation between the different embodiments and / or structures discussed.

[0041] The present disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that in order to facilitate the understanding of the readers and the simplicity of the drawings, the multiple drawings in the present disclosure only depict a portion of the electronic device, and the specific components in the drawings are not drawn according to the actual scale. In addition, the number and size of each component in the drawings are only for illustration and are not intended to limit the scope of the present disclosure.

[0042] It should be understood that the components or devices of the drawings may exist in various forms known to those skilled in the art. In addition, relative terms, such as "lower" or "bottom" or "higher" or "top", may be used in the embodiments to describe the relative relationship of one component of the drawings to another component. It is understood that if the device of the drawings is turned upside down, the component described on the "lower" side will become the component on the "higher" side. The embodiments of the present disclosure may be used in conjunction with the attached drawings. Figure 1 It is also understood that the drawings of the present disclosure are also considered as part of the disclosure. Furthermore, when a first material layer is mentioned as being located on or above a second material layer, it includes the situation where the first material layer is in direct contact with the second material layer, or there may be one or more other material layers in between, in which case the first material layer and the second material layer may not be in direct contact.

[0043] Certain words are used throughout the specification and the claims that follow to refer to specific components. It should be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following specification and claims, words such as "include", "contain", "have" are open-ended words, and therefore should be interpreted as "including but not limited to..." Therefore, when the terms "include", "contain" and / or "have" are used in the description of the present disclosure, they specify the existence of corresponding features, areas, steps, operations and / or components, but do not exclude the existence of one or more corresponding features, areas, steps, operations and / or components.

[0044] The directional terms mentioned herein, such as "up", "down", "front", "back", "left", "right", etc., are only references to the directions of the accompanying drawings. Therefore, the directional terms used are for illustration and not for limiting the present disclosure. In the accompanying drawings, each figure shows the general characteristics of the methods, structures and / or materials used in a particular embodiment. However, these drawings should not be interpreted as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative size, thickness and position of each film layer, region and / or structure may be reduced or enlarged.

[0045] When a corresponding component (such as a film layer or region) is referred to as being "on another component", it can be directly on the other component, or other components can exist between the two. On the other hand, when a component is referred to as being "directly on another component", there is no component between the two. In addition, when a component is referred to as being "on another component", the two have a top-down relationship in the top view direction, and the component can be above or below the other component, and this top-down relationship depends on the orientation of the device.

[0046] In addition, it should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various components, assemblies, or parts, these components, assemblies, or parts should not be limited by these terms. These terms are only used to distinguish different components, assemblies, regions, layers, or parts. Therefore, a first component, component, region, layer, or part discussed below may be referred to as a second component, component, region, layer, or part without departing from the teachings of the present disclosure.

[0047] In the text, the terms "about" and "substantially" generally indicate a range within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given value. The numbers given here are approximate numbers, that is, in the absence of a specific description of "about" and "substantially", the meaning of "about" and "substantially" can still be implied. In addition, the term "a range between a first value and a second value" means that the range includes the first value, the second value, and other values ​​between them.

[0048] It should be understood that the following embodiments may replace, reorganize, or mix features in several different embodiments to complete other embodiments without departing from the spirit of the present disclosure. Features between embodiments may be mixed and matched as long as they do not violate the spirit of the invention or conflict with each other.

[0049] In the present disclosure, the thickness, length and width can be measured by an optical microscope, and the thickness can be measured by a cross-sectional image in an electron microscope, but it is not limited to this. In addition, any two values ​​or directions used for comparison may have a certain error. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction may be between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0 degrees and 10 degrees.

[0050] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as commonly understood by those skilled in the art to which the present disclosure belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the embodiments of the present disclosure.

[0051] The embodiment of the present invention uses a T-shaped wire structure to make the gate drive line that transmits the gate signal and the wire that transmits the data signal run in the same direction. In this way, the data driver and the gate driver can be set on the same side to achieve the purpose of a narrow frame. In addition, the embodiment of the present invention further reduces the optical unevenness (mura) phenomenon caused by the wiring structure by setting a first conductive line (also called a dummy signal line) parallel to the data line. Furthermore, the embodiment of the present invention further reduces the optical unevenness (mura) phenomenon caused by different voltages by setting a second conductive line to cover the through hole at the end of the gate drive line.

[0052] First, a first embodiment among some embodiments of the present disclosure is described. Figure 1 A circuit diagram showing the electronic device 10 is shown. Figure 2 Displays the corresponding Figure 1 Partial plan view.

[0053] Please refer to Figure 1 , Figure 1 The circuit diagram of the electronic device 10 is shown. It should be noted that in order to clearly describe the features of the present invention, Figure 1 The circuit diagram only shows some of the components.

[0054] In some embodiments, the electronic device 10 may include a display device, a backlight device, an antenna device, a sensing device, or a splicing device, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The electronic components may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may include a light emitting diode or a photodiode, but is not limited thereto.

[0055] The display device may be a non-self-luminous display device or a self-luminous display device. The self-luminous display device may include a light emitting diode, such as an organic light emitting diode (OLED), a sub-millimeter light emitting diode (mini LED), a micro LED, or a quantum dot light emitting diode (quantum dot LED), but is not limited thereto. The non-self-luminous display device may be an electrowetting display device, an electrophoretic display device, or a liquid crystal display device, but is not limited thereto. The liquid crystal display device may be a twisted nematic (TN) type liquid crystal display device, a super twisted nematic (STN) type liquid crystal display device, a double layer super twisted nematic (DSTN) type liquid crystal display device, a vertical alignment (VA) type liquid crystal display device, an in-plane switching (IPS) type liquid crystal display device, a cholesteric type liquid crystal display device, a blue phase (Blue Phase) type liquid crystal display device, a marginal field effect (FFS) type liquid crystal display device, a low temperature polycrystalline silicon liquid crystal display device (LTPS) or any other suitable liquid crystal display device.

[0056] The antenna device may be a liquid crystal type antenna device or a non-liquid crystal type antenna device, and the sensing device may be a sensing device for sensing capacitance, light, heat or ultrasound, but is not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any combination of the foregoing, but is not limited thereto. The following text will use a display device as an electronic device or a splicing device to illustrate the contents of the present disclosure, but the present disclosure is not limited thereto.

[0057] like Figure 1 As shown, the electronic device 10 includes a substrate 100, which includes an active area AA and an edge area (not shown) outside the active area AA. Figure 1As shown, the electronic device 10 further includes a plurality of signal lines GH1, GH2 ... GHn and a plurality of driving lines GV1, GV2 ... GVn, wherein the signal lines GH1, GH2 ... GHn can be referred to as gate signal lines, and the driving lines GV1, GV2 ... GVn can be referred to as gate driving lines, both of which can be used to transmit scan signals. It should be noted that although the present disclosure uses the gate signal lines and the gate driving lines as examples, in some embodiments, Figure 1 The plurality of signal lines GH1, GH2, ... GHn and the plurality of driving lines GV1, GV2, ... GVn in the circuit may also be data signal lines and data driving lines for transmitting data signals, respectively.

[0058] like Figure 1 As shown, the signal line GH1 is electrically connected to the driving line GV1 through the through hole T1, the signal line GH2 is electrically connected to the driving line GV2 through the through hole T2, and the signal line GHn is electrically connected to the driving line GVn through the through hole Tn. More specifically, the signal line GH1, the signal line GH2, and the signal line GHn extend from the edge area of ​​one side (e.g., the left side of the electronic device 10) through the active area AA to the edge area of ​​the other side (e.g., the right side of the electronic device 10), and the driving lines GV1, the driving lines GV2, and the driving lines GVn extend upward from the edge area of ​​the other side (e.g., the lower side of the electronic device 10), and their ends are electrically connected to the signal lines GH1, the signal lines GH2, and the signal lines GHn through the through holes T1, T2, and Tn, respectively. That is, the signal lines GH1, the signal lines GH2, and the signal lines GHn start from the edge area and end at the edge area, while the driving lines GV1, the driving lines GV2, and the driving lines GVn start from the edge area but end at the active area AA. That is, the signal lines GH1, GH2, . . . GHn and the driving lines GV1, GV2, . . . GVn are at least partially disposed in the active area AA.

[0059] like Figure 1As shown, the electronic device 10 further includes a plurality of first conductive lines DSL1, DSL2, ... DSLn. The plurality of first conductive lines DSL1, DSL2, ... DSLn can be regarded as dummy signal lines, and are used to reduce the problems derived from the stacking structure difference caused by the original T-shaped routing design in terms of manufacturing, electrical properties, etc. The first conductive lines DSL1, the first conductive lines DSL2, ... the first conductive lines DSLn can be arranged corresponding to the signal lines GH1, the signal lines GH2, ... the signal lines GHn, and can also be arranged corresponding to the data lines (not shown), but not limited thereto. It should be noted that the first conductive lines DSL1, the first conductive lines DSL2, ... the first conductive lines DSLn correspond to the driving lines GV1, the driving lines GV2, ... the driving lines GVn from the edge area of ​​one side (for example, the upper side of the electronic device 10) through a spacing. That is, the first conductive lines DSL1, the first conductive lines DSL2, ... the first conductive lines DSLn start from the edge area but end at the active area AA. That is, the first conductive lines DSL1, the first conductive lines DSL2, ... the first conductive lines DSLn are at least partially arranged in the active area AA.

[0060] In some embodiments, the lengths of two adjacent driving lines are different. For example, the length of the driving line GV1 is less than the length of the driving line GV2. The lengths of two adjacent first conductive lines are also different. For example, the length of the first conductive line DSL1 is greater than the length of the first conductive line DSL2. In some embodiments, the length of the driving line and the length of the first conductive line present an opposite trend, for example, as described later Figure 2 As shown in , along the first direction X, as the length of the driving line becomes longer (for example, the driving line GV2 is longer than the driving line GV1), the length of the first conductive line becomes shorter (for example, the first conductive line DSL2 is shorter than the first conductive line DSL1).

[0061] Next, please refer to Figure 2 , Figure 2 Displays the corresponding Figure 1 It should be noted that in order to clearly describe the characteristics of this case, Figure 2 Only some components are shown, and other layers and / or components (such as dielectric layers, etc.) are omitted.

[0062] like Figure 2 As shown, the electronic device 10 includes a substrate 100. Figure 2As shown, the electronic device 10 includes a signal line GH1 and a signal line GH2, which are disposed on a substrate 100 and extend along a first direction X. The electronic device 10 also includes a driving line GV1 and a driving line GV2, which are disposed on the substrate 100 and extend along a second direction Y. The electronic device 10 also includes a plurality of data lines D disposed on the substrate 100 and extend along the second direction Y. The electronic device 10 also includes a first conductive line DSL1 and a first conductive line DSL2 disposed on the substrate 100 and extend along the second direction Y. In some embodiments, the first direction X is different from the second direction Y. For example, in this embodiment, the first direction X is perpendicular to the second direction Y.

[0063] In some embodiments, the driving line GV1, the driving line GV2, the data line D, the first conductive line DSL1, and the first conductive line DSL2 may be located in the same layer and located on the signal line GH1 and the signal line GH2. In some embodiments, the data line D is parallel to and does not overlap with the driving line GV1, the driving line GV2, the first conductive line DSL1, and the first conductive line DSL2.

[0064] In some embodiments, the first conductive line DSL1 is not connected to the driving line GV1. The first conductive line DSL1 is located on the extension line of the driving line GV1, and the driving line GV1 is also located on the extension line of the first conductive line DSL1. In addition, the first conductive line DSL1 corresponds to the driving line GV1 by a spacing S1. That is, there is a spacing S1 between the end of the first conductive line DSL1 and the end of the driving line GV1 close to the end.

[0065] In some embodiments, the first conductive line DSL2 is not connected to the driving line GV2. The first conductive line DSL2 is located on the extension line of the driving line GV2, and the driving line GV2 is also located on the extension line of the first conductive line DSL2. In addition, the first conductive line DSL2 corresponds to the driving line GV2 by a spacing S2. That is, there is a spacing S2 between the end of the first conductive line DSL2 and the end of the driving line GV2 close to the end. Depending on actual needs, the spacing S1 and the spacing S2 can be the same or different.

[0066] In some embodiments, the signal line GH1 extending along the first direction X is electrically connected to the driving line GV1 located in a different layer and extending along the second direction Y through the through hole T1. In some embodiments, the signal line GH2 extending along the first direction X is electrically connected to the driving line GV2 located in a different layer and extending along the second direction Y through the through hole T2. The gate signal generated by the gate driver (not shown) can be transmitted to the corresponding signal lines GH1...GHn through the driving lines GV1...GVn.

[0067] For the convenience of description, the spacing S1 and the spacing S2 are sometimes collectively referred to as multiple spacings S or spacings S, the first conduction line DSL1 and the first conduction line DSL2 are referred to as multiple first conduction lines DSL or first conduction line DSL, the driving line GV1 and the driving line GV2 are collectively referred to as multiple driving lines GV or driving line GV, the signal line GH1 and the signal line GH2 are collectively referred to as multiple signal lines GH or signal line GH, and the through hole T1 and the through hole T2 are collectively referred to as multiple through holes T or through hole T.

[0068] like Figure 2 As shown, the electronic device 10 includes a plurality of thin film transistors TFT for controlling whether a data signal is written into a pixel unit. In some embodiments, the thin film transistor may include a switching transistor, a driving transistor, a reset transistor, a transistor amplifier or other suitable thin film transistors, but is not limited thereto. In some embodiments, the data line D is connected to the source of the thin film transistor TFT, and the signal line GH is connected to the gate of the thin film transistor TFT.

[0069] It should be understood that the number of thin film transistors is not limited to that shown in the figure, and according to different embodiments, the electronic device 10 may have other suitable numbers or types of thin film transistors. Furthermore, the types of thin film transistors may include top gate thin film transistors, bottom gate thin film transistors, dual gate or double gate thin film transistors, or a combination of the foregoing. According to some embodiments, the thin film transistor may be further electrically connected to the pixel electrode P, but is not limited thereto. It should be noted that the thin film transistor may exist in various forms well known to those skilled in the art, and the detailed structure of the thin film transistor will not be repeated here.

[0070] like Figure 2 As shown, the electronic device 10 includes a plurality of common electrodes V, which may at least partially overlap with the pixel electrodes P to form a capacitor. In some embodiments, whether the data of the data line D is input into the pixel electrode P may be controlled by the signal line GH.

[0071] As described above, the signal line GH is electrically connected to the driving line GV of different layers through the through hole T, forming a T-shaped wiring structure, thereby reducing the area of ​​the edge region and achieving a narrow frame effect.

[0072] Next, a second embodiment among some embodiments of the present disclosure is described. Figure 3 Display the plan view. Figure 4 Displays the corresponding Figure 3The second embodiment is similar to the first embodiment, and the difference is that the electronic device 20 further includes a second conductive line C disposed on the driving line GV. Figure 3 In the embodiment of the present invention, the second conductive line C covers the through hole T, covers a portion of the data line D and extends along the second direction Y. The second conductive line C and the first conductive line DSL can receive the same voltage, but the present disclosure is not limited thereto. By making the second conductive line C receive the same voltage as the first conductive line DSL, the difference in display caused by the different voltages of the driving line GV, the signal line GH and the first conductive line DSL is reduced, and the generation of optical non-uniformity caused by the T-shaped routing structure can be further reduced.

[0073] exist Figure 3 In the embodiment, a portion of the second conductive line C extends along the first direction X, and another portion extends along the second direction Y. That is, the second conductive line C presents (but is not limited to) an inverted L shape. In addition, Figure 4 In more detail, the Figure 3 A schematic cross-sectional view of the section line A1-A1' in FIG. Figure 4 In the embodiment of FIG. 1 , a signal line GH, a conductive layer M, and a driving line GV are disposed on the substrate 100. Figure 4 In the embodiment, the signal line GH is electrically connected to the conductive layer M and the driving line GV via the through hole T. In some embodiments, the electronic device 20 may not include the conductive layer M, so that the signal line GH can be directly electrically connected to the driving line GV via the through hole T. Figure 4 In the embodiment of FIG. 1 , the second conductive line C covers the through hole T and is located on a portion of the driving line GV. Figure 4 In the embodiment of FIG. 1 , the driving line GV and the first conductive line DSL have a spacing S and are located in the same layer. Figure 4 It can be seen that the signal line GH is electrically connected to the driving line GV through the through hole T.

[0074] exist Figure 4 In the embodiment of FIG. 1 , a dielectric layer DI is also disposed on the substrate 100 , which includes a first dielectric layer DI1 , a second dielectric layer DI2 on the first dielectric layer DI1 , and a third dielectric layer DI3 on ​​the second dielectric layer DI2 , but the present disclosure is not limited thereto.

[0075] In some embodiments, according to different needs, the substrate 100 may include or may be a rigid substrate, a flexible substrate, or a combination of the aforementioned substrates, but the present disclosure is not limited thereto. In some embodiments, the material of the rigid substrate may include or may be a wafer, glass, quartz, ceramics, sapphire, other suitable materials, or a combination of the aforementioned materials, but the present disclosure is not limited thereto. In some embodiments, the material of the flexible substrate may include or may be polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), other suitable materials, or a combination of the aforementioned materials, but the present disclosure is not limited thereto. In some embodiments, the substrate 100 may be a single-layer or multi-layer structure, but the present disclosure is not limited thereto. In some embodiments, the substrate 100 may include or may be a light-transmitting substrate, a semi-transmitting substrate, or an opaque substrate.

[0076] In some embodiments, the signal line GH, the conductive layer M, the driving line GV, and the first conductive line DSL may include conductive materials, such as one or more metals, metal nitrides, conductive metal oxides, suitable materials, or combinations thereof. The metal may include molybdenum, tungsten, titanium, tantalum, platinum, or hafnium, but is not limited thereto. The metal nitride may include molybdenum nitride, tungsten nitride, titanium nitride, and tantalum nitride, but is not limited thereto. The conductive metal oxide may include ruthenium oxide and indium tin oxide, but is not limited thereto. It should be noted that at least one of the signal line GH, the conductive layer M, the driving line GV, and the first conductive line DSL may be a multi-layer structure, such as a multi-layer metal structure including at least two metals of molybdenum, aluminum, titanium, and copper, but not limited thereto.

[0077] In some embodiments, the signal line GH, the conductive layer M, the driving line GV, the first conductive line DSL, and the second conductive line C can be formed by deposition, sputtering, resistance heating evaporation, electron beam evaporation, or any other suitable method. The deposition method includes chemical vapor deposition (CVD), physical vapor deposition (PVD), etc.

[0078] In some embodiments, the dielectric layer DI may be a single layer or a multilayer structure. The dielectric layer DI may include a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, a high dielectric constant (high-k) dielectric material, or any other suitable dielectric material, or a combination thereof, but not limited thereto. The material of the high dielectric constant (high-k) dielectric material may include metal oxides, metal nitrides, metal silicides, transition metal oxides, transition metal nitrides, transition metal silicides, metal oxynitrides, metal aluminates, zirconium silicates, zirconium aluminates, etc., but not limited thereto. For example, the high-k dielectric material may be LaO, AlO, ZrO, TiO, Ta2O5, Y2O3, SrTiO3 (STO), BaTiO3 (BTO), BaZrO, HfO2, HfO3, HfZrO, HfLaO, HfSiO, HfSiON, LaSiO, AlSiO, HfTaO, HfTiO, HfTaTiO, HfAlON, (Ba,Sr)TiO3 (BST), Al2O3, other high-k dielectric materials of other suitable materials, or combinations of the foregoing, but are not limited thereto.

[0079] In some embodiments, the dielectric layer DI may be formed by a deposition method, such as chemical vapor deposition (CVD), atomic layer deposition (ALD), spin coating or other suitable methods, but not limited thereto. The chemical vapor deposition method may be, for example, low pressure chemical vapor deposition (LPCVD), low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), etc.

[0080] Next, a third embodiment among some embodiments of the present disclosure is described. Figure 5 Displays circuit diagrams of electronic devices, Figure 6 Displays the corresponding Figure 5 Partial plan view of Figure 7 Displays the corresponding Figure 6Schematic cross-sectional view of section line A2-A2'. The third embodiment is similar to the second embodiment, except that the second conductive line C of the electronic device 30 does not cover the data line D but covers the through hole T and the driving line GV and extends along the second direction Y. By covering the through hole T and the driving line GV, the difference in display caused by the different voltages of the driving line GV, the signal line GH and the first conductive line DSL can be reduced, and the generation of optical non-uniformity caused by the T-shaped routing structure can be further reduced.

[0081] Specifically, Figure 5 As shown in the embodiment, as the lengths of two adjacent driving lines GV are different (for example, the length of the driving line GV1 is less than the length of the driving line GV2), the lengths of two adjacent second conductive lines C are also different (for example, the length of the second conductive line C covering the driving line GV1 is less than the length of the second conductive line C covering the driving line GV2). Figure 5 In the embodiment of FIG. 1 , the second conductive line C extends only along the second direction Y. Figure 6 As shown in the embodiment, the second conductive line C extends from the through hole T and covers the driving line GV. In addition, Figure 7 In more detail, the Figure 6 The cross-sectional view of the section line A2-A2' in FIG. 1 is similar to FIG. 1 except that the second conductive line C covers the portion of the driving line GV located in the active area AA. Figure 4 The cross-sectional schematic diagram is not repeated here.

[0082] Next, a fourth embodiment among some embodiments of the present disclosure is described. Figure 8 Displays circuit diagrams of electronic devices, Fig. 9 Displays the corresponding Figure 8 Partial plan view of Fig.10 Displays the corresponding Fig. 9 Schematic cross-sectional view of section line A3-A3'. The fourth embodiment is similar to the third embodiment, except that the second conductive line C of the electronic device 40 covers the through hole T, the spacing S and the first conductive line DSL and extends along the second direction Y. By covering the through hole T and the first conductive line DSL, the difference in display caused by the different voltages of the driving line GV, the signal line GH and the first conductive line DSL can be reduced, and the generation of optical non-uniformity caused by the T-shaped wiring structure can be further reduced.

[0083] Specifically, Figure 8 As shown in the embodiment, as the lengths of the two first conductive lines DSL are different (for example, the length of the first conductive line DSL1 is greater than the length of the first conductive line DSL2), the lengths of the two adjacent second conductive lines C are also different (for example, the length of the second conductive line C covering the first conductive line DSL1 is greater than the length of the second conductive line C covering the first conductive line DSL2). Fig. 9As shown in the embodiment, the second conductive line C extends from the through hole T and covers the gap S and the first conductive line DSL. In addition, Fig.10 In more detail, the Fig. 9 The cross-sectional view of the section line A3-A3' in FIG. 1 is similar to FIG. 1 except that the second conductive line C covers a portion of the driving line GV (eg, the through hole T), the spacing S and the first conductive line DSL. Figure 4 The cross-sectional schematic diagram is not repeated here.

[0084] Next, a fifth embodiment among some embodiments of the present disclosure is described. Fig.11 Displays circuit diagrams of electronic devices, Fig.12 Displays the corresponding Fig.11 Partial plan view of Fig.13 Displays the corresponding Fig.12 Schematic cross-sectional view of section line A4-A4'. The fifth embodiment is similar to the fourth embodiment, except that the second conductive line C of the electronic device 50 covers the driving line GV, the through hole T, the spacing S and the first conductive line DSL and extends along the second direction Y. By covering the through hole T, the driving line GV and the first conductive line DSL with the second conductive line C, the difference in display caused by the different voltages of the driving line GV, the signal line GH and the first conductive line DSL can be reduced, and the generation of optical non-uniformity caused by the T-shaped routing structure can be further reduced.

[0085] Specifically, Fig.11 As shown in the embodiment, since the second conductive line C extends from the first driving line GV1 to the first conductive line DSL1 via the through hole T1, its length change is not directly related to the first driving line GV1 and the first conductive line DSL1. For example, the second conductive line C can be of a fixed length. Fig.12 As shown in the embodiment, the second conductive line C extends from the driving line GV through the through hole T and the space S and covers the first conductive line DSL. In addition, Fig.13 In more detail, the Fig.12 The cross-sectional view of the section line A4-A4' in FIG. 1 is similar to FIG. 1 except that the second conductive line C covers the portion of the driving line GV located in the active area AA (eg, the through hole T), the spacing S and the first conductive line DSL. Figure 4 The cross-sectional schematic diagram is not repeated here.

[0086] Next, a sixth embodiment among some embodiments of the present disclosure is described. Fig.14 Displays circuit diagrams of electronic devices, Fig.15 Displays the corresponding Fig.14 Partial plan view of Fig.16 Displays the corresponding Fig.15Schematic cross-sectional view of section line A5-A5'. The sixth embodiment is similar to the fifth embodiment, except that the second conductive line C of the electronic device 60 covers the signal line GH (extending along the first direction X) in addition to the drive line GV, the through hole T, the spacing S and the first conductive line DSL. By covering the through hole T, the signal line GH, the drive line GV and the first conductive line DSL with the second conductive line C, the difference in display caused by the different voltages of the drive line GV, the signal line GH and the first conductive line DSL can be reduced, and the generation of optical non-uniformity caused by the T-shaped routing structure can be further reduced.

[0087] Specifically, Fig.14 As shown in the embodiment, the second conductive line C extends along the first direction X and the second direction Y at the same time. For example, when the second conductive line C extends along the first direction X, the second conductive line C covers the portion of the signal line GH located in the active area AA; when the second conductive line C extends along the second direction Y, the second conductive line C extends from the first driving line GV1 to the first conductive line DSL1 via the through hole T1. That is, the second conductive line C presents a grid shape. Fig.15 As shown in the embodiment, the second conductive line C not only extends from the driving line GV through the through hole T and the space S and covers the first conductive line DSL, but also covers all the signal lines GH. Fig.16 In more detail, the Fig.15 The cross-sectional diagram of the section line A5-A5' in FIG. Fig.15 The section line A5-A5' and Fig.13 The section line A4-A4' is similar (along the second direction Y), so Fig.16 The cross-section diagram is similar to Fig.13 , I will not go into details here.

[0088] In summary, according to some embodiments of the present disclosure, the signal line and the driving line are formed into a T-shaped wiring structure, so that the driving device can be set on the same side, thereby achieving the purpose of narrow frame. In addition, the first conductive line is used to reduce the problems derived from the stacking structure difference caused by the original T-shaped wiring structure. Moreover, the second conductive line is used to cover the through hole to improve the optical unevenness caused by the voltage difference.

[0089] Although the embodiments and advantages of the present disclosure have been disclosed as above, it should be understood that any person skilled in the art can make changes, substitutions and modifications without departing from the spirit and scope of the present disclosure. The features between the embodiments of the present disclosure can be mixed and matched as needed as long as they do not violate the spirit of the invention or conflict with each other. In addition, the scope of protection of the present disclosure is not limited to the processes, machines, manufacturing, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person skilled in the art can understand the current or future developed processes, machines, manufacturing, material compositions, devices, methods and steps from the disclosure of the present disclosure, as long as they can implement substantially the same functions or obtain substantially the same results in the embodiments described herein, they can all be used according to the present disclosure. Therefore, the scope of protection of the present disclosure includes the above-mentioned processes, machines, manufacturing, material compositions, devices, methods and steps. The scope of protection of the present disclosure shall be subject to the scope of the appended claims. Any embodiment or claim of the present disclosure does not need to achieve all the purposes, advantages and features disclosed in this disclosure.

Claims

1. An electronic device, comprising: A substrate including an active area; A plurality of first signal lines are disposed in the active area and extend along a first direction; A plurality of first driving lines are disposed in the active area and extend along a second direction, wherein the first direction is different from the second direction, and an end of one of the plurality of first driving lines is electrically connected to one of the plurality of first signal lines through a through hole; and A plurality of first conductive lines are disposed in the active area and extend along the second direction, wherein one of the plurality of first conductive lines is located on an extension line of the one of the plurality of first driving lines, and there is a distance between an end of the one of the plurality of first conductive lines and the end of the one of the plurality of first driving lines.

2. The electronic device according to claim 1, wherein: The invention further comprises: a plurality of second conducting lines, which are disposed above the plurality of first driving lines and extend along the second direction, and a part of one of the plurality of second conducting lines covers the through hole.

3. The electronic device according to claim 2, wherein: The one of the plurality of second conductive lines covers the one of the plurality of first driving lines.

4. The electronic device as claimed in claim 2, characterized in that: The one of the plurality of second conductive lines covers the one of the plurality of first conductive lines and the interval.

5. The electronic device as claimed in claim 2, characterized in that: The one of the plurality of second conductive lines covers the one of the plurality of first driving lines, the gap, and the one of the plurality of first conductive lines.

6. The electronic device as claimed in claim 2, characterized in that: The plurality of first transmission lines and the plurality of second transmission lines receive the same voltage.

7. The electronic device as claimed in claim 1, characterized in that: The first direction is perpendicular to the second direction.

8. The electronic device as claimed in claim 1, wherein: The plurality of first signal lines are used to transmit scan signals.

9. The electronic device as claimed in claim 1, wherein: The plurality of first signal lines are used to transmit data signals.

10. The electronic device according to claim 1, wherein: The lengths of two adjacent ones of the plurality of first driving lines are different.

Images