Current signal self-adaptive sampling circuit and system and electronic equipment

Abstract

The invention relates to the technical field of signal processing in analog integrated circuits, and particularly discloses a current signal self-adaptive sampling circuit, a current signal self-adaptive sampling system and electronic equipment, which comprise a current sampling unit, a voltage conversion unit, a switching signal control unit and a voltage amplification output unit, the current sampling unit is used for sampling a current target current signal and converting the current target current signal into a corresponding sampling voltage signal; the switching signal control unit is used for generating switching control signals with different frequencies according to a preset frequency division control signal; the voltage conversion unit is used for converting the sampling voltage signal into a differential-mode voltage signal on a common-mode level according to the corresponding switch control signal; and the voltage amplification output unit is used for performing amplification processing based on offset voltage elimination on the differential mode voltage signal according to the corresponding switch control signal to obtain a voltage output signal. The current signal adaptive sampling circuit provided by the invention can automatically and accurately sample and amplify the target current signal.

Description

Technical Field

[0001] The present invention relates to the technical field of signal processing in analog integrated circuits, and in particular to a current signal adaptive sampling circuit, a current signal adaptive sampling system and electronic equipment. Background Art

[0002] Current signal sampling plays an important role in the field of industrial automation, especially in the application of sensors and transmitters, which require accurate and fast measurement of the current in the circuit and convert it into an electrical signal output. The current sampling circuit needs to have the characteristics of high precision, low distortion, and high speed. Current sampling is often used in power electronics, electric vehicles, optoelectronics, communications and other fields, and is an indispensable part of the field of industrial automation.

[0003] Currently, there are few sampling and amplifying circuits for weak current signals. The schematic diagram of the conventional current signal sampling and amplifying circuit is as follows: Figure 1 As shown, the current signal sampling method is to connect one end of the target current signal Isamp to the reference voltage Vref through a resistor Rs, and the other end to the ground line, so that the voltage value flowing through the resistor Rs can directly reflect the size of the current Isamp. Then the voltage value on the resistor Rs is amplified and outputted by a corresponding voltage value through a dual-end input and single-end output operational amplifier to achieve the purpose of amplifying and outputting the target current signal. Although this method can achieve the purpose of sampling and amplifying the target current signal, one end of its target sampling current Isamp must be connected to the voltage Vref through a resistor Rs, and the other end is connected to the ground line, which greatly limits its actual application environment. Isamp also has a large dependence on the current capacity of Vref. At the same time, the offset error of its dual-end input and single-end output operational amplifier will also be introduced into the target sampling current, which will cause a large error between the final output current signal and the real current signal.

[0004] Therefore, how to provide a sampling circuit that can automatically and accurately sample and amplify the target current signal has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0005] The present invention provides a current signal adaptive sampling circuit, a current signal adaptive sampling system and an electronic device, which solve the problem existing in the related art that it is impossible to accurately sample and amplify the target current signal.

[0006] As a first aspect of the present invention, a current signal adaptive sampling circuit is provided, which includes: a current sampling unit, a voltage conversion unit, a switch signal control unit and a voltage amplification output unit, wherein the current sampling unit is electrically connected to the voltage conversion unit, the voltage amplification output unit is electrically connected to the voltage conversion unit, and the switch signal control unit is electrically connected to the voltage conversion unit and the voltage amplification output unit, respectively.

[0007] The current sampling unit is used to sample the current target current signal and convert it into a corresponding sampling voltage signal;

[0008] The switch signal control unit is used to generate switch control signals of different frequencies according to a preset frequency division control signal;

[0009] The voltage conversion unit is used to convert the sampled voltage signal into a differential mode voltage signal at a common mode level according to a corresponding switch control signal;

[0010] The voltage amplification output unit is used to obtain a voltage output signal corresponding to the current target current signal after performing an amplification process on the differential mode voltage signal based on eliminating the offset voltage according to the corresponding switch control signal.

[0011] Further, the voltage amplification output unit includes: a cross sampling storage module and an amplification processing module, the input end of the cross sampling storage module is connected to the output end of the voltage conversion unit, the output end of the cross sampling storage module is connected to the input end of the amplification processing module, and the output end of the amplification processing module is the output end of the voltage amplification output unit.

[0012] The cross sampling storage module is used to perform cross sampling storage processing on the differential mode voltage signal in each switching cycle to obtain a cross sampling storage result;

[0013] The amplification processing module is used to amplify the cross sampling storage result to obtain a voltage output signal after eliminating the offset voltage.

[0014] Further, the cross sampling storage module includes: a first sampling storage unit and a second sampling storage unit, the first sampling storage unit and the second sampling storage unit are electrically connected, and both ends of the first sampling storage unit and the second sampling storage unit are respectively connected to the output end of the voltage conversion unit and the input end of the amplification processing module.

[0015] The first sampling storage unit and the second sampling storage unit are both used to turn on one sampling storage branch of each to obtain a first storage voltage in the first half of each switching cycle, and to turn on the other sampling storage branch of each to obtain a second storage voltage in the second half of each switching cycle.

[0016] Further, the amplification processing module includes: a fully differential amplifier, a positive phase end amplification processing unit and a negative phase end amplification processing unit, the positive phase end amplification processing unit is connected to the positive input end of the fully differential amplifier, the negative phase end amplification processing unit is connected to the negative input end of the fully differential amplifier, the positive phase output end of the fully differential amplifier is connected to the positive phase end amplification processing unit, and the negative phase output end of the fully differential amplifier is connected to the negative phase end amplification processing unit.

[0017] The positive phase end amplification processing unit and the negative phase end amplification processing unit can jointly determine the amplification factor of the fully differential amplifier under the control of the switch control signal.

[0018] The positive phase end amplification processing unit and the negative phase end amplification processing unit can also control their respective amplification processing switch branches according to the switch control signal to cooperate with the cross sampling storage module, so that the voltage difference between the first storage voltage and the second storage voltage offsets the offset voltage of the fully differential amplifier;

[0019] The fully differential amplifier is used to amplify the differential mode voltage signal according to a determined amplification factor to obtain a voltage output signal corresponding to the current target current signal.

[0020] Further, the positive phase end amplification processing unit includes an eighth capacitor, a tenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch and a sixteenth switch,

[0021] Two ends of the thirteenth switch are respectively connected to the non-inverting input terminal and the non-inverting output terminal of the fully differential amplifier;

[0022] One end of the eighth capacitor is connected to the non-inverting input end of the fully differential amplifier, the other end of the eighth capacitor is respectively connected to one end of the fourteenth switch and one end of the fifteenth switch, the other end of the fourteenth switch is connected to the non-inverting output end of the fully differential amplifier, the other end of the fifteenth switch is connected to one end of the tenth capacitor, the other end of the tenth capacitor is connected to one end of the sixteenth switch, the other end of the sixteenth switch is connected to the non-inverting output end of the fully differential amplifier, and the other end of the fifteenth switch and one end of the tenth capacitor are also connected to the input end of the common mode level;

[0023] The negative phase end amplification processing unit includes a ninth capacitor, an eleventh capacitor, a seventeenth switch, an eighteenth switch, a nineteenth switch and a twentieth switch.

[0024] Two ends of the seventeenth switch are respectively connected to the negative phase input terminal and the negative phase output terminal of the fully differential amplifier;

[0025] One end of the ninth capacitor is connected to the negative phase input end of the fully differential amplifier, the other end of the ninth capacitor is respectively connected to one end of the eighteenth switch and one end of the nineteenth switch, the other end of the eighteenth switch is connected to the negative phase output end of the fully differential amplifier, the other end of the nineteenth switch is connected to one end of the eleventh capacitor, the other end of the eleventh capacitor is connected to one end of the twentieth switch, the other end of the twentieth switch is connected to the negative phase output end of the fully differential amplifier, and the other end of the nineteenth switch and one end of the eleventh capacitor are also connected to the input end of the common mode level;

[0026] In the first half of each switching cycle, the thirteenth switch and the seventeenth switch are closed to connect the positive phase input terminal of the fully differential amplifier to the positive phase output terminal and the negative phase input terminal to the negative phase output terminal, and the offset voltage of the fully differential amplifier can be stored in the first sampling storage unit and the second sampling storage unit to form the first storage voltage together with the positive phase differential mode voltage signal;

[0027] In the second half of each switching cycle, the fourteenth switch and the eighteenth switch are closed, so that the eighth capacitor and the ninth capacitor jointly store the second storage voltage with the first sampling storage unit and the second sampling storage unit, and the second storage voltage includes the offset voltage of the fully differential amplifier and the negative phase differential mode voltage signal.

[0028] Further, the first sampling storage unit includes: a ninth switch, a tenth switch and a sixth capacitor, one end of the ninth switch and one end of the tenth switch are both connected to the output end of the voltage conversion unit, the other end of the ninth switch and the other end of the tenth switch are both connected to one end of the sixth capacitor, and the other end of the sixth capacitor is connected to the non-inverting input end of the fully differential amplifier;

[0029] The second sampling storage unit includes: an eleventh switch, a twelfth switch and a seventh capacitor, one end of the eleventh switch and one end of the twelfth switch are both connected to the output end of the voltage conversion unit, the other end of the eleventh switch and the other end of the twelfth switch are both connected to one end of the seventh capacitor, and the other end of the seventh capacitor is connected to the negative phase input end of the fully differential amplifier;

[0030] In the first half of each switching cycle, the ninth switch and the twelfth switch are closed, and the tenth switch and the eleventh switch are opened, so that the sixth capacitor and the seventh capacitor store the first storage voltage;

[0031] In the second half of each switching cycle, the ninth switch and the twelfth switch are opened, and the tenth switch and the eleventh switch are closed, so that the sixth capacitor and the seventh capacitor store the second storage voltage.

[0032] Further, the voltage conversion unit includes: a positive phase coupling switch unit and a negative phase coupling switch unit, the positive phase coupling switch unit and the negative phase coupling switch unit are electrically connected, and the positive phase coupling switch unit and the negative phase coupling switch unit are respectively connected to the current sampling unit and the voltage amplification output unit;

[0033] The positive phase coupling switch unit is used to couple one half of the sampled voltage signal in the form of a positive phase voltage to the common mode level to obtain the positive phase differential mode voltage signal;

[0034] The negative phase coupling switch unit is used to couple one half of the sampled voltage signal in the form of a negative phase voltage to a common mode level to obtain the negative phase differential mode voltage signal.

[0035] Further, the positive phase coupling switch unit includes: a first switch, a second switch, a fifth switch, a sixth switch and a fourth capacitor, one end of the first switch and the second switch connected in series is connected to one end of the fifth switch and the sixth switch connected in series, the other end of the first switch and the second switch connected in series is connected to the other end of the fifth switch and the sixth switch connected in series,

[0036] The negative phase coupling switch unit includes: a third switch, a fourth switch, a seventh switch, an eighth switch and a fifth capacitor, wherein one end of the third switch and the fourth switch connected in series is connected to one end of the seventh switch and the eighth switch connected in series, and the other end of the third switch and the fourth switch connected in series is connected to the other end of the seventh switch and the eighth switch connected in series,

[0037] One end of the fourth capacitor is connected to the series connection end between the first switch and the second switch, and the other end of the fourth capacitor is connected to the series connection end between the third switch and the fourth switch; one end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch, and the other end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch;

[0038] One end of the first switch and the second switch connected in series is the input end of the common mode level, and the other end of the first switch and the second switch connected in series is the positive phase end of the voltage conversion unit.

[0039] One end of the third switch and the fourth switch connected in series is an input end of the common mode level, and the other end of the third switch and the fourth switch connected in series is a negative phase end of the voltage conversion unit.

[0040] As another aspect of the present invention, a current signal adaptive sampling system is provided, which includes a controller and the current signal adaptive sampling circuit mentioned above, the controller is electrically connected to the current signal adaptive sampling circuit, the controller is used to generate a preset frequency division control signal, the current signal adaptive sampling circuit is used to generate switch control signals of different frequencies according to the preset frequency division control signal, and convert the sampled voltage signal converted after the target current is sampled into a differential mode voltage signal on the common mode according to the switch control signal, and obtain a voltage output signal corresponding to the current target current signal after amplifying the differential mode voltage signal based on eliminating the offset voltage.

[0041] As another aspect of the present invention, an electronic device is provided, comprising: a device to be sampled and the above-mentioned current signal adaptive sampling system, wherein the current signal adaptive sampling system is electrically connected to the device to be sampled.

[0042] The current signal adaptive sampling circuit provided by the present invention samples the target current signal in real time through the current sampling unit, and after being converted into a differential mode voltage signal on the common mode level through the voltage conversion unit, the differential mode voltage signal is amplified by the voltage output amplification unit based on eliminating the offset voltage to obtain the final voltage output signal. This current signal adaptive sampling circuit can not only realize the amplification processing of the weak target current signal, but also eliminate the offset error caused by the asymmetry of the components in the circuit, so as to obtain an accurate current signal sampling amplification output result. Therefore, the current signal adaptive sampling circuit provided by the present invention can automatically and accurately sample and amplify the target current signal, and has a simple structure, stable performance and is easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present invention, but do not constitute a limitation of the present invention.

[0044] Figure 1 The schematic diagram of the current sampling circuit in the prior art.

[0045] Figure 2This is a structural block diagram of the current signal adaptive sampling circuit provided by the present invention.

[0046] Figure 3 This is a circuit structure principle diagram of the current signal adaptive sampling circuit provided by the present invention.

[0047] Figure 4 This is a switch signal control waveform diagram of the current signal adaptive sampling circuit provided by the present invention.

[0048] Figure 5 This is a schematic diagram of an application circuit of the current signal adaptive sampling circuit provided by the present invention.

[0049] Figure 6 This is a structural block diagram of the current signal adaptive sampling system provided by the present invention. DETAILED DESCRIPTION

[0050] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0051] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the present invention.

[0052] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so as to describe the embodiments of the present invention described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0053] Currently, the actual application environment of the current signal sampling and amplification circuit is limited by its circuit structure, and the sampling result has a large error due to the offset error of the operational amplifier.

[0054] Based on this, a current signal adaptive sampling circuit is provided in this embodiment. Figure 2is a structural block diagram of a current signal adaptive sampling circuit 10 provided according to an embodiment of the present invention. Figure 2 As shown, it includes: a current sampling unit 100, a voltage conversion unit 200, a switch signal control unit 300 and a voltage amplification output unit 400, wherein the current sampling unit 100 is electrically connected to the voltage conversion unit 200, the voltage amplification output unit 400 is electrically connected to the voltage conversion unit 200, and the switch signal control unit 300 is electrically connected to the voltage conversion unit 200 and the voltage amplification output unit 400, respectively.

[0055] The current sampling unit 100 is used to sample the current target current signal and convert it into a corresponding sampling voltage signal;

[0056] The switch signal control unit 300 is used to generate switch control signals of different frequencies according to a preset frequency division control signal;

[0057] The voltage conversion unit 200 is used to convert the sampled voltage signal into a differential mode voltage signal at a common mode level according to a corresponding switch control signal;

[0058] The voltage amplification and output unit 400 is used to obtain a voltage output signal corresponding to the current target current signal after performing an amplification process on the differential mode voltage signal based on eliminating the offset voltage according to the corresponding switch control signal.

[0059] In an embodiment of the present invention, the current sampling unit 100 samples the target current signal in real time and is capable of converting the sampled target current signal into a sampled voltage signal. It should be noted here that the sampled voltage signal is specifically an AC voltage signal. Therefore, the AC sampled voltage signal needs to be further processed by the voltage conversion unit 200.

[0060] Specifically, the voltage conversion unit 200 can couple the sampled voltage signal to the common mode level to obtain a differential mode voltage signal on the common mode level, that is, the voltage conversion unit 200 can modulate the weak sampled voltage signal on the common mode level to obtain a modulated differential mode voltage signal. The modulated differential mode voltage signal also needs to be amplified by the voltage amplification output unit 400, and during the amplification process, the voltage amplification output unit 400 can eliminate the offset voltage caused by its own amplification, so as not to affect the result of amplifying the differential mode voltage signal, and because the error caused by its own offset voltage is eliminated, the accuracy of the final sampling result can also be improved.

[0061] It should be noted that the operation startup process of the voltage conversion unit 200 and the voltage amplification output unit 400 is controlled by the switch control signals of different frequencies output by the switch signal control unit 300, so that the voltage conversion unit 200 and the voltage amplification output unit 400 can both work under the control of the switch control signal.

[0062] Therefore, the current signal adaptive sampling circuit provided by the present invention samples the target current signal in real time through the current sampling unit, and after converting it into a differential mode voltage signal on the common mode level through the voltage conversion unit, the differential mode voltage signal is amplified by the voltage output amplification unit based on eliminating the offset voltage to obtain the final voltage output signal. This current signal adaptive sampling circuit can not only realize the amplification processing of the weak target current signal, but also eliminate the offset error caused by the asymmetry of the components in the circuit, so as to obtain an accurate current signal sampling amplification output result. Therefore, the current signal adaptive sampling circuit provided by the present invention can automatically and accurately sample and amplify the target current signal, and has a simple structure, stable performance and is easy to implement.

[0063] In the embodiment of the present invention, Figure 3 As shown, the current sampling unit 100 may specifically include: a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2 and a third capacitor C3, one end of the first resistor R1 is connected to the input end of the target sampling current Isamp, and the other end of the first resistor R1 is connected to the output end of the target sampling current Isamp; the first capacitor C1 is connected in parallel with the first resistor R1; one end of the second capacitor C2 is connected to one end of the first resistor R1, and the other end of the second capacitor C2 is connected to the signal ground; one end of the third capacitor C3 is connected to the other end of the first resistor R1, and the other end of the third capacitor C3 is connected to the signal ground; one end of the second resistor R2 is connected to one end of the first resistor R1, and the other end of the second resistor R2 is connected to the positive phase end Vp of the voltage conversion unit 200; one end of the third resistor R3 is connected to the other end of the first resistor R1, and the other end of the third resistor R3 is connected to the negative phase end Vn of the voltage conversion unit 200.

[0064] It should be understood that, in the embodiment of the present invention, it is first necessary to use the first resistor R1 in the current sampling unit to convert the target sampling current Isamp into a corresponding sampling voltage signal Vdm=Isamp*R1. At the same time, since the target sampling current often contains some high-frequency interference signals, the capacitors C1, C2, and C3 in the current sampling unit are used to filter some high-frequency interference signals. Therefore, in the embodiment of the present invention, the required target current signal can be converted into a voltage signal through the current sampling unit, and the high-frequency interference signal can be filtered out to obtain a real sampling signal.

[0065] In the embodiment of the present invention, Figure 3 As shown, the voltage conversion unit 200 includes: a positive phase coupling switch unit 210 and a negative phase coupling switch unit 220, the positive phase coupling switch unit 210 and the negative phase coupling switch unit 220 are electrically connected, and the positive phase coupling switch unit 210 and the negative phase coupling switch unit 220 are respectively connected to the current sampling unit 100 and the voltage amplification output unit 400;

[0066] The positive phase coupling switch unit 210 is used to couple one half of the sampled voltage signal in the form of a positive phase voltage to the common mode level to obtain the positive phase differential mode voltage signal;

[0067] The negative phase coupling switch unit 220 is used to couple half of the sampled voltage signal in the form of a negative phase voltage to the common mode level to obtain the negative phase differential mode voltage signal.

[0068] Specifically, the sampling voltage signal output by the current sampling unit 100 can be divided into two, wherein one half of the sampling voltage signal is coupled to the common mode level through the positive phase coupling switch unit to obtain a positive phase differential mode voltage signal, and the other half of the sampling voltage signal is coupled to the common mode level through the negative phase coupling switch unit to obtain a negative phase differential mode voltage signal, so that both the positive phase differential mode voltage signal and the negative phase differential mode voltage signal are input into the voltage amplification output unit for full differential amplification processing to obtain the final voltage output signal.

[0069] More specifically, if Figure 3 As shown, the positive phase coupling switch unit 210 includes: a first switch K1, a second switch K2, a fifth switch K5, a sixth switch K6 and a fourth capacitor C4, one end of the first switch K1 and the second switch K2 connected in series is connected to one end of the fifth switch K5 and the sixth switch K6 connected in series, and the other end of the first switch K1 and the second switch K2 connected in series is connected to the other end of the fifth switch K5 and the sixth switch K6 connected in series. It should be understood that one end of the first switch K1 and the second switch K2 connected in series is connected to one end of the fifth switch K5 and the sixth switch K6 connected in series, and the connected end is the input end Vcm of the common mode level; the other end of the first switch K1 and the second switch K2 connected in series is connected to the other end of the fifth switch K5 and the sixth switch K6 connected in series, and the connected end is used to form the positive phase end Vp of the voltage conversion unit 200.

[0070] Specifically, the negative phase coupling switch unit 220 includes: a third switch K3, a fourth switch K4, a seventh switch K7, an eighth switch K8 and a fifth capacitor C5, one end of the third switch K3 and the fourth switch K4 connected in series is connected to one end of the seventh switch K7 and the eighth switch K8 connected in series, and the other end of the third switch K3 and the fourth switch K4 connected in series is connected to the other end of the seventh switch K7 and the eighth switch K8 connected in series. It should be understood that one end of the third switch K3 and the fourth switch K4 connected in series is connected to one end of the seventh switch K7 and the eighth switch K8 connected in series, and the connected end is the input end Vcm of the common mode level; the other end of the third switch K3 and the fourth switch K4 connected in series is connected to the other end of the seventh switch K7 and the eighth switch K8 connected in series, and the connected end is used to form the negative phase end Vn of the voltage conversion unit 200.

[0071] Specifically, one end of the fourth capacitor C4 is connected to the series connection end between the first switch K1 and the second switch K2, the other end of the fourth capacitor C4 is connected to the series connection end between the third switch K3 and the fourth switch K4, one end of the fifth capacitor C5 is connected to the series connection end between the fifth switch K5 and the sixth switch K6, and the other end of the fifth capacitor C5 is connected to the series connection end between the fifth switch K5 and the sixth switch K6;

[0072] One end of the first switch K1 and the second switch K2 connected in series is the input end Vcm of the common mode level, and the other end of the first switch K1 and the second switch K2 connected in series is the positive phase end Vp of the voltage conversion unit.

[0073] One end of the third switch K3 and the fourth switch K4 connected in series is the input end Vcm of the common mode level, and the other end of the third switch K3 and the fourth switch K4 connected in series is the negative phase end Vn of the voltage conversion unit.

[0074] In the embodiment of the present invention, the sampling voltage difference across the first resistor R1 in the current sampling unit 100 is Vdm=Isamp*R1, where Isamp is the target sampling current; the positive phase terminal voltage Vp in the voltage conversion unit is Vcm+0.5*Vdm; the negative phase terminal voltage Vn in the voltage conversion unit is Vcm-0.5*Vdm, where Vdm is the sampling voltage difference across the first resistor R1.

[0075] It should be noted that, in the embodiment of the present invention, the switch capacitor network composed of the first switch K1 to the eighth switch K8 and the fourth capacitor C4 and the fifth capacitor C5 in the voltage conversion unit 200 divides the differential mode voltage Vdm signal of the input end into the fourth capacitor C4 and the fifth capacitor C5 for storage, the voltage between the two plates of the fourth capacitor C4 is 0.5*Vdm, and the voltage between the two plates of the fifth capacitor C5 is -0.5*Vdm (in the circuit schematic diagram of the embodiment of the present invention, the upper plate of the capacitor is assumed to be the voltage positive terminal), and then the fourth capacitor is connected to the positive terminal by capacitive coupling. The voltages of C4 and the fifth capacitor C5 are coupled to the common-mode level Vcm, so that the voltages of the two output terminals of the voltage conversion unit are Vp=Vcm+0.5*Vdm and Vn=Vcm-0.5*Vdm, respectively, perfectly transferring the differential-mode signal to be superimposed on the common-mode voltage Vcm. Therefore, Vp and Vn can be directly connected to the input terminal of the fully differential amplifier of the voltage amplification output unit, completely eliminating the problem of setting the common-mode level of the input terminal of the conventional fully differential amplifier, simplifying the circuit network structure of the input terminal of the fully differential amplifier, and reducing the complexity of the design of the fully differential amplifier.

[0076] Since the target sampling signal is generally weak, the sampling signal needs to be amplified by a certain multiple in order to better perform logic analysis and processing. Therefore, the signal Vdm=Isamp*R1 collected by the current sampling unit needs to be further amplified and processed.

[0077] In the embodiment of the present invention, Figure 3 As shown, the voltage amplification output unit 400 includes: a cross sampling storage module 410 and an amplification processing module 420, the input end of the cross sampling storage module 410 is connected to the output end of the voltage conversion unit 200, the output end of the cross sampling storage module 410 is connected to the input end of the amplification processing module 420, and the output end of the amplification processing module 420 is the output end of the voltage amplification output unit.

[0078] The cross sampling storage module 410 is used to perform cross sampling and storage processing on the differential mode voltage signal in each switching cycle to obtain a cross sampling storage result;

[0079] The amplification processing module 420 is used to amplify the cross sampling storage result to obtain a voltage output signal after eliminating the offset voltage.

[0080] It should be understood that the cross-sampling storage module 410 in the embodiment of the present invention can perform cross-sampling and storage processing on the differential voltage signal in each switching cycle. Specifically, for each switching cycle, different switch branches are opened in the first half cycle and the second half cycle respectively to achieve cross-storage. After amplifying the cross-storage result, the offset voltage is eliminated, thereby improving the signal amplification accuracy.

[0081] Specifically, the cross sampling storage module 410 includes: a first sampling storage unit 411 and a second sampling storage unit 412, the first sampling storage unit 411 and the second sampling storage unit 412 are electrically connected, and both ends of the first sampling storage unit 411 and the second sampling storage unit 412 are respectively connected to the output end of the voltage conversion unit 200 and the input end of the amplification processing module 420.

[0082] The first sampling storage unit 411 and the second sampling storage unit 412 are both used to turn on one of their own sampling storage branches in the first half of each switching cycle to obtain a first storage voltage, and to turn on the other of their own sampling storage branches in the second half of each switching cycle to obtain a second storage voltage.

[0083] Further specifically, the first sampling storage unit 411 includes: a ninth switch K9, a tenth switch K10 and a sixth capacitor C6, one end of the ninth switch K9 and one end of the tenth switch K10 are both connected to the output end of the voltage conversion unit 200, the other end of the ninth switch K9 and the other end of the tenth switch K10 are both connected to one end of the sixth capacitor C6, and the other end of the sixth capacitor C6 is connected to the non-inverting input terminal Vpin of the fully differential amplifier AMP;

[0084] The second sampling storage unit 412 includes: an eleventh switch K11, a twelfth switch K12 and a seventh capacitor C7, one end of the eleventh switch K11 and one end of the twelfth switch K12 are both connected to the output end of the voltage conversion unit 200, the other end of the eleventh switch K11 and the other end of the twelfth switch K12 are both connected to one end of the seventh capacitor C7, and the other end of the seventh capacitor C7 is connected to the negative phase input terminal Vnin of the full differential amplifier AMP;

[0085] In the first half of each switching cycle, the ninth switch K9 and the twelfth switch K12 are closed, and the tenth switch K10 and the eleventh switch K11 are opened, so that the sixth capacitor C6 and the seventh capacitor C7 store the first storage voltage;

[0086] In the second half of each switching cycle, the ninth switch K9 and the twelfth switch K12 are opened, and the tenth switch K10 and the eleventh switch K11 are closed, so that the sixth capacitor C6 and the seventh capacitor C7 store the second storage voltage.

[0087] In the embodiment of the present invention, the amplification processing module 420 includes: a fully differential amplifier AMP, a positive phase end amplification processing unit 421 and a negative phase end amplification processing unit 422, the positive phase end amplification processing unit 421 is connected to the positive input end of the fully differential amplifier AMP, the negative phase end amplification processing unit 422 is connected to the negative input end of the fully differential amplifier AMP, the positive phase output end of the fully differential amplifier AMP is connected to the positive phase end amplification processing unit 421, the negative phase output end of the fully differential amplifier AMP is connected to the negative phase end amplification processing unit 422,

[0088] The positive phase end amplification processing unit 421 and the negative phase end amplification processing unit 422 can jointly determine the amplification factor of the fully differential amplifier under the control of the switch control signal.

[0089] The positive phase end amplification processing unit 421 and the negative phase end amplification processing unit 422 can also control their respective amplification processing switch branches according to the switch control signal to cooperate with the cross sampling storage module, so that the voltage difference between the first storage voltage and the second storage voltage offsets the offset voltage of the fully differential amplifier;

[0090] The fully differential amplifier AMP is used to amplify the differential mode voltage signal according to the determined amplification factor to obtain a voltage output signal corresponding to the current target current signal.

[0091] In the embodiment of the present invention, the non-inverting end amplification processing unit 421 includes an eighth capacitor C8, a tenth capacitor C10, a thirteenth switch K13, a fourteenth switch K14, a fifteenth switch K15 and a sixteenth switch K16.

[0092] Two ends of the thirteenth switch K13 are respectively connected to the non-inverting input end and the non-inverting output end of the fully differential amplifier AMP;

[0093] One end of the eighth capacitor C8 is connected to the non-inverting input end of the fully differential amplifier AMP, the other end of the eighth capacitor C8 is respectively connected to one end of the fourteenth switch K14 and one end of the fifteenth switch K15, the other end of the fourteenth switch K14 is connected to the non-inverting output end of the fully differential amplifier AMP, the other end of the fifteenth switch K15 is connected to one end of the tenth capacitor C10, the other end of the tenth capacitor C10 is connected to one end of the sixteenth switch K16, the other end of the sixteenth switch K16 is connected to the non-inverting output end Vop of the fully differential amplifier AMP, and the other end of the fifteenth switch K15 and one end of the tenth capacitor C10 are also connected to the input end Vcm of the common mode level;

[0094] The negative phase end amplification processing unit 422 includes a ninth capacitor C9, an eleventh capacitor C11, a seventeenth switch K17, an eighteenth switch K18, a nineteenth switch K19, and a twentieth switch K20.

[0095] Two ends of the seventeenth switch K17 are respectively connected to the negative phase input terminal Vin and the negative phase output terminal Von of the fully differential amplifier AMP;

[0096] One end of the ninth capacitor C9 is connected to the negative phase input terminal Vnin of the fully differential amplifier AMP, the other end of the ninth capacitor C9 is respectively connected to one end of the eighteenth switch K18 and one end of the nineteenth switch K19, the other end of the eighteenth switch K18 is connected to the negative phase output terminal Von of the fully differential amplifier AMP, the other end of the nineteenth switch K19 is connected to one end of the eleventh capacitor C11, the other end of the eleventh capacitor C11 is connected to one end of the twentieth switch K20, the other end of the twentieth switch K20 is connected to the negative phase output terminal Von of the fully differential amplifier AMP, and the other end of the nineteenth switch K19 and one end of the eleventh capacitor C11 are also connected to the input terminal Vcm of the common mode level;

[0097] In the first half of each switching cycle, the thirteenth switch K13 and the seventeenth switch K17 are closed to connect the positive phase input terminal Vpin of the fully differential amplifier AMP to the positive phase output terminal Vop and the negative phase input terminal Vnin to the negative phase output terminal Von, and the offset voltage of the fully differential amplifier AMP can be stored in the first sampling storage unit and the second sampling storage unit to form the first storage voltage together with the positive phase differential mode voltage signal;

[0098] In the second half of each switching cycle, the fourteenth switch K14 and the eighteenth switch K18 are closed, so that the eighth capacitor C8 and the ninth capacitor C9 jointly store the second storage voltage with the first sampling storage unit and the second sampling storage unit, and the second storage voltage includes the offset voltage of the fully differential amplifier AMP and the negative phase differential mode voltage signal.

[0099] In the embodiment of the present invention, the devices that determine the gain of the fully differential amplifier AMP in the voltage amplification output unit are the sixth capacitor C6, the eighth capacitor C8, the seventh capacitor C7 and the ninth capacitor C9, wherein C6:C8=C7:C9=m:1, (usually m≥1). Since the capacitance values ​​of the sixth capacitor C6 and the eighth capacitor C8, the seventh capacitor C7 and the ninth capacitor C9 are different, the charging time will be asynchronous. Therefore, the circuit design of the embodiment of the present invention introduces the tenth capacitor C10 and the eleventh capacitor C11, wherein the tenth capacitor C10 and the eighth capacitor C8 are in parallel during the charging stage, and the tenth capacitor C10 and the eighth capacitor C8 are in parallel when they are connected. The sum of the capacitances is just equal to that of the sixth capacitor C6, and its purpose is to match the charging speeds of the eighth capacitor C8 with the sixth capacitor C6; the eleventh capacitor C11 and the ninth capacitor C9 are also in a parallel state during the charging stage, and the sum of the capacitances of the eleventh capacitor C11 and the ninth capacitor C9 when connected in parallel is just equal to that of the seventh capacitor C7, and its purpose is to match the charging speeds of the ninth capacitor C9 with the seventh capacitor C7, and ultimately the charging time of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 can be synchronized, which greatly reduces the error problem caused by the large difference in the capacitance value that determines the amplification factor in the conventional method, and better improves the accuracy of the circuit amplification output.

[0100] In addition, in the embodiment of the present invention, the fully differential amplifier AMP included in the voltage amplification output unit 400 performs positive and negative cross sampling, storage and amplification on the input signal under the control of the switch signal, and the cross sampling storage module 410 can eliminate the offset voltage Vos error of the switched capacitor amplifier itself and improve the signal amplification accuracy. The specific principle is: in the first half of a switching cycle, the ninth switch K9 and the twelfth switch K12 are closed, the tenth switch K10 and the eleventh switch K11 are opened, and the Vdm sample is stored in the sixth capacitor C6 and the seventh capacitor C7. At this time, the thirteenth switch K13 and the seventeenth switch K17 are closed, and the fourteenth switch K14 and the eighteenth switch K18 are opened, so that the positive phase input terminal and the negative phase input terminal of the fully differential amplifier AMP are connected to their respective output terminals to form a closed loop structure, and the offset voltage Vos of the fully differential amplifier AMP itself is also stored in the sixth capacitor C6 and the seventh capacitor C7, that is, the voltage between the two plates of the capacitor is Vdm+Vos; in a In the second half of the switching cycle, the ninth switch K9 and the twelfth switch K12 are opened, the tenth switch K10 and the eleventh switch K11 are closed, and the -Vdm sample is stored in the sixth capacitor C6 and the seventh capacitor C7 (the left plate of the capacitor is assumed to be the positive voltage terminal in the circuit schematic diagram of the embodiment of the present invention), and the voltage between the two plates of the capacitor is -Vdm+Vos. The thirteenth switch K13 and the seventeenth switch K17 are opened, and the fourteenth switch K14 and the eighteenth switch K18 are closed. At this time, after the charges on the sixth capacitor C6 and the seventh capacitor C7 are redistributed with the eighth capacitor C8 and the ninth capacitor C9, Vop=m*(Vdm+Vos) and Von=m*(-Vdm+Vos) can be obtained at the two output ends of the full differential amplifier AMP. Therefore, the voltage difference between the two output ends of the full differential amplifier AMP is Vod=Vop-Von=2*m*Vdm, and the offset voltage Vos is offset, leaving only the amplified differential mode voltage Vod. Finally, the target sampling current is calculated based on this:

[0101]

[0102] Therefore, after the positive and negative cross sampling, storage and amplification of the input signal adopted by the present invention, the offset voltage Vos of the fully differential amplifier AMP itself can be completely offset at the output end, thereby completely eliminating the offset voltage Vos error of the fully differential amplifier itself and improving the signal amplification accuracy.

[0103] The specific design of the fully differential amplifier in the embodiment of the present invention and its working process are further described in detail below. As described above, since the target sampling signal is generally weak, the sampling signal needs to be amplified by a certain multiple to better perform logic analysis and processing, so the signal Vdm=Isamp*R1 collected by the current sampling unit needs to be further amplified and processed, so it is necessary to design a precise amplifier. In the embodiment of the present invention, a fully differential amplifier is designed in the voltage amplification output unit, and the input signal can be cross-sampled, stored and amplified under the control of the switch signal, which can eliminate the offset voltage Vos error of the switch capacitor amplifier itself and improve the signal amplification accuracy.

[0104] The input end of the fully differential amplifier AMP is insulated, and no charge flows into the input end. Therefore, the total amount of charge of the sixth capacitor C6, the eighth capacitor C8, the seventh capacitor C7, and the ninth capacitor C9 remains unchanged before and after the switch is switched, satisfying the charge conservation principle. Therefore, it can be determined that the voltage amplification factor is: Gv=2*(C8 / C6)=2*(C9 / C7)=2*m.

[0105] Meanwhile, considering that the capacitance values ​​of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 are different, which will cause different charging speeds, the present invention introduces the tenth capacitor C10 and the eleventh capacitor C11, wherein the tenth capacitor C10 and the eighth capacitor C8 are in a parallel state during the charging stage, the purpose of which is to match the charging speeds of the eighth capacitor C8 and the sixth capacitor C6, wherein the eleventh capacitor C11 and the ninth capacitor C9 are also in a parallel state during the charging stage, the purpose of which is to match the charging speeds of the ninth capacitor C9 and the seventh capacitor C7, and finally the charging time of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 can be made the same, which greatly reduces the error problem caused by the asynchronous charging time of the conventional method, and better improves the accuracy of the circuit amplification output.

[0106] Because a fully differential amplifier is used in the embodiment of the present invention, it is necessary to transfer the input voltage signal Vdm to the common mode level Vcm (the input voltage of the fully differential amplifier must be within a certain voltage range. If the input signal is too low or too high, the input differential pair will be in an abnormal amplification state. Usually, its common mode level Vcm = 0.5*Vcc, that is, the midpoint voltage of the power supply). Therefore, the embodiment of the present invention shifts the input voltage signal Vdm to the common mode level Vcm through the voltage conversion unit, so that the positive phase terminal voltage Vp in the voltage conversion unit is Vcm + 0.5*Vdm; the negative phase terminal voltage Vn in the voltage conversion unit is Vcm-0.5*Vdm; and Vp-Vn is Vdm. It should be understood that the embodiment of the present invention can automatically transfer different voltage signals Vdm to the common mode level Vcm to achieve adaptive sampling.

[0107] In the embodiment of the present invention, the two circuit modules, the voltage conversion unit and the voltage amplification output unit, both use switching capacitors to transfer and store charges. Therefore, a switching signal control unit is used to output switching control waveforms of different frequencies to respectively control the operation of the two circuit modules, the voltage conversion unit and the voltage amplification output unit.

[0108] Specifically, Figure 3 As shown, the switch signal control unit 300 includes a base frequency oscillator 310 and a frequency divider 320. The frequency divider 320 is electrically connected to the base frequency oscillator 310. The base frequency oscillator 310 is used to connect to a controller. The controller can generate a preset frequency division control signal. The base frequency oscillator 310 generates a preset frequency according to the preset frequency division control signal. The frequency divider 320 can divide the preset frequency into multiple different branches according to the switch data to connect to multiple different switches in the voltage conversion unit and the voltage amplification output unit to achieve control of different switches.

[0109] In summary, the current signal adaptive sampling current of the embodiment of the present invention first uses the current sampling unit to convert the target sampling current Isamp into a voltage signal Vdm=Isamp*R1, and then inputs it into the voltage conversion unit after filtering processing, and then the voltage conversion unit performs level superposition processing on Vdm and then inputs it into the voltage amplification output unit for amplification processing, and finally outputs the amplified voltage signal Vod=Vop-Vop, and finally calculates the target sampling current as:

[0110] Combine the following Figure 4 The switching waveform shown describes in detail the principle that the voltage amplification output unit of the embodiment of the present invention can amplify the differential mode voltage signal based on eliminating the offset error.

[0111] The input and output ends of the target sampling current Isamp are connected to the two ends of the first resistor R1 respectively, and the current signal adaptive sampling circuit provided by the present invention will automatically sample and filter the target sampling current Isamp and input it into the voltage conversion unit for level superposition transfer, and then amplify and output it through the full differential amplifier AMP in the voltage amplification output unit, and finally obtain the amplified differential mode voltage Vod=Vop-Von, thereby calculating the target sampling current Isamp=K*Vod. Therefore, it can be clearly seen that the circuit has both extremely high current sampling accuracy and stable performance, simple structure, and strong operability.

[0112] Specifically, Figure 3As shown, the circuit of the present invention can not only automatically eliminate the offset error Vos caused by the asymmetry of components in the circuit during the signal sampling and amplification process, but also can accurately amplify and output the sampled signal. The specific working principle is deduced and analyzed in detail using mathematical formulas as follows:

[0113] Assume that the offset voltage is Vos, the capacitance ratio coefficient of the sixth capacitor C6 and the eighth capacitor C8 is m, the capacitance ratio coefficient of the seventh capacitor C7 and the ninth capacitor C9 is m, the positive phase terminal voltage of the voltage conversion unit is Vp, the negative phase terminal voltage is Vn, the positive phase input terminal voltage of the fully differential amplifier AMP is Vpin, the negative phase input terminal voltage is Vnin, the positive phase output terminal voltage of the fully differential amplifier AMP is Vop, the negative phase output terminal voltage is Von, the sampling resistor is the first resistor R1, and the target sampling current is Isamp.

[0114] The current signal adaptive sampling circuit provided by the present invention has a switch signal control waveform diagram, such as Figure 4 As shown, when K9, K12, K13, and K17 are closed, the total charge on C6 and C8 is:

[0115] Q1=(Vp-Vop)*C6+(Vcm-Vop)*C8, (1)

[0116] When K9, K12, K13, and K17 are closed, the total charge on C7 and C9 is:

[0117] Q2=(Vn-Von)*C7+(Vcm-Von)*C9, (2)

[0118] At this time, since its switch is closed, the input and output of the fully differential amplifier AMP are connected, so we can get:

[0119] Vpin=Vop,(3)

[0120] Vnin=Von,(4)

[0121] Since the connection mode of the fully differential amplifier AMP is a closed-loop negative feedback structure, the fully differential amplifier AMP works in the linear region. Considering the existence of the offset voltage Vos introduced by the asymmetry of its components in the circuit system, the offset voltage Vos can be obtained according to the principles of "virtual short" and "virtual open" as follows:

[0122] Vos=Vpin-Vnin=Vop-Von, (5)

[0123] When K10, K11, K14, and K18 are closed, the total charge on C6 and C8 is:

[0124] Q11=(Vn-Vpin)*C6+(Vop-Vpin)*C8, (6)

[0125] When K10, K11, K14, and K18 are closed, the total charge on C7 and C9 is:

[0126] Q21=(Vp-Vnin)*C7+(Von-Vnin)*C9, (7)

[0127] Since the input end of the fully differential amplifier AMP is an insulated gate input end made of silicon dioxide material, there is no current path, so the total charge of capacitors C6 and C8, C7 and C9 can be guaranteed to remain unchanged before and after the switch. Therefore, according to the principle of charge conservation, it can be obtained:

[0128] Q1=Q11,(8)

[0129] Q2=Q21,(9)

[0130] Substituting equations (1), (2), (6) and (7) into equations (8) and (9), we can obtain:

[0131] (Vp-Vop)*C6+(Vcm-Vop)*C8=(Vn-Vpin)*C6+(Vop-Vpin)*C8, (10)

[0132] (Vn-Von)*C7+(Vcm-Von)*C9=(Vp-Vnin)*C7+(Von-Vnin)*C9, (11)

[0133] Since C6=C7=m*C8=m*C9=m*C, and substituting it into the above equations (10) and (11), we can obtain:

[0134] (Vp-Vop)*m+(Vcm-Vop)=(Vn-Vpin)*m+(Vop-Vpin), (12)

[0135] (Vn-Von)*m+(Vcm-Von)=(Vp-Vnin)*m+(Von-Vnin), (13)

[0136] Further simplifying equations (12) and (13) above yields:

[0137] m*Vp-(m+1)*Vop+Vm=m*Vn-(m+1)*Vpin+Vop, (14)

[0138] m*Vn-(m+1)*Von+Vm=m*Vp-(m+1)*Vnin+Von, (15)

[0139] By subtracting the left and right sides of equations (14) and (15), we can get:

[0140] m*(Vp-Vn)-(m+1)*(Vop-Von)=m*(Vn-Vp)-(m+1)*(Vpin-Vnin)+(Vop-Von), (16)

[0141] Substituting the above formula (5) into (16) and simplifying it, we can get:

[0142] (Vop-Von)-(m+1)*Vos-m*(Vp-Vn)=m*(Vp-Vn)-(m+1)*Vos, (17)

[0143] Further simplifying the above formula (17) yields:

[0144] Vop-Von=2*m*(Vp-Vn), (18)

[0145] Since Vp-Vn=Vdm=Isamp*R1, substituting it into the above formula (18) yields:

[0146] Vop-Von=2*m*Vdm=2*m*Isamp*R1, (19)

[0147] Since Vod = Vop - Von, substituting it into the above formula (19) yields:

[0148] Vod=Vop-Von=2*m*Vdm=2*m*Isamp*R1, (20)

[0149] By transforming formula (20), we can get:

[0150]

[0151] make The sampling current Isamp can be obtained as:

[0152] Isamp=K*Vod. (22)

[0153] From the formulas (17) and (18) derived above, it can be clearly seen that the offset voltage Vos in the current signal adaptive sampling circuit of the present invention is completely offset after being processed by the voltage amplification output unit. Therefore, the present invention can completely eliminate the offset error caused by the asymmetry of components in the circuit.

[0154] In the embodiment of the present invention, the voltage difference Vod at the output end of the fully differential amplifier AMP is Vop-Von=2*n*(Vp-Vn)=2*m*Vdm=2*m*Isamp*R1, where Isamp is the target sampling current.

[0155] Therefore, by testing the voltage Vop at the positive phase output terminal of the fully differential amplifier AMP, and then measuring the voltage Von at the negative phase output terminal of the fully differential amplifier AMP, the voltage difference between the two test ports is Vod=Vop-Von. Since m and R1 are both known quantities, the target sampling current Isamp can be accurately calculated according to the derived formula:

[0156]

[0157] set up Then Isamp=K*(Vop-Von)=K*Vod, so its coefficient K can be set arbitrarily by changing the values ​​of m and R1.

[0158] Therefore, the current signal adaptive sampling circuit of the embodiment of the present invention can not only automatically convert the weak current signal into a differential mode voltage signal on the common mode level, and amplify and output the differential mode voltage signal through the voltage amplification output unit, but also completely eliminate the offset error caused by the asymmetry of components in the circuit. Therefore, the current signal adaptive sampling circuit provided by the present invention can sample, amplify and output the current signal very accurately.

[0159] It can be seen from this that the current signal adaptive sampling circuit provided by the present invention can not only automatically convert a weak current signal into a differential mode voltage signal on a common mode level, and amplify and output the differential mode voltage signal through the voltage amplification output unit, but also completely eliminate the offset error caused by the asymmetry of components in the circuit. Therefore, the current signal adaptive sampling circuit provided by the present invention can sample, amplify and output the current signal very accurately.

[0160] In summary, when current sampling is performed, by connecting the input and output ends of the target sampling current Isamp to the two ends of the first resistor R1 respectively, the current signal adaptive sampling circuit will automatically sample and filter the target current Isamp, and then input it into the voltage conversion unit for level superposition transfer, and then amplify and output it through the switch capacitor amplifier AMP in the voltage amplification output unit, and finally obtain the amplified differential mode voltage Vod=Vop-Von, thereby calculating the target sampling current Isamp=K*Vod. Therefore, the current signal adaptive sampling circuit of the embodiment of the present invention has both extremely high current sampling accuracy and stable performance, simple structure, and strong operability.

[0161] Figure 5 The schematic diagram of the application of the current signal adaptive sampling current provided by the embodiment of the present invention is combined with Figure 5As shown, the current signal adaptive sampling circuit of the present invention is applied in a leakage protector device, and its purpose is to sample the leakage current signal of the live wire / neutral wire. The two ends of the current lead-out line of the induction coil are respectively connected to the two ends of the first resistor R1 in the current sampling unit. When leakage current occurs in the live wire / neutral wire, the corresponding induced current Isamp will be generated in the induction coil due to the change of magnetic flux. After the induced current Isamp flows through the first resistor R1, a voltage difference Vdm=Isamp*R1 will be formed at both ends of the first resistor R1. Then, Vdm is input into the voltage conversion unit after filtering by the first capacitor C1, the second capacitor C2, the third capacitor C3, the second resistor R2 and the third resistor R3. Under the control of the switch signal control unit, the voltage conversion unit transfers the input Vdm voltage through the fourth capacitor C4 and the fifth capacitor C5 and superimposes it on the common mode level Vcm. After several switch signal cycles, the voltages of the fourth capacitor C4, the fifth capacitor C5, Vp and Vn are finally balanced and stabilized, and Vp=Vcm+0.5*Vdm, and Vn=Vcm-0.5*Vdm.

[0162] Then the voltages Vp and Vn are input as input signals into the voltage amplification output unit, and the final voltage difference Vod is amplified and output by the fully differential amplifier AMP with double-end input and double-end output, Vod=Vop-Von=2*n*(Vp-Vn)=2*m*Vdm=2*m*Isamp*R1, where Vop is the positive output voltage of the fully differential amplifier AMP, Von is the negative output voltage of the fully differential amplifier AMP, and Isamp is the target sampling current, and the target sampling current is obtained.

[0163] It can be clearly seen from the above embodiments that by connecting the input and output ends of the target sampling current Isamp to the two ends of the first resistor R1 respectively, the current signal adaptive sampling circuit will automatically sample and filter the target current Isamp, and then input it into the voltage conversion unit for level superposition transfer, and then amplify and output it through the full differential amplifier AMP in the voltage amplification output unit, and finally obtain the amplified differential mode voltage Vod=Vop-Von, thereby calculating the target sampling current Isamp=K*Vod. Therefore, the current signal adaptive sampling circuit provided by the present invention has both extremely high current sampling accuracy and stable performance, simple structure, and strong operability.

[0164] As another embodiment of the present invention, Figure 6As shown, a current signal adaptive sampling system 1 is provided, which includes a controller 20 and the current signal adaptive sampling circuit 10 mentioned above, the controller 20 is electrically connected to the current signal adaptive sampling circuit, the controller 20 is used to generate a preset frequency division control signal, the current signal adaptive sampling circuit 10 is used to generate switch control signals of different frequencies according to the preset frequency division control signal, and convert the sampled voltage signal converted after the target current is sampled into a differential mode voltage signal on the common mode according to the switch control signal, and obtain a voltage output signal corresponding to the current target current signal after amplifying the differential mode voltage signal based on eliminating the offset voltage.

[0165] In the embodiment of the present invention, the controller 20 may specifically be a controller of an embedded language, such as a single chip microcomputer.

[0166] The current signal adaptive sampling system provided by the present invention samples the target current signal in real time through the current sampling unit, and after being converted into a differential mode voltage signal on the common mode level through the voltage conversion unit, the differential mode voltage signal is amplified by the voltage output amplification unit based on eliminating the offset voltage to obtain the final voltage output signal. This current signal adaptive sampling circuit can not only realize the amplification processing of the weak target current signal, but also eliminate the offset error caused by the asymmetry of the components in the circuit, so as to obtain an accurate current signal sampling amplification output result. Therefore, the current signal adaptive sampling system provided by the present invention can automatically and accurately sample and amplify the target current signal, and has a simple structure, stable performance and is easy to implement.

[0167] The specific working principle of the current signal adaptive sampling system provided by the present invention can be referred to the specific description of the current signal adaptive sampling circuit in the foregoing text, which will not be repeated here.

[0168] As another embodiment of the present invention, an electronic device is provided, comprising: a device to be sampled and the above-mentioned current signal adaptive sampling system, wherein the current signal adaptive sampling system is electrically connected to the device to be sampled.

[0169] In the embodiment of the present invention, the device to be sampled may be, for example, Figure 5 The present invention does not limit the device to be sampled, as long as it is a device that needs to perform current sampling.

[0170] The electronic device provided by the present invention adopts the above-mentioned current signal adaptive sampling system, so it can automatically and accurately sample and amplify the target current signal of the sampling device, and has a simple structure, stable performance and is easy to implement.

[0171] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A current signal adaptive sampling circuit, characterized in that: include: A current sampling unit, a voltage conversion unit, a switch signal control unit and a voltage amplification output unit, wherein the current sampling unit is electrically connected to the voltage conversion unit, the voltage amplification output unit is electrically connected to the voltage conversion unit, and the switch signal control unit is electrically connected to the voltage conversion unit and the voltage amplification output unit, respectively. The current sampling unit is used to sample the current target current signal and convert it into a corresponding sampling voltage signal; The switch signal control unit is used to generate switch control signals of different frequencies according to a preset frequency division control signal; The voltage conversion unit is used to convert the sampled voltage signal into a differential mode voltage signal at a common mode level according to a corresponding switch control signal; The voltage amplification output unit is used to obtain a voltage output signal corresponding to the current target current signal after performing an amplification process on the differential mode voltage signal based on eliminating the offset voltage according to the corresponding switch control signal.

2. The current signal adaptive sampling circuit according to claim 1, characterized in that: The voltage amplification output unit comprises: a cross sampling storage module and an amplification processing module, wherein the input end of the cross sampling storage module is connected to the output end of the voltage conversion unit, the output end of the cross sampling storage module is connected to the input end of the amplification processing module, and the output end of the amplification processing module is the output end of the voltage amplification output unit. The cross sampling storage module is used to perform cross sampling storage processing on the differential mode voltage signal in each switching cycle to obtain a cross sampling storage result; The amplification processing module is used to amplify the cross sampling storage result to obtain a voltage output signal after eliminating the offset voltage.

3. The current signal adaptive sampling circuit according to claim 2, characterized in that: The cross sampling storage module includes: a first sampling storage unit and a second sampling storage unit, the first sampling storage unit and the second sampling storage unit are electrically connected, and both ends of the first sampling storage unit and the second sampling storage unit are respectively connected to the output end of the voltage conversion unit and the input end of the amplification processing module. The first sampling storage unit and the second sampling storage unit are both used to turn on one sampling storage branch of each to obtain a first storage voltage in the first half of each switching cycle, and to turn on the other sampling storage branch of each to obtain a second storage voltage in the second half of each switching cycle.

4. The current signal adaptive sampling circuit according to claim 3, characterized in that: The amplification processing module includes: a fully differential amplifier, a positive phase end amplification processing unit and a negative phase end amplification processing unit, wherein the positive phase end amplification processing unit is connected to the positive input end of the fully differential amplifier, the negative phase end amplification processing unit is connected to the negative input end of the fully differential amplifier, the positive phase output end of the fully differential amplifier is connected to the positive phase end amplification processing unit, and the negative phase output end of the fully differential amplifier is connected to the negative phase end amplification processing unit. The positive phase end amplification processing unit and the negative phase end amplification processing unit can jointly determine the amplification factor of the fully differential amplifier under the control of the switch control signal. The positive phase end amplification processing unit and the negative phase end amplification processing unit can also control their respective amplification processing switch branches according to the switch control signal to cooperate with the cross sampling storage module, so that the voltage difference between the first storage voltage and the second storage voltage offsets the offset voltage of the fully differential amplifier; The fully differential amplifier is used to amplify the differential mode voltage signal according to a determined amplification factor to obtain a voltage output signal corresponding to the current target current signal.

5. The current signal adaptive sampling circuit according to claim 4, characterized in that: The positive phase end amplification processing unit includes an eighth capacitor, a tenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch and a sixteenth switch, Two ends of the thirteenth switch are respectively connected to the non-inverting input terminal and the non-inverting output terminal of the fully differential amplifier; One end of the eighth capacitor is connected to the non-inverting input end of the fully differential amplifier, the other end of the eighth capacitor is respectively connected to one end of the fourteenth switch and one end of the fifteenth switch, the other end of the fourteenth switch is connected to the non-inverting output end of the fully differential amplifier, the other end of the fifteenth switch is connected to one end of the tenth capacitor, the other end of the tenth capacitor is connected to one end of the sixteenth switch, the other end of the sixteenth switch is connected to the non-inverting output end of the fully differential amplifier, and the other end of the fifteenth switch and one end of the tenth capacitor are also connected to the input end of the common mode level; The negative phase end amplification processing unit includes a ninth capacitor, an eleventh capacitor, a seventeenth switch, an eighteenth switch, a nineteenth switch and a twentieth switch. Two ends of the seventeenth switch are respectively connected to the negative phase input terminal and the negative phase output terminal of the fully differential amplifier; One end of the ninth capacitor is connected to the negative phase input end of the fully differential amplifier, the other end of the ninth capacitor is respectively connected to one end of the eighteenth switch and one end of the nineteenth switch, the other end of the eighteenth switch is connected to the negative phase output end of the fully differential amplifier, the other end of the nineteenth switch is connected to one end of the eleventh capacitor, the other end of the eleventh capacitor is connected to one end of the twentieth switch, the other end of the twentieth switch is connected to the negative phase output end of the fully differential amplifier, and the other end of the nineteenth switch and one end of the eleventh capacitor are also connected to the input end of the common mode level; In the first half of each switching cycle, the thirteenth switch and the seventeenth switch are closed to connect the positive phase input terminal of the fully differential amplifier to the positive phase output terminal and the negative phase input terminal to the negative phase output terminal, and the offset voltage of the fully differential amplifier can be stored in the first sampling storage unit and the second sampling storage unit to form the first storage voltage together with the positive phase differential mode voltage signal; In the second half of each switching cycle, the fourteenth switch and the eighteenth switch are closed, so that the eighth capacitor and the ninth capacitor jointly store the second storage voltage with the first sampling storage unit and the second sampling storage unit, and the second storage voltage includes the offset voltage of the fully differential amplifier and the negative phase differential mode voltage signal.

6. The current signal adaptive sampling circuit according to claim 4, characterized in that: The first sampling storage unit includes: a ninth switch, a tenth switch and a sixth capacitor, one end of the ninth switch and one end of the tenth switch are both connected to the output end of the voltage conversion unit, the other end of the ninth switch and the other end of the tenth switch are both connected to one end of the sixth capacitor, and the other end of the sixth capacitor is connected to the non-inverting input end of the fully differential amplifier; The second sampling storage unit includes: an eleventh switch, a twelfth switch and a seventh capacitor, one end of the eleventh switch and one end of the twelfth switch are both connected to the output end of the voltage conversion unit, the other end of the eleventh switch and the other end of the twelfth switch are both connected to one end of the seventh capacitor, and the other end of the seventh capacitor is connected to the negative phase input end of the fully differential amplifier; In the first half of each switching cycle, the ninth switch and the twelfth switch are closed, and the tenth switch and the eleventh switch are opened, so that the sixth capacitor and the seventh capacitor store the first storage voltage; In the second half of each switching cycle, the ninth switch and the twelfth switch are opened, and the tenth switch and the eleventh switch are closed, so that the sixth capacitor and the seventh capacitor store the second storage voltage.

7. The current signal adaptive sampling circuit according to any one of claims 1 to 6, characterized in that: The voltage conversion unit includes: a positive phase coupling switch unit and a negative phase coupling switch unit, the positive phase coupling switch unit and the negative phase coupling switch unit are electrically connected, and the positive phase coupling switch unit and the negative phase coupling switch unit are respectively connected to the current sampling unit and the voltage amplification output unit; The positive phase coupling switch unit is used to couple one half of the sampled voltage signal in the form of a positive phase voltage to the common mode level to obtain the positive phase differential mode voltage signal; The negative phase coupling switch unit is used to couple one half of the sampled voltage signal in the form of a negative phase voltage to a common mode level to obtain the negative phase differential mode voltage signal.

8. The current signal adaptive sampling circuit according to claim 7, characterized in that: The positive phase coupling switch unit includes: a first switch, a second switch, a fifth switch, a sixth switch and a fourth capacitor, wherein one end of the first switch and the second switch connected in series is connected to one end of the fifth switch and the sixth switch connected in series, and the other end of the first switch and the second switch connected in series is connected to the other end of the fifth switch and the sixth switch connected in series, The negative phase coupling switch unit includes: a third switch, a fourth switch, a seventh switch, an eighth switch and a fifth capacitor, wherein one end of the third switch and the fourth switch connected in series is connected to one end of the seventh switch and the eighth switch connected in series, and the other end of the third switch and the fourth switch connected in series is connected to the other end of the seventh switch and the eighth switch connected in series, One end of the fourth capacitor is connected to the series connection end between the first switch and the second switch, and the other end of the fourth capacitor is connected to the series connection end between the third switch and the fourth switch; one end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch, and the other end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch; One end of the first switch and the second switch connected in series is the input end of the common mode level, and the other end of the first switch and the second switch connected in series is the positive phase end of the voltage conversion unit. One end of the third switch and the fourth switch connected in series is an input end of the common mode level, and the other end of the third switch and the fourth switch connected in series is a negative phase end of the voltage conversion unit.

9. A current signal adaptive sampling system, characterized in that: It comprises a controller and a current signal adaptive sampling circuit as described in any one of claims 1 to 8, wherein the controller is electrically connected to the current signal adaptive sampling circuit, the controller is used to generate a preset frequency division control signal, the current signal adaptive sampling circuit is used to generate switch control signals of different frequencies according to the preset frequency division control signal, and convert the sampled voltage signal converted after the target current is sampled into a differential mode voltage signal on the common mode according to the switch control signal, and obtain a voltage output signal corresponding to the current target current signal after amplifying the differential mode voltage signal based on eliminating the offset voltage.

10. An electronic device, characterized in that: include: The device to be sampled and the current signal adaptive sampling system according to claim 9, wherein the current signal adaptive sampling system is electrically connected to the device to be sampled.

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