Implementation method of image sensor

Abstract

The invention provides an implementation method of an image sensor, the image sensor comprises a pixel unit array, the pixel unit array comprises a plurality of pixel unit groups, each pixel unit group comprises at least one first pixel and at least one second pixel, the size of the second pixel is smaller than that of the first pixel, and the size of the second pixel is smaller than that of the first pixel. The first pixel and the second pixel have respective readout circuits, and simultaneously read pixel signals of the first pixel and the second pixel to synthesize a high dynamic image. According to the implementation method of the image sensor, the pixel signals of the first pixel and the second pixel are read at the same time to synthesize the high-dynamic image, the high-dynamic range of segmentation pixels can be achieved, the high image reading frame rate can be kept at the same time, the image reading frame rate is about two times that of a traditional segmentation pixel scheme, and the image reading efficiency is greatly improved. The method is more suitable for high-speed and high-dynamic application scenes.

Description

Technical Field

[0001] The invention relates to a method for realizing an image sensor. Background Art

[0002] A typical image sensor operates in response to image light from an external scene being incident on the image sensor. The image sensor includes a pixel array having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charges when absorbing the image light. The image charge generated by the pixel light can be measured as an analog output image signal on a column bit line that varies depending on the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, and the image charge amount is read out as an analog signal from the column bit line and converted to a digital value to produce a digital image (i.e., image data) representing the external scene.

[0003] Standard image sensors have a limited dynamic range of about 60 to 70 dB. However, the real-world dynamic range of brightness is much larger. For example, natural scenes often span a range of 90 dB and more. In order to capture details in both bright highlights and dark shadows, high dynamic range (HDR) technology has been used in image sensors to increase the captured dynamic range.

[0004] A common technique for increasing dynamic range is to combine multiple exposure images captured with different exposure settings using a standard (low dynamic range) image sensor into a single linear HDR image, resulting in an image with a much larger dynamic range than a single exposure image. However, this can lead to issues such as motion artifacts and imaging LED flicker.

[0005] Another common technique for increasing the dynamic range is to use dual conversion gain (DCG) to achieve a higher dynamic range. However, due to the size of the capacitor in the pixel unit, the ratio of high conversion gain (HCG) to low conversion gain (LCG) is usually not large, and the dynamic range expansion is limited. In addition, the use of dual conversion gain requires reading out the reference signal and image signal of HCG and LCG separately, which doubles the operation time and reduces the image readout frame rate, which is not suitable for high-speed application scenarios.

[0006] Another technique to increase dynamic range is to use pixel units (large and small pixels) that divide pixels to achieve high dynamic range. For example, Figure 1This is a schematic diagram of a pixel unit in a traditional image sensor using split pixels. It consists of 6 MOS, two photodiodes and a capacitor: two photodiodes are large and one small, respectively controlled by two transfer transistors TX1MOS and TX2MOS, the reset transistor RSTMOS has the function of clearing, and the dual conversion gain transistor DCG controls the connection and disconnection of the two nodes of the floating diffusion area FD and FD1. FD is connected to the gate of the source follower transistor SFMOS, RSEL is the row selection signal, which is used to control the switch of the row selection transistor RSELMOS, and PXDA is the output of the pixel unit. The main feature of this structure is that the number of electrons generated by two photodiodes of different sizes is proportional to their area under the same light intensity and exposure time. The photodiode with a large area has more charge converted from photoelectricity, which is suitable for scenes with low brightness, and the photodiode with a small area has less charge converted from photoelectricity, which is suitable for scenes with high brightness. The charge generated by the photodiodes of the two sizes is transferred to FD in time-sharing and read out after level shifting by the same SF MOS. Then the two signals of different sizes are quantized by the same column analog-to-digital converter (COL ADC) and then synthesized into a high-dynamic image by the image processing unit. Compared with the dual conversion gain solution, large and small pixel units can achieve a greater light conversion efficiency ratio through differences in area and transmittance, thus having a larger extended dynamic range. However, the traditional split pixel unit requires time-sharing readout of the reference signal and image signal of the large pixel unit and the small pixel unit, doubling the row operation time, reducing the frame rate of the readout image, and is not suitable for high-speed application scenarios. Summary of the invention

[0007] The object of the present invention is to provide an implementation method of an image sensor, which can achieve a high dynamic range of segmented pixels while maintaining a high image readout frame rate, and is more suitable for high-speed and high-dynamic application scenarios.

[0008] Based on the above considerations, the present invention provides an implementation method of an image sensor, wherein the image sensor comprises: a pixel unit array, wherein the pixel unit array comprises a plurality of pixel unit groups, each pixel unit group comprises at least one first pixel and at least one second pixel, the size of the second pixel is smaller than the first pixel, the first pixel and the second pixel have separate readout circuits, and the pixel signals of the first pixel and the second pixel are read simultaneously to synthesize a high dynamic image.

[0009] Preferably, at least part of transistors of the readout circuit of the second pixel are formed in the form of sidewall transistors to save the area of ​​the second pixel.

[0010] Preferably, the step of forming the sidewall transistor includes: before the gate of the semiconductor device is formed, forming a first mask layer according to a first photolithography pattern, etching the semiconductor substrate to form an array-arranged semiconductor island structure, and at least part of the upper portions of the semiconductor island structures are interconnected by at least one cantilever connection structure; in a subsequent process, the first mask layer is used to perform self-aligned etching to form a sidewall transistor with a three-dimensional structure at the cantilever connection structure.

[0011] Preferably, the pixel signals of the first pixel and the second pixel are transmitted in parallel to achieve high-speed acquisition of the high-dynamic image.

[0012] Preferably, the pixel signals of the first pixel and the second pixel are respectively output to corresponding analog-to-digital converters for simultaneous quantization.

[0013] Preferably, the first pixel is configured with a dual conversion gain transistor and a capacitor, and / or the second pixel is configured with an overflow transistor and a capacitor, so as to increase the dynamic range of the high dynamic image.

[0014] Preferably, the pixel signal of the first pixel is read in the dual conversion gain mode while the pixel signal of the second pixel is read in the overflow mode.

[0015] Preferably, the pixel signals of the first pixel and the second pixel are read simultaneously by coherent double sampling.

[0016] Preferably, the coherent double sampling includes: a reset signal and a transfer signal are multiplexed to the first pixel and the second pixel in sequence to simultaneously read pixel signals of the first pixel and the second pixel.

[0017] Preferably, the coherent double sampling includes: a reset signal with the same timing and a transfer signal with the same timing are respectively input to the first pixel and the second pixel to simultaneously read pixel signals of the first pixel and the second pixel.

[0018] Preferably, the first pixel and the second pixel respectively output a reference pixel signal and an initial pixel signal to a corresponding analog-to-digital converter and subtract them after quantization to form respective effective pixel signals.

[0019] Preferably, the reference pixel signals of the first pixel and the second pixel are processed in parallel to be output to each of the analog-to-digital converters.

[0020] Preferably, the initial pixel signals of the first pixel and the second pixel are processed in parallel to be output to each of the analog-to-digital converters.

[0021] Preferably, the exposure time of the first pixel is greater than the exposure time of the second pixel.

[0022] The implementation method of the image sensor of the present invention is to set a pixel unit array including a plurality of pixel unit groups, each pixel unit group includes at least one first pixel and at least one second pixel, the size of the second pixel is smaller than the first pixel, the first pixel and the second pixel have separate readout circuits, and the pixel signals of the first pixel and the second pixel are read simultaneously to synthesize a high dynamic image. While achieving a high dynamic range of the segmented pixels, a high image readout frame rate can be maintained. The image readout frame rate is approximately twice that of a traditional segmented pixel solution, and is more suitable for high-speed and high-dynamic application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0024] Figure 1 A circuit diagram of an image sensor in the prior art; Figure 2 is a schematic structural diagram of an image sensor according to an embodiment of the present invention; Figure 3 is a schematic structural diagram of an image sensor according to another embodiment of the present invention; Figure 4 is a circuit diagram of an image sensor according to an embodiment of the present invention; Figure 5 for Figure 4 Signal timing diagram of image sensor; Figure 6 is a circuit diagram of an image sensor according to another embodiment of the present invention; Figure 7 for Figure 6 Signal timing diagram of image sensor; Figure 8 The figure is a schematic diagram of the layout design of the sidewall transistor in the image sensor of the present invention.

[0025] In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout different drawings. Implementation

[0026] In order to solve the above-mentioned problems in the prior art, the present invention provides an implementation method of an image sensor, by simultaneously reading the pixel signals of a first pixel and a second pixel to synthesize a high dynamic image, thereby achieving a high dynamic range of the segmented pixels while maintaining a high image readout frame rate.

[0027] In the following specific description of the preferred embodiments, reference will be made to the attached drawings which constitute a part of the present invention. The attached drawings show by way of example specific embodiments that can implement the present invention. The illustrative embodiments are not intended to be exhaustive of all embodiments according to the present invention. It will be appreciated that other embodiments may be utilized, and structural or logical modifications may also be made without departing from the scope of the present invention. Therefore, the following specific description is not restrictive, and the scope of the present invention is limited by the appended claims.

[0028] Figure 2 1 is a schematic diagram of the structure of an image sensor according to an embodiment of the present invention. The image sensor of the present invention includes a pixel unit array, which includes a plurality of pixel unit groups, and four adjacent pixel unit groups are shown here as an example, wherein each pixel unit group includes at least one first pixel 100 and at least one second pixel 200, and the size of the second pixel 200 is smaller than that of the first pixel 100.

[0029] Preferably, the same color filter group in the pixel unit group corresponds to at least 2×2 first pixels 100, such as Figure 2 As shown, on this basis, the number of the first pixels 100 may also be changed, and the present invention does not impose any further limitation.

[0030] In order not to increase the design area, preferably, the second pixel 200 can be arranged along at least one pair of corners of the pixel unit group. Figure 2 As shown, if every four first pixels 100 correspond to one second pixel 200 , the second pixel 200 can be set at the center position of the four first pixels 100 , that is, every four first pixels 100 surround one second pixel 200 .

[0031] In the present invention, the shape of each of the first pixel 100 and the second pixel 200 includes a regular polygon or a circle, which is not limited in the present invention.

[0032] Preferably, in the present invention, the different color filter groups are arranged in a Bayer array. Figure 3 As shown, if each color filter corresponds to a pixel unit group of 2×2 first pixels 100, and the pixel unit group is configured with a second pixel 200, then Figure 3 As shown in the arrangement, the adjacent 4 pixel unit groups include 8 first pixel green filters (G), 4 first pixel blue filters (B), 4 first pixel red filters (R), and 2 second pixel green filters (G), 1 second pixel blue filter (B), and 1 second pixel red filter (R).

[0033] The present invention provides a method for implementing an image sensor, wherein the first pixel 100 and the second pixel 200 have separate readout circuits, and pixel signals of the first pixel 100 and the second pixel 200 are read simultaneously to synthesize a high dynamic range image.

[0034] Specifically, in Figure 4 In the circuit diagram shown, the first pixel 100 has a relatively large first photodiode PD1, and the second pixel 200 has a relatively small second photodiode PD2. In the first pixel 100, the charge generated by the large photodiode PD1 during exposure is transferred to the floating diffusion area FD1 through the transfer transistor TX1 control, then amplified by the source follower transistor SF1 and controlled by the row select transistor RSEL, and finally read out from the output terminal PXDA1; while in the second pixel 200, the charge generated by the small photodiode PD2 during exposure is transferred to the floating diffusion area FD2 through the transfer transistor TX2 control, then amplified by the source follower transistor SF2 and controlled by the row select transistor RSEL, and finally read out from the output terminal PXDA2. PXDA1 and PXDA2 can be connected to two different analog-to-digital converters (ADCs), that is, the pixel signals of the first pixel 100 and the second pixel 200 are respectively output to the corresponding analog-to-digital converters (not shown) for simultaneous quantization and readout, and then transferred to the image processing unit to be synthesized into a high dynamic image. Compared with the traditional segmented pixel structure, the signal readout and ADC quantization of the image sensor of the present invention are changed from serial to parallel, thereby doubling the speed through the parallel transmission of each pixel signal, so it is more suitable for high-speed and high-dynamic image signal acquisition.

[0035] Figure 5 yes Figure 4 The timing diagram corresponding to the pixel structure shown in the figure. First, RSEL is set high to select the readout line; secondly, the reset transistor RST1 / RST2 turns on a pulse to clear FD1 / FD2, and then the output signal of PXDA1 / PXDA2 is quantized and read out as the reference pixel signal ref; next, TX1 / TX2 turns on a pulse, the charge on PD1 / PD2 is transferred to FD1 / FD2, and then the output of PXDA1 / PXDA2 is quantized and read out as the initial pixel signal sig; finally, sig is subtracted from ref to obtain the effective pixel signals of the large and small photodiodes PD1 / PD2. This readout method is usually called coherent double sampling.

[0036] from Figure 5It can be seen from the operation timing that the timing of RST1 and RST2 is the same, and the timing of TX1 and TX2 is the same, that is, the reset signals RST1 and RST2 with the same timing and the transfer signals TX1 and TX2 with the same timing can be respectively input to each pixel 100, 200 to read each pixel signal at the same time; those skilled in the art can understand that in another embodiment not shown, the reset signals RST1 and RST2 with the same timing can be combined into the same control signal RST, and the transfer signals TX1 and TX2 with the same timing can be combined into the same control signal TX, that is, the reset signal and the transfer signal can be multiplexed to each pixel 100, 200 in turn to read each pixel signal at the same time. Therefore, each pixel 100, 200 outputs a reference pixel signal and an initial pixel signal to the corresponding analog-to-digital converter respectively and subtracts them after quantization to form their respective effective pixel signals. By processing each reference pixel signal in parallel to output it to each analog-to-digital converter, and processing each initial pixel signal in parallel to output it to each analog-to-digital converter, the image readout frame rate is improved.

[0037] Figure 6 FIG. 4 is a schematic diagram of the structure of an image sensor according to another embodiment of the present invention. Figure 6 As shown, the pixel structure of the image sensor of the present invention can be expanded to support DCG and / or LOFIC (Lateral Overflow Integration Capacitor, generally referred to as overflow mode) signal conversion modes, thereby further increasing the dynamic range of the image sensor.

[0038] Specifically, the larger first photodiode PD1 supports the DCG mode, and the smaller second photodiode PD2 supports the LOFIC mode, that is, the first pixel 100 is configured with a dual conversion gain transistor DCG and a first capacitor C1, and the second pixel 200 is configured with an overflow transistor TCG and a second capacitor C2. Preferably, while the pixel signal of the first pixel 100 is read in the dual conversion gain mode, the pixel signal of the second pixel 200 is read in the overflow mode, thereby greatly increasing the dynamic range of the high dynamic image.

[0039] Operation sequence: Figure 7 As shown. The signal readout of the larger first photodiode PD1 is divided into four steps: 1) Low gain reference pixel signal (ref1); 2) High gain reference pixel signal (ref2); 3) High gain raw pixel signal (sig2); 4) Low gain raw pixel signal (sig1).

[0040] The signal readout of the smaller second photodiode PD2 is also divided into four steps: 1) Reference pixel signal 1 (ref1); 2) Reference pixel signal 2 (ref2); 3) Raw pixel signal of PD2 (sig2); 4) The original pixel signal of PD2 + the original pixel signal (sig1) overflowed from PD2 and stored on capacitor C2.

[0041] Of course, those skilled in the art will appreciate that, in other embodiments not shown, the first pixel 100 may be separately configured with a dual conversion gain transistor DCG and a first capacitor C1, or the second pixel 200 may be separately configured with an overflow transistor TCG and a second capacitor C2, which may also increase the dynamic range of the high dynamic image to a certain extent.

[0042] In addition, the first photodiode PD1 of the first pixel 100 and the second photodiode PD2 of the second pixel 200 can have different exposure times, which can be achieved by adjusting the clearing timing of RST1 and RST2. For example, when clearing, a positive pulse can be given to RST1 first, and TX1 can be turned on at the same time to complete the clearing of PD1. After a preset period of time, a positive pulse can be given to RST2, and TX2 can be turned on at the same time to complete the clearing of PD2. In this way, when reading out the selected pixel unit, PD1 will have a relatively long exposure time T1, while PD2 will have a relatively short exposure time T2. Assuming N=T1 / T2, the synthesized dynamic range can be further expanded by N times.

[0043] In addition, in order to save the area of ​​the second pixel 200 with a smaller size, it is preferred to form at least part of the transistors of the readout circuit of the second pixel 200 by means of sidewall transistors. The step of forming the sidewall transistors includes: before forming the gate of the semiconductor device, forming a first mask layer according to a first photolithography pattern, etching the semiconductor substrate to form an array of semiconductor island structures 110, and at least part of the upper parts of the semiconductor island structures 110 are connected to each other through at least one cantilever beam connection structure 120, such as Figure 8 As shown; in the subsequent process, the first mask layer is used to perform self-aligned etching to form a three-dimensional sidewall transistor at the cantilever connection structure 120.

[0044] The implementation method of the image sensor of the present invention is to set a pixel unit array including a plurality of pixel unit groups, each pixel unit group includes at least one first pixel and at least one second pixel, the size of the second pixel is smaller than the first pixel, the first pixel and the second pixel have separate readout circuits, and the pixel signals of the first pixel and the second pixel are read simultaneously to synthesize a high dynamic image. While achieving a high dynamic range of the segmented pixels, a high image readout frame rate can be maintained. The image readout frame rate is approximately twice that of a traditional segmented pixel solution, and is more suitable for high-speed and high-dynamic application scenarios.

[0045] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, in any case, the embodiments should be considered exemplary and non-restrictive. Furthermore, it is apparent that the term "comprising" does not exclude other elements and steps, and the wording "a" does not exclude the plural. Multiple elements stated in a device claim may also be implemented by one element. The words first, second, etc. are used to indicate names and do not indicate any particular order.

Claims

1. A method for implementing an image sensor, characterized in that: The image sensor includes: a pixel unit array, the pixel unit array includes a plurality of pixel unit groups, each pixel unit group includes at least one first pixel and at least one second pixel, the size of the second pixel is smaller than the first pixel, the first pixel and the second pixel have separate readout circuits, and the pixel signals of the first pixel and the second pixel are read simultaneously to synthesize a high dynamic image.

2. The implementation method according to claim 1, characterized in that: At least part of transistors of the readout circuit of the second pixel are formed in the form of sidewall transistors to save the area of ​​the second pixel.

3. The implementation method according to claim 2, characterized in that: The steps for forming the sidewall transistor include: before the gate of the semiconductor device is formed, forming a first mask layer according to a first photolithography pattern, etching the semiconductor substrate to form an array-arranged semiconductor island structure, and at least part of the upper portions of the semiconductor island structures are interconnected by at least one cantilever connection structure; in a subsequent process, the first mask layer is used for self-aligned etching to form a three-dimensional sidewall transistor at the cantilever connection structure.

4. The implementation method according to claim 1, characterized in that: The pixel signals of the first pixel and the second pixel are transmitted in parallel to achieve high-speed acquisition of the high-dynamic image.

5. The implementation method according to claim 1, characterized in that: The pixel signals of the first pixel and the second pixel are respectively output to corresponding analog-to-digital converters for simultaneous quantization.

6. The implementation method according to claim 4, characterized in that: The first pixel is configured with a dual conversion gain transistor and a capacitor, and / or the second pixel is configured with an overflow transistor and a capacitor, so as to increase the dynamic range of the high dynamic image.

7. The implementation method according to claim 6, characterized in that: The pixel signal of the first pixel is read in the dual conversion gain mode, while the pixel signal of the second pixel is read in the overflow mode.

8. The implementation method according to claim 4, characterized in that: The pixel signals of the first pixel and the second pixel are read simultaneously by coherent double sampling.

9. The implementation method according to claim 8, characterized in that: The coherent double sampling includes: a reset signal and a transfer signal are multiplexed to the first pixel and the second pixel in sequence to simultaneously read the pixel signals of the first pixel and the second pixel.

10. The implementation method according to claim 8, characterized in that: The coherent double sampling includes: a reset signal with the same timing and a transfer signal with the same timing are respectively input to the first pixel and the second pixel to simultaneously read pixel signals of the first pixel and the second pixel.

11. The implementation method according to claim 9 or 10, characterized in that: The first pixel and the second pixel respectively output a reference pixel signal and an initial pixel signal to a corresponding analog-to-digital converter and subtract them after quantization to form respective effective pixel signals.

12. The implementation method according to claim 11, characterized in that: The reference pixel signals of the first pixel and the second pixel are processed in parallel to be output to the respective analog-to-digital converters.

13. The implementation method according to claim 11, characterized in that: The initial pixel signals of the first pixel and the second pixel are processed in parallel to be output to the respective analog-to-digital converters.

14. The implementation method according to claim 1, characterized in that: The exposure time of the first pixel is greater than the exposure time of the second pixel.

Images