Peak reference generation circuit, average current controller, method and LED driving system

Abstract

The invention provides a peak reference generation circuit, an average current controller, a method and an LED driving system, and the circuit comprises a PWM dimming signal frequency detection unit which generates a first clock signal, the frequency of which is in direct proportion to the frequency of a PWM dimming signal; the PWM dimming signal duty ratio detection unit is used for detecting the duty ratio of the PWM dimming signal, outputting a detection signal in direct proportion to the duty ratio of the PWM dimming signal when the duty ratio of the PWM dimming signal is smaller than a threshold value, and outputting a detection signal corresponding to the threshold value when the duty ratio is larger than or equal to the threshold value; and the reference generation unit is used for generating a peak reference signal of the inductive current, and the value of the peak reference signal is increased along with the increase of the detection signal. According to the invention, inductive current ripples can be reduced, the precision of PWM dimming is improved, the problem of light source jittering during high-depth PWM dimming is avoided, and the high efficiency of the system at a large dimming duty ratio and the dimming precision at a low dimming duty ratio are both considered.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and in particular to a peak reference generating circuit, an average current controller, a method and an LED driving system. Background Art

[0002] According to the light-emitting principle and characteristics of LED, constant current source is selected to drive LED lamp beads. Constant current source is usually divided into linear constant current source and switch mode constant current source. Switch mode constant current source stands out for its high efficiency and small size. Among them, average current control mode Buck driver is widely used in medium and high power LED driving occasions due to its excellent constant current accuracy.

[0003] In current client applications, dimming function is a very typical requirement; there are two types of dimming methods, linear dimming and PWM dimming. Among them, the advantages of PWM dimming are high precision and no color difference, and PWM dimming is more suitable for intelligent dimming applications, so constant current drivers with integrated PWM dimming function are widely used. With the development of intelligent dimming technology, customers' demand for PWM dimming depth has further increased; currently conventional PWM dimming cannot meet the high-depth PWM dimming requirements, and there is jitter at low brightness.

[0004] like Figure 1 As shown, the average current control mode based on off-time adaptation has excellent dynamic response speed. In the PWM dimming method, the on-time is controlled and the off-time is determined according to the comparison results of the inductor current IL with the peak reference current IL_peak and the average reference current IL_AVG. When the PWM dimming signal is at a high level, the power switch tube in the LED switching power supply is periodically controlled to be turned on or off. Since the LED light string is connected in series with the inductor, in the steady-state working state, the LED current is also controlled to be the average value of the inductor current IL_AVG. When the PWM dimming signal is at a low level, the power switch tube remains in the off state and the inductor current is 0.

[0005] Since the inductor current is IL_AVG when the PWM dimming signal is high and is 0 when the PWM is low, the average value of the LED current is ILED_AVG = IL_AVG*D, where D is the duty cycle of the PWM dimming signal. By changing the duty cycle D of the PWM dimming signal, the LED current can be controlled, thereby achieving the dimming function.

[0006] When the duty cycle of the PWM dimming signal ranges from 0 to 100%, the peak value of the inductor current is determined by the peak reference current IL_peak, and the average value of the inductor current is determined by the average reference current IL_AVG. The values ​​of each reference current remain constant. Therefore, the ripple amplitude of the inductor current is equal to (Vref_peak-Vref_AVG)*2 / Rcs (where Vref_peak is the peak reference signal, corresponding to IL_peak; Vref_AVG is the average reference signal, corresponding to IL_AVG; Rcs is the sampling resistor of the inductor current), and remains constant. Figure 2 As shown. Figure 1 As shown in the figure, when the duty cycle D of the PWM dimming signal is within the range of △D between PWP1 and PWM2, the average current of the LED is the same, which means that in the range of △D, changing the duty cycle D of the PWM dimming signal cannot change the average current of the LED. Therefore, when the duty cycle D of the PWM dimming signal increases linearly, the LED brightness will not change in the range of △D. When the duty cycle D of the PWM dimming signal is greater than the duty cycle of PWM2, the LED brightness will change suddenly, thus affecting the linearity and continuity of dimming. When the duty cycle D of the PWM dimming signal is large, △D / D is small. Since the average current of the LED is large at this time, the human eye is not sensitive to small brightness changes, and the impact can be ignored. However, in the case of high-depth dimming, the duty cycle D of the PWM dimming signal is extremely small, while △D remains unchanged, resulting in a large △D / D. Since the average current of the LED is small at this time, the same △D causes a more significant problem of discontinuous brightness change, and the human eye feels the jitter of the light source, which deteriorates the customer experience.

[0007] Therefore, how to meet the high-depth PWM dimming requirements, avoid jitter at low brightness, and improve customer experience in the average current control mode based on off-time adaptation has become one of the technical problems that technical personnel in this field need to solve urgently.

[0008] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0009] In view of the shortcomings of the prior art mentioned above, the object of the present invention is to provide a peak reference generating circuit, an average current controller, a method and an LED driving system, which are used to solve the problems in the prior art that PWM dimming in the average current control mode based on off-time adaptation cannot meet the high-depth PWM dimming requirements, there is jitter at low brightness, and the customer experience is poor.

[0010] To achieve the above-mentioned object and other related objects, the present invention provides a peak reference generation circuit for controlling the peak value of an inductor current, wherein the peak reference generation circuit at least comprises: a PWM dimming signal frequency detection unit, a PWM dimming signal duty cycle detection unit and a reference generation unit;

[0011] The PWM dimming signal frequency detection unit receives the PWM dimming signal and is used to generate a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal;

[0012] The PWM dimming signal duty cycle detection unit is connected to the output end of the PWM dimming signal frequency detection unit, and detects the duty cycle of the PWM dimming signal; when the duty cycle of the PWM dimming signal is less than a threshold, a detection signal proportional to the duty cycle of the PWM dimming signal is output; when the duty cycle of the PWM dimming signal is greater than or equal to the threshold, a detection signal corresponding to the threshold is output;

[0013] The reference generating unit is connected to the output end of the PWM dimming signal duty cycle detecting unit, and is used to generate a peak reference signal of the inductor current, wherein the value of the peak reference signal increases as the detection signal increases.

[0014] Optionally, the PWM dimming signal frequency detection unit includes: a PWM dimming signal frequency measurement module and a clock signal generation module;

[0015] The PWM dimming signal frequency measurement module counts the time when the PWM dimming signal is at a high level based on the second clock signal, and outputs a frequency count value after completing the counting, wherein the frequency count value is proportional to the frequency of the PWM dimming signal;

[0016] The clock signal generating module is connected to the output end of the PWM dimming signal frequency measuring module, and generates the first clock signal based on the frequency count value.

[0017] More optionally, the PWM dimming signal frequency measurement module includes: a first delay unit, a first counter, a first register and a first subtractor;

[0018] The first delay unit receives the PWM dimming signal to obtain a first delayed signal of the PWM dimming signal, wherein the delay time is no more than two cycles of the second clock signal;

[0019] The first counter is connected to the output end of the first delay unit and receives the second clock signal, and is reset and starts counting up at the rising edge of the first delay signal;

[0020] The first register is connected to the output end of the first counter, stores the value output by the first counter, and reads out the latched value at the rising edge of the PWM dimming signal;

[0021] The first subtractor is connected to the output end of the first register, and subtracts the value output by the first register from the preset value to obtain the frequency count value.

[0022] More optionally, the clock signal generating module comprises: a digital-to-analog converter and an oscillator;

[0023] The digital-to-analog converter is connected to the output end of the PWM dimming signal frequency measurement module to convert the frequency count value into an analog signal;

[0024] The oscillator is connected to the output terminal of the digital-to-analog converter, and generates the first clock signal based on the output signal of the digital-to-analog converter.

[0025] Optionally, the PWM dimming signal duty cycle detection unit includes: a second delay unit, a second counter and a second register;

[0026] The second delay unit receives the PWM dimming signal to obtain a second delayed signal of the PWM dimming signal, wherein the delay time is no more than two cycles of the first clock signal;

[0027] The second counter is connected to the output end of the second delay unit and receives the first clock signal, resets to an initial value at a falling edge of the second delay signal, counts up at a rising edge of the second delay signal, and latches a counting result when counting to a pre-designed value;

[0028] The second register is connected to the output end of the second counter, registers the value output by the second counter, and latches the output signal of the second counter at the falling edge of the PWM dimming signal.

[0029] Optionally, the reference generating unit comprises: a current source and a resistor;

[0030] One end of the current source is connected to the power supply voltage, and the other end is grounded via the resistor;

[0031] The current source is controlled by the detection signal. The larger the detection signal is, the larger the current flowing through the current source is.

[0032] More optionally, the reference generating unit further includes a voltage follower; an input end of the voltage follower is connected to a connection node between the current source and the resistor, and outputs the peak reference signal.

[0033] In order to achieve the above-mentioned object and other related objects, the present invention further provides an average current controller, which at least comprises:

[0034] A driving signal generating circuit and the peak reference generating circuit;

[0035] The peak reference generation circuit generates a peak reference signal for controlling the peak value of the inductor current;

[0036] The drive signal generating circuit is connected to the output end of the peak reference generating circuit, and receives the inductor current detection signal, the PWM dimming signal and the average reference signal for controlling the average value of the inductor current; when the PWM dimming signal is at a high level, based on the comparison result of the inductor current detection signal with the peak reference signal and the average reference signal, a drive signal for realizing average current control is generated; when the PWM dimming signal is at a low level, the drive signal remains at a low level.

[0037] Optionally, the average current controller includes: an on-time control module, an off-time control module, a trigger, an AND logic module and a gate drive module;

[0038] The on-time control module generates a first off-control signal based on the difference between the inductor current detection signal and the average reference signal, and generates a second off-control signal based on the comparison result between the inductor current detection signal and the peak reference signal; and outputs a valid off-control signal based on the valid first off-control signal or the second off-control signal when the driving signal is at a high level;

[0039] The off-time control module receives the driving signal, the first off-control signal and the second off-control signal, and when the driving signal is at a low level, adaptively adjusts the off-time based on the first off-control signal and the second off-control signal, and generates a corresponding on-control signal;

[0040] The trigger is connected to the output ends of the on-time control module and the off-time control module, and generates a switch control signal based on the off-control signal and the on-control signal;

[0041] The AND logic module is connected to the output end of the trigger, receives the PWM dimming signal, and performs an AND operation on the output signal of the trigger and the PWM dimming signal;

[0042] The gate driving module is connected to the output end of the AND logic module, and generates the driving signal based on the output signal of the AND logic module.

[0043] To achieve the above-mentioned object and other related objects, the present invention further provides an LED driving system, the LED driving system at least comprising:

[0044] Switching power supply module, LED load, sampling module and the above average current controller;

[0045] The sampling module detects the current of the inductor;

[0046] The LED load is connected to the switching power supply module and operates based on the output current of the switching power supply module;

[0047] The output end of the average current controller is connected to the gate of the power switch tube in the switching power supply module to provide a driving signal.

[0048] Optionally, the switching power supply module is a BUCK topology structure.

[0049] In order to achieve the above-mentioned object and other related objects, the present invention further provides an average current control method, which at least includes:

[0050] When the PWM dimming signal is at a high level, a peak reference signal is generated based on the PWM dimming signal, and the on-time is controlled and the off-time is adaptively adjusted according to the comparison result of the inductor current detection signal with the peak reference signal and the average reference signal, so as to realize average current control; wherein, when the duty cycle of the PWM dimming signal is less than a threshold value, the peak reference signal increases linearly with the increase of the duty cycle of the PWM dimming signal, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value, the peak reference signal remains unchanged;

[0051] When the PWM dimming signal is at a low level, the power switch tube in the switching power supply module is turned off.

[0052] Optionally, the method for generating the peak reference signal includes:

[0053] Measuring the frequency of the PWM dimming signal and generating a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal;

[0054] The duty cycle of the PWM dimming signal is detected based on the first clock signal, and a detection signal proportional to the duty cycle of the PWM dimming signal is obtained when the duty cycle of the PWM dimming signal is less than a threshold value, and a detection signal corresponding to the threshold value is obtained when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value;

[0055] The peak reference signal is generated based on the detection signal, and the peak reference signal increases as the detection signal increases.

[0056] More optionally, the method for implementing average current control includes:

[0057] When the PWM dimming signal is at a high level, the power switch tube in the switching power supply module is controlled to be turned on or off based on the shutdown control signal and the conduction control signal;

[0058] Wherein, when the driving signal is at a high level, compensation is performed according to the difference between the inductor current detection signal and the average reference signal to obtain a compensation signal, and when the compensation signal is greater than a preset value, a valid first shutdown control signal is generated; at the same time, the inductor current detection signal is compared with the peak reference signal, and when the inductor current detection signal is greater than the peak reference signal, a valid second shutdown control signal is generated; the first shutdown control signal and the second shutdown control signal are subjected to an OR logic to output a shutdown control signal; when the driving signal is at a low level, the shutdown time is timed, and if the shutdown time reaches the set shutdown time, a valid conduction control signal is generated; wherein, when the first shutdown control signal is valid, the set shutdown time is increased, and when the second shutdown control signal is valid, the set shutdown time is reduced;

[0059] When the PWM dimming signal is at a low level, the power switch tube is turned off based on the driving signal.

[0060] As described above, the peak reference generation circuit, average current controller, method and LED driving system of the present invention have the following beneficial effects:

[0061] The peak reference generating circuit, average current controller, method and LED driving system of the present invention adjust the peak reference signal of the inductor current based on the duty cycle of the PWM dimming signal. When the duty cycle of the PWM dimming signal is less than the threshold, the peak reference signal increases linearly with the increase of the duty cycle, and maintains the maximum value when the duty cycle of the PWM dimming signal is greater than or equal to the threshold. In this way, the inductor current ripple can be reduced, thereby reducing the value of △D / D, improving the accuracy of PWM dimming, avoiding the problem of light source jitter occurring during high-depth PWM dimming, and taking into account both the high efficiency of the system at a large dimming duty cycle and the dimming accuracy at a low dimming duty cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 Shown is a schematic diagram of the principle of a PWM dimming method.

[0063] Figure 2 Display as Figure 1 Schematic diagram of the inductor current ripple in the PWM dimming method.

[0064] Figure 3Shown is a schematic structural diagram of a peak reference generating circuit of the present invention.

[0065] Figure 4 It is a schematic diagram showing the structure of the PWM dimming signal frequency detection unit of the present invention.

[0066] Figure 5 It is a schematic diagram showing the structure of the PWM dimming signal duty cycle detection unit of the present invention.

[0067] Figure 6 Shown is a schematic structural diagram of a reference generating unit of the present invention.

[0068] Figure 7 Shown is a schematic structural diagram of the average current controller of the present invention.

[0069] Figure 8 Shown is a schematic structural diagram of the LED driving system of the present invention.

[0070] Fig. 9 It is a schematic flow chart of the average current control method of the present invention.

[0071] Fig.10 It is a schematic diagram showing the principle of the average current control method of the present invention.

[0072] Component number description

[0073] 1 Average current controller

[0074] 1a Peak reference generation circuit

[0075] 11 PWM dimming signal frequency detection unit

[0076] 111 PWM dimming signal frequency measurement module

[0077] 112 Clock signal generation module

[0078] 11a First delay section

[0079] 11b First counter

[0080] 11c First register

[0081] 11d First subtractor

[0082] 11e Digital to Analog Converter

[0083] 11f Oscillator

[0084] 12 PWM dimming signal duty cycle detection unit

[0085] 13. Benchmark Generation Unit

[0086] 131 Current Source

[0087] 132 Voltage Follower

[0088] 1b Driving signal generation circuit

[0089] 14. On-time control module

[0090] 15. Off time control module

[0091] 16 Trigger

[0092] 17 AND logic module

[0093] 18. Gate drive module

[0094] 2 Switching power supply module

[0095] 3 Sampling module DETAILED DESCRIPTION

[0096] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0097] See also Figures 3 to 10 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0098] The present invention provides a peak reference generating circuit, an average current controller, a method and an LED driving system. To address the defects of the PWM dimming method in the off-time adaptive average current control mode under high-depth dimming conditions, the value of the peak reference signal is reduced to reduce the value of △D / D, thereby improving the accuracy of PWM dimming and avoiding the light source jitter problem that occurs during high-depth PWM dimming. The specific scheme is as follows.

[0099] like Figure 3 As shown, the present invention provides a peak reference generating circuit 1a, and the peak reference generating circuit 1a includes:

[0100] The PWM dimming signal frequency detection unit 11 , the PWM dimming signal duty cycle detection unit 12 and the reference generation unit 13 .

[0101] like Figure 3 As shown, the PWM dimming signal frequency detection unit 11 receives the PWM dimming signal PWM and generates a first clock signal Clock1 , and the frequency of the first clock signal Clock1 is proportional to the frequency of the PWM dimming signal PWM.

[0102] Specifically, any circuit structure capable of generating a clock signal having a frequency proportional to the frequency of the PWM dimming signal is applicable to the present invention, such as Figure 4 As shown, in this embodiment, the PWM dimming signal frequency detection unit 11 includes: a PWM dimming signal frequency measurement module 111 and a clock signal generation module 112. The PWM dimming signal frequency measurement module 111 counts the time of the high level of the PWM dimming signal PWM based on the second clock signal Clock2, and outputs a frequency count value after completing the counting, and the frequency count value is proportional to the frequency of the PWM dimming signal PWM. The clock signal generation module 112 is connected to the output end of the PWM dimming signal frequency measurement module 111, and generates the first clock signal Clock1 based on the frequency count value.

[0103] More specifically, if Figure 4As shown, as an example, the PWM dimming signal frequency measurement module 111 includes a first delay unit 11a, a first counter 11b, a first register 11c and a first subtractor 11d. The first delay unit 11a receives the PWM dimming signal PWM, delays the PWM dimming signal PWM and outputs a first delay signal PWMD1. As an example, the delay time is not greater than two cycles of the second clock signal Clock2. Further in this embodiment, the delay time is one clock cycle of the second clock signal Clock2. The first counter 11b is connected to the output end of the first delay unit 11a, and receives the second clock signal Clock2. It resets and starts counting up at the rising edge of the first delay signal PWMD1; that is, the first counter 11b repeatedly counts the frequency of the first delay signal PWMD1. The smaller the frequency of the first delay signal PWMD1 (the larger the cycle), the larger the count value of the first counter 11b. The first register 11c is connected to the output end of the first counter 11b, registers the value output by the first counter 11b, and reads out the latched value at the rising edge of the PWM dimming signal PWM, that is, the output value is the count value from the rising edge of the first delay signal PWMD1 to the rising edge of the PWM dimming signal PWM. The first subtractor 11d is connected to the output end of the first register 11c, subtracts the value output by the first register 11c from the preset value, and obtains the frequency count value, so that the frequency count value is proportional to the frequency of the PWM dimming signal PWM (linear change); in this embodiment, the preset value is the maximum value corresponding to the number of bits of the output value of the first register 11c. In actual use, the preset value can be set as needed, so that the relationship between the count value and the PWM dimming signal can be adjusted from inverse proportion to direct proportion, which is not limited to this embodiment.

[0104] It should be noted that the delay time is to prevent the first counter 11b from being reset when reading the data in the first register 11c, and the count value cannot be read from the first register 11c; by setting the delay time, the count value can be read out and then the reset step can be performed to ensure that the count value can be read smoothly. At this time, due to the existence of the delay time, the numerical value output from the first register 11 is approximately considered to represent the frequency of the PWM dimming signal, and the accuracy of the PWM dimming signal frequency will be lost. Therefore, the smaller the delay time, the more accurate the frequency of the PWM dimming signal measured. In this example, there will be a loss of 1-2 clock cycles. In actual use, the delay time can be set as needed to ensure that the count value is read out while meeting the accuracy requirements. In addition, any circuit structure that can detect the frequency of the PWM dimming signal is applicable to the present invention, and is not limited to this embodiment.

[0105] More specifically, if Figure 4 As shown, as an example, the clock signal generating module 112 includes a digital-to-analog converter 11e and an oscillator 11f. The digital-to-analog converter 11e is connected to the output end of the PWM dimming signal frequency measuring module 111, and converts the frequency count value into an analog signal. Any circuit structure that can realize digital-to-analog conversion is applicable, and it is not described in detail here. The oscillator 11f is connected to the output end of the digital-to-analog converter 11e, and generates the first clock signal Clock1 based on the output signal of the digital-to-analog converter 11e. In this example, the oscillator 11f is a voltage-controlled oscillator structure. In actual use, an RC oscillation structure or an LC oscillation structure can also be used, which is not described in detail here.

[0106] It should be noted that any circuit structure that can generate the first clock signal based on the frequency count value is applicable to the present invention, including but not limited to directly using a digital oscillator to generate the first clock signal, and is not limited to this embodiment.

[0107] like Figure 3 As shown, the PWM dimming signal duty cycle detection unit 12 is connected to the output end of the PWM dimming signal frequency detection unit 11, and detects the duty cycle of the PWM dimming signal PWM; when the duty cycle D of the PWM dimming signal is less than the threshold value D1, a detection signal proportional to the duty cycle D of the PWM dimming signal is output; when the duty cycle D of the PWM dimming signal is greater than or equal to the threshold value D1, a detection signal corresponding to the threshold value D1 is output.

[0108] Specifically, Figure 5As shown, in this embodiment, the PWM dimming signal duty cycle detection unit 12 includes a second delay unit 121, a second counter 122 and a second register 123. The second delay unit 122 receives the PWM dimming signal PWM to obtain a second delayed signal PWMD2 of the PWM dimming signal PWM. As an example, the delay time is not greater than two cycles of the first clock signal Clock1. Further in this embodiment, the delay time is one clock cycle of the first clock signal Clock1. The second counter 122 is connected to the output end of the second delay unit 121, and receives the first clock signal Clock1 and the latch signal Latch. It is reset to the initial value at the falling edge of the second delayed signal PWMD2, and counts up from the initial value at the rising edge of the second delayed signal PWMD2 to obtain a duty cycle count value Dn...D0, where n is the number of bits of the second counter; and when counting to a pre-designed value (corresponding to the duty cycle threshold D1), the counting result is latched based on the latch signal Latch. The second register 123 is connected to the output end of the second counter 122, registers the value output by the second counter 122, and latches the output signal of the second counter 122 at the falling edge of the PWM dimming signal PWM. That is, within the range where the duty cycle D of the PWM dimming signal PWM is less than the threshold value D1, the duty cycle count value increases with the increase of the duty cycle and is output via the second register 123. If the PWM dimming signal PWM jumps to a low level, the second register 123 latches the current count value until the PWM dimming signal PWM jumps to a high level, and the second counter 122 starts counting again from the initial value; after the duty cycle D of the PWM dimming signal PWM is greater than or equal to the threshold value D1, the duty cycle count value remains constant (latched by the second counter 122) and is output via the second register 123.

[0109] It should be noted that the function of delaying the PWM dimming signal in the PWM dimming signal duty cycle detection unit 12 is basically the same as that in the PWM dimming signal frequency detection unit 11, and the delay time can also be set as needed to ensure that the count value is read out while meeting the accuracy requirement. In addition, any circuit structure that can detect the duty cycle of the PWM dimming signal is applicable to the present invention, and the detection signal includes but is not limited to the count value. Any signal that can reflect the duty cycle of the PWM dimming signal is applicable, not limited to this embodiment. In this embodiment, the preset count value is the full-scale maximum count value (11...111) of the second counter, and the pre-designed value can be set as needed during use; at the same time, the initial value is used to determine the minimum value of the peak reference signal, which can be set as needed; it is not repeated here.

[0110] It should be noted that the frequency of the first clock signal Clock1 is recorded as f1=K*f PWM , K is a constant and needs to be set by the PWM dimming signal frequency detection unit 11. In this embodiment, the time T1 corresponding to the second counter being full is (2 n -initial value) / f1, then D1=T1*f PWM , substituting the expression of T1 into D1=f PWM *(2 n -initial value) / f1, since f1=K*f PWM , D1=(2 n -initial value) / K, then the value of K is designed to be K=(2 n -initial value) / D1 can satisfy the function of adjusting the peak reference signal frequency when the duty cycle of the PWM dimming signal is lower than the threshold D1. In actual use, 2 n It can also be replaced by a count value corresponding to a duty cycle threshold D1, which will not be described in detail here. The duty cycle threshold D1 can be set according to specific process parameters as long as it can solve the light source jitter problem.

[0111] like Figure 3 As shown, the reference generating unit 13 is connected to the output end of the PWM dimming signal duty cycle detecting unit 12, and is used to generate a peak reference signal Vref_peak of the inductor current. The value of the peak reference signal Vref_peakd increases with the increase of the detection signal (i.e., it is proportional to the duty cycle of the PWM dimming signal within the threshold range).

[0112] Specifically, Figure 6 As shown, in this embodiment, the reference generation unit 13 includes: a current source 131 and a resistor R1. One end of the current source 131 is connected to the power supply voltage VCC, and the other end is grounded via the resistor R1. The current source 131 is controlled by the detection signal. The larger the detection signal, the larger the current flowing through the current source 131.

[0113] More specifically, if Figure 6As shown, as an example, the current source 131 includes n parallel current branches, each current branch is connected in series with a selection switch (S0~Sn), and the control end of each selection switch is respectively connected to the corresponding bit signal of the duty cycle count value (as an example, S0 corresponds to D0, S1 corresponds to D1, ... Sn corresponds to Dn), and the current branch is turned on when the corresponding bit signal is at a high level; as the second counter counts up, the number of the selection switches turned on increases, and the current flowing through the current source 131 gradually increases. When the duty cycle count value reaches a pre-designed value (that is, the duty cycle D of the PWM dimming signal is greater than or equal to the threshold D1), the current value of the current source 131 reaches the maximum value Imax, and the magnitude of the current in each current branch can be set as needed, including but not limited to increasing by a factor of 2 in sequence. The number of current branches is not limited to n (corresponding to the number of bits of the second counter), and can be set as needed, not less than 2, and the control relationship is adjusted accordingly, which is not repeated here.

[0114] More specifically, if Figure 6 As shown, as another example, the reference generation unit 13 further includes a voltage follower 132; the input end of the voltage follower 132 is connected to the connection node of the current source 131 and the resistor R1, and outputs the peak reference signal Vref_peak. In this example, the voltage follower 132 is implemented by an amplifier, the non-phase input end of the amplifier serves as the input end of the voltage follower 132, and the inverting input end and the output end are connected together to serve as the output end of the voltage follower 132. In actual use, any structure that can achieve voltage following is applicable, not limited to this embodiment.

[0115] More specifically, if Figure 6As shown, in this embodiment, the value of the peak reference signal Vref_peak is proportional to the magnitude of the current flowing through the current source 131 and the resistor R1. When the duty cycle count value Dn...D3D2D1D0 is the initial value, the current flowing through the current source 131 is the minimum value I_min; when the duty cycle count value Dn...D3D2D1D0 is all 1, the current flowing through the current source 131 is the maximum value Imax. Accordingly, the minimum value of the voltage V1 across the resistor R1 is Vref_peak_min=I_min*R1, and the maximum value is Vref_peak_max=I_max*R1. It can be seen that, within the range (0-D1) where the duty cycle of the PWM dimming signal is less than the threshold value D1, the value of the peak reference signal Vref_peak increases linearly (starting from I_min*R1) as the duty cycle of the PWM dimming signal increases; when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value D1, the value of the peak reference signal Vref_peak remains at the maximum value I_max*R1.

[0116] It should be noted that any circuit structure that can generate the peak reference signal based on the duty cycle of the PWM dimming signal is applicable to the present invention, which will not be described in detail here.

[0117] In summary, the peak reference generating circuit 1a of the present invention can control the value of the peak reference signal Vref_peak according to the PWM dimming signal. When the duty cycle of the PWM dimming signal is greater than or equal to the threshold value D1, since the value of the peak reference signal Vref_peak is maintained at Vref_peak_max, the inductor current ripple maintains the maximum value; when the duty cycle of the PWM dimming signal is less than the threshold value D1, the peak reference signal Vref_peak decreases linearly to Vref_peak_min as the pulse width decreases, and the inductor current ripple is therefore linearly reduced, thereby improving the accuracy of PWM dimming at low brightness to avoid the defect of light source jitter.

[0118] like Figure 7 As shown, the present invention further provides an average current controller 1, which includes: a peak reference generating circuit 1a and a driving signal generating circuit 1b.

[0119] like Figure 7 As shown, the peak reference generating circuit 1a is used to generate a peak reference signal Vref_peak for controlling the peak value of the inductor current. The structure and working principle of the peak reference generating circuit 1a are as mentioned above and will not be described in detail here.

[0120] like Figure 7As shown, the drive signal generating circuit 1b is connected to the output end of the peak reference generating circuit 1a, and receives the inductor current detection signal Vcs, the PWM dimming signal PWM and the average reference signal Vref_AVG for controlling the average value of the inductor current. When the PWM dimming signal PWM is at a high level, the drive signal Drv is generated based on the comparison result of the inductor current detection signal Vcs with the peak reference signal Vref_peak and the average reference signal Vref_AVG to realize average current control; when the PWM dimming signal PWM is at a low level, the drive signal Drv remains at a low level.

[0121] Specifically, the driving signal generating circuit 1b is used to control the power switch tube in the LED switching power supply, thereby realizing average current control. Figure 7 As shown, as an example, the driving signal generating circuit 1 b includes an on-time control module 14 , an off-time control module 15 , a trigger 16 , an AND logic module 17 and a gate driving module 18 .

[0122] More specifically, the on-time control module 14 generates a first off-control signal P1 based on the difference between the inductor current detection signal Vcs and the average reference signal Vref_AVG; as an example, compensation is performed based on the difference between the inductor current detection signal Vcs and the average reference signal Vref_AVG to obtain a compensation signal, and the first off-control signal P1 is valid when the compensation signal is greater than a preset value. A second off-control signal P2 is generated based on the comparison result between the inductor current detection signal Vcs and the peak reference signal Vref_peak; as an example, when the inductor current detection signal Vcs is greater than the peak reference signal Vref_peak, the second off-control signal P2 is valid. And when the driving signal Drv is at a high level, a valid off-control signal off is output based on the valid first off-control signal P1 or the second off-control signal P2, that is, any one of the first off-control signal P1 and the second off-control signal P2 can trigger the off-control signal off to be valid.

[0123] More specifically, the off-time control module 15 receives the driving signal Drv, the first off-control signal P1 and the second off-control signal P2, and when the driving signal Drv is at a low level, the off-time is adaptively adjusted based on the first off-control signal P1 and the second off-control signal P2, and a corresponding on-control signal on is generated; when the driving signal Drv is at a high level, the off-time control module 15 does not work. As an example, when the first off-control signal P1 is valid, the set off-time is increased, and when the second off-control signal P2 is valid, the set off-time is reduced; the way to adjust the set off-time includes but is not limited to linear change, step-like change, a trend of first fast and then slow change, or a trend of first slow and then fast change, which will not be described one by one here.

[0124] More specifically, the trigger 16 is connected to the output terminals of the on-time control module 14 and the off-time control module 15, and generates a switch control signal based on the off-control signal off and the on-control signal on. In this example, the trigger 16 is implemented by an RS trigger, the off-control signal off is connected to the reset terminal R of the RS trigger, and the on-control signal on is connected to the set terminal S of the RC trigger.

[0125] More specifically, the AND logic module 17 is connected to the output end of the trigger 16, receives the PWM dimming signal PWM, and performs an AND operation on the output signal of the trigger 16 and the PWM dimming signal PWM. When the PWM dimming signal PWM is at a high level, the switch control signal is input into the gate driving module 18, and when the PWM dimming signal PWM is at a low level, the gate driving module 18 receives a low level signal.

[0126] More specifically, the gate drive module 18 is connected to the output end of the AND logic module 17, and generates the drive signal Drv based on the output signal of the AND logic module 17. When the PWM dimming signal is at a high level, the power switch tube in the switching power supply is periodically controlled to be turned on or off based on the switch control signal, so as to control the inductor current to be stable at the average reference current IL_AVG.

[0127] It should be noted that any circuit structure that can realize off-time adaptive average current control is applicable to the present invention, not limited to this embodiment. Since the value of the peak reference signal Vref_peak is reduced when the duty cycle is small (during the period of high level of the PWM dimming signal), the proportion of △D is reduced, and the inductor current ripple is reduced, thereby taking into account the high efficiency of the system at a large dimming duty cycle and the dimming accuracy at a low dimming duty cycle.

[0128] like Figure 8As shown, the present invention further provides an LED driving system, which includes: the average current controller 1, a switching power supply module 2, and an LED load and sampling module 3.

[0129] like Figure 8 As shown, as an example, the switching power supply module 2 adopts a BUCK topology structure, including an input capacitor Cin, a freewheeling diode D, an inductor L, an output capacitor Cout and a power switch tube M1, and the specific connection relationships are not described here one by one.

[0130] like Figure 8 As shown, the sampling module 3 detects the current of the inductor L to obtain an inductor current detection signal Vcs.

[0131] Specifically, in this embodiment, the sampling module 3 is implemented by a sampling resistor Rcs, and the sampling resistor Rcs is connected in series with the inductor L in the switching power supply module 2. Figure 8 As shown, as another example, the sampling resistor Rcs is connected in series between the inductor L and the anode of the freewheeling diode D; in actual use, the sampling module 3 can be set at any position that can directly or indirectly detect the current on the inductor L, and any method that can detect the current on the inductor L is applicable to the present invention, not limited to this embodiment.

[0132] like Figure 8 As shown, the LED load is connected to the switching power module 2 and operates based on the output current of the switching power module 2. Specifically, the positive electrode of the LED load is connected to the upper plate of the output capacitor Cout, and the negative electrode is connected to the lower plate of the output capacitor Cout.

[0133] like Figure 8 As shown, the output end of the average current controller 1 is connected to the gate of the power switch tube M2 in the switching power supply module 2 to provide a driving signal Drv. The specific structure and principle are as mentioned above and will not be described here one by one.

[0134] like Fig. 9 and Fig.10 As shown, the present invention further provides an average current control method. In this embodiment, the average current control method is implemented by using the average current controller 1 of the present invention. In actual use, any method that can implement the method is applicable. The average current control method includes:

[0135] When the PWM dimming signal PWM is at a high level, a peak reference signal Vref_peak is generated based on the PWM dimming signal PWM, and the on-time Ton is controlled and the off-time Toff is adaptively adjusted according to the comparison result between the inductor current detection signal Vcs and the peak reference signal Vref_peak and the average reference signal Vref_AVG, so as to realize average current control; wherein, when the duty cycle of the PWM dimming signal PWM is less than a threshold value, the frequency of the peak reference signal Vref_peak increases linearly with the increase of the duty cycle of the PWM dimming signal PWM, and when the duty cycle of the PWM dimming signal PWM is greater than or equal to the threshold value, the value of the peak reference signal Vref_peak remains unchanged;

[0136] When the PWM dimming signal PWM is at a low level, the power switch tube in the switching power supply is turned off.

[0137] The specific steps are as follows:

[0138] 11) When the rising edge of the PWM dimming signal PWM arrives, the frequency of the PWM dimming signal PWM is measured to generate a first clock signal Clock1 proportional to the frequency of the PWM dimming signal PWM. The first clock signal Clock1 is a high-frequency clock whose frequency is greater than the frequency of the PWM dimming signal.

[0139] 12) Then, based on the first clock signal Clock1, the duty cycle of the PWM dimming signal PWM is detected. When the duty cycle D of the PWM dimming signal is less than the threshold value D1, a detection signal proportional to the duty cycle D of the PWM dimming signal is obtained. When the duty cycle D of the PWM dimming signal is greater than or equal to the threshold value D1, a detection signal corresponding to the threshold value D1 is obtained. As an example, the detection signal is a duty cycle count value, and the duty cycle of the PWM dimming signal PWM is counted up from an initial value based on the first clock signal Clock1. In actual use, any signal method that can reflect the duty cycle of the PWM dimming signal PWM is applicable to the detection signal of the present invention, and will not be described in detail here.

[0140] 13) Generate the peak reference signal Vref_peak based on the detection signal, and the value of the peak reference signal Vref_peak increases as the detection signal increases.

[0141] 14) Determine whether the duty cycle count value reaches a pre-designed value (in this example, the corresponding counter is full), that is, whether the duty cycle D of the PWM dimming signal is greater than or equal to the threshold D1; if not, continue to execute steps 12) and 13), linearly increase the value of the peak reference signal Vref_peak; if yes, maintain the value of the peak reference signal Vref_peak at the maximum value.

[0142] 15) At the same time, during the process in which the PWM dimming signal PWM is at a high level, the switching power supply module implements average current control based on the adjusted peak reference signal Vref_peak.

[0143] 16) When the falling edge of the PWM dimming signal PWM arrives, the duty cycle count value is reset to the initial value, the switching power supply module turns off the output current, and the dimming ends.

[0144] Specifically, the method for implementing average current control includes:

[0145] When the PWM dimming signal PWM is at a high level, the power switch tube in the switching power supply module is controlled to be turned on or off based on the off control signal off and the on control signal on.

[0146] Among them, when the driving signal Drv is at a high level, compensation is performed according to the difference between the inductor current detection signal Vcs and the average reference signal Vref_AVG to obtain a compensation signal, and when the compensation signal is greater than a preset value, an effective first shutdown control signal P1 is generated. At the same time, the inductor current detection signal Vcs is compared with the peak reference signal Vref_peak, and when the inductor current detection signal Vcs is greater than the peak reference signal Vref_peak, an effective second shutdown control signal P2 is generated. The first shutdown control signal P1 and the second shutdown control signal P2 are subjected to an OR logic to output a shutdown control signal off. The shutdown control signal off controls the reset of the trigger and pulls down the driving signal Drv.

[0147] When the driving signal Drv is at a low level, the off time is counted; if the off time reaches the set off time, a valid on control signal on is generated; wherein, when the first off control signal P1 is valid, the set off time is increased, and when the second off control signal P2 is valid, the set off time is decreased, which will not be described in detail here. The on control signal on controls the trigger to be set and pulls up the driving signal Drv.

[0148] When the PWM dimming signal PWM is at a low level, the power switch tube is turned off based on the driving signal Drv.

[0149] It should be noted that, during the entire driving process, the average reference signal Vref_AVG maintains a constant value. Any method that can adjust the peak reference signal based on the duty cycle of the PWM dimming signal, so that the peak reference signal increases linearly with the increase of the duty cycle within the range where the duty cycle of the PWM dimming signal is less than the threshold D1, and the frequency is maintained at the maximum value when the duty cycle of the PWM dimming signal is greater than or equal to the threshold D1; and the method of realizing off-time adaptive average current control based on the peak reference signal is applicable to the present method, and is not limited to the present embodiment.

[0150] In summary, the present invention provides a peak reference generation circuit, an average current controller, a method and an LED driving system, comprising: a PWM dimming signal frequency detection unit, a PWM dimming signal duty cycle detection unit and a reference generation unit; the PWM dimming signal frequency detection unit receives a PWM dimming signal and is used to generate a first clock signal, the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal; the PWM dimming signal duty cycle detection unit is connected to the output end of the PWM dimming signal frequency detection unit, and detects the duty cycle of the PWM dimming signal; when the duty cycle of the PWM dimming signal is less than a threshold, a detection signal proportional to the duty cycle of the PWM dimming signal is output, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold, a detection signal corresponding to the threshold is output; the reference generation unit is connected to the output end of the PWM dimming signal duty cycle detection unit, and is used to generate a peak reference signal of the inductor current, and the value of the peak reference signal increases with the increase of the detection signal. The peak reference generation circuit, average current controller, method and LED drive system of the present invention can obtain higher system efficiency when the PWM dimming depth of the off-time adaptive average current control scheme is shallow, and obtain linear and stable dimming effect when the PWM dimming depth is deep, eliminating the defect of light source jitter during high-depth PWM dimming, and improving customer experience. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0151] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A peak reference generating circuit for controlling the peak value of an inductor current, characterized in that: The peak reference generation circuit at least includes: a PWM dimming signal frequency detection unit, a PWM dimming signal duty cycle detection unit and a reference generation unit; The PWM dimming signal frequency detection unit receives the PWM dimming signal and is used to generate a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal; The PWM dimming signal duty cycle detection unit is connected to the output end of the PWM dimming signal frequency detection unit, and detects the duty cycle of the PWM dimming signal; when the duty cycle of the PWM dimming signal is less than a threshold, a detection signal proportional to the duty cycle of the PWM dimming signal is output; when the duty cycle of the PWM dimming signal is greater than or equal to the threshold, a detection signal corresponding to the threshold is output; The reference generating unit is connected to the output end of the PWM dimming signal duty cycle detecting unit, and is used to generate a peak reference signal of the inductor current, wherein the value of the peak reference signal increases as the detection signal increases.

2. The peak reference generating circuit according to claim 1, characterized in that: The PWM dimming signal frequency detection unit includes: a PWM dimming signal frequency measurement module and a clock signal generation module; The PWM dimming signal frequency measurement module counts the time when the PWM dimming signal is at a high level based on the second clock signal, and outputs a frequency count value after completing the counting, wherein the frequency count value is proportional to the frequency of the PWM dimming signal; The clock signal generating module is connected to the output end of the PWM dimming signal frequency measuring module, and generates the first clock signal based on the frequency count value.

3. The peak reference generating circuit according to claim 2, characterized in that: The PWM dimming signal frequency measurement module includes: a first delay unit, a first counter, a first register and a first subtractor; The first delay unit receives the PWM dimming signal to obtain a first delayed signal of the PWM dimming signal, wherein the delay time is no more than two cycles of the second clock signal; The first counter is connected to the output end of the first delay unit and receives the second clock signal, and is reset and starts counting up at the rising edge of the first delay signal; The first register is connected to the output end of the first counter, stores the value output by the first counter, and reads out the latched value at the rising edge of the PWM dimming signal; The first subtractor is connected to the output end of the first register, and subtracts the value output by the first register from the preset value to obtain the frequency count value.

4. The peak reference generating circuit according to claim 2 or 3, characterized in that: The clock signal generating module comprises: a digital-to-analog converter and an oscillator; The digital-to-analog converter is connected to the output end of the PWM dimming signal frequency measurement module to convert the frequency count value into an analog signal; The oscillator is connected to the output terminal of the digital-to-analog converter, and generates the first clock signal based on the output signal of the digital-to-analog converter.

5. The peak reference generating circuit according to claim 1, characterized in that: The PWM dimming signal duty cycle detection unit includes: a second delay unit, a second counter and a second register; The second delay unit receives the PWM dimming signal to obtain a second delayed signal of the PWM dimming signal, wherein the delay time is no more than two cycles of the first clock signal; The second counter is connected to the output end of the second delay unit and receives the first clock signal, resets to an initial value at a falling edge of the second delay signal, counts up at a rising edge of the second delay signal, and latches a counting result when counting to a pre-designed value; The second register is connected to the output end of the second counter, registers the value output by the second counter, and latches the output signal of the second counter at the falling edge of the PWM dimming signal.

6. The peak reference generating circuit according to claim 1, characterized in that: The reference generation unit includes: a current source and a resistor; One end of the current source is connected to the power supply voltage, and the other end is grounded via the resistor; The current source is controlled by the detection signal. The larger the detection signal is, the larger the current flowing through the current source is.

7. The peak reference generating circuit according to claim 6, characterized in that: The reference generation unit further includes a voltage follower; an input end of the voltage follower is connected to a connection node between the current source and the resistor, and outputs the peak reference signal.

8. An average current controller, characterized in that: The average current controller at least comprises: A driving signal generating circuit and a peak reference generating circuit as claimed in any one of claims 1 to 7; The peak reference generation circuit generates a peak reference signal for controlling the peak value of the inductor current; The drive signal generating circuit is connected to the output end of the peak reference generating circuit, and receives the inductor current detection signal, the PWM dimming signal and the average reference signal for controlling the average value of the inductor current; when the PWM dimming signal is at a high level, based on the comparison result of the inductor current detection signal with the peak reference signal and the average reference signal, a drive signal for realizing average current control is generated; when the PWM dimming signal is at a low level, the drive signal remains at a low level.

9. The average current controller according to claim 8, characterized in that: The average current controller includes: an on-time control module, an off-time control module, a trigger, an AND logic module and a gate drive module; The on-time control module generates a first off-control signal based on the difference between the inductor current detection signal and the average reference signal, and generates a second off-control signal based on the comparison result between the inductor current detection signal and the peak reference signal; and outputs a valid off-control signal based on the valid first off-control signal or the second off-control signal when the driving signal is at a high level; The off-time control module receives the driving signal, the first off-control signal and the second off-control signal, and when the driving signal is at a low level, adaptively adjusts the off-time based on the first off-control signal and the second off-control signal, and generates a corresponding on-control signal; The trigger is connected to the output ends of the on-time control module and the off-time control module, and generates a switch control signal based on the off-control signal and the on-control signal; The AND logic module is connected to the output end of the trigger, receives the PWM dimming signal, and performs an AND operation on the output signal of the trigger and the PWM dimming signal; The gate driving module is connected to the output end of the AND logic module, and generates the driving signal based on the output signal of the AND logic module.

10. An LED driving system, characterized in that: The LED driving system at least comprises: A switching power supply module, an LED load, a sampling module and an average current controller as described in any one of claims 8 to 9; The sampling module detects the current of the inductor; The LED load is connected to the switching power module and operates based on the output current of the switching power module; The output end of the average current controller is connected to the gate of the power switch tube in the switching power supply module to provide a driving signal.

11. The LED driving system according to claim 10, characterized in that: The switching power supply module has a BUCK topology.

12. An average current control method, characterized in that: The average current control method at least comprises: When the PWM dimming signal is at a high level, a peak reference signal is generated based on the PWM dimming signal, and the on-time is controlled and the off-time is adaptively adjusted according to the comparison result of the inductor current detection signal with the peak reference signal and the average reference signal, so as to realize average current control; wherein, when the duty cycle of the PWM dimming signal is less than a threshold value, the peak reference signal increases linearly with the increase of the duty cycle of the PWM dimming signal, and when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value, the peak reference signal remains unchanged; When the PWM dimming signal is at a low level, the power switch tube in the switching power supply module is turned off.

13. The average current control method according to claim 12, characterized in that: The method for generating the peak reference signal comprises: Measuring the frequency of the PWM dimming signal and generating a first clock signal, wherein the frequency of the first clock signal is proportional to the frequency of the PWM dimming signal; The duty cycle of the PWM dimming signal is detected based on the first clock signal, and a detection signal proportional to the duty cycle of the PWM dimming signal is obtained when the duty cycle of the PWM dimming signal is less than a threshold value, and a detection signal corresponding to the threshold value is obtained when the duty cycle of the PWM dimming signal is greater than or equal to the threshold value; The peak reference signal is generated based on the detection signal, and the peak reference signal increases as the detection signal increases.

14. The average current control method according to claim 12 or 13, characterized in that: Methods to achieve average current control include: When the PWM dimming signal is at a high level, the power switch tube in the switching power supply module is controlled to be turned on or off based on the shutdown control signal and the conduction control signal; Wherein, when the driving signal is at a high level, compensation is performed according to the difference between the inductor current detection signal and the average reference signal to obtain a compensation signal, and when the compensation signal is greater than a preset value, a valid first shutdown control signal is generated; at the same time, the inductor current detection signal is compared with the peak reference signal, and when the inductor current detection signal is greater than the peak reference signal, a valid second shutdown control signal is generated; the first shutdown control signal and the second shutdown control signal are subjected to an OR logic to output a shutdown control signal; when the driving signal is at a low level, the shutdown time is timed, and if the shutdown time reaches the set shutdown time, a valid conduction control signal is generated; wherein, when the first shutdown control signal is valid, the set shutdown time is increased, and when the second shutdown control signal is valid, the set shutdown time is reduced; When the PWM dimming signal is at a low level, the power switch tube is turned off based on the driving signal.

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