Single-chip rotary transformer / LVDT (Linear Variable Differential Transformer) signal-digital conversion method and circuit

Abstract

The invention discloses a single-chip resolver / LVDT (Linear Variable Differential Transformer) signal-digital conversion method and circuit. The method comprises the following steps: generating an excitation signal; the excitation signal is input to a primary side coil of the rotary transformer / LVDT sensor; two pairs of differential signals output by the secondary side of the resolver / LVDT sensor are converted into single-end analog signals respectively, the difference is made, and first error signals are obtained; detecting the phase difference of two pairs of differential signals and excitation signals output by the secondary side of the resolver / LVDT sensor; converting the first error signal into a digital error signal; removing an excitation signal in the digital error signal to obtain a second error signal epsilon; judging whether the second error signal epsilon is approximately equal to 0 or not, if yes, completing conversion, and ending the process; otherwise, executing the next step; obtaining a digital displacement signal psi according to the second error signal epsilon; and feeding back the digital displacement signal psi to the digital-to-analog conversion module through sine and cosine transformation or linear transformation, and returning to execute the fifth step. The whole circuit is integrated on a single chip, the circuit structure is simple, implementation is easy, and the anti-interference capability is high.

Description

Technical Field

[0001] The invention belongs to the field of signal conversion, in particular to a single-chip resolver / LVDT signal-to-digital conversion method and circuit. Background Art

[0002] The signal conditioning circuit of the conventional linear differential displacement sensor (09) adopts an open-loop circuit structure, such as Figure 1 As shown, the signal conditioner (00) generates an excitation signal through a voltage reference (01), an oscillator (02) and an operational amplifier (03), and is connected to the primary side of the resolver / LVDT sensor. The regulating circuit detects the resolver / LVDT sensor signal A+B and the value signal and the AB signal respectively, and outputs the peak voltage of A+B and AB. After the division operation (06) and low-pass filtering (07) and operational amplifier (08) in sequence, the output is a DC voltage. This DC voltage changes with the change of the LVDT sensor position, realizing the conversion of the LVDT sensor position to a DC signal. This implementation method adopts an open-loop circuit structure, and its disadvantages are as follows: 1) Its conversion accuracy and linearity parameters are easily affected by the manufacturing process parameters and temperature drift characteristics, and the conversion performance is poor. 2) This implementation method converts the LVDT sensor position into a DC voltage, and the subsequent stage also needs to perform analog signal to digital conversion for digital signal processing. Summary of the invention

[0003] The object of the present invention is to provide a single-chip resolver / LVDT signal-to-digital conversion circuit and method in view of the problems existing in the above-mentioned prior art.

[0004] The technical solution to achieve the purpose of the present invention is as follows: On the one hand, a single-chip resolver / LVDT signal-to-digital conversion method is provided, wherein the method realizes the conversion of the resolver / LVDT signal-to-digital signal by a closed-loop tracking method, and specifically comprises:

[0005] generating an excitation signal;

[0006] Inputting the excitation signal to the primary coil of the resolver / LVDT sensor;

[0007] Convert two pairs of differential signals outputted from the secondary side of the resolver / LVDT sensor into single-ended analog signals respectively and perform difference calculation to obtain a first error signal;

[0008] Detecting the phase difference between two pairs of differential signals outputted by the secondary side of the resolver / LVDT sensor and the excitation signal;

[0009] Converting the first error signal into a digital error signal by a digital-to-analog conversion module;

[0010] Based on the phase difference, removing the excitation signal from the digital error signal to obtain a second error signal ε;

[0011] Determine whether the second error signal ε≈0 is true, if so, complete the conversion and end the process; otherwise, execute the next step;

[0012] Obtain a digital displacement signal ψ according to the second error signal ε;

[0013] The digital displacement signal ψ is fed back to the digital-to-analog conversion module through sine-cosine transformation or linear transformation, and the process returns to execute the fifth step.

[0014] In another aspect, a single-chip resolver / LVDT signal-to-digital conversion circuit is provided, the circuit comprising a closed-loop tracking loop that forces a second error signal ε≈0.

[0015] Further, the circuit is integrated on a single chip, including a first D / A converter, a second D / A converter, a phase detection module, a comparator, a synchronization correction module, a compensation filter, a counter, an excitation generation circuit, a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a cosine transform / linear transform module, and a sine transform / linear transform module;

[0016] The excitation generation circuit outputs an excitation signal RSO through the first operational amplifier 009, which is connected to RH and RL to drive the primary side of the resolver / LVDT sensor after external power amplification;

[0017] The second operational amplifier is used to convert the differential signals A+ and A- outputted by the secondary side of the resolver / LVDT sensor into a single-ended signal A;

[0018] The third operational amplifier is used to convert the differential signals B+ and B- outputted by the secondary side of the resolver / LVDT sensor into a single-ended signal B;

[0019] The fourth operational amplifier is used to convert the excitation signal into a square wave signal and use it as a reference signal;

[0020] The phase detection module is used to detect the phase difference between the single-ended signal A, the single-ended signal B and the reference signal;

[0021] The first D / A converter and the second D / A converter convert the single-ended signal A and the single-ended signal B into analog signals respectively, and then subtract them to form a first error signal;

[0022] The comparator is used to convert the first error signal into a digital error signal;

[0023] The synchronous correction module is used to remove the excitation signal in the digital error signal to form a second error signal ε;

[0024] The second error signal ε is sequentially passed through the compensation filter and the counter to output a digital displacement signal ψ, representing the current digital position of the resolver / LVDT sensor;

[0025] The cosine transform / linear transform module and the sine transform / linear transform module respectively perform sine-cosine transform / linear transform on the digital displacement signal, and then feed the results back to the first D / A converter and the second D / A converter to form a closed-loop tracking loop.

[0026] Furthermore, the cosine transform / linear transform module and the sine transform / linear transform module are switched according to the sensor type. When a rotary transformer is used, the cosine transform / linear transform module and the sine transform / linear transform module are switched to cosine transform and sine transform respectively; when an LVDT sensor is used, the cosine transform / linear transform module and the sine transform / linear transform module are both switched to linear transform.

[0027] Further, the single-ended signal A is connected to the reference end of the first D / A converter, and the feedback signal output by the cosine transform / linear transform module is connected to the digital input end of the first D / A converter; the single-ended signal B is connected to the reference end of the second D / A converter, and the feedback signal output by the sine transform / linear transform module is connected to the digital input end of the second D / A converter.

[0028] Furthermore, the synchronization correction module removes the excitation signal in the digital error signal by performing an XOR operation on the digital error signal and a reference signal.

[0029] Further, the compensation filter includes a first-order lag filter and a PI controller, whereby the compensation filter is expressed as:

[0030]

[0031] Where K(s) represents the output of the compensation filter, s represents the Laplace transform, and K P Represents the proportionality coefficient, K i Indicates the integral coefficient, T f represents the clock cycle, s represents the Laplace transform, Represents a first-order lag filter.

[0032] Furthermore, the counter integrates the output speed value of the compensation filter to form a digital displacement signal ψ.

[0033] Further, the counter counts up or counts down according to the sign of the second error signal ε, and when the second error signal ε≈0 holds, the counter stops counting.

[0034] Furthermore, the counter is a 12-bit counter, the first D / A converter and the second D / A converter are 10-bit multiplication D / A converters, the upper 2 bits of the counter represent the four quadrants of the input signal, where "00" represents the first quadrant, "01" represents the second quadrant, "10" represents the third quadrant, and "11" represents the fourth quadrant, and the lower 10 bits of the counter correspond to the resolution of the 10-bit multiplication D / A converter.

[0035] Compared with the prior art, the present invention has the following significant advantages:

[0036] (1) It can effectively realize the conversion of resolver / LVDT sensor signals directly into digital signals.

[0037] (2) It adopts a tracking closed-loop structure with high conversion accuracy and good linearity.

[0038] (3) The entire component of the traditional implementation method is implemented by a complex analog circuit, and it also needs to be matched with external discrete resistors and capacitors, which makes it difficult to integrate the entire circuit into a single chip and the method of use is complicated. The present invention integrates the entire circuit component into a single chip, with a simple circuit structure, easy implementation, convenient use, and strong anti-interference ability.

[0039] (4) The technical solution of the present invention has a wide range of applications, and can be applied to aerospace linear displacement measurement fields such as electric drive systems, throttle lever positions, and nozzle positions.

[0040] The present invention is further described in detail below in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 This is a schematic diagram of the traditional linear differential displacement sensor (LVDT) adjustment circuit structure.

[0042] Figure 2 FIG. 1 is a schematic diagram of a single-chip resolver / LVDT signal to digital conversion circuit according to an embodiment of the present invention.

[0043] Figure 3 FIG. 1 is a schematic diagram of a rotary transformer and a linear differential displacement sensor in one embodiment, wherein Figure 3 (a) and (b) are linear differential displacement sensor and rotary transformer respectively.

[0044] Figure 4 4 is a schematic diagram of the four-quadrant segmentation principle in one embodiment.

[0045] Figure 5 FIG. 1 is a simplified diagram of the compensation filter and counter controlling the error signal in one embodiment.

[0046] Figure 6 FIG. 4 is a timing diagram of a synchronous correction circuit in one embodiment.

[0047] Figure 7 A schematic diagram of modeling a compensation filter in one embodiment.

[0048] Figure 8 A diagram showing a counter model in one embodiment.

[0049] Fig. 9 Schematic diagram of a sine-cosine / linear conversion circuit implementation in one embodiment. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0051] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0052] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or suggesting their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0053] In one embodiment, a single-chip resolver / LVDT signal-to-digital conversion method is proposed. The method realizes the conversion of resolver / LVDT signal-to-digital signal by closed-loop tracking, and specifically includes:

[0054] generating an excitation signal;

[0055] Inputting the excitation signal to the primary coil of the resolver / LVDT sensor;

[0056] Convert two pairs of differential signals outputted from the secondary side of the resolver / LVDT sensor into single-ended analog signals respectively and perform a difference operation to obtain a first error signal;

[0057] Detecting the phase difference between two pairs of differential signals outputted by the secondary side of the resolver / LVDT sensor and the excitation signal;

[0058] Converting the first error signal into a digital error signal by a digital-to-analog conversion module;

[0059] Based on the phase difference, removing the excitation signal from the digital error signal to obtain a second error signal ε;

[0060] Determine whether the second error signal ε≈0 is true, if so, complete the conversion and end the process; otherwise, execute the next step;

[0061] Obtain a digital displacement signal ψ according to the second error signal ε;

[0062] The digital displacement signal ψ is fed back to the digital-to-analog conversion module through sine-cosine transformation or linear transformation, and the process returns to execute the fifth step.

[0063] In one embodiment, a single-chip resolver / LVDT signal-to-digital conversion circuit is proposed based on the method, wherein the circuit includes a closed-loop tracking loop that causes the second error signal ε≈0.

[0064] In some embodiments, in combination Figure 2 and Figure 3 , the circuit is integrated on a single chip, including a first D / A converter 001, a second D / A converter 002, a phase detection module 003, a comparator 004, a synchronization correction module 005, a compensation filter 006, a counter 007, an excitation generation circuit 008, a first operational amplifier 009, a second operational amplifier 010, a third operational amplifier 013, a fourth operational amplifier 014, a cosine transform / linear transform module 011 and a sine transform / linear transform module 012;

[0065] The excitation generation circuit 008 outputs an excitation signal RSO through the first operational amplifier 009, which is connected to RH and RL to drive the primary side of the resolver / LVDT sensor after external power amplification;

[0066] The second operational amplifier 010 is used to convert the differential signals A+ and A- outputted by the secondary side of the resolver / LVDT sensor into a single-ended signal A;

[0067] The third operational amplifier 013 is used to convert the differential signals B+ and B- outputted by the secondary side of the resolver / LVDT sensor into a single-ended signal B;

[0068] The fourth operational amplifier 014 is used to convert the excitation signal into a square wave signal and use it as a reference signal;

[0069] The phase detection module 003 is used to detect the phase difference between the single-ended signal A, the single-ended signal B and the reference signal;

[0070] The first D / A converter 001 and the second D / A converter 002 convert the single-ended signal A and the single-ended signal B into analog signals respectively, and then subtract them to form a first error signal;

[0071] The comparator 004 is used to convert the first error signal into a digital error signal;

[0072] The synchronization correction module 005 is used to demodulate the digital error signal and remove the excitation signal in the digital error signal to form a second error signal ε;

[0073] The second error signal ε is sequentially output through the compensation filter 006 and the counter 007 to output a digital displacement signal ψ, which represents the current digital position of the resolver / LVDT sensor;

[0074] The cosine transform / linear transform module 011 and the sine transform / linear transform module 012 perform sine and cosine transform / linear transform on the digital displacement signal respectively, and then feed the results back to the first D / A converter 001 and the second D / A converter 002 respectively to form a closed-loop tracking loop.

[0075] Here, the excitation generation circuit 008 and the first operational amplifier 009 generate an excitation signal sinwt, which is connected to the primary coil of the resolver / LVDT sensor. The secondary output signal of the resolver / LVDT sensor is multiplied by the digital signal fed back by the counter, and the error signal ε=Esinwt·f(t)-f′(t) is obtained by subtracting the two. When the error signal ε≈0, f(t)=f′(t), that is, the conversion is completed, f(t) represents the current electrical position of the resolver / LVDT sensor, and f′(t) represents the digital position value obtained after the conversion.

[0076] The error signal ε=Esinwt·f(t)-f′(t) is converted into a digital error signal by the comparator 004, and the digital error signal is demodulated by the synchronous correction circuit 005 to remove the excitation signal sinwt. The signal after the synchronous correction module 005 is ε=E·(f(t)-f′(t)) and some discrete noise signals. After the noise signal is filtered out by the compensation filter 006, it is counted by the counter 007. The counter 007 counts up or down according to the sign of the digital error signal. The counter output is the digital displacement of the resolver / LVDT. When the second error signal ε≈0 is established, the counter 007 stops counting. Here, the displacement represented by the output of the counter 007 is a linear digital signal signal ψ, which is represented by a natural binary code. ψ is fed back to the first D / A converter and the second D / A converter through the cosine transform / linear transform 011 and the sine transform / linear transform 012 respectively to realize the resolver signal-digital signal conversion.

[0077] Furthermore, in some embodiments, the cosine transform / linear transform module 011 and the sine transform / linear transform module 012 are switched according to the sensor type. When a rotary transformer is used, the cosine transform / linear transform module 011 and the sine transform / linear transform module 012 are switched to cosine transform and sine transform respectively; when an LVDT sensor is used, the cosine transform / linear transform module 011 and the sine transform / linear transform module 012 are both switched to linear transform.

[0078] Here preferably, in some embodiments, combined Fig. 9 The switching is realized by switches, including switch S1 and switch S2, wherein switch S1 controls cosine transformation and sine transformation, and switch S2 controls linear transformation. When using a rotary transformer, S1 is closed and S2 is disconnected, switching to cosine transformation and sine transformation. When using an LVDT sensor, S2 is closed and S1 is disconnected to switch to linear transformation.

[0079] Further, in some embodiments, the single-ended signal A (A=Esinwt·sinθ, not limited to sinθ) is connected to the reference end of the first D / A converter 001, and the feedback signal (cosψ) output by the cosine transform / linear transform module 011 is connected to the digital input end of the first D / A converter 001; the single-ended signal B (B=Esinwt·cosθ) is connected to the reference end of the second D / A converter 002, and the feedback signal (sinψ) output by the sine transform / linear transform module 012 is connected to the digital input end of the second D / A converter 002.

[0080] Preferably, in some embodiments, the counter 007 is a 12-bit counter, the first D / A converter 001 and the second D / A converter 002 are 10-bit multiplication D / A converters, and the upper 2 bits of the counter 007 represent the four quadrants of the input signal, where "00" represents the first quadrant, "01" represents the second quadrant, "10" represents the third quadrant, and "11" represents the fourth quadrant, and the lower 10 bits of the counter 007 correspond to the resolution of the 10-bit multiplication D / A converter.

[0081] Exemplarily, in some embodiments, if a rotary transformer is used, the feedback signal output by the cosine transform / linear transform module 011 is cosψ, and the feedback signal output by the sine transform / linear transform module 012 is sinψ, then the outputs of the first D / A converter 001 and the second D / A converter 002 are Esinwt·sinθ·cosψ and Esinwt·cosθ·sinψ, respectively, and the two are subtracted to form a first error signal Esinwt·sinθ·cosψ-Esinwt·cosθ·sinψ=Esinwt·sin(θ-ψ). The first error signal is converted into a digital error signal by a comparator 004, and the digital error signal is formed into a second error signal Esin(θ-ψ) after the excitation signal is removed by a synchronous correction 005. The second error signal Esin(θ-ψ) is counted by a compensation filter 006 and a 12-bit counter 007, and the counter counts up or down according to the sign of the second error signal. When the error signal Esin(θ-ψ)≈0, the counter stops counting. The current output value of the counter is ψ, which represents the current position of the resolver.

[0082] Here, compensation filters and counters are used to process and control the digital error signal, such as Figure 5 As shown, the error signal Esin(θ-ψ) represents the error between the current position θ and the digital position ψ. The entire circuit constitutes a tracking loop to drive the error signal Esin(θ-ψ)=0. When the error signal ε=0, θ=ψ, which means that the resolver position to digital conversion is completed.

[0083] The four-quadrant segmentation method is Figure 4 As shown, the error signal is:

[0084] 0-90°ε=Esinwt·sinθ·cosψ-Esinwt·cosθ·sinψ

[0085] 90°-180°ε=-(Esinwt·sinθ·cosψ+Esinwt·cosθ·sinψ)

[0086] 180°-270°ε=-(Esinwt·sinθ·cosψ-Esinwt·cosθ·sinψ)

[0087] 270°-360°ε=Esinwt·sinθ·cosψ+Esinwt·cosθ·sinψ

[0088] Further, in some embodiments, the synchronization correction module 005 removes the excitation signal in the digital error signal by performing an XOR operation on the digital error signal and the reference signal. The corrected error signal removes the excitation sinwt signal and retains the Esin (θ-ψ) signal. The timing sequence of the synchronization correction of the single-chip resolver signal-digital conversion circuit is as follows: Figure 6 shown.

[0089] Further, in one embodiment, the equivalent circuit of the compensation filter 006 is as follows: Figure 7 In order to achieve high-speed, high-precision and stable control tracking loop, the compensation filter 006 includes a first-order lag filter 101 and a PI controller 102 (proportional part and integral part), so the compensation filter 006 is expressed as:

[0090]

[0091] Where K(s) represents the output of the compensation filter, s represents the Laplace transform, and K P Represents the proportionality coefficient, K i Indicates the integral coefficient, T f represents the clock cycle, s represents the Laplace transform, represents a first-order lag filter, ΔT is the clock period, Z -1 Delay one clock cycle.

[0092] The counter 007 is equivalent to a digital integrator. Figure 8 The output velocity value of the compensation filter 006 is integrated to form a digital displacement signal ψ.

[0093] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A single-chip resolver / LVDT signal-to-digital conversion method, characterized in that: The method realizes the conversion of resolver / LVDT signal to digital signal through closed-loop tracking, and specifically includes: generating an excitation signal; Inputting the excitation signal to the primary coil of the resolver / LVDT sensor; Convert two pairs of differential signals outputted from the secondary side of the resolver / LVDT sensor into single-ended analog signals respectively and perform difference calculation to obtain a first error signal; Detecting the phase difference between two pairs of differential signals outputted by the secondary side of the resolver / LVDT sensor and the excitation signal; Converting the first error signal into a digital error signal by a digital-to-analog conversion module; Based on the phase difference, removing the excitation signal from the digital error signal to obtain a second error signal ε; Determine whether the second error signal ε≈0 is true, if so, complete the conversion and end the process; otherwise, execute the next step; Obtain a digital displacement signal ψ according to the second error signal ε; The digital displacement signal ψ is fed back to the digital-to-analog conversion module through sine-cosine transformation or linear transformation, and the process returns to execute the fifth step.

2. A single-chip resolver / LVDT signal-to-digital conversion circuit based on the method of claim 1, characterized in that: The circuit comprises a closed tracking loop which causes the second error signal ε≈0.

3. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 2, characterized in that: The circuit is integrated on a single chip, and includes a first D / A converter, a second D / A converter, a phase detection module, a comparator, a synchronization correction module, a compensation filter, a counter, an excitation generation circuit, a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a cosine transform / linear transform module, and a sine transform / linear transform module; The excitation generation circuit outputs an excitation signal RSO through the first operational amplifier 009, which is connected to RH and RL to drive the primary side of the resolver / LVDT sensor after external power amplification; The second operational amplifier is used to convert the differential signals A+ and A- outputted by the secondary side of the resolver / LVDT sensor into a single-ended signal A; The third operational amplifier is used to convert the differential signals B+ and B- outputted by the secondary side of the resolver / LVDT sensor into a single-ended signal B; The fourth operational amplifier is used to convert the excitation signal into a square wave signal and use it as a reference signal; The phase detection module is used to detect the phase difference between the single-ended signal A, the single-ended signal B and the reference signal; The first D / A converter and the second D / A converter convert the single-ended signal A and the single-ended signal B into analog signals respectively, and then subtract them to form a first error signal; The comparator is used to convert the first error signal into a digital error signal; The synchronous correction module is used to remove the excitation signal in the digital error signal to form a second error signal ε; The second error signal ε is sequentially passed through the compensation filter and the counter to output a digital displacement signal ψ, representing the current digital position of the resolver / LVDT sensor; The cosine transform / linear transform module and the sine transform / linear transform module respectively perform sine-cosine transform / linear transform on the digital displacement signal, and then feed the results back to the first D / A converter and the second D / A converter to form a closed-loop tracking loop.

4. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 3, characterized in that: The cosine transform / linear transform module and the sine transform / linear transform module are switched according to the sensor type. When a rotary transformer is used, the cosine transform / linear transform module and the sine transform / linear transform module are switched to cosine transform and sine transform respectively; when an LVDT sensor is used, the cosine transform / linear transform module and the sine transform / linear transform module are both switched to linear transform.

5. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 3, characterized in that: The single-ended signal A is connected to the reference terminal of the first D / A converter, and the feedback signal output by the cosine transform / linear transform module is connected to the digital input terminal of the first D / A converter; the single-ended signal B is connected to the reference terminal of the second D / A converter, and the feedback signal output by the sine transform / linear transform module is connected to the digital input terminal of the second D / A converter.

6. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 3, characterized in that: The synchronization correction module removes the excitation signal in the digital error signal by performing an XOR operation on the digital error signal and a reference signal.

7. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 3, characterized in that: The compensation filter includes a first-order lag filter and a PI controller, whereby the compensation filter is expressed as: Where K(s) represents the output of the compensation filter, s represents the Laplace transform, and K P Represents the proportionality coefficient, K i Indicates the integral coefficient, T f represents the clock cycle, s represents the Laplace transform, Represents a first-order lag filter.

8. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 7, characterized in that: The counter integrates the output velocity value of the compensation filter to form a digital displacement signal ψ.

9. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 8, characterized in that: The counter counts up or down according to the sign of the second error signal ε, and when the second error signal ε≈0 holds, the counter stops counting.

10. The single-chip resolver / LVDT signal-to-digital conversion circuit according to claim 9, characterized in that: The counter is a 12-bit counter, the first D / A converter and the second D / A converter are 10-bit multiplication D / A converters, the upper 2 bits of the counter represent the four quadrants of the input signal, where "00" represents the first quadrant, "01" represents the second quadrant, "10" represents the third quadrant, and "11" represents the fourth quadrant, and the lower 10 bits of the counter correspond to the resolution of the 10-bit multiplication D / A converter.

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