A bandgap reference circuit and compensation circuit

Abstract

The present application provides a bandgap reference circuit and a compensation circuit, which are applied to the technical field of bandgap reference circuits, wherein a high-order curvature compensation branch and / or a current compensation branch are used to compensate the bandgap reference circuit, the high-order curvature compensation branch is used to generate a corresponding first compensation amount, the current compensation branch is used to generate a corresponding second compensation amount, the first compensation amount is superimposed on the base-emitter voltage of a bipolar junction transistor in the bandgap reference circuit at a preset first ratio, and the second compensation amount is superimposed on the base-emitter voltage of a bipolar junction transistor in the bandgap reference circuit at a preset second ratio, so as to use the first compensation amount to eliminate the high-order term component of the bandgap reference voltage temperature coefficient, and use the second compensation amount to eliminate the base-emitter voltage change of the bipolar junction transistor in the bandgap reference circuit caused by stress. After compensation, the stability and accuracy of the reference can be maintained to meet the high-precision requirements.

Description

Technical Field

[0001] The present application relates to the technical field of bandgap reference circuits, and in particular to a bandgap reference circuit and a compensation circuit. Background Art

[0002] The bandgap reference circuit is a basic circuit module widely used in various analog circuit systems. In recent years, as the market demand for chip performance continues to rise, high-precision bandgap reference circuits have become an important development direction in this field. However, after various factors affecting the accuracy of the reference voltage have been resolved, the influence of mechanical stress has become an increasingly important obstacle to further improving the accuracy of the bandgap reference voltage.

[0003] Mechanical stress is a common non-ideal factor in the design and manufacture of analog integrated circuits. The source of this factor is mainly caused by the irregular deformation of the material introduced by the chip during the packaging / welding process. The deformation will exert contraction or extension stress on the chip, thereby affecting the electrical characteristics of the circuit device through the semiconductor piezoelectric effect. In the field of reference voltage sources, the actual impact of mechanical stress can be manifested as an error in the reference voltage after chip welding relative to the post-test adjustment, which makes the adjustment in the test phase invalid, resulting in reduced reference voltage accuracy and reduced circuit system performance.

[0004] Due to the randomness of the source and mechanism of mechanical stress, it is impossible to predict the stress impact and pre-adjust it before packaging / welding. In the engineering field, the common method is to perform secondary adjustments after packaging, which makes the testing process complicated and increases the cost, and can only reduce the impact of packaging stress, but cannot deal with the more critical welding stress impact.

[0005] In recent years, a small number of solutions have emerged to deal with the impact of mechanical stress. The usual solutions include: studying the stress mechanism and avoiding stress-sensitive factors by changing the layout structure and packaging method, coating the wafer surface with a polymer film that reduces stress during chip manufacturing or packaging, adding stress sensors to the circuit to digitally compensate for the reference voltage, etc. Although the above solutions reduce or eliminate the impact of stress, they have one or more of the following disadvantages: uncertain specific effects, increased circuit area, complex circuit structure, and increased manufacturing costs. Summary of the invention

[0006] In view of this, the present application provides a bandgap reference circuit and a compensation circuit to solve one or more defects of the existing solutions that the reference voltage changes greatly due to stress.

[0007] The embodiments of this specification provide the following technical solutions:

[0008] An embodiment of the present specification provides a compensation circuit, including: a high-order curvature compensation branch and / or a current compensation branch, the high-order curvature compensation branch is used to generate a corresponding first compensation amount, the current compensation branch is used to generate a corresponding second compensation amount, the first compensation amount is superimposed on the base-emitter voltage of a bipolar junction transistor in a bandgap reference circuit at a preset first ratio, and the second compensation amount is superimposed on the base-emitter voltage of the bipolar junction transistor in the bandgap reference circuit at a preset second ratio, so that the first compensation amount is used to eliminate the high-order term components of the temperature coefficient of the bandgap reference voltage, and the second compensation amount is used to eliminate the base-emitter voltage change of the bipolar junction transistor in the bandgap reference circuit caused by stress.

[0009] Preferably, the high-order curvature compensation branch includes a first bias current source 1, a first transistor 5 and a first resistor 10, wherein the first bias current source is a current source with a zero temperature coefficient; the base of the first transistor 5 is connected to the base of the bipolar junction transistor in the bandgap reference circuit, the collector of the first transistor 5 is provided with current bias by the first bias current source 1, the emitter of the first transistor 5 is connected to one end of the first resistor 10, and the other end of the first resistor 10 is connected to the connection point between the feedback resistor 11 and the ground resistor 12 of the bandgap reference circuit, wherein the emitter current of the first transistor 5 is used as the first compensation amount.

[0010] Preferably, the current compensation branch includes a second bias current source 4, a bias circuit, and a compensation voltage extraction circuit, wherein the second bias current source 4 is a current source proportional to the absolute temperature; the bias circuit is used to copy the bias current provided by the second bias current source 4 according to a preset third ratio, and provide the copied current to the compensation voltage extraction circuit as a bias current, so that the compensation voltage extraction circuit extracts the compensation voltage according to the change of the bias current; the compensation voltage extraction circuit extracts the first compensation voltage according to the change of the bias current, and the first compensation voltage is used as the second compensation amount.

[0011] Preferably, the compensation voltage extraction circuit includes a second transistor 9j, a third transistor 9l, a fourth transistor 9d, a fifth transistor 9e, a sixth transistor 9q and a second resistor 9k; wherein the emitter of the second transistor 9j is connected to the base of the third transistor 9l, the emitter of the second transistor 9j is connected to the drain of the fourth transistor 9d, the collector of the second transistor 9j is grounded, and the base of the second transistor 9j is connected to one end of the second resistor 9k; the emitter of the third transistor 9l is connected to the other end of the second resistor 9k and then to the drain of the sixth transistor 9q, and the collector of the third transistor 9l is connected to the drain of the fifth transistor 9e;

[0012] The fourth transistor 9d provides a pull-up current for the second transistor 9j, the fifth transistor 9e provides a pull-up current for the third transistor 9l, and the sixth transistor 9q provides a pull-down current for the third transistor 9l;

[0013] The base of the second transistor 9j is used to input the bias voltage provided by the base voltage node of the bipolar junction transistor in the bandgap reference circuit, and the emitter of the third transistor 91 is used to output the second compensation voltage to the outside.

[0014] Preferably, the compensation circuit further comprises a voltage isolation circuit, which is arranged between the compensation voltage extraction circuit and the base voltage node of the bipolar junction transistor in the bandgap reference circuit (i.e., the base common point of the NPN tube in the bandgap reference circuit), so that the base voltage of the bipolar junction transistor in the bandgap reference circuit is superimposed on the compensation voltage extraction circuit after passing through the voltage isolation circuit to form a first compensation voltage;

[0015] And / or, the compensation circuit further includes a loop feedback circuit, wherein the loop feedback circuit is used to form a first current mirror according to the second compensation voltage, and provide a pull-up current for the second transistor 9j and the third transistor 9l through the first current mirror, so that the compensation voltage extraction circuit forms a closed-loop feedback when extracting the second compensation voltage;

[0016] And / or, the compensation circuit also includes a compensation current generator, which includes a first trimming current mirror 9b, a second trimming current mirror 9o and a trimming circuit 9a, wherein the first trimming current mirror 9b is used to copy the pull-up current of the compensation voltage extraction circuit according to a preset ratio k, the second trimming current mirror 9o is used to copy the pull-down current of the compensation voltage extraction circuit according to a preset ratio k, and the trimming circuit 9a is used to trim the ratio k in the first trimming current mirror 9b and the second trimming current mirror 9o.

[0017] Preferably, the voltage isolation circuit includes a seventh transistor 9h, an eighth transistor 9i, a ninth transistor 9c and a tenth transistor 9p, the source of the seventh transistor 9h is connected to the drain of the ninth transistor 9c, the drain of the seventh transistor 9h is grounded, and the gate of the seventh transistor 9h is connected to the base voltage node of the bipolar junction transistor in the bandgap reference circuit as an isolation input terminal; the source of the eighth transistor 9i is connected to the drain of the tenth transistor 9p, and is used as an isolation output terminal to output the base voltage output by the bandgap reference circuit, the drain of the eighth transistor 9i is connected to the power supply terminal, and the gate of the eighth transistor 9i is connected to the source of the seventh transistor 9h; the source of the ninth transistor 9c is connected to the power supply terminal, the source of the tenth transistor 9p is grounded, and the gate of the ninth transistor 9c and the gate of the tenth transistor 9p are each used to form a replica tube of a current mirror, so that the seventh transistor 9h and the eighth transistor 9i operate at an equal current bias proportional to the absolute temperature.

[0018] Preferably, the loop feedback circuit includes an eleventh transistor 9n, a twelfth transistor 9t, a thirteenth transistor 9s and a fourteenth transistor 9f; wherein, the gate of the eleventh transistor 9n is used to input the second compensation voltage, the source of the eleventh transistor 9n is connected to the power supply terminal, the drain of the eleventh transistor 9n is connected to the drain of the twelfth transistor 9t, the drain of the twelfth transistor 9t is connected to the gate of the twelfth transistor 9t and the gate of the thirteenth transistor 9s, the source of the twelfth transistor 9t and the source of the thirteenth transistor 9s are grounded, the drain of the thirteenth transistor 9s is connected to the drain of the fourteenth transistor 9f, the drain of the fourteenth transistor 9f is connected to the gate, and the source of the fourteenth transistor 9f is connected to the power supply terminal; wherein, the eleventh transistor 9n acts as a current source, the twelfth transistor 9t and the thirteenth transistor 9s constitute a current mirror, and the fourteenth transistor 9f is used to provide a current bias proportional to the absolute temperature to the outside.

[0019] Preferably, the compensation voltage extraction circuit includes a fifteenth transistor 9m and a sixteenth transistor 9r, the base of the fifteenth transistor 9m is connected to the collector of the third transistor 9l, the collector of the fifteenth transistor 9m is connected to the power supply terminal, the emitter of the fifteenth transistor 9m is connected to the drain of the sixteenth transistor 9r, the source of the sixteenth transistor 9r is grounded, and the gate of the sixteenth transistor 9r is used to copy the current of the twelfth transistor 9t so that the fifteenth transistor 9m and the third transistor 9l have the same current bias.

[0020] Preferably, the first trimming current mirror 9b includes a seventeenth transistor, and the second trimming current mirror 9o includes an eighteenth transistor. The source of the seventeenth transistor is connected to the power supply terminal, and the drain of the seventeenth transistor is connected to the drain of the eighteenth transistor and serves as a compensation current terminal superimposed on the base-emitter voltage of the bipolar junction transistor in the bandgap reference circuit; the trimming circuit 9a includes a digital logic circuit, and the digital logic circuit is used to output a digital signal to control the trimming switches in the seventeenth transistor and the eighteenth transistor, and to turn on / off different trimming switches through the trimming code to change the width-to-length ratio of the seventeenth transistor and the eighteenth transistor, so as to change the current replication ratio k in the first trimming current mirror 9b and the second trimming current mirror 9o.

[0021] The present application also provides a bandgap reference circuit, comprising: a reference circuit of a Brokaw structure and a compensation circuit as described in any example of the present application;

[0022] The reference circuit of the Brokaw structure includes a first load resistor 2, a second load resistor 3, a feedback resistor 11, a ground resistor 12, a first bipolar junction transistor 6, a second bipolar junction transistor 7 and an amplifier 8; wherein the base of the first bipolar junction transistor 6 and the base of the second bipolar junction transistor 7 are used to input the feedback voltage of the output voltage of the amplifier 8; the collector of the first bipolar junction transistor 6 is connected to the power supply terminal through the first load resistor 2, and the collector of the second bipolar junction transistor 7 is connected to the power supply terminal through the second load resistor 3; the emitter of the first bipolar junction transistor 6 is connected to one end of the feedback resistor 11, and the other end of the feedback resistor 11 is connected to the emitter of the second bipolar junction transistor 7 and one end of the ground resistor 12 for inputting the first compensation amount and / or the second compensation amount provided by the compensation circuit, and the other end of the ground resistor 12 is grounded; the collector of the first bipolar junction transistor 6 and the collector of the second bipolar junction transistor 7 are respectively connected to the two input terminals of the amplifier 8.

[0023] Compared with the prior art, the at least one technical solution adopted in the embodiments of this specification can achieve the following beneficial effects:

[0024] Compared with the existing methods of passively reducing the influence of mechanical stress at home and abroad, the mechanical stress influence compensation circuit proposed in this application has the characteristics of adaptively adjusting stress, and can more flexibly adjust the compensation strength of the circuit according to the strength of the mechanical stress influence, effectively targeting the randomness of the mechanical stress influence, and eliminating the related mechanical stress influence that reduces the output voltage accuracy of the bandgap reference circuit.

[0025] In addition, in view of the electrical mechanism by which stress causes changes in the base-emitter voltage of the bipolar junction transistor, the core component of the bandgap reference circuit, which in turn affects the output voltage accuracy of the bandgap reference circuit, the stress influence is compensated by utilizing the device property that the base-emitter voltage changes of different types of bipolar junction transistors are different and proportional, thereby making the circuit structure proposed in the present invention have excellent consistency with the bandgap reference circuit without affecting the original accuracy of the bandgap reference circuit.

[0026] In addition, the core components of the compensation circuit and the core components of the bandgap reference circuit can be fully matched, so that the mechanical stress compensation structure proposed in this application has good durability and the compensation effect will not decrease with the aging of the system circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 It is a schematic diagram of the change of electrical characteristics of the compensation theory basis of the bandgap reference circuit in this application;

[0029] Figure 2 It is a structural schematic diagram of a bandgap reference circuit and a compensation circuit thereof in the present application;

[0030] Figure 3 is a schematic diagram of the structure of a transistor-based mechanical stress compensation circuit in this application;

[0031] Figure 4 is a schematic diagram of simulation results before and after mechanical stress compensation in this application;

[0032] List of reference numerals:

[0033] 1: a first bias current source, used to provide a zero temperature coefficient bias current; 2: a first load resistor; 3: a second load resistor; 4: a second bias current source, used to provide a bias current proportional to the absolute temperature; 5: a first transistor, which is a core transistor for curvature compensation of a bandgap reference voltage temperature curve; 6, 7: a first bipolar junction transistor and a second bipolar junction transistor, which are core transistors of a bandgap reference circuit; 8: an operational amplifier; 9: a trimming system in a bandgap reference compensation circuit; 10: a first resistor for curvature compensation bias; 11: a feedback resistor in a bandgap reference circuit, which is a bias resistor proportional to the absolute temperature; 12: a ground resistor in a bandgap reference circuit, which is a bias resistor proportional to the absolute temperature;

[0034] 9a: a trimming circuit, used to trim the replication ratio k of the current mirror; 9b: a first trimming current mirror, using the seventeenth transistor as a PMOS determined by the compensation current; 9c: a ninth transistor, used as a reference voltage isolation bias PMOS; 9d: a fourth transistor, used to bias the PMOS for the PNP type mechanical stress compensation transistor; 9e: a fifth transistor, used to bias the PMOS for the NPN type mechanical stress compensation transistor; 9f: a fourteenth transistor, used as a mechanical stress compensation transistor bias PMOS current mirror input tube; 9g: a twenty-first transistor, used as a bandgap reference voltage isolation PMOS bias PMOS current mirror input tube; 9h: a seventh transistor, used as a bandgap reference voltage isolation PMOS; 9i: an eighth transistor, used as a bandgap reference voltage isolation NMOS; 9j: a second transistor, used as a PNP type mechanical stress compensation transistor; 9k: a second resistor, used as a stress compensation transistor Compensation voltage extraction resistor; 9l: the third transistor, as an NPN type mechanical stress compensation transistor; 9m: the fifteenth transistor, as a base current compensation NPN; 9n: the eleventh transistor, used for the negative feedback loop PMOS; 9o: the second trimming current mirror, sampling the eighteenth transistor as the compensation current determination NMOS; 9p: the tenth transistor, as a reference voltage isolation bias NMOS; 9q: the sixth transistor, as an NPN type mechanical stress compensation transistor bias NMOS; 9r: the sixteenth transistor, as a base current compensation NPN bias NMOS; 9s: the thirteenth transistor, as an NMOS current mirror bias tube in the negative feedback loop; 9t: the twelfth transistor, as an NMOS current mirror input tube in the negative feedback loop; 9u: the twentieth transistor, a proportional to absolute temperature biased NMOS current mirror bias tube; 9v: the nineteenth transistor, a proportional to absolute temperature biased NMOS current mirror input tube. DETAILED DESCRIPTION

[0035] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0036] The following describes the implementation methods of the present application through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the following embodiments and the features in the embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0037] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0038] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0039] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the examples can be practiced without these specific details.

[0040] The impact of mechanical stress on devices is usually reflected as piezoelectric effect. Among them, the piezoelectric effect can affect various devices such as resistors and diodes, causing their electrical characteristics to change.

[0041] In the bandgap reference circuit, since the bipolar junction transistor is the iconic and most important device in the bandgap reference circuit, the piezoelectric effect of the bipolar junction transistor caused by mechanical stress is the most important factor affecting the reference voltage in the bandgap reference circuit.

[0042] Specifically, according to the nature of the piezoelectric effect, the way in which mechanical stress affects the bipolar junction transistor is by changing the minority carrier mobility and intrinsic carrier concentration of the base in the bipolar junction transistor, resulting in a change in the saturation current, which in turn causes a change in the base-emitter voltage. According to existing research, the base-emitter voltage changes of vertical PNP and NPN fabricated on the {001} wafer surface in the

[100] and

[110] stress directions within the stress range of ±180MPa can be referred to, for example. Figure 1 shown.

[0043] according to Figure 1It can be found from the curve that the base-emitter voltage changes of NPN and PNP under the same stress intensity and the same stress direction are inconsistent and have a certain ratio. This difference is caused by the smaller effect of stress on the hole-type minority carrier conductivity in PNP. In addition, since the piezoelectric effect is almost independent of current density, another key component of the bandgap reference is that the voltage proportional to absolute temperature is very insensitive to stress compared to the base-emitter voltage.

[0044] Therefore, based on this property, the present invention proposes an adaptive mechanical stress compensation circuit solution applied to a bandgap reference circuit.

[0045] The technical solutions provided by various embodiments of the present application are described below in conjunction with the accompanying drawings.

[0046] refer to Figure 2-Figure 3 The bandgap reference circuit used in this application is a traditional Brokaw structure, and the core device is two sets of bipolar junction transistors, which are vertical NPN transistors (see Figure 2 The first bipolar junction transistor 6 and the second bipolar junction transistor 7 are shown in the figure). In the Brokaw structure, the collectors of the first bipolar junction transistor 6 and the second bipolar junction transistor 7 are connected through load resistors (see Figure 2 The first load resistor 2 and the second load resistor 3 are connected to the system power supply, the nodes between the collectors of the first bipolar junction transistor 6 and the second bipolar junction transistor 7 and the load resistors are connected to the two input terminals of the amplifier 8, and the output terminal of the operational amplifier is connected to the bases of the two bipolar junction transistors to form feedback, thereby controlling the base voltages of the two bipolar junction transistors; in addition, the emitter of the first bipolar junction transistor 6 is connected to the upper end of the feedback resistor 11, the lower end of the feedback resistor 11 is connected to the emitter of the second bipolar junction transistor 7, and the lower end of the feedback resistor 11 is also connected to the ground line through the ground resistor 12. In addition, the base-emitter voltage node of the two bipolar junction transistors in the bandgap reference circuit is recorded as the emitter common point of the NPN tube in the bandgap reference circuit, that is, the connection point between the emitter of the first bipolar junction transistor 6 and the emitter of the second bipolar junction transistor 7 through the feedback resistor 11, which is also recorded as the emitter voltage node of the bandgap reference circuit. The connection point between the base of the first bipolar junction transistor 6 and the base of the second bipolar junction transistor 7 is recorded as the base voltage node of the bandgap reference circuit.

[0047] In some embodiments, the bandgap reference circuit of the present invention may also have a high-order curvature compensation function for the output voltage temperature curve, that is, a high-order curvature compensation branch performs compensation. Among them, the high-order curvature compensation branch is summarized, and the core device is an NPN bipolar junction transistor (such as Figure 2The collector of the transistor is biased by the first bias current source 1, and the base is connected to the bipolar junction transistor in the bandgap reference circuit (see Figure 2 The bases of the first bipolar junction transistor 6 and the second bipolar junction transistor 7 are connected and are also controlled by the output of the amplifier 8. In addition, the emitter of the transistor is connected to the lower end of the feedback 11 through the first resistor 10.

[0048] refer to Figure 2 As shown in the figure, the first transistor 5 and the first resistor 10 are compensation devices. According to existing research, when a current proportional to the absolute temperature is injected into the collector of a bipolar junction transistor, the expression of its base-emitter voltage with respect to temperature can be written as:

[0049]

[0050] in, is the base-emitter voltage of the transistor at the current temperature; is the bandgap voltage at the current temperature; is the base-emitter voltage at absolute zero; T is the current temperature, T 0 is absolute zero, Not related to temperature.

[0051] When a zero temperature coefficient current is injected into the collector of a bipolar junction transistor, the expression of its base-emitter voltage with respect to temperature can be written as:

[0052]

[0053] Therefore, through Figure 2 The circuit structure in can extract the high-order terms in the formula:

[0054]

[0055] By superimposing this high-order term on the bandgap reference voltage with a certain coefficient, the high-order term in the base-emitter voltage can be eliminated, thereby achieving curvature compensation of the bandgap reference voltage. In the compensation structure provided in the present application, V HC It is applied at both ends of the first resistor 10, converted into current and flows into the ground resistor 12, and the curvature compensation is completed through an appropriate ratio between the first resistor 10 and the ground 12.

[0056] In some embodiments, a stress compensation circuit is also proposed in the present invention.

[0057] For the stress compensation structure, the final compensation method is similar to the curvature compensation. The compensation current finally generated by the stress compensation module will be different and proportional to the base-emitter voltage changes of NPN and PNP under the same stress. The key to realizing adaptive stress influence compensation is to obtain the base-emitter voltage change difference between NPN and PNP under a certain stress, and superimpose it on the base-emitter voltage of the bipolar junction transistor in the bandgap reference structure in an appropriate proportion to eliminate the base-emitter voltage change caused by stress, that is, to achieve the following relationship:

[0058]

[0059] Where k is the compensation coefficient, which is determined by the ratio of the stress change of the base-emitter voltage of the NPN and PNP.

[0060] refer to Figure 2 and Figure 3 In the current compensation branch (refer to Figure 2 The second bias current source 4 and the trimming system 9 are shown in the figure. The trimming system 9 is biased by the second bias current source 4 which is proportional to the absolute temperature, and the compensation current at its output end is connected to the lower ends of the first resistor 10 and the feedback resistor 11. In addition, the power supply end and the ground end of the compensation circuit module are connected to the system power supply and the system ground wire respectively.

[0061] In the stress influence compensation circuit proposed by the present invention, the core devices are two sets of bipolar junction transistors, namely vertical PNP (reference Figure 3 The second transistor 9j) is schematically connected to the NPN (reference Figure 3 The emitter of the second transistor 9j is connected to the base of the third transistor 9l, and the two sets of bipolar junction transistors are provided with bias current by a current mirror (refer to Figure 3 9d and 9e are bias transistors shown in the figure). In addition, MOS transistors are used as current replicas (refer to Figure 3 The transistors 9c and 9p shown in the figure (transistors for copying current) use an equal current bias proportional to the absolute temperature to ensure that the base voltage of the second transistor 9j is consistent with the bandgap reference side voltage.

[0062] because Figure 3 The device connection method shown in the figure is a second resistor 9k connected between the base of the second transistor 9j and the emitter of the third transistor 9l, and the voltage across the second resistor 9k is the base-emitter voltage difference between the second transistor 9j and the third transistor 9l. When stress acts on the second transistor 9j and the third transistor 9l, the change in their base-emitter voltage will be converted into a change in the voltage across the second resistor 9k, and the magnitude and direction of the current flowing through the second resistor 9k will change accordingly.

[0063] The working principle is as follows:

[0064] Investigating the current relationship between the bias branch of the third transistor 91 and the branch of the second resistor 9k, the following relationship can be obtained according to Kirchhoff's current law:

[0065]

[0066] or

[0067]

[0068] The relationship between the above two equations is determined by the relative size of the base-emitter voltage of the second transistor 9j and the third transistor 9l. When the base-emitter voltage of the second transistor 9j is greater than the base-emitter voltage of the third transistor 9l, the voltage on the right side of the second resistor 9k is higher than the left side, and the current direction of the second resistor 9k is to the left. At this time, equation (1) is established; when the base-emitter voltage of the second transistor 9j is less than the base-emitter voltage of the third transistor 9l, the voltage on the left side of the second resistor 9k is higher than the right side, and the current direction is to the right. At this time, equation (2) is established. When the base-emitter voltage of the second transistor 9j and the third transistor 9l changes due to stress or temperature, equations (1) and (2) still remain valid. Even if the size relationship between the base-emitter voltage of the second transistor 9j and the third transistor 9l changes due to the change, it can still be guaranteed that only one of equations (1) and (2) is established.

[0069] In some embodiments, considering that the third transistor 91 has a base current, the size of the base current may have an impact in high-precision application scenarios. In this case, further compensation can be made to reduce the impact of the base current to achieve higher precision. Among them, the base current of the third transistor 91 will flow to the right into the branch where the right node of the second resistor 9k is located, which may affect the accuracy of the current change flowing through the second resistor 9k. Therefore, in order to correct this problem, an NPN (reference) connected to the base and the collector of the third transistor 91 is added to the circuit. Figure 3 Schematic diagram of the fifteenth transistor 9m for compensation). Figure 3 As can be seen from the schematic circuit diagram, the fifteenth transistor 9m uses the same current bias as the third transistor 9l, and therefore has the same base current. At this time, the base current of the fifteenth transistor 9m flows rightward out of the collector branch of the third transistor 9l, and this current compensates for the base current of the third transistor 9l flowing into this branch, so that the above equations (1) and (2) are strictly established, thereby reducing the influence of the base current of the third transistor 9l and achieving higher accuracy.

[0070] In some embodiments, the compensation coefficient determination circuit replicates the pull-up bias current of the third transistor 91 and the pull-down bias current of the third transistor 91 at a specific ratio k through a current mirror to form the same current relationship as the node on the right side of the second resistor 9k. According to Kirchhoff's current law, a compensation current of k times and in the same direction as the current flowing through the second resistor 9k is formed at the compensation current end, so that it flows back to the bandgap reference circuit, that is, the resistor under the emitter of the second bipolar junction transistor 7 (reference Figure 2 Schematic diagram of the resistance to ground in the bandgap reference circuit 12).

[0071] In some embodiments, the exact k value that achieves the best compensation effect may not be completely predetermined. Therefore, in order to find the best compensation coefficient, a current mirror that can be controlled by the trimming circuit 9a is also designed in the compensation coefficient determination circuit (see Figure 3 9c, 9p transistors shown in the figure), the replication ratio of the current mirror can be flexibly changed to change the compensation coefficient.

[0072] In the implementation, the first trimming current mirror 9b includes a seventeenth transistor, and the second trimming current mirror 9o includes an eighteenth transistor. The source of the seventeenth transistor is connected to the power supply terminal, and the drain of the seventeenth transistor is connected to the drain of the eighteenth transistor as a compensation current reference terminal so that the trimming circuit 9a performs trimming based on the compensation current reference terminal. Among them, the seventeenth transistor and the eighteenth transistor are circuit replicators, so the trimming circuit 9a performs trimming based on the compensation current reference terminal. The trimming circuit 9a is composed of digital logic circuits such as registers and decoders, and outputs digital signals to control switches in the seventeenth transistor and the eighteenth transistor, and opens / closes different switches according to the trimming code, and changes the current replication ratio by changing the width-to-length ratio of the seventeenth transistor and the eighteenth transistor, thereby changing the second compensation ratio of the second compensation amount superimposed on the base-emitter voltage of the bipolar junction transistor in the bandgap reference circuit, so that the stress compensation effect is optimized.

[0073] In some implementations, a negative feedback loop is added to the compensation circuit, which can make the collector of the third transistor 91 have an appropriate bias potential, ensure that the bias of the third transistor 91 is normal, and further improve the compensation stability.

[0074] The working principle of the feedback loop is as follows: if the collector voltage of the third transistor 91 is too high, this will cause the gate-source voltage of the eleventh transistor 9n to be too small, thereby making the leakage current of the eleventh transistor 9n too small, so that the current mirror (reference Figure 3 The current copied by the 9s and 9t transistors shown in the figure will be too small, which will cause the current mirror (reference Figure 3The copied current of the transistors 9e and 9f shown in the diagram is too small. The 9e in the current mirror is the pull-up bias current of the collector end of the third transistor 91, and its reduction will cause the collector voltage of the third transistor 91 to decrease, causing it to return to the equilibrium point. If the collector voltage of the third transistor 91 is too low, a similar loop feedback action as described above will occur, eventually causing the collector voltage to increase and return to the equilibrium point.

[0075] Therefore, due to the existence of a negative feedback loop in the bandgap reference circuit, the change in the NPN base voltage is equivalent to the change in the emitter voltage. According to the above-mentioned formula, the base-emitter voltage change caused by the stress on the bandgap reference voltage is equal in intensity to the emitter voltage change caused by the compensation current, but in opposite directions. Based on the feedback loop, the influence of stress on the bandgap reference voltage can be fully compensated, so the reference is more accurate and stable.

[0076] In some implementations, in order to reduce the influence of the base current of the second transistor 9j on the operation of the reference circuit, a MOS tube may be used to form a voltage isolation circuit (see Figure 3 The MOS transistors for isolation (ie, 9h and 9i) can be biased with an equal current proportional to the absolute temperature (e.g., using Figure 3 9c and 9p are biased as shown in the schematic), ensuring that the base voltage of the second transistor 9j is consistent with the bandgap reference side voltage, that is, the compensation voltage formed on the second transistor 9j and the third transistor 9l on the second resistor 9k is superimposed on the base bias voltage of the bandgap reference voltage to achieve compensation.

[0077] In summary, in order to verify the effectiveness of the adaptive mechanical stress compensation circuit proposed based on the electrical model of bipolar junction transistor stress, the base-emitter voltage change of the bipolar junction transistor when the circuit is affected by stress is simulated in the simulator, and the output voltage change when the stress compensation function is turned on and off is compared. The simulation results are as follows: Figure 4 .from Figure 4 It can be seen that the stress compensation function plays a great role in improving the accuracy of the reference voltage. The impact of stress on the output voltage when applied to the bandgap reference circuit is reduced by 92%.

[0078] This embodiment also discloses a design method for a mechanical stress compensation circuit, which may also be a design method for a mechanical stress compensation circuit in a bandgap reference circuit, or a design method for a mechanical stress compensation circuit used in various types of analog integrated circuits. This method may be implemented by the system of the present invention and / or other replaceable components. For example, the method disclosed in the present invention is implemented by using various components in the system of the present invention. Without causing conflicts or contradictions, the entirety and / or part of the preferred implementation methods of other embodiments may serve as a supplement to this embodiment.

[0079] In this specification, the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the embodiments described later, the description is relatively simple, and the relevant parts can be referred to the partial description of the previous embodiments.

[0080] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A compensation circuit, characterized in that: include: A high-order curvature compensation branch and / or a current compensation branch, wherein the high-order curvature compensation branch is used to generate a corresponding first compensation amount, and the current compensation branch is used to generate a corresponding second compensation amount, wherein the first compensation amount is superimposed on a base-emitter voltage node of a bipolar junction transistor in a Brokaw bandgap reference circuit at a preset first ratio, and the second compensation amount is superimposed on a base-emitter voltage node of a bipolar junction transistor in the bandgap reference circuit at a preset second ratio, so as to eliminate the high-order term components of the bandgap reference voltage temperature coefficient by using the first compensation amount, and eliminate the base-emitter voltage change of the bipolar junction transistor caused by stress in the bandgap reference circuit by using the second compensation amount; wherein the base-emitter voltage node of the bipolar junction transistor in the bandgap reference circuit refers to the connection point between the emitter of the first bipolar junction transistor (6) in the bandgap reference circuit and the emitter of the second bipolar junction transistor (7) through a feedback resistor (11).

2. The compensation circuit according to claim 1, characterized in that: The high-order curvature compensation branch comprises a first bias current source (1), a first transistor (5) and a first resistor (10), wherein the first bias current source is a current source with a zero temperature coefficient; the base of the first transistor (5) is connected to the base of a bipolar junction transistor in a bandgap reference circuit, the collector of the first transistor (5) is provided with a current bias by the first bias current source (1), the emitter of the first transistor (5) is connected to one end of the first resistor (10), and the other end of the first resistor (10) is connected to a connection point between a feedback resistor (11) and a ground resistor (12) of the bandgap reference circuit, wherein the emitter current of the first transistor (5) serves as the first compensation amount.

3. The compensation circuit according to claim 1, characterized in that: The current compensation branch comprises a second bias current source (4), a bias circuit, and a compensation voltage extraction circuit, wherein the second bias current source (4) is a current source proportional to absolute temperature; the bias circuit is used to copy the bias current provided by the second bias current source (4) according to a preset third ratio, and provide the copied current as a bias current to the compensation voltage extraction circuit, so that the compensation voltage extraction circuit extracts the compensation voltage according to the change of the bias current; The compensation voltage extraction circuit extracts a second compensation voltage according to a change in the bias current, and the second compensation voltage is used as the second compensation amount.

4. The compensation circuit according to claim 3, characterized in that: The compensation voltage extraction circuit comprises a second transistor (9j), a third transistor (9l), a fourth transistor (9d), a fifth transistor (9e), a sixth transistor (9q) and a second resistor (9k); wherein the emitter of the second transistor (9j) is connected to the base of the third transistor (9l), the emitter of the second transistor (9j) is connected to the drain of the fourth transistor (9d), the collector of the second transistor (9j) is grounded, the base of the second transistor (9j) is connected to one end of the second resistor (9k); the emitter of the third transistor (9l) is connected to the other end of the second resistor (9k); One end is connected to the drain of the sixth transistor (9q), and the collector of the third transistor (9l) is connected to the drain of the fifth transistor (9e); the fourth transistor (9d) provides a pull-up current for the second transistor (9j), the fifth transistor (9e) provides a pull-up current for the third transistor (9l), and the sixth transistor (9q) provides a pull-down current for the third transistor (9l); the base of the second transistor (9j) is used to input a bias voltage provided by a base voltage node of a bipolar junction transistor in a bandgap reference circuit, and the emitter of the third transistor (9l) is used to output a second compensation voltage to the outside.

5. The compensation circuit according to claim 4, characterized in that: The compensation circuit further includes a voltage isolation circuit, which is arranged between the compensation voltage extraction circuit and the base voltage node of the bipolar junction transistor in the bandgap reference circuit, so that the base voltage of the bipolar junction transistor in the bandgap reference circuit is superimposed on the compensation voltage extraction circuit after passing through the voltage isolation circuit to form a first compensation voltage; And / or, the compensation circuit further comprises a loop feedback circuit, wherein the loop feedback circuit is used to form a first current mirror according to the second compensation voltage, and provide a pull-up current for the second transistor (9j) and the third transistor (9l) through the first current mirror, so that the compensation voltage extraction circuit forms a closed-loop feedback when extracting the second compensation voltage; And / or, the compensation circuit further comprises a compensation current generator, the compensation current generator comprising a first trimming current mirror (9b), a second trimming current mirror (9o) and a trimming circuit (9a), wherein the first trimming current mirror (9b) is used to replicate the pull-up current of the compensation voltage extraction circuit at a preset ratio k, the second trimming current mirror (9o) is used to replicate the pull-down current of the compensation voltage extraction circuit at a preset ratio k, and the trimming circuit (9a) is used to trim the ratio k in the first trimming current mirror (9b) and the second trimming current mirror (9o).

6. The compensation circuit according to claim 5, characterized in that: The voltage isolation circuit comprises a seventh transistor (9h), an eighth transistor (9i), a ninth transistor (9c) and a tenth transistor (9p); the source of the seventh transistor (9h) is connected to the drain of the ninth transistor (9c), the drain of the seventh transistor (9h) is grounded, and the gate of the seventh transistor (9h) is connected to the base voltage node of the bipolar junction transistor in the bandgap reference circuit as an isolation input terminal; the source of the eighth transistor (9i) is connected to the drain of the tenth transistor (9p) and is used as an isolation output terminal for outputting the base voltage output by the bandgap reference circuit; the drain of the eighth transistor (9i) is connected to the power supply terminal, and the gate of the eighth transistor (9i) is connected to the source of the seventh transistor (9h); the source of the ninth transistor (9c) is connected to the power supply terminal, the source of the tenth transistor (9p) is grounded, and the gates of the ninth transistor (9c) and the tenth transistor (9p) are respectively used to form a replica tube of a current mirror, so that the seventh transistor (9h) and the eighth transistor (9i) work at an equal current bias proportional to the absolute temperature.

7. The compensation circuit according to claim 5, characterized in that: The loop feedback circuit comprises an eleventh transistor (9n), a twelfth transistor (9t), a thirteenth transistor (9s) and a fourteenth transistor (9f); wherein the gate of the eleventh transistor (9n) is connected to the collector of the third transistor (9l) for inputting the collector bias potential of the third transistor (9l), the source of the eleventh transistor (9n) is connected to the power supply terminal, the drain of the eleventh transistor (9n) is connected to the drain of the twelfth transistor (9t), the drain of the twelfth transistor (9t) is connected to the gate of the twelfth transistor (9t), and the gate of the twelfth transistor (9t). The gate of the thirteenth transistor (9s) is connected, the source of the twelfth transistor (9t) and the source of the thirteenth transistor (9s) are grounded, the drain of the thirteenth transistor (9s) is connected to the drain of the fourteenth transistor (9f), the drain of the fourteenth transistor (9f) is connected to the gate, and the source of the fourteenth transistor (9f) is connected to the power supply terminal; wherein the eleventh transistor (9n) serves as a current source, the twelfth transistor (9t) and the thirteenth transistor (9s) form a current mirror, and the fourteenth transistor (9f) is used to provide a current bias proportional to the absolute temperature to the outside.

8. The compensation circuit according to claim 7, characterized in that: The compensation voltage extraction circuit comprises a fifteenth transistor (9m) and a sixteenth transistor (9r), wherein the base of the fifteenth transistor (9m) is connected to the collector of the third transistor (9l), the collector of the fifteenth transistor (9m) is connected to the power supply terminal, the emitter of the fifteenth transistor (9m) is connected to the drain of the sixteenth transistor (9r), the source of the sixteenth transistor (9r) is grounded, and the gate of the sixteenth transistor (9r) is used to replicate the current of the twelfth transistor (9t) so that the fifteenth transistor (9m) and the third transistor (9l) have the same current bias.

9. The compensation circuit according to claim 5, characterized in that: The first trimming current mirror (9b) includes a seventeenth transistor, and the second trimming current mirror (9o) includes an eighteenth transistor. The source of the seventeenth transistor is connected to the power supply terminal, and the drain of the seventeenth transistor is connected to the drain of the eighteenth transistor and serves as a compensation current terminal superimposed on the base-emitter voltage of the bipolar junction transistor in the bandgap reference circuit. The trimming circuit (9a) includes a digital logic circuit, and the digital logic circuit is used to output a digital signal to control the trimming switches in the seventeenth transistor and the eighteenth transistor, and to turn on / off different trimming switches through the trimming code, so as to change the width-to-length ratio of the seventeenth transistor and the eighteenth transistor, so as to change the current replication ratio k in the first trimming current mirror (9b) and the second trimming current mirror (9o); And / or, the bias circuit comprises a nineteenth transistor (9v), a twentieth transistor (9u), and a twenty-first transistor (9g), wherein the drain of the nineteenth transistor (9v) is used to input the bias circuit of the second bias current source (4), the drain and gate of the nineteenth transistor (9v) are connected, the gate of the nineteenth transistor (9v) is connected to the gate of the twentieth transistor (9u), the source of the twentieth transistor (9u) and the source of the nineteenth transistor (9v) are grounded, the drain of the twentieth transistor (9u) is connected to the drain of the twenty-first transistor (9g), the drain and gate of the twenty-first transistor (9g) are connected, and the source of the twenty-first transistor (9g) is connected to the power supply terminal; the gate of the nineteenth transistor (9v) is used to provide a bias current proportional to the absolute temperature, the twentieth transistor (9u) is used to replicate the current of the nineteenth transistor (9v), and the gate of the twenty-first transistor (9g) is used to provide a bias current proportional to the absolute temperature.

10. A bandgap reference circuit, characterized in that: include: A Brokaw structure reference circuit and a compensation circuit as claimed in any one of claims 1 to 9; The Brokaw structure reference circuit comprises a first load resistor (2), a second load resistor (3), a feedback resistor (11), a ground resistor (12), a first bipolar junction transistor (6), a second bipolar junction transistor (7) and an amplifier (8); wherein the base of the first bipolar junction transistor (6) and the base of the second bipolar junction transistor (7) are used to input a feedback voltage of an output voltage of the amplifier (8); the collector of the first bipolar junction transistor (6) is connected to a power supply terminal via the first load resistor (2), and the collector of the second bipolar junction transistor (7) is connected to a power supply terminal via the first load resistor (2). The first bipolar junction transistor (6) is connected to the power supply terminal through the second load resistor (3); the emitter of the first bipolar junction transistor (6) is connected to one end of the feedback resistor (11); the other end of the feedback resistor (11) is connected to the emitter of the second bipolar junction transistor (7) and one end of the ground resistor (12) for inputting the first compensation amount and / or the second compensation amount provided by the compensation circuit; the other end of the ground resistor (12) is grounded; the collector of the first bipolar junction transistor (6) and the collector of the second bipolar junction transistor (7) are respectively connected to the two input terminals of the amplifier (8).

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